Quick response control method and system for transient stability of power system

Abstract

The invention discloses an electric power system transient stability rapid response control method and system, and relates to the technical field of electric power systems, and the method comprises the steps: collecting a transient harmonic current signal generated by a power grid fault in real time through a harmonic detection unit connected to a DC bus of an energy storage converter, and calculating the phase offset of the transient harmonic current signal; generating a power control instruction through a pre-configured hardware mapping circuit based on the phase offset; acquiring a current differential signal by using a power grid line current sensor, and identifying a path of transient energy flowing to a key unit based on a power grid topological structure; for the path, dynamically forming a virtual high-impedance wall on the target line; and on a consumption path predefined according to the power grid topological structure, controlling the energy storage converter to operate in a current source mode and configuring a reverse power characteristic so as to absorb the energy flow turned by the virtual high-impedance wall.

Description

Technical Field

[0001] This application relates to the field of power system technology, and more specifically, to a method and system for rapid response control of transient stability in power systems. Background Technology

[0002] As a vital energy infrastructure supporting social production and daily life, the transient stability of the power system directly impacts the safe operation of the power grid under sudden disturbances. When the system encounters shocks such as short-circuit faults or fluctuations in renewable energy power, the ability to quickly restore synchronous operation and avoid cascading failures caused by power angle instability not only affects the reliability of continuous power supply but also is closely related to industrial production safety and the guarantee of electricity supply for residential use. However, existing transient control technologies still face significant challenges. On the one hand, traditional control strategies rely on software algorithms such as digital signal processors to achieve power regulation, resulting in long signal processing links and high response delays, making it difficult to meet the rapid response requirements of transient processes. For example, during grid faults, phase-locked loops are prone to instability due to phase abrupt changes, leading to the synchronous failure of energy storage converters and the grid.

[0003] There is currently no effective solution to the above problems. Summary of the Invention

[0004] This application provides a method and system for rapid response control of transient stability in power systems to solve the above-mentioned technical problems.

[0005] This application provides a fast response control method for transient stability in power systems, comprising: real-time acquisition of transient harmonic current signals generated by grid faults through a harmonic detection unit connected to the DC bus of an energy storage converter, and calculation of the phase offset of the transient harmonic current signals; generation of power control commands based on the phase offset through a pre-configured hardware mapping circuit; transmission of the power control commands to the power semiconductor drive unit of the energy storage converter, bypassing the digital signal processor to drive the power module to perform transient stability response; acquisition of current differential signals using grid line current sensors, and identification of paths for transient energy flow to key generating units based on the grid topology; dynamic formation of virtual high-impedance walls on the target lines for the paths; and control of the energy storage converter to operate in current source mode and configure reverse power characteristics on absorption paths predefined according to the grid topology to absorb energy flows redirected by the virtual high-impedance walls.

[0006] This application provides a power system transient stability fast response control system, comprising: a phase offset calculation module, used to collect transient harmonic current signals generated by grid faults in real time through a harmonic detection unit connected to the DC bus of the energy storage converter, and calculate the phase offset of the transient harmonic current signals; a power control command generation module, used to generate power control commands based on the phase offset through a pre-configured hardware mapping circuit; a transient stability response module, used to transmit the power control commands to the power semiconductor drive unit of the energy storage converter, bypassing the digital signal processor to drive the power module to execute transient stability response; a transient energy flow path identification module, used to obtain current differential signals using grid line current sensors, and identify the path of transient energy flow to key units based on the grid topology; a virtual high impedance wall formation module, used to dynamically form a virtual high impedance wall on the target line for the path; and an energy flow absorption module, used to control the energy storage converter to operate in current source mode and configure reverse power characteristics on the absorption path predefined according to the grid topology, so as to absorb the energy flow diverted by the virtual high impedance wall.

[0007] Based on the embodiments provided in this application, on the one hand, by real-time acquisition of transient harmonic current signals and calculation of phase offset by a harmonic detection unit connected to the DC bus of the energy storage converter, and by directly generating power control commands in combination with a pre-configured hardware mapping circuit, and by transmitting the commands to the power semiconductor drive unit without the digital signal processor, the signal processing link delay when power regulation is traditionally performed by software algorithms such as digital signal processors can be reduced, the speed of transient response can be improved, and the problem of synchronous failure of energy storage converter and grid caused by phase change can be avoided.

[0008] On the other hand, by utilizing grid line current sensors to acquire current differential signals and identifying the path of transient energy flow to key generating units based on the grid topology, and by dynamically forming a virtual high-impedance wall on the target line, and controlling the energy storage converter to operate in current source mode on a predefined absorption path and configuring reverse power characteristics to absorb the redirected energy flow, the critical path of transient energy flow can be accurately identified and dynamic control can be achieved. This enhances the adaptability to grid topology changes, facilitates the efficient guidance and absorption of transient energy, and reduces the risk of local voltage oscillations or power backflow. This invention, through the coordinated control of hardware mapping circuits and virtual impedance walls, significantly improves the response speed and control accuracy of the energy storage system to grid transient disturbances. Specific beneficial effects are as follows:

[0009] By deploying harmonic detection units on the DC bus to capture transient harmonic signals in real time and directly generating drive commands using pre-configured hardware mapping circuits, the software algorithm link of the digital signal processor is completely bypassed, achieving a simplified optimization of the transient response control path at the physical layer. This architecture eliminates the combined effects of sampling delay, algorithm iteration, and communication delay in traditional control methods, enabling the energy storage system to synchronously sense and trigger adjustment actions at the moment of grid fault, thus gaining valuable time margin for transient stability control.

[0010] By identifying transient energy propagation paths based on the power grid topology and creatively achieving proactive guidance and directional control of transient energy flow through the dynamic formation of virtual high-impedance walls on critical lines, this mechanism, unlike traditional passive current limiting methods, can intelligently reconstruct energy transmission paths based on real-time fault characteristics. It precisely guides excess energy to predefined energy storage and absorption paths, effectively preventing transient energy from impacting critical units and significantly improving the power angle stability and frequency support capability of the power grid during faults.

[0011] By configuring a current source mode and reverse power characteristics in the absorption path, the energy storage converter can actively absorb the energy flow redirected by the virtual high-impedance wall during faults, forming a closed-loop control system of "detection-isolation-absorption". This multi-modal collaborative strategy not only solves the power backflow problem that is prone to occur in traditional energy storage systems during transient processes, but also achieves adaptive adjustment to different fault types and grid topologies through dynamic configuration of reverse power characteristics, greatly improving the practical value of energy storage systems in complex transient scenarios. Attached Figure Description

[0012] The accompanying drawings, which are included to provide a further understanding of embodiments of the invention and form part of this application, illustrate exemplary embodiments of the invention and, together with their description, serve to explain the invention and do not constitute an undue limitation thereof. In the drawings:

[0013] Figure 1 This is a flowchart of an optional power system transient stability fast response control method according to an embodiment of this application;

[0014] Figure 2 This is a flowchart of another optional power system transient stability fast response control method according to an embodiment of this application;

[0015] Figure 3 This is a structural diagram of an optional power system transient stability fast response control system according to an embodiment of this application.

[0016] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0018] Optionally, such as Figure 1 As shown, this application provides a fast response control method for transient stability of power systems, including:

[0019] S101, through the harmonic detection unit connected to the DC bus of the energy storage converter, collects the transient harmonic current signal generated by the grid fault in real time, and calculates the phase offset of the transient harmonic current signal.

[0020] It should be noted that in this application, the Energy Storage Converter (ESC) is the core equipment connecting the energy storage device (such as lithium battery, flywheel, etc.) and the power system. Its main function is to realize the AC-DC conversion and power regulation of electrical energy.

[0021] The core of energy storage devices is electrical energy, which can be either direct current (such as electrochemical energy storage such as lithium batteries, lead-acid batteries, and supercapacitors, as well as direct current stored in photovoltaic direct storage systems) or alternating current (in a few scenarios, such as flywheel energy storage that indirectly stores alternating current through mechanical kinetic energy, or alternating current that is directly adapted through an inverter).

[0022] In terms of the source of electricity, it can be electricity generated by renewable energy sources such as photovoltaics and wind power (which can be used to smooth the output of intermittent energy through energy storage), or electricity from traditional power sources such as thermal power and hydropower (used to smooth load fluctuations).

[0023] Energy storage devices are a type of flexible regulation resource in the power system, and this attribute makes them a key support for the transient stability control of the power system.

[0024] In some embodiments, an energy storage converter refers to a converter with a hardware direct drive interface (such as a 100kW-class energy storage converter), whose DC bus is connected in parallel with a high-frequency current transformer (100kHz bandwidth).

[0025] Transient harmonic current signals refer to the 250Hz (5th) and 350Hz (7th) harmonic currents that emerge in the DC bus when a three-phase short circuit fault occurs in the power grid (for example, when a fault occurs in a 220kV line, the amplitude of the 250Hz current detected in the DC bus suddenly increases by 150A). The phase offset of these signals directly reflects the severity of the fault.

[0026] In practical implementation, when a short-circuit fault occurs in the power grid, the harmonic detection unit synchronously captures high-frequency current fluctuations through the DC bus current transformer and quickly calculates the phase deviation (such as a 30° phase shift of the 5th harmonic) based on the crystal oscillator reference clock, providing fault characteristic quantities for rapid hardware response.

[0027] S102 generates power control commands based on the phase offset through a pre-configured hardware mapping circuit.

[0028] Among them, the pre-configured hardware mapping circuit uses a three-stage voltage comparator (0.8V / 1.6V / 2.4V threshold) to build a hardware logic chain, which directly maps the phase offset (such as 30°→3V voltage) into power control commands without the need for software algorithm iteration.

[0029] In practical implementation, if a fault causes the 5th harmonic phase to shift by 22° (corresponding to 2.2V voltage), the 0.8V and 1.6V comparators in the hardware circuit will be triggered simultaneously, automatically selecting the highest threshold to generate an 80% rated power absorption command, and completing the command conversion within 1μs.

[0030] S103 transmits the power control command to the power semiconductor drive unit of the energy storage converter, bypassing the digital signal processor to drive the power module to perform transient stability response;

[0031] Among them, the power semiconductor driving unit is used to drive the circuit of power semiconductor devices such as insulated gate bipolar transistors (IGBTs). After receiving the level signal, it generates a driving current (such as a 2A driving current) to control the on and off of the device.

[0032] Digital Signal Processor (DSP): A chip used for signal processing and algorithm calculation in traditional control schemes. This application skips this chip to reduce processing latency.

[0033] In actual implementation, the power control commands generated by the hardware are directly transmitted to the power semiconductor drive unit of the energy storage converter, bypassing the software processing flow of the digital signal processor, and quickly driving the operation of power modules such as insulated gate bipolar transistors.

[0034] S104: Use the power grid line current sensor to obtain the current differential signal, and identify the path of transient energy flow to key units based on the power grid topology.

[0035] Among them, the differential current signal is the rate of change of the line current with respect to time, with the unit being amperes per millisecond (A / ms), which is used to characterize the intensity of the current change (e.g., the differential current during a line fault = 400A / ms).

[0036] The topology of a power grid represents the physical connection relationship between components such as generators, transformers, and transmission lines in a power grid (such as the ring power grid structure formed by a 220kV substation and generator sets).

[0037] The key units are generators with low inertia or located at weak nodes in the power grid (such as the equivalent units of grid-connected inverters in wind farms with a rated capacity of less than 100MW), which are prone to instability during transient processes.

[0038] In practical implementation, current differential signals are collected by current sensors on power grid lines. Combined with the power grid topology, the specific paths through which transient energy is transmitted to key generating units are analyzed and identified. For example, in a 220kV ring power grid, when a fault occurs on a transmission line, the current sensor detects a sudden change in the current differential signal (500A / ms). Based on the power grid topology analysis, it is determined that transient energy flows to a 50MW photovoltaic power station (key generating unit) through two parallel transmission lines.

[0039] S105, for the path, dynamically forms a virtual high-impedance wall on the target line;

[0040] Among them, the virtual high impedance wall is made by outputting a specific current through the energy storage converter to make the target line present an equivalent high impedance characteristic, rather than an actual physical component (such as increasing the equivalent impedance of a line from 0.1Ω to 12Ω).

[0041] Along the identified transient energy transmission path, a specific current is output through an energy storage converter, significantly increasing the equivalent impedance of the target line and thus hindering the flow of transient energy. For example, at the beginning of the target line, the energy storage converter outputs a 100A current with a 180° phase difference from the line voltage, increasing the equivalent impedance of the line from 0.2Ω to 15Ω, as if a high-impedance element were connected in series in the line, blocking the flow of transient energy to the critical unit.

[0042] S106, on the absorption path predefined according to the grid topology, controls the energy storage converter to operate in current source mode and configure reverse power characteristics to absorb the energy flow redirected by the virtual high impedance wall.

[0043] Among them, the current source mode refers to the energy storage converter operating in a mode of outputting constant current (rather than constant voltage mode), such as setting the output current to 200A.

[0044] Reverse power characteristic: The energy storage converter absorbs active power from the grid (power flow is grid → energy storage), rather than sending power back to the grid (e.g., absorbing 50kW of active power).

[0045] In practical implementation, along the pre-planned energy absorption path in the power grid topology, the energy storage converter is controlled to operate in constant current source mode and configured to absorb active power, in order to receive and consume transient energy flows guided by the virtual high-impedance wall. For example, when the virtual high-impedance wall guides transient energy to the predefined absorption path, the energy storage converter operates in current source mode, outputting 150A current to absorb energy, which is equivalent to connecting a 150A current load in the absorption path and storing the energy in the energy storage system.

[0046] Furthermore, the transient harmonic current signal generated by the grid fault is acquired in real time by a harmonic detection unit connected to the DC bus of the energy storage converter, and the phase offset of the transient harmonic current signal is calculated, including:

[0047] Multiple high-frequency current transformers connected in parallel to the DC bus are used to synchronously capture transient harmonic current signals.

[0048] Among them, high-frequency current transformers are current transformers with a bandwidth of not less than 50kHz. For example, a current transformer with a bandwidth of 100kHz can accurately collect harmonic currents below 50kHz.

[0049] By connecting multiple high-frequency current transformers in parallel on the DC bus, transient harmonic current signals can be acquired synchronously, thereby improving the accuracy and reliability of signal acquisition. For example, connecting three 100kHz bandwidth current transformers in parallel on a 750V DC bus to synchronously acquire 10kHz harmonic currents during a fault reduces sampling errors compared to using a single transformer.

[0050] The captured transient harmonic current signal is input into a bandpass filter, and the center frequency of the bandpass filter is dynamically adjusted according to the dominant harmonic frequency in the historical fault data.

[0051] The center frequency of the bandpass filter is the center frequency at which the signal is allowed to pass through, such as 250Hz (corresponding to the 5th harmonic) or 350Hz (corresponding to the 7th harmonic).

[0052] In practice, the acquired transient harmonic current signal is input into a bandpass filter, whose center frequency is automatically adjusted based on the dominant harmonic frequencies commonly observed in historical faults, in order to filter out noise and retain the target harmonic signal. For example, historical fault data from a certain regional power grid shows that the probability of the 5th harmonic (250Hz) occurring is 60%, and the probability of the 7th harmonic (350Hz) occurring is 30%. The initial center frequency of the bandpass filter is set to 250Hz; when three consecutive faults are dominated by the 7th harmonic, the center frequency is automatically switched to 350Hz.

[0053] The filtered transient harmonic current signal is subjected to common-mode noise suppression through a differential amplifier circuit, wherein the amplifier gain is automatically adjusted according to the background noise intensity.

[0054] Common-mode noise is an interference signal that appears simultaneously on both the positive and negative poles of the signal, such as 50Hz power frequency noise (amplitude ±5mV).

[0055] Differential amplifier circuits are used to process the filtered signal to suppress common-mode noise interference and improve the quality of harmonic current signals. For example, if the input signal is a 10mV harmonic signal superimposed with 5mV common-mode noise, after processing by the differential amplifier circuit, the common-mode noise is suppressed to ±0.5mV, the harmonic signal is amplified to 20mV, and the signal-to-noise ratio is improved from 2:1 to 40:1.

[0056] Based on the noise-reduced transient harmonic current signal, the time difference between the rising edges of two consecutive harmonic cycles is measured.

[0057] Among them, the rising edge of the harmonic cycle is the zero-crossing point of the harmonic current signal as it changes from the minimum to the maximum value (e.g., the rising edge interval of each cycle of a 250Hz harmonic signal is 4ms).

[0058] In practice, for the noise-reduced transient harmonic current signal, the time interval between the rising edges of two adjacent cycles is measured for subsequent phase offset calculation. For example, for a 250Hz harmonic signal, the standard period is 4ms, and the measured time interval between two consecutive rising edges during a fault is 4.1ms, with a time difference of 0.1ms.

[0059] Based on the reference clock frequency provided by the crystal oscillator, the time difference is converted into a phase offset.

[0060] When the amplitude fluctuation of the harmonic signal is detected to exceed the set fluctuation threshold, the system switches to the backup transformer channel and reinitializes the clock reference.

[0061] Among them, the crystal oscillator reference clock: a crystal oscillator circuit that provides a high-precision time reference, such as a 10MHz crystal oscillator (error ±1ppm).

[0062] By using the reference clock frequency of a crystal oscillator, the measured time difference is converted into a phase offset, which is used to characterize the phase change of the harmonic current signal.

[0063] It needs to be explained that the transient harmonic current signal is obtained by synchronously capturing transient harmonic current signals through multiple high-frequency current transformers connected in parallel to the DC bus, then filtering them through a bandpass filter (the center frequency of the bandpass filter is dynamically adjusted according to the dominant harmonic frequency in historical fault data; for example, if the 5th and 7th harmonics have a high probability of occurrence in historical data, the center frequency is adjusted to 250Hz and 350Hz respectively). Finally, the filtered signal is subjected to common-mode noise suppression through a differential amplifier circuit to obtain the denoised transient harmonic current signal. For this denoised transient harmonic current signal, it is necessary to measure the time difference between the rising edges of two consecutive harmonic cycles. Here, the "rising edge of the harmonic cycle" refers to the starting moment when the transient harmonic current signal crosses zero from a negative value and begins to rise from a positive value; that is, the instant when the signal starts to rise from the zero-crossing point from "negative" to "positive". The "time difference between the rising edges of two consecutive harmonic cycles" is the time interval between two adjacent rising edge moments.

[0064] It is important to clarify that the standard period of a harmonic is determined by the dominant harmonic frequency locked by the bandpass filter: the fundamental frequency of the power grid is typically 50Hz, and the frequency of the nth harmonic is n times the fundamental frequency (i.e., 50Hz × n). The period is inversely proportional to the frequency (period = 1 / frequency). For example, the transient signal of a certain 5th harmonic corresponds to a frequency of 50Hz × 5 = 250Hz, so the standard period is 1 / 250Hz = 0.004 seconds = 4ms. If the first rising edge occurs at 0ms and the second rising edge occurs at 4.1ms, then the 4.1ms between these two moments is the time difference to be measured (i.e., the measured period). The deviation between this measured period and the standard period is 0.1ms (4.1ms - 4ms), and this deviation is a key parameter for subsequent calculations of the phase offset.

[0065] Because the phase change of the transient harmonic current signal directly leads to a change in its period time, that is, if the phase lags, the time for the signal to complete one cycle will be longer; if the phase leads, the time for the signal to complete one cycle will be shorter. A crystal oscillator can provide a high-precision reference clock frequency (the crystal oscillator used in this embodiment has a reference clock frequency accuracy of ±1ppm; for example, a 10MHz crystal oscillator has a stable clock pulse rate of 10,000,000 per second). Using this reference clock frequency, combined with the previously measured time difference, the time deviation can be converted into a phase offset. The specific steps are as follows:

[0066] Determining the standard period of a harmonic signal: First, calculate the original standard period of the harmonic signal based on the dominant harmonic frequency ultimately locked by the bandpass filter. For example, if the bandpass filter locks the 5th harmonic, its corresponding frequency is 250Hz (because the fundamental frequency of the power grid is usually 50Hz, the 5th harmonic is 5 × 50Hz = 250Hz), then the standard period of this 5th harmonic is 1 divided by 250Hz, which is 4ms. If it locks the 7th harmonic, the frequency is 350Hz, and the standard period is 1 divided by 350Hz, which is approximately 2.857ms. This standard period is the time required for the harmonic signal to complete a full oscillation without phase shift.

[0067] Compare the deviation of the time difference with the standard period: Compare the measured "time difference between the rising edges of two consecutive harmonic periods" with the calculated standard harmonic period to see how large the deviation is. For example, if the measured time difference is 4.1ms, and the standard period of the 5th harmonic is 4ms, then the deviation is 0.1ms; if the measured time difference is 3.9ms, the deviation is -0.1ms (the negative sign indicates that the time difference is shorter than the standard period).

[0068] Calculate the phase shift based on the deviation: It should be understood that a complete harmonic cycle (i.e., a standard cycle) corresponds to a phase of 360°. This means that the deviation in cycle time is proportional to the phase shift. For example, the standard cycle of the 5th harmonic is 4ms, corresponding to 360°. Therefore, every 1ms time deviation corresponds to a 90° phase shift (360° ÷ 4ms = 90° / ms). In the previous example, the time difference was 0.1ms longer than the standard cycle, so the phase shift was 0.1ms × 90° / ms = 9°. Because the time difference is longer, it indicates that the phase of the harmonic signal is lagging; that is, this 5th harmonic current signal lags behind the normal, unshifted phase by 9°. If the time difference is 0.1ms less than the standard cycle, the phase shift is -9°, indicating a 9° phase lead. In actual operation, the reference clock of the crystal oscillator provides a stable time reference in real time, which helps us to accurately measure the deviation of the time difference and ensure that the calculation error of the phase offset can be controlled within a very small range, such as ≤0.2°. This ensures that the power control command generated based on the phase offset will be accurate.

[0069] The range of time difference varies under different power grid fault scenarios, and the corresponding phase offset also follows a pattern. For example, in a symmetrical short-circuit fault, the measured time difference is usually between 15 and 50 μs, corresponding to the 5th harmonic (standard period 4 ms). The phase offset range is (15 μs ÷ 4 ms) × 360° = 1.35° to (50 μs ÷ 4 ms) × 360° = 4.5°. In an asymmetrical open-circuit fault, the time difference is usually between 80 and 120 μs, and the corresponding phase offset range is (80 μs ÷ 4 ms) × 360° = 7.2° to (120 μs ÷ 4 ms) × 360° = 10.8°. This range perfectly matches the phase change pattern of transient harmonics after an actual power grid fault and can cover the vast majority of fault situations.

[0070] In some embodiments, the time difference ranges from 15 to 50 μs when the fault type is a symmetrical short circuit; and from 80 to 120 μs when the fault type is an asymmetrical open circuit.

[0071] Based on the embodiments provided in this application, transient harmonic current signals can be synchronously captured using a high-frequency current transformer connected in parallel to the DC bus. The signal is processed by a bandpass filter, and its center frequency can be dynamically adjusted based on the dominant harmonic frequency in historical fault data, thereby achieving accurate capture of specific frequency harmonics. The use of a differential amplifier circuit effectively suppresses common-mode noise and improves signal quality. Based on the noise-reduced transient harmonic current signal, the time difference between the rising edges of two consecutive harmonic cycles is first measured. Then, combined with the reference clock frequency provided by the crystal oscillator, the conversion from time difference to phase offset is completed through the process of "determining the standard harmonic period → comparing the deviation between the time difference and the standard period → calculating the phase offset proportionally → verifying in conjunction with the fault scenario". The entire conversion process is implemented by hardware circuitry, without iterative delay from software algorithms, resulting in fast conversion speed (delay ≤ 1μs). Moreover, each step is clearly understandable to those skilled in the art and is fully reproducible, achieving high-precision and high-reliability measurement of the phase offset.

[0072] Based on the embodiments provided in this application, transient harmonic current signals can be synchronously captured using a high-frequency current transformer connected in parallel to the DC bus. The signal is processed by a bandpass filter, and its center frequency can be dynamically adjusted based on the dominant harmonic frequency in historical fault data, thereby achieving accurate capture of specific frequency harmonics. The use of a differential amplifier circuit effectively suppresses common-mode noise and improves signal quality. Based on the denoised signal, the time difference between the rising edges of two consecutive harmonic cycles is measured and converted into a phase offset using the reference clock frequency of the crystal oscillator, achieving high-precision measurement of the phase offset. This design can quickly and accurately obtain the phase offset of the transient harmonic current signal, providing a reliable basis for the generation of subsequent control commands and significantly enhancing the system's response speed to power grid faults.

[0073] Furthermore, based on the phase offset, power control commands are generated through a pre-configured hardware mapping circuit, including:

[0074] The phase offset is digitally converted to analog output, and the corresponding linear voltage signal is output.

[0075] The digital-to-analog converter (DAC) is the process of converting a digital quantity into an analog voltage signal, such as a conversion ratio of 1° phase shift to 0.1V. The DAC circuit converts the phase shift into a proportional linear voltage signal for subsequent hardware processing. For example, a 20° phase shift is converted to a 2V voltage signal by the DAC, with a conversion ratio of 1° to 0.1V, i.e., voltage (V) = phase shift (°) × 0.1.

[0076] The linear voltage signal is simultaneously input into three independent voltage comparators:

[0077] The first voltage comparator compares the linear voltage signal with a 0.8V reference voltage, and outputs a high-level signal when the linear voltage exceeds 0.8V;

[0078] The second voltage comparator compares the linear voltage signal with a 1.6V reference voltage, and outputs a high-level signal when the linear voltage exceeds 1.6V;

[0079] The third voltage comparator compares the linear voltage signal with a 2.4V reference voltage, and outputs a high-level signal when the linear voltage exceeds 2.4V;

[0080] Among them, the voltage comparator is a circuit element that compares the input voltage with a reference voltage and outputs a high or low level. In this embodiment, three comparators with different preset reference voltages are used. The linear voltage signal is simultaneously input to the three comparators with different preset reference voltages to achieve graded judgment of phase offset.

[0081] For example, the reference voltages of the three voltage comparators are 0.8V, 1.6V, and 2.4V, respectively. When a 2V linear voltage signal is input, the 0.8V and 1.6V comparators output a high level, and the 2.4V comparator outputs a low level.

[0082] For example, three voltage comparators compare the input linear voltage signal with reference voltages of 0.8V, 1.6V, and 2.4V, respectively. If the input voltage exceeds the corresponding reference voltage, the comparator outputs a high-level signal; otherwise, it outputs a low-level signal. For instance, when the input linear voltage signal is 1.2V, the first comparator (0.8V reference) outputs a high level, while the second and third comparators output low levels; when the input voltage is 2.2V, the first and second comparators output high levels, while the third comparator outputs a low level.

[0083] The output signals of the three voltage comparators are processed by logic gate circuits to generate power control commands.

[0084] The logic gate circuits, consisting of AND gates, OR gates, NOT gates, etc., are used to process the output signals of the comparators and generate logical results. The logic gate circuits are used to perform logical operations on the output signals of the three voltage comparators to generate control commands corresponding to different power levels. For example, when only the first comparator outputs a high level, the logic gate circuit generates a first power control command that absorbs 50% of the rated power; when only the second comparator outputs a high level, it generates a second power control command that absorbs 80% of the rated power.

[0085] The power control command is converted into a standard voltage level through a level conversion circuit, where a high level signal corresponds to a 5V standard voltage and a low level signal corresponds to 0V.

[0086] Among them, the level conversion circuit is a circuit that converts logic levels to standard voltage levels. In this article, it is converted to the standard levels of 5V (high level) and 0V (low level).

[0087] In practical implementation, a level conversion circuit converts the power control commands generated by the logic gates into standard voltage levels for subsequent transmission and driving. For example, a high-level signal generated by the logic gate becomes a standard 5V voltage after passing through the level conversion circuit, and a low-level signal becomes 0V, ensuring level compatibility with the driving unit.

[0088] The converted standard voltage level is input to a latch circuit with Schmitt trigger characteristics to maintain a stable output state.

[0089] Among them, the Schmitt trigger latch circuit is a latch circuit with anti-interference capability that can lock the input signal into a stable output state and avoid signal jitter.

[0090] In practical implementation, a standard voltage level is input to the Schmitt trigger latch circuit to ensure that the output state of the power control command is stable and unaffected by external interference. For example, after inputting a standard voltage level of 5V to the Schmitt trigger latch circuit, even if there is a voltage fluctuation of ±0.3V, the output will still maintain a stable 5V state, avoiding false triggering of the power control command.

[0091] The output signals of the three voltage comparators are processed by logic gate circuits to generate power control commands, including:

[0092] When only the first voltage comparator outputs a high-level signal, a first power control command representing 50% of the rated absorbed power is generated.

[0093] When only the second voltage comparator outputs a high-level signal, a second power control command representing 80% of the rated absorbed power is generated.

[0094] When only the third voltage comparator outputs a high-level signal, a third power control command representing 100% of the rated absorbed power is generated;

[0095] When multiple voltage comparators output high-level signals simultaneously, select the power control instruction corresponding to the voltage comparator with the highest reference voltage and add a current direction indicator bit.

[0096] Based on the embodiments provided in this application, the phase offset is first converted from digital to analog to obtain a linear voltage signal, which is then input to three comparators with different reference voltages. The comparator output signals are processed by logic gate circuits to generate power control commands of different levels based on the magnitude of the phase offset. The application of a latching circuit ensures the stability of the command output. In particular, when multiple comparators output high levels simultaneously, the power control command corresponding to the comparator with the highest reference voltage is selected, and a current direction flag is added. This design achieves fine-grained hierarchical and intelligent selection of power control commands, enabling the energy storage system to provide matching power support according to the severity of grid faults, optimizing the system's response strategy, and improving the flexibility and effectiveness of control.

[0097] Furthermore, the power control commands are transmitted to the power semiconductor drive unit of the energy storage converter, bypassing the digital signal processor, to drive the power module to perform transient stability response, including:

[0098] The power control command is converted into an optical signal through an optocoupler isolation circuit;

[0099] Among them, the optocoupler isolation circuit is a circuit that uses an optocoupler to convert electrical signals to optical signals, which can achieve electrical isolation and reduce interference.

[0100] In practical implementation, the electrical signal of the power control command is converted into an optical signal through an optocoupler isolation circuit to achieve electrical isolation and interference-resistant transmission. For example, a 5V power control command electrical signal can be converted into an optical signal through an optocoupler isolation circuit, with an isolation voltage of up to 2500V, effectively preventing strong electrical interference.

[0101] The optical signal is transmitted to the power semiconductor driver unit via optical fiber;

[0102] Among them, optical fiber transmission refers to the method of transmitting optical signals using optical fibers, which has the characteristics of fast transmission speed and strong anti-interference ability.

[0103] In practical implementation, optical signals are transmitted to the power semiconductor drive unit of the energy storage converter via optical fiber to ensure fast and reliable signal transmission. For example, optical signals are transmitted through 50-meter multimode optical fiber with a transmission delay of less than 2 microseconds, reducing delay and interference by 10 microseconds compared to traditional cable transmission.

[0104] When the standard voltage level is 5V, the corresponding gate drive current is generated according to the standard voltage level corresponding to the power control command, including: if it is the first power control command (01), a drive current of 0.5A is generated; if it is the second power control command (10), a drive current of 1.0A is generated; if it is the third power control command (11), a drive current of 2.0A is generated.

[0105] Among them, gate drive current: the current that drives the gate of the insulated gate bipolar transistor (IGBT). Different power control commands correspond to different drive currents (such as 0.5A, 1.0A, 2.0A).

[0106] In practical implementation, upon receiving a standard 5V voltage level, a corresponding gate drive current is generated based on the type of power control command to control the turn-on of the insulated-gate bipolar transistor. For example, the first power control command (50% rated power) generates a 0.5A gate drive current, the second power control command (80% rated power) generates a 1.0A drive current, and the third power control command (100% rated power) generates a 2.0A drive current.

[0107] When the standard voltage level is 0V, the gate drive current output is turned off;

[0108] Specifically, when the standard voltage level is 0V, the gate drive current output is turned off;

[0109] In practical implementation, when a standard voltage level of 0V is received, the gate drive current output is stopped, keeping the insulated gate bipolar transistor (IGBT) in the off state. For example, when there is no power control command (0V level), the drive unit turns off the gate drive current output, the IGBT is in the off state, and the energy storage converter does not output power.

[0110] By controlling the turn-on rate of the insulated gate bipolar transistor by the gate drive current, the energy storage converter outputs transient stable power corresponding to the power control command.

[0111] Specifically, the turn-on speed of the insulated-gate bipolar transistor (IGBT) is controlled by the magnitude of the gate drive current, thereby enabling the energy storage converter to output transient stable power that matches the power control command. For example, a gate drive current of 2.0A causes the IGBT to fully turn on within 0.5 microseconds, allowing the energy storage converter to output 100% of its rated power (e.g., 100A current) and rapidly absorb transient energy.

[0112] Based on the embodiments provided in this application, power control commands are converted into optical signals through optocoupler isolation and transmitted using optical fiber, effectively avoiding electrical interference and ensuring the reliability of signal transmission. Corresponding gate drive currents are generated according to different power control commands, thereby controlling the turn-on rate of the insulated-gate bipolar transistor (IGBT) and enabling the energy storage converter to output the corresponding power. This design bypasses the digital signal processor, shortens the control path, achieves rapid driving of the power module, significantly improves the response speed of the energy storage system, and can quickly provide the required power during grid faults, enhancing the transient stability of the power system.

[0113] Furthermore, such as Figure 2 As shown, the turn-on rate of the insulated-gate bipolar transistor is controlled by the gate drive current, enabling the energy storage converter to output transient stable power corresponding to the power control command, including:

[0114] S201, when executing the first power control command, adjust the duty cycle of the pulse width modulation wave of the energy storage converter to the first set value, so that the output current amplitude drops to 50% of the rated value; control the output current phase to synchronize with the grid voltage phase through the phase-locked loop;

[0115] Among them, the duty cycle of pulse width modulation (PWM) wave is the ratio of the high-level duration to the period of the PWM wave. For example, a 50% duty cycle means that the high and low level times are equal.

[0116] In photovoltaic power plant grid-connected applications, when it is necessary to reduce the output power of the energy storage converter to 50% of its rated value, the first set value is a 52% duty cycle. This value is based on the rated duty cycle of the photovoltaic inverter (usually 96%) combined with the capacitive load compensation requirements: actual measurements show that if a 50% duty cycle is used directly, the actual power will only reach 48% due to reactive power loss, so it is adjusted to 52% through an efficiency compensation coefficient. On the hardware side, the PWM module of the DSP chip directly writes the hexadecimal instruction 0x851EB8 (corresponding to a 52% duty cycle), which is pre-stored in the FLASH memory and transmitted to the driver board through an optocoupler isolation circuit.

[0117] For example, considering the specific characteristics of electric arc furnace load scenarios, the first setpoint is adjusted to a 48% duty cycle. Because electric arc furnaces generate over 23% current harmonics during operation, if the standard 50% duty cycle is followed, the actual power will rise to 53% due to harmonic aggregation, exceeding the safety threshold. Therefore, harmonic margin compensation is introduced, actively reducing the power output by 2 percentage points to 48%. This is achieved by adjusting the comparator reference voltage using a digital potentiometer, with its resistance set to 8.2kΩ (corresponding to the 48% duty cycle voltage value), ensuring that the power output is strictly locked within the range of 50% ± 1%.

[0118] Phase-locked loop (PLL): A circuit used to track the phase of the mains voltage, ensuring that the output current is synchronized with the phase of the mains voltage.

[0119] In practical implementation, when executing the first power control command, the PWM duty cycle is adjusted to 50%, reducing the output current of the energy storage converter to 50% of its rated value. A phase-locked loop (PLL) is used to ensure the output current is in phase with the grid voltage. For example, if the rated output current of the energy storage converter is 100A, executing the first command with the PWM duty cycle adjusted to 50% will output 50A of current. The PLL maintains the phase difference between the current and the grid voltage at less than 5°, serving as a power buffer during minor faults.

[0120] S202, when executing the second power control command, switches the output mode based on the differential polarity of the line current, including: if the differential polarity of the current is positive, outputting a damped current with a phase lag of 180°; if the differential polarity of the current is negative, outputting a damped current with a phase lead of 180°; the current amplitude is maintained at 80% of the rated value to suppress system oscillation.

[0121] Among them, the polarity of the current derivative: the positive or negative value of the current derivative signal (di / dt) reflects the direction of the current change (e.g., +300A / ms is positive, -200A / ms is negative).

[0122] In practical implementation, when executing the second power control command, the output damping current (with an amplitude of 80% of the rated value) is switched between lagging or leading by 180° depending on the sign of the line current differential signal, in order to suppress system oscillation. For example, if the polarity of the current differential is +400A / ms (positive) during a line fault, the energy storage converter outputs an 80A damping current with a phase lag of 180°; if the polarity is -300A / ms (negative), it outputs an 80A current with a phase lead of 180° to suppress energy surges from different directions.

[0123] S203, when executing the third power control command, based on the current direction flag in the power control command, controls the energy storage converter to output reverse active current at the upstream node of the energy flow; controls the energy storage converter to output 90° lagging inductive reactive current at the downstream node of the energy flow; suppresses transient energy diffusion through active absorption and reactive boosting.

[0124] The current direction identifier is a 1-bit binary signal used in power control commands to identify the direction of energy flow (e.g., 0 indicates energy flow to energy storage, 1 indicates energy flow to critical generating units). When executing the third power control command, based on the current direction identifier, a reverse active current is output at the upstream node to absorb energy, and a 90° lagging inductive reactive current is output at the downstream node to raise the voltage. This active absorption and reactive compensation suppress transient energy diffusion. For example, when the current direction identifier is 1 (energy flow to critical generating units), the upstream node's energy storage converter outputs a 100A reverse active current to absorb energy; the downstream node outputs a 100A inductive reactive current with a 90° phase lag, raising the local voltage from 0.95pu to 1.0pu, thus stabilizing the grid voltage.

[0125] Based on the embodiments provided in this application, different control strategies are adopted when executing different power control commands. When executing the first power control command, the duty cycle of the pulse width modulation wave is adjusted and the phase is synchronized through a phase-locked loop, achieving precise control of the output current. When executing the second power control command, the output mode is switched according to the differential polarity of the line current, effectively suppressing system oscillation. When executing the third power control command, different types of current are output at different nodes according to the current direction indicator, suppressing transient energy diffusion through active power absorption and reactive power boosting. These diversified control strategies enable the energy storage system to flexibly adjust its output characteristics according to specific fault conditions, enhancing its control capability over power system transient processes and improving system stability and reliability.

[0126] Furthermore, by utilizing grid line current sensors to acquire differential current signals, and based on the grid topology, the path of transient energy flow to key generating units is identified, including:

[0127] The differential current signals of all 220kV and above voltage level transmission lines are collected in real time within 20ms after a fault occurs using power grid line current sensors.

[0128] Among them, the differential current signal (di / dt) is the rate of change of current per unit time (A / ms). The sudden change during a fault reflects the intensity of the energy impact (e.g., di / dt = +500A / ms for a certain line).

[0129] 220kV and above voltage levels: backbone lines of the main power transmission network, the main channel for transient energy transmission (such as carrying 80% of transient energy during a fault in a 500kV double-circuit line).

[0130] In practice, current sensors installed on high-voltage transmission lines rapidly acquire the differential current signal within 20ms after a fault occurs, which is then used for subsequent energy flow analysis. For example, if a three-phase short-circuit fault occurs on a 500kV line, the line current jumps from 1kA to 3kA within 10ms, and the differential current signal is +200A / ms, this signal is captured in real time by a Rogowski coil sensor at the beginning of the line.

[0131] Based on the polarity and amplitude of the abrupt change in the current differential signal, the three transmission channels with the largest net transient energy inflow were selected as candidate paths.

[0132] Among them, the polarity direction of the mutation amount: the positive and negative values ​​of di / dt indicate the direction of energy flow (positive → inflow node, negative → outflow node).

[0133] Amplitude sorting: Arrange channels from largest to smallest according to the absolute value of di / dt.

[0134] In practice, based on the polarity and amplitude of the abrupt change in the differential current signal, the three transmission channels with the largest transient energy inflow are selected as candidate paths. For example, if after a fault, the di / dt values ​​of three 220kV lines are detected to be +400A / ms, +350A / ms, and +280A / ms, respectively, corresponding to net energy inflows of 60MW, 50MW, and 40MW, the first two are selected as candidate paths.

[0135] By combining the electrical connection relationship between generator nodes and transmission channels in the power grid topology, the vector direction pattern of transient energy transmission on candidate paths is determined;

[0136] Among them, the power grid topology refers to the connection relationship of power grid components (such as ring network, radial network).

[0137] Electrical connection relationships: the electrical distance and impedance relationships between components such as generators, transformers, and lines (e.g., a generator is connected to the busbar through two circuits).

[0138] In practical implementation, the specific transmission direction and path of transient energy on candidate paths are analyzed by combining the power grid topology and component connection relationships. For example, in a ring power grid, candidate path A connects the fault point and substation B. According to topology analysis, energy will flow to substation B through two parallel lines, forming a branching vector direction pattern.

[0139] The disturbance sensitivity of the vector pattern terminal unit was verified using a pre-set database of unit inertial time constants.

[0140] Among them, the inertial time constant Tj of the generator set is a parameter that characterizes the generator set's ability to resist frequency changes (unit: seconds, such as steam turbine Tj=8s, photovoltaic inverter Tj=0.5s).

[0141] Disturbance sensitivity refers to the degree to which a unit is sensitive to transient energy impacts (the smaller the Tj, the more sensitive it is; for example, units with Tj < 2s are prone to instability).

[0142] In practical implementation, the stability risk of the terminal unit in the vector pattern is assessed during transient processes by using a pre-set database of unit inertia time constants. For example, a candidate path terminal connects a 30MW photovoltaic power plant (Tj=0.6s) and a 100MW thermal power plant (Tj=6s). The photovoltaic power plant is identified as a highly sensitive critical unit due to its low inertia.

[0143] By using N-1 verification to eliminate false paths caused by relay protection actions, the main path and at least one backup path for transient energy flow to critical units are determined.

[0144] Among them, N-1 verification is a verification method to check whether the system can still operate stably after simulating a single component failure.

[0145] False path: A path where energy cannot actually be transmitted due to protection actions (e.g., a line protection has tripped).

[0146] In practice, by simulating a single component failure, paths that might fail due to protection activation are eliminated, ultimately determining the primary and backup paths. For example, if the overcurrent protection of one line in the initial candidate paths has activated, and N-1 verification reveals that the line is actually disconnected, then this path is eliminated, and the remaining two are determined as the primary and backup paths, respectively.

[0147] Based on the embodiments provided in this application, candidate paths are selected by collecting the differential current signal of high-voltage transmission lines shortly after a fault, according to the polarity and amplitude of the sudden change. The vector direction pattern is determined by combining the grid topology, and the sensitivity of terminal units to disturbances is verified using a database of unit inertial time constants. False paths are then eliminated through N-1 verification, ultimately determining the primary and backup paths. This design enables rapid and accurate identification of transient energy transmission paths, providing precise path information for the subsequent construction of virtual high-impedance walls and control of energy flow, thus improving the targeting and effectiveness of energy storage systems in controlling the transient stability of the power system.

[0148] Furthermore, the target route includes a primary target route and a backup target route; for the path, a virtual high-impedance wall is dynamically formed on the target route, including:

[0149] The transmission line between the first substation of the main path and the key generating unit is defined as the main target line, and the transmission line between the key node of the backup path and the adjacent hub substation is defined as the backup target line.

[0150] The primary target line is the main path for transient energy flow to critical generating units (such as a direct connection between a fault point and a critical generating unit). The backup target line is an alternative control path when the primary path fails (such as a tie line between adjacent hub substations).

[0151] For example, if the main path is a 500kV line AB (connecting fault point A and key unit B), and the backup path is a 220kV line CD (connecting hub substation C and adjacent station D), then line AB is the main target line, and CD is the backup target line.

[0152] The first energy storage converter cluster is deployed at the busbar of the first substation of the main target line, and the second energy storage converter cluster is deployed at the key nodes of the backup target line.

[0153] Among them, the first energy storage converter cluster is an energy storage device (such as a 50MW / 100MWh energy storage power station) deployed at the beginning of the main target line.

[0154] Second energy storage converter cluster: Energy storage devices (such as 30MW / 60MWh energy storage power stations) deployed at key nodes of backup target lines.

[0155] In practice, energy storage converter clusters are deployed at key locations on the primary and backup target lines for subsequent impedance regulation. For example, a 50MW energy storage converter cluster is deployed on the bus side of station A on the primary target line AB, and a 30MW cluster is deployed on the 10kV bus side of station C on the backup target line CD.

[0156] The first energy storage converter cluster is controlled to generate a compensation current whose phase lags behind the main target line voltage. The lag angle is called from the preset parameter library according to the fault type.

[0157] The lag angle refers to the phase difference between the compensation current and the line voltage (e.g., a 90° lag means the current phase lags the voltage phase by 90°). A preset parameter library stores the optimal lag angles corresponding to different fault types (e.g., a 120° lag corresponds to a three-phase short circuit).

[0158] In practice, the output current of the first energy storage cluster is controlled to lag behind the line voltage in phase, thereby increasing the equivalent impedance of the line. For example, if a three-phase short-circuit fault is detected, a 120° lag angle is retrieved from the parameter library, and the output current of the first cluster is controlled to lag the AB line voltage by 120° as a compensation current.

[0159] The standby current output of the second energy storage converter cluster is synchronously controlled to lead the standby target line voltage, with the lead angle set to one-third of the lag angle.

[0160] Among them, the lead angle is the phase difference between the standby current and the line voltage (e.g., 30° lead means that the current phase leads the voltage phase by 30°).

[0161] In practical implementation, the output current of the second energy storage cluster is controlled to lead the voltage of the standby line in order to prepare for possible main path failure. For example, the standby current of the second cluster is set to lead the voltage of the CD line by 40° (i.e., 1 / 3 of the 120° lag angle of the main cluster) to maintain the initial impedance state of the standby line.

[0162] Real-time monitoring of the attenuation rate of the differential current signal of the main target line;

[0163] The current derivative decay rate is the rate of change of the current derivative over time (e.g., -50A / ms² means the current derivative decreases by 50A / ms per millisecond). A decay rate threshold is set as the critical value for determining whether the main path has failed (e.g., -30A / ms²).

[0164] In practice, the decay rate of the differential current signal of the main target line is monitored in real time to determine the effectiveness of the main path control. For example, if the differential current of the main target line AB decays from an initial +300A / ms to +100A / ms, the decay rate is -20A / ms², which is lower than the threshold of -30A / ms², indicating that the main path is still effective.

[0165] When the attenuation rate of the differential current signal of the main target line exceeds the set attenuation rate threshold, the output characteristics of the second energy storage converter cluster are adjusted, including: generating a compensation current with the same phase characteristics as the first energy storage converter cluster.

[0166] In the 500kV main transmission line, due to the high power load and sensitivity to interference, the attenuation rate threshold is set at 1.0dB. This is based on historical fault data showing that when the attenuation exceeds 1.2dB, it is prone to causing protection malfunctions. In terms of hardware, the reference voltage of 0.75V (corresponding to 1.0dB) is locked through the threshold comparator of the relay protection device. For the 220kV wind power collection line, considering the high harmonic background noise (average 2.2dB), the attenuation rate threshold is relaxed to 2.5dB, and voltage matching is achieved by a 4.7kΩ preset resistance value of the adjustable resistor box. For the old line renovation section, due to the large impedance fluctuation, the attenuation rate threshold is increased to 3.8dB, which is configured by a binary 1011 DIP switch (11×0.345dB step) to ensure that it does not exceed the 4.0dB limit allowed by the regulations.

[0167] The attenuation rate threshold is set and adjusted in real time according to the operating status: when the line load rate is >90%, it automatically decreases by 0.5dB (e.g., 2.5dB → 2.0dB), and when the load rate is <40%, it increases by 0.8dB (e.g., 2.5dB → 3.3dB). Simultaneously, meteorological compensation is added: +0.6dB for haze, +1.2dB for heavy rain, and -0.4dB for dry winds. A calibration signal is injected daily at 03:00 AM, and the threshold is updated based on the measured attenuation value, with the error controlled within ±0.1dB. For example, when a 220kV photovoltaic line encounters a sandstorm, the initial threshold of 2.5dB becomes 3.5dB after meteorological compensation of +1.0dB. During a fault, the measured attenuation is 3.2dB (below the threshold), indicating the path is valid.

[0168] Among them, the same phase characteristic: the output current of the second cluster is in phase with that of the first cluster (e.g., both lag the line voltage by 120°).

[0169] In practical implementation, when the differential attenuation rate of the main path current exceeds the threshold, the second cluster will switch from standby mode to working in coordination with the first cluster. For example, if the di / dt attenuation rate of the AB line reaches -40A / ms² (exceeding the threshold), the second cluster will immediately be controlled to output a compensation current that is in phase (lagging by 120°) with the first cluster, thereby enhancing impedance regulation capability.

[0170] By regulating the current output of the first energy storage converter cluster and the second energy storage converter cluster, a virtual high-impedance wall is dynamically constructed on the main target line and the backup target line.

[0171] Among them, the virtual high impedance wall is a control effect that significantly increases the equivalent impedance of the line by outputting a specific current through the energy storage converter (e.g., the line impedance increases from 0.1Ω to 15Ω).

[0172] In practical implementation, by coordinating the current output of the primary and backup clusters, high impedance is simultaneously formed on both lines to block transient energy flow. For example, the first cluster outputs a 100A lagging current, increasing the impedance of line AB to 12Ω, while the second cluster outputs a 60A in-phase current, increasing the impedance of line CD to 8Ω, thus forming a double impedance barrier.

[0173] Based on the embodiments provided in this application, specific transmission lines on the main path and backup path are defined as the main target line and backup target line, respectively, and energy storage converter clusters are deployed at the corresponding locations. By controlling the output current of the clusters at a specific phase, a virtual high-impedance wall can be dynamically constructed on the target line. Real-time monitoring of the attenuation rate of the differential signal of the main target line current, and adjusting the output characteristics of the backup line cluster according to the attenuation, achieves dynamic optimization of the virtual high-impedance wall. This design can effectively block the flow of transient energy to critical units, guide energy flow to a predetermined path, and enhance the power system's anti-interference capability and transient stability.

[0174] Furthermore, by regulating the current output of the first energy storage converter cluster and the second energy storage converter cluster, a virtual high-impedance wall is dynamically constructed on the main target line and the backup target line, including:

[0175] Collect real-time impedance measurements of the primary target line and the backup target line;

[0176] Among them, the real-time impedance measurement value is the instantaneous impedance of the line obtained by calculating the voltage and current phasors (e.g., the impedance of line AB at a certain moment is 0.8+j1.2Ω).

[0177] In practical implementation, the actual impedance values ​​of the primary and backup target lines are calculated in real time using line voltage and current sensors. For example, by collecting voltage phasors (110∠0°kV) and line current phasors (1∠-30°kA) at the A station bus, the real-time impedance of line AB is calculated to be 110∠30°Ω = 95.3 + j55Ω.

[0178] Adjust the compensation current amplitude of the first energy storage converter cluster so that the virtual equivalent impedance value of the main target line reaches the first preset multiple within the first time window;

[0179] The first preset multiple is the ratio of the target impedance of the main line to the initial impedance (e.g., 5 times means increasing 0.2Ω to 1Ω).

[0180] First time window: The time limit for completing the main line impedance adjustment (e.g., 0 to 50 ms after a fault).

[0181] In practice, by adjusting the compensation current amplitude of the first cluster, the impedance of the main target line is made to reach a preset multiple within a specified time. For example, if the initial impedance of line AB is 0.2Ω and the first preset multiple is 8 times, the output current of the first cluster is adjusted from 50A to 120A, so that the line impedance reaches 1.6Ω within 40ms.

[0182] When the attenuation rate of the differential signal of the main target line exceeds the set attenuation rate threshold, the output compensation current of the second energy storage converter cluster is adjusted so that the virtual equivalent impedance value of the backup target line reaches the second preset multiple within the second time window.

[0183] The second preset multiple is the ratio of the target impedance of the backup line to the initial impedance (e.g., 3 times).

[0184] Second time window: The time limit for completing the impedance adjustment of the backup line (e.g., 50~100ms after the fault).

[0185] In practical implementation, when the differential attenuation rate of the main line current exceeds the threshold, the second cluster is immediately adjusted to make the impedance of the backup line reach a preset multiple within a specified time. For example, if the attenuation rate of line AB exceeds the threshold, the output current of the second cluster is controlled to increase from 30A to 80A, so that the impedance of line CD increases from 0.3Ω to 0.9Ω within 60ms.

[0186] Based on the deviation of the virtual equivalent impedance of the two lines, the current output of the first energy storage converter cluster and the second energy storage converter cluster are adjusted in real time until the virtual equivalent impedance ratio stabilizes within the set range.

[0187] The dual-line virtual equivalent impedance ratio is the ratio of the main line impedance to the backup line impedance (e.g., 1.6Ω / 0.9Ω≈1.78). The set range is the impedance ratio range that ensures reasonable energy distribution (e.g., 1.5 to 2.0).

[0188] In practice, the current output of the two clusters is dynamically adjusted based on the deviation between the impedance ratio of the main and backup lines and the set range to maintain a stable impedance control effect. For example, if the impedance ratio is 1.78 (within the range of 1.5 to 2.0), the current output is maintained; if the impedance ratio drops to 1.3 (below the lower limit), the current of the first cluster is increased by 10A, while the current of the second cluster is decreased by 5A, so that the impedance ratio returns to the range.

[0189] In one specific implementation, the virtual high-impedance wall gain equation is:

[0190] ;

[0191] in, For virtual equivalent impedance (unit: ohms); Real-time impedance of the line (unit: ohms). For gain coefficients (3.2 for main line, 2.1 for backup line); To compensate for the current amplitude (unit: ampere); Reference current (unit: ampere); Phase control deviation (unit: radians); The attenuation sensitivity coefficient (unit: milliseconds / decibel, taken as 0.25); Attenuation rate threshold (unit: dB / ms); The measured attenuation rate is expressed in decibels per millisecond.

[0192] Based on the embodiments provided in this application, by collecting real-time impedance measurements of the main and backup target lines, the output current amplitude of the corresponding energy storage converter cluster is adjusted to ensure that the virtual equivalent impedance of the lines reaches a preset multiple within different time windows. The cluster current output is adjusted in real-time according to the deviation of the virtual equivalent impedance of the two lines to ensure that the virtual equivalent impedance ratio remains stable within a set range. This design achieves precise control and dynamic adjustment of the impedance characteristics of the virtual high-impedance wall, enabling real-time optimization of the high-impedance wall performance based on the actual operation of the power grid, improving the control effect on transient energy flow, and enhancing the stability of the power system.

[0193] Furthermore, on the absorption path predefined according to the grid topology, the energy storage converter is controlled to operate in current source mode and configured with reverse power characteristics to absorb the energy flow redirected by the virtual high-impedance wall, including:

[0194] Based on the real-time intensity and direction of the energy flow redirected by the virtual high-impedance wall, a power tracking curve for the absorption path is dynamically generated.

[0195] In one specific implementation, the predefined absorption path includes:

[0196] Step 1: Digital scanning of power grid topology:

[0197] The impedance parameters of all 220kV and above busbars in the substation were measured using a portable power grid parameter scanner (model: OMICRON CMC356).

[0198] The measurement data is imported into the embedded processing unit, which automatically generates a topology node relationship diagram and marks three types of key nodes: energy source nodes (power plant grid connection points, impedance value < 0.1Ω); vulnerable transmission nodes (line T-junctions that have experienced more than two faults); and key unit nodes (rotating units with inertial time constant > 5s).

[0199] Step 2: Path predefined rule settings:

[0200] Main absorption path selection rules: the shortest topology path from the energy source node to the critical unit (number of hops ≤ 3); the total path impedance is less than 80% of the average impedance of the same level of lines;

[0201] Alternate absorption path selection rules: the second shortest path that does not share a transmission corridor with the main path; and includes at least one vulnerable transmission node as a monitoring point;

[0202] Step 3: Dynamic Path Mapping Execution: Deploy a path mapping device at the target substation: Status Monitoring Unit: Captures the circuit breaker's open / closed status in real time via optically encoded sensors (accuracy 0.5ms); Path Selection Unit:

[0203] When a fault current is detected, the effective path with the lowest impedance in the pre-stored topology is retrieved; if there is a circuit breaker trip signal in the main path, the system automatically switches to the backup path.

[0204] Execution Unit: Main Path Activation: Closes K1 / K2 type high-speed magnetic latching relay (action time 0.3ms); Backup Path Activation: Closes K3 / K4 type high-speed magnetic latching relay;

[0205] Step 4: Path validity verification:

[0206] Electrical verification: Inject a 10kHz test current (amplitude 5A) into the selected path. If the signal attenuation rate is <3dB, the path is considered normal.

[0207] Topology verification: The phase angle of the current at both ends of the path is compared by the fiber optic longitudinal differential protection device. If the deviation is less than 5°, the physical connection is determined.

[0208] When dual verification fails, an audible and visual alarm is triggered and the system switches to the next priority path.

[0209] In other words, the power point tracking curve is a curve that describes the change in power that the absorption path needs to absorb over time.

[0210] In practice, the power that the absorption path needs to absorb varies with time based on the energy flow intensity and direction of the virtual high-impedance wall.

[0211] In one specific implementation, the following operations are performed at the substation at the beginning of the absorption path to generate a power tracking curve:

[0212] Real-time data acquisition: Three sets of Rogowski coil current sensors are used to synchronously capture the three-phase current signal of the redirected energy flow at a sampling rate of 10,000 times per second; the current differential signal is generated through a hardware differentiating circuit (time constant 0.1ms);

[0213] Intensity calculation: The differential signal of the three-phase current is input into the peak detection chip (model: ADMP421), and the maximum peak value within a 10ms sliding window is output as the real-time intensity value;

[0214] Direction determination: The fundamental phase angle of the differential current signal is extracted using a phase-locked loop chip (model: CD4046); the current phase angle and the steady-state phase angle stored before the fault (stored in FRAM memory) are simultaneously input into a voltage comparator: if the current phase angle > steady-state value +5°, a high level is output (forward energy flow indicator); if the current phase angle < steady-state value -5°, a low level is output (reverse energy flow indicator).

[0215] Curve generation: Preset curve templates are triggered based on the direction indicator: Forward energy flow template: controls the DAC chip (model: DAC8560) to output a 0-5V exponentially increasing voltage curve, the slope of which is set by an adjustable resistor; Reverse energy flow template: controls the FPGA to generate a pulse decay waveform, the pulse width of which is scaled proportionally by the real-time intensity value;

[0216] Dynamic correction: Monitor the second derivative signal of the current (implemented through a two-stage differentiating circuit). When the signal amplitude exceeds the threshold: automatically switch the adjustable resistor range to adjust the curve slope; send a pulse width reset command to the FPGA through the optocoupler isolation circuit. When positive energy flow is detected (high level indicator): the DAC chip outputs an exponentially increasing voltage starting from 0V (rising to 3.2V within 2ms), driving the power step of the energy storage converter to increase; when reverse energy flow is detected (low level indicator): the FPGA generates a pulse sequence with a pulse width of 20ms and an amplitude of 4V, and the pulse interval shortens as the real-time intensity value increases.

[0217] The energy storage converter is controlled to perform the following operations in current source mode: when an energy flow to a critical unit is detected, a reverse active current is output; when an energy flow causes system oscillation, a damping current component opposite to the rate of change of the power angle is superimposed.

[0218] Among them, reverse active current refers to active current that is opposite to the direction of energy flow (such as when energy flows to a key unit, the output reverse current absorbs energy).

[0219] The damping current component refers to the current that is opposite to the rate of change of the system's power angle, and is used to suppress oscillations (e.g., when the rate of change of the power angle is +5° / s, the output is a reverse current).

[0220] In practical implementation, the energy storage converter is controlled in current source mode to selectively output reverse active current or damping current according to the energy flow state. For example, when energy flow to a critical unit is detected, the energy storage converter outputs a 50A reverse active current (absorbing 100MW of power); when the system oscillates (power angle change rate ±3° / s), a 10A damping current component is superimposed.

[0221] Based on the power tracking curve, the output current amplitude and phase angle combination of the energy storage converter are adjusted in real time to match the active power absorption rate of the absorption path with the diffusion rate of the diverted energy.

[0222] Among them, active power absorption rate: the ratio of the actual power absorbed by the absorption path to the energy power that is redirected (e.g., 90% means absorbing 90MW / 100MW).

[0223] In practice, the output current amplitude and phase of the energy storage converter are dynamically adjusted according to the power point tracking curve to ensure efficient absorption of transient energy. For example, at t=10ms, the power point tracking curve requires the absorption of 80MW. By adjusting the current amplitude to 80A and the phase lag voltage by 30°, the active power absorption rate reaches 95% (actual absorption of 76MW).

[0224] Based on the embodiments provided in this application, a power point tracking (PPT) curve for the absorption path is dynamically generated according to the real-time intensity and direction of the energy flow redirected by the virtual high-impedance wall. The energy storage converter is controlled in current source mode to output reverse active current or superimposed damping current components according to different energy flow conditions. The amplitude and phase angle combination of the output current are adjusted in real time based on the PPT curve to match the active power absorption rate of the absorption path with the diffusion rate of the redirected energy. This design achieves efficient absorption and dynamic tracking control of transient energy, enabling rapid suppression of grid oscillations and enhancing the transient stability and recovery capability of the power system.

[0225] Optionally, such as Figure 3 As shown, this application provides a power system transient stability fast response control system, including:

[0226] The phase offset calculation module 301 is used to collect transient harmonic current signals generated by grid faults in real time through the harmonic detection unit connected to the DC bus of the energy storage converter, and to calculate the phase offset of the transient harmonic current signals.

[0227] The power control command generation module 302 is used to generate power control commands based on the phase offset through a pre-configured hardware mapping circuit.

[0228] Transient stability response module 303 is used to transmit power control commands to the power semiconductor drive unit of the energy storage converter, bypassing the digital signal processor to drive the power module to perform transient stability response;

[0229] The transient energy flow path identification module 304 is used to acquire the current differential signal by the power grid line current sensor and identify the path of transient energy flow to key units based on the power grid topology.

[0230] The virtual high-impedance wall forming module 305 is used to dynamically form a virtual high-impedance wall on the target line for a given path.

[0231] The energy flow absorption module 306 is used to control the energy storage converter to operate in current source mode and configure reverse power characteristics on a predefined absorption path according to the grid topology in order to absorb the energy flow redirected by the virtual high impedance wall.

[0232] It should be noted that the embodiments implemented on the power system transient stability fast response control system side in this application can be referenced with the embodiments implemented on the power system transient stability fast response control method side, and will not be described in detail here.

[0233] The above are merely preferred embodiments of the present invention and do not limit the scope of the patent. Any equivalent structural or procedural transformations made based on the description and drawings of the present invention, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of the present invention.

Claims

1. A fast response control method for transient stability of power systems, characterized in that, include: The transient harmonic current signal generated by the grid fault is collected in real time by the harmonic detection unit connected to the DC bus of the energy storage converter, and the phase offset of the transient harmonic current signal is calculated. Based on the phase offset, power control commands are generated through a pre-configured hardware mapping circuit. The power control command is transmitted to the power semiconductor drive unit of the energy storage converter, bypassing the digital signal processor, to drive the power module to perform transient stability response; By using power grid line current sensors to acquire differential current signals, the path of transient energy flow to key units can be identified based on the power grid topology. For the aforementioned path, a virtual high-impedance wall is dynamically formed on the target line; On the absorption path predefined according to the power grid topology, the energy storage converter is controlled to operate in current source mode and configured with reverse power characteristics to absorb the energy flow redirected by the virtual high impedance wall.

2. The power system transient stability fast response control method according to claim 1, characterized in that, The harmonic detection unit, connected to the DC bus of the energy storage converter, acquires transient harmonic current signals generated by grid faults in real time and calculates the phase offset of the transient harmonic current signals, including: Multiple high-frequency current transformers connected in parallel to the DC bus are used to synchronously capture transient harmonic current signals. The captured transient harmonic current signal is input into a bandpass filter, the center frequency of which is dynamically adjusted according to the dominant harmonic frequency in historical fault data. Common-mode noise suppression is performed on the filtered transient harmonic current signal using a differential amplifier circuit. Based on the noise-reduced transient harmonic current signal, the time difference between the rising edges of two consecutive harmonic cycles is measured. Based on the reference clock frequency provided by the crystal oscillator, the time difference is converted into a phase offset.

3. The power system transient stability fast response control method according to claim 1, characterized in that, Based on the phase offset, a power control command is generated through a pre-configured hardware mapping circuit, including: The phase offset is converted from digital to analog, and the corresponding linear voltage signal is output. The linear voltage signal is simultaneously input into three independent voltage comparators: The first voltage comparator compares the linear voltage signal with a 0.8V reference voltage, and outputs a high-level signal when the linear voltage exceeds 0.8V; The second voltage comparator compares the linear voltage signal with a 1.6V reference voltage, and outputs a high-level signal when the linear voltage exceeds 1.6V; The third voltage comparator compares the linear voltage signal with a 2.4V reference voltage, and outputs a high-level signal when the linear voltage exceeds 2.4V; The output signals of the three voltage comparators are processed by logic gate circuits to generate power control commands. The power control command is converted into a standard voltage level through a level conversion circuit, wherein a high-level signal corresponds to a 5V standard voltage and a low-level signal corresponds to 0V. The converted standard voltage level is input to a latch circuit with Schmitt trigger characteristics to maintain a stable output state; The step of processing the output signals of the three voltage comparators through logic gate circuits to generate power control commands includes: When only the first voltage comparator outputs a high-level signal, a first power control command representing 50% of the rated absorbed power is generated. When only the second voltage comparator outputs a high-level signal, a second power control command representing 80% of the rated absorbed power is generated. When only the third voltage comparator outputs a high-level signal, a third power control command representing 100% of the rated absorbed power is generated; When multiple voltage comparators output high-level signals simultaneously, select the power control instruction corresponding to the voltage comparator with the highest reference voltage and add a current direction indicator bit.

4. The power system transient stability fast response control method according to claim 3, characterized in that, The step of transmitting the power control command to the power semiconductor drive unit of the energy storage converter, bypassing the digital signal processor to drive the power module to perform transient stability response, includes: The power control command is converted into an optical signal through an optocoupler isolation circuit; The optical signal is transmitted to the power semiconductor driving unit via optical fiber; When the standard voltage level is 5V, the corresponding gate drive current is generated according to the standard voltage level corresponding to the power control command, including: if it is the first power control command, a drive current of 0.5A is generated; if it is the second power control command, a drive current of 1.0A is generated; if it is the third power control command, a drive current of 2.0A is generated. When the standard voltage level is 0V, the gate drive current output is turned off; The gate drive current controls the turn-on rate of the insulated gate bipolar transistor, enabling the energy storage converter to output transient stable power corresponding to the power control command.

5. The power system transient stability fast response control method according to claim 4, characterized in that, The step of controlling the turn-on rate of the insulated-gate bipolar transistor by the gate drive current, so that the energy storage converter outputs transient stable power corresponding to the power control command, includes: When the first power control command is executed, the duty cycle of the pulse width modulation wave of the energy storage converter is adjusted to the first set value, so that the output current amplitude is reduced to 50% of the rated value; the phase of the output current is synchronized with the phase of the grid voltage through the phase-locked loop. When the second power control command is executed, the output mode is switched based on the differential polarity of the line current, including: if the differential polarity of the current is positive, outputting a damped current with a phase lag of 180°; if the differential polarity of the current is negative, outputting a damped current with a phase lead of 180°; the current amplitude is maintained at 80% of the rated value to suppress system oscillation. When the third power control command is executed, based on the current direction flag in the power control command, the energy storage converter is controlled to output a reverse active current at the upstream node of the energy flow; and the energy storage converter is controlled to output a 90° lagging inductive reactive current at the downstream node of the energy flow; and transient energy diffusion is suppressed through active absorption and reactive power boosting.

6. The power system transient stability fast response control method according to claim 1, characterized in that, The method of using a power grid line current sensor to acquire the differential current signal and identifying the path of transient energy flow to key generating units based on the power grid topology includes: The differential current signals of all 220kV and above voltage level transmission lines are collected in real time within 20ms after a fault occurs using the power grid line current sensor. Based on the polarity direction and amplitude of the abrupt change in the current differential signal, the three transmission channels with the largest net transient energy inflow were selected as candidate paths. Based on the electrical connection relationship between generator nodes and transmission channels in the power grid topology, the vector direction pattern of transient energy transmission on the candidate path is determined; The disturbance sensitivity of the vector pattern terminal unit was verified using a pre-set database of unit inertial time constants. By using N-1 verification to eliminate false paths caused by relay protection actions, the main path and at least one backup path for transient energy flow to critical units are determined.

7. The power system transient stability fast response control method according to claim 6, characterized in that, The target route includes a primary target route and a backup target route; The step of dynamically forming a virtual high-impedance wall on the target line for the path includes: The transmission line between the first substation of the main path and the key generating unit is defined as the main target line, and the transmission line between the key node of the backup path and the adjacent hub substation is defined as the backup target line. A first energy storage converter cluster is deployed at the busbar of the first substation of the main target line, and a second energy storage converter cluster is deployed at the key nodes of the backup target line. The first energy storage converter cluster is controlled to generate a compensation current whose phase lags behind the main target line voltage. The lag angle is called from the preset parameter library according to the fault type. The standby current output of the second energy storage converter cluster is synchronously controlled to lead the standby target line voltage, and the lead angle is set to one-third of the lag angle. Real-time monitoring of the attenuation rate of the differential current signal of the main target line; When the attenuation rate of the differential current signal of the main target line exceeds the set attenuation rate threshold, the output characteristics of the second energy storage converter cluster are adjusted, including: generating a compensation current with the same phase characteristics as the first energy storage converter cluster. By regulating the current output of the first energy storage converter cluster and the second energy storage converter cluster, a virtual high-impedance wall is dynamically constructed on the main target line and the backup target line.

8. The power system transient stability fast response control method according to claim 7, characterized in that, The method of dynamically constructing a virtual high-impedance wall on the main target line and the backup target line by adjusting the current output of the first energy storage converter cluster and the second energy storage converter cluster includes: Collect the real-time impedance measurement values ​​of the main target line and the backup target line; Adjust the compensation current amplitude of the first energy storage converter cluster so that the virtual equivalent impedance value of the main target line reaches the first preset multiple within the first time window; When the attenuation rate of the differential current signal of the main target line exceeds the set attenuation rate threshold, the output compensation current of the second energy storage converter cluster is adjusted so that the virtual equivalent impedance value of the backup target line reaches the second preset multiple within the second time window. Based on the deviation of the virtual equivalent impedance of the two lines, the current output of the first energy storage converter cluster and the second energy storage converter cluster are adjusted in real time until the virtual equivalent impedance ratio stabilizes within the set range.

9. The power system transient stability fast response control method according to claim 8, characterized in that, The step of controlling the energy storage converter to operate in current source mode and configuring its reverse power characteristics on a predefined absorption path based on the power grid topology to absorb energy flow redirected by the virtual high-impedance wall includes: Based on the real-time intensity and direction of the energy flow redirected by the virtual high-impedance wall, a power tracking curve for the absorption path is dynamically generated. The energy storage converter is controlled to perform the following operations in current source mode: when an energy flow to a critical unit is detected, a reverse active current is output; when an energy flow causes system oscillation, a damping current component opposite to the rate of change of the power angle is superimposed. Based on the power tracking curve, the output current amplitude and phase angle combination of the energy storage converter are adjusted in real time to match the active power absorption rate of the absorption path with the diffusion rate of the diverted energy.

10. A power system transient stability fast response control system, characterized in that, include: The phase offset calculation module is used to collect transient harmonic current signals generated by grid faults in real time through the harmonic detection unit connected to the DC bus of the energy storage converter, and to calculate the phase offset of the transient harmonic current signals. A power control command generation module is used to generate power control commands based on the phase offset through a pre-configured hardware mapping circuit. The transient stability response module is used to transmit the power control command to the power semiconductor drive unit of the energy storage converter, bypassing the digital signal processor to drive the power module to perform transient stability response; The transient energy flow path identification module is used to acquire the differential current signal by the power grid line current sensor and identify the path of transient energy flow to key units based on the power grid topology. A virtual high-impedance wall forming module is used to dynamically form a virtual high-impedance wall on the target line for the path. An energy flow absorption module is used to control the energy storage converter to operate in current source mode and configure reverse power characteristics on a predefined absorption path according to the power grid topology, so as to absorb the energy flow redirected by the virtual high impedance wall.

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