Key scanning detection device and contactless electronic trigger type keyboard

Abstract

According to the key scanning detection device and the contactless electronic trigger type keyboard, the multiple multiplexers and the multiple analog-to-digital converters are controlled to be started through the DMA controller, a connected keyboard matrix is scanned through a full-hardware chain type scanning method, scheduling intervention of a CPU processor is not needed, CPU loads and signal delay time are effectively reduced, and the operation efficiency is improved. Therefore, the key response delay is reduced, and the key scanning frequency is improved; moreover, each task node is automatically triggered through a plurality of timers, high-precision synchronization of each task node can be realized, and the keyboard matrix is ensured to be compulsively scanned in a preset cycle period, so that the key event reporting delay is effectively avoided, the key event reporting moment jitter is avoided, and the user experience is improved. The technical problems that an existing key scanning detection method is too high in CPU load, limited in key scanning frequency, remarkable in key response delay and too large in jitter when a key event is reported are solved.

Description

Technical Field

[0001] This application relates to the field of keyboard control circuit technology, and in particular to a key scanning and detection device and a contactless electronic trigger keyboard. Background Technology

[0002] Magnetic axis keyboards are a new type of input device based on the principle of magnetic field induction. The core technology lies in utilizing the Hall effect to achieve contactless key actuation, fundamentally solving the problems of physical wear, noise, and slow response speed inherent in mechanical keyboards. In a magnetic axis keyboard, a small magnet is installed under each key, and a Hall sensor is integrated on the keyboard's PCB (Printed Circuit Board). When a user presses a key, the corresponding magnet shifts, changing the magnetic field distribution between the magnet and the Hall sensor. The Hall sensor detects this change and converts it into an electrical signal. The internal control circuit of the magnetic axis keyboard detects and processes this signal, determines the key state change, and reports it to the CPU (Central Processing Unit). Therefore, magnetic axis keyboards have gained significant market attention among specific user groups in recent years.

[0003] Key performance indicators for magnetic axis keyboards typically include polling rate, key scan frequency, key latency, and key accuracy. In existing magnetic axis keyboard technology, key scanning detection methods primarily rely on the core processing of an MCU (Microcontroller Unit). Specifically, the MCU controls a MUX (Multiplexer) to select the row to be scanned in the keyboard matrix, and the MCU activates an ADC (Analog-to-Digital Converter) to sample the data. The returned digital signal is then sent back to the MCU for key value conversion, and the key state change is determined, generating a key reporting event.

[0004] Therefore, all operations in existing key scanning and detection methods, including MUX row switching, ADC sampling, data processing, and key event reporting, require the full participation of the MCU. This leads to excessive CPU resource utilization and CPU load within the MCU. Furthermore, the serial and intensive scheduling execution of the CPU within the MCU introduces processing time, and the accumulated processing time results in a significant signal delay between the change of physical key state and the key event reporting. High CPU load further exacerbates this signal delay. Additionally, because the CPU within the MCU needs to handle numerous tasks and may be interrupted, the CPU processing time is significantly uncertain. This leads to unstable and jittery key reporting times, making it impossible to accurately align to the expected return rate cycle point, and further hindering the application layer from relying on precise key timing information.

[0005] In summary, existing key scanning and detection methods suffer from technical problems such as excessive CPU load, limited key scanning frequency, significant key response delay, and excessive jitter in key event reporting, because they over-concentrate all high real-time and high-frequency tasks on the MCU's CPU core. Summary of the Invention

[0006] In view of the shortcomings of the prior art described above, the purpose of this application is to provide a key scanning detection device and a contactless electronic trigger keyboard to solve the technical problems of excessive CPU load, limited key scanning frequency, significant key response delay, and excessive jitter in key event reporting caused by the deep involvement of the CPU in the entire key scanning detection process in the existing key scanning detection method.

[0007] To achieve the above and other related objectives, a first aspect of this application provides a key scanning detection device for scanning and detecting a connected keyboard matrix. The key scanning detection device includes: a CPU processor, a DMA controller, multiple multiplexers, multiple analog-to-digital converters (ADCs), and multiple timers. The DMA controller is connected to each multiplexer, and each multiplexer is connected to each key at a position on a column of the keyboard matrix and to an ADC. Each ADC is connected to the DMA controller. The CPU processor is connected to the DMA controller and to an external host controller. Each timer includes an ADC timer connected to each ADC and a first DMA timer and a second DMA timer connected to the DMA controller. The device scans and detects the keyboard matrix by receiving data from... The host controller periodically sends a keyboard scan start signal and starts the first DMA timer through the trigger manager to start the DMA controller periodically after a preset first duration. The DMA controller configures a slave task chain according to the pre-configured master control task chain and synchronously starts the second DMA timer and the ADC timer. The DMA controller, according to the configured slave task chain and based on the second DMA timer and the ADC timer, controls each multiplexer and each analog-to-digital converter to start periodically, using a fully hardware chained scanning method to scan the keyboard matrix line by line and generate a key travel analog dataset of the keyboard matrix. The CPU processor, based on the key travel analog dataset, determines the key state changes of each key in the keyboard matrix and generates key events to be reported to the host controller.

[0008] In some embodiments of the first aspect of this application, the method of scanning the keyboard matrix row by row using a full hardware chain scanning method includes: resetting the second DMA timer and the ADC timer; determining the current row to be scanned according to the configured subordinate task chain through the DMA controller, and controlling each multiplexer and each analog-to-digital converter to start periodically based on the second DMA timer and the ADC timer to scan and detect each key at the position of the current row to be scanned, generating analog key travel data of the current row to be scanned; resetting the second DMA timer and the ADC timer, and repeating the previous step to switch the current row to be scanned until the scanning of the entire keyboard matrix is ​​completed; generating an analog key travel dataset of the keyboard matrix based on the analog key travel data of each row.

[0009] In some embodiments of the first aspect of this application, the method for scanning and detecting each key at the current scanned row position includes: the second DMA timer starts timing, and after a preset second duration, the DMA controller, according to the configured subordinate task chain, transmits the current scanned row data stored in the first buffer to each multiplexer, thereby controlling the analog switches corresponding to each multiplexer to turn on and connecting the connection circuits between each analog-to-digital converter and each key at the current scanned row position; the ADC timer starts timing, and after a preset third duration, each analog-to-digital converter samples the electrical analog signals of each key at the current scanned row position and converts the sampled electrical analog signals into multiple corresponding key travel analog quantities, generating key travel analog quantity data of the current scanned row and storing it in the third buffer; the second DMA timer starts timing, and after a preset fourth duration, the DMA controller, according to the configured subordinate task chain, stores the key travel analog quantity data of the current scanned row in the fourth buffer; simultaneously, the second DMA timer and the ADC timer are reset.

[0010] In some embodiments of the first aspect of this application, the DMA controller configures two subordinate task chains according to the configured master control task chain, namely a first subordinate task chain and a second subordinate task chain, so that the DMA controller can control each multiplexer and each analog-to-digital converter to start at regular intervals and use a full hardware chain scanning method to alternately scan each row of the keyboard matrix to generate the key travel analog quantity dataset of the keyboard matrix.

[0011] In some embodiments of the first aspect of this application, the method of alternately scanning each row of the keyboard matrix using a fully hardware chained scanning method includes: resetting the second DMA timer and the ADC timer; the second DMA timer starts timing, and after a preset second duration, the DMA controller, according to the configured first subordinate task chain, transmits the data of the current row to be scanned stored in the first buffer to each multiplexer, so as to control the analog switches corresponding to each multiplexer to turn on, and connect the connection circuits between each analog-to-digital converter and each key at the current row position to be scanned; the ADC timer starts timing, and after a preset third duration, each analog-to-digital converter samples the electrical analog signals of each key at the current row position to be scanned, and converts the sampled electrical analog signals into multiple corresponding key travel analog quantities, generating key travel analog quantity data of the current row to be scanned and storing it in the third buffer; the second DMA timer starts timing. After a preset fourth duration, the DMA controller, according to the configured first subordinate task chain, stores the analog key travel data of the current row to be scanned into the fourth buffer; simultaneously, it synchronously resets the second DMA timer and the ADC timer. After a second duration following the start of the new cycle, the DMA controller, according to the configured second subordinate task chain, switches the next row to be scanned and transmits the data of that row stored in the second buffer to each multiplexer to control the corresponding analog switch of each multiplexer to turn on, connecting the connection circuit between each analog-to-digital converter and each key at that row position, allowing each analog-to-digital converter to sample the electrical analog signal of each key at that row position; repeating the above steps, alternately switching the current row to be scanned according to the two subordinate task chains until the scanning of the entire keyboard matrix is ​​completed; and generating the analog key travel data set of the keyboard matrix based on the analog key travel data of each row.

[0012] In some embodiments of the first aspect of this application, the method of determining the key state changes of each key in the keyboard matrix and generating key events based on the key travel analog quantity dataset includes: performing signal preprocessing on the key travel analog quantity dataset by the CPU processor to obtain an optimized target key travel analog quantity dataset; traversing the target key travel analog quantity of each key in the target key travel analog quantity dataset and selecting one or more keys whose target key travel analog quantity satisfies a preset key trigger travel condition as target keys; triggering an input event reporting mechanism based on the key value of each target key and the target key travel analog quantity, generating key events and storing them in a fifth buffer for the host controller to periodically retrieve.

[0013] In some embodiments of the first aspect of this application, after the CPU processor generates a key event, a certain amount of time is reserved so that the host controller can synchronously acquire the key event when it sends a keyboard scan start signal at regular intervals.

[0014] In some embodiments of the first aspect of this application, the key scanning detection device further includes: a coprocessor, which is connected to the DMA controller and the CPU processor respectively, and is used to filter the key travel analog dataset after the DMA controller generates the key travel analog dataset of the keyboard matrix, so that the CPU processor can determine the key state change of each key in the keyboard matrix and generate a key event based on the filtered key travel analog dataset.

[0015] To achieve the above and other related objectives, a second aspect of this application provides a contactless electronic trigger keyboard, comprising: a keyboard matrix, the keyboard matrix comprising: a plurality of keys connected in a row-column interleaved manner; an electronic sensor disposed under each key, used to collect electrical analog signals generated by the user when triggering the corresponding key; and a key scanning detection device as described in any of the above embodiments, the key scanning detection device being connected to each electronic sensor of the keyboard matrix for collecting each electrical analog signal to scan and detect the keyboard matrix.

[0016] In some embodiments of the second aspect of this application, the types of the contactless electronically triggered keyboard include: magnetic axis keyboards, inductive keyboards, and electrostatic capacitive keyboards.

[0017] As described above, this application has the following beneficial effects: This application provides a key scanning detection device and a contactless electronic trigger keyboard. It uses a DMA controller to control multiple multiplexers and multiple analog-to-digital converters to start, employing a fully hardware chained scanning method to scan the connected keyboard matrix without CPU processor scheduling intervention. This effectively reduces CPU load and signal delay time, thereby reducing key response latency and increasing key scanning frequency. Furthermore, by automatically triggering each task node through multiple timers, high-precision synchronization of each task node can be achieved, ensuring that the keyboard matrix scanning is forcibly completed within a preset cycle. This effectively eliminates key event reporting delays and avoids key event reporting timing jitter, solving the technical problems of excessive CPU load, limited key scanning frequency, significant key response latency, and excessive key event reporting timing jitter caused by the deep involvement of the CPU in the entire key scanning detection process in existing key scanning detection methods. Attached Figure Description

[0018] Figure 1 This is shown as a key scanning detection device in one embodiment of this application.

[0019] Figure 2 The diagram shown is a flowchart of a keyboard matrix scanning detection method according to an embodiment of this application.

[0020] Figure 3 The diagram shown is a schematic of scanning the keyboard matrix row by row using a fully hardware chain scanning method in one embodiment of this application.

[0021] Figure 4 The diagram shown is a schematic of alternating scanning of the keyboard matrix using a fully hardware chain scanning method in one embodiment of this application. Detailed Implementation

[0022] The following specific examples illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. This application can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application. It should be noted that, unless otherwise specified, the following embodiments and features in the embodiments can be combined with each other.

[0023] Each key on a magnetic axis keyboard has a small magnet mounted underneath it, and a Hall sensor is integrated on the keyboard's PCB (Printed Circuit Board). When a user presses a key, the corresponding magnet shifts, changing the magnetic field distribution between the magnet and the Hall sensor. The Hall sensor detects this change and converts it into an analog electrical signal. The internal key scanning and detection control unit of the magnetic axis keyboard detects and processes this analog signal, determines the key state change, and reports the key event to the microcontroller's CPU processor.

[0024] Existing key scanning detection methods mainly involve initializing the keyboard matrix of a magnetic axis keyboard using a microcontroller and scanning line by line.

[0025] It should be understood that a keyboard matrix is ​​an input device design method that connects multiple keys in a row-column interleaving manner. That is, multiple keys are arranged at the intersections of row and column lines, forming a two-dimensional matrix. Each key is connected to one row and one column line. Initializing the keyboard matrix involves setting all row lines to a high level via a microcontroller. Scanning the keyboard matrix row by row involves the following steps.

[0026] ① The address selection signal of the multiplexer is controlled by the CPU processor in the microcontroller to select the current row line to be scanned in the keyboard matrix and set the row line to low level.

[0027] ② The analog-to-digital converter is started by the CPU processor in the microcontroller to sample the analog signals of all column lines of the currently scanned row and return the corresponding digital signals to the CPU processor.

[0028] ③ The CPU processor in the microcontroller performs signal preprocessing on the acquired digital signals, including signal calibration and signal filtering, and determines whether a button has reached the preset trigger stroke, thereby determining whether the button state has changed.

[0029] ④ If the state of a key on the row changes, the CPU processor in the microcontroller will trigger the corresponding input event reporting mechanism that conforms to the HID human-computer interaction device standard protocol, generate a key event, and report it to the host controller connected to the magnetic axis keyboard.

[0030] ⑤ The address selection signal of the multiplexer MUX is controlled by the CPU processor of the microcontroller to switch and select the next row line to be scanned. The above steps are repeated to scan the entire keyboard matrix in a loop.

[0031] Therefore, existing key scanning detection methods excessively concentrate all high real-time, high-frequency tasks on the microcontroller's CPU core, resulting in technical problems such as excessive CPU load, limited key scanning frequency, significant key response delay, and excessive jitter in key event reporting.

[0032] To address the aforementioned issues, this application provides a key scanning detection device and a contactless electronic trigger keyboard. The device aims to scan the keyboard matrix using a fully hardware chain scanning method by setting a DMA controller, multiple analog-to-digital converters, and multiple timers as peripherals of a microcontroller. Each timer triggers a task chain without requiring CPU processor interrupts or scheduling intervention. This not only enables automatic task flow and seamless connection but also effectively reduces key response latency and ensures timely key event reporting.

[0033] Before providing a further detailed description of this application, the nouns and terms used in the embodiments of this application are explained, and the nouns and terms used in the embodiments of this application shall be interpreted as follows:

[0034] <1> PCB (Printed Circuit Board): A plate-shaped assembly on an insulating substrate with interconnections and printed components formed according to a predetermined design.

[0035] <2> MCU (Microcontroller Unit): A microcontroller is a chip-level computer system that integrates a central processing unit, memory, timers / counters, and various input / output interfaces onto a single chip, forming a complete computing and control system.

[0036] <3> CPU (Central Processing Unit): A very large-scale integrated circuit used to interpret computer instructions and process data in computer software.

[0037] <4> DMA (Direct Memory Access): A hardware mechanism that allows external devices or internal peripherals to exchange data directly with the system's memory without CPU intervention.

[0038] <5> MUX (Multiplexer): A multiplexer is a technical device that allows multiple signals to be transmitted simultaneously on a single physical channel. Essentially, it is a data selection switch that selects one from many.

[0039] <6> ADC (Analog-to-Digital Converter): An electronic device that converts a continuous analog signal into a discrete digital signal.

[0040] <7> SYNC (Synchronization): A synchronization signal used to coordinate the timing consistency between different systems or components.

[0041] <8> TRGM (Trigger Multiplexer): A trigger manager, a hardware module used to flexibly route trigger signals from different peripherals or pins to the target peripheral, enabling efficient collaboration between modules of a system-on-a-chip.

[0042] <9> GPIO (General Purpose Input / Output): A general purpose input / output port, a basic hardware resource in an embedded system used for digital signal interaction with external devices.

[0043] <10> TMR (Timer): A timer is a timing device implemented in hardware or software that can trigger a specific operation based on a preset time interval or absolute time.

[0044] <11> RAM (Random Access Memory): A type of internal memory in a computer system that directly exchanges data with the CPU; it is also known as main memory or RAM.

[0045] <12> FIFO (First In First Out): A mechanism that processes data according to the order in which it arrives.

[0046] <13> USB (Universal Serial Bus): A standard for serial bus and a technical specification for input / output interfaces.

[0047] <14> EP (Endpoint): An endpoint is a data buffer on a USB device used to store data to be sent or received.

[0048] <15> SOF (Start-of-Frame): A basic packet type defined by the USB protocol, serving as the core carrier of the time reference between the host and the device.

[0049] To make the inventive objectives, technical solutions, and advantages of this application clearer, the technical solutions in the embodiments of this application are further described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only for explaining this application and are not intended to limit this application.

[0050] like Figure 1 The diagram illustrates a schematic of a key scanning detection device according to an embodiment of this application. The key scanning detection device in this embodiment can be applied to magnetic axis keyboards, inductive keyboards, and electrostatic capacitive keyboards. The key scanning detection device includes: a CPU processor, a DMA controller, multiple multiplexers, multiple analog-to-digital converters, and multiple timers.

[0051] The key scanning and detection device is connected to the keyboard matrix. It should be understood that a keyboard matrix is ​​an input device design method that connects multiple keys in a row-column intersection manner. That is, multiple keys are arranged at the intersections of row lines and column lines to form a two-dimensional matrix. In this case, each row line includes multiple keys, each column line includes multiple keys, and each key connects to one row line and one column line.

[0052] The DMA controller of the key scanning detection device is connected to each multiplexer. For example... Figure 1 As shown, the key scanning detection device further includes a GPIO interface, through which the DMA controller is connected to each multiplexer.

[0053] The DMA controller can also be connected to various multiplexers via an SPI interface, in which case the key scanning detection device is equipped with an SPI interface. It should be noted that users can choose to configure the key scanning detection device with either a GPIO interface or an SPI interface as needed; this application is not limited to either.

[0054] In one embodiment, the CPU processor, the DMA controller, each analog-to-digital converter, and each timer can be integrated into a microcontroller, connected to each multiplexer via the GPIO interface or SPI interface, and connected to the keyboard matrix.

[0055] Each multiplexer is connected to a key at a position in one column of the keyboard matrix and is connected to an analog-to-digital converter (ADC); each ADC is connected to the DMA controller; the CPU processor is connected to the DMA controller and to an external host controller.

[0056] In one specific embodiment, the keyboard matrix is ​​an M*N two-dimensional matrix, including M row lines and N column lines. The key scanning and detection device includes two analog-to-digital converters (ADCs) and N multiplexers. The N multiplexers are divided into two groups, each group connected to one ADC. For example, if 14 multiplexers are used, 7 multiplexers are connected to one ADC, and the remaining 7 multiplexers are connected to the other ADC. Each multiplexer has M channels, and each channel is connected to a key at one column line position. That is, the M channels of the first multiplexer are connected to the M keys at the first column line position, the M channels of the second multiplexer are connected to the M keys at the second column line position, and so on.

[0057] like Figure 1 As shown, each timer includes: an ADC timer connected to each analog-to-digital converter, and a first DMA timer and a second DMA timer connected to the DMA controller.

[0058] In this embodiment, the key scanning and detection device is used to scan and detect the keyboard matrix, specifically as follows: Figure 2 As shown, it includes steps S1 to S4.

[0059] Step S1: Receive the keyboard scan start signal sent periodically by the host controller, and start the first DMA timer through the trigger manager so that the DMA controller is started after a preset first duration.

[0060] like Figure 1 As shown, in one embodiment, the key scan detection device further includes a trigger manager. The trigger manager receives the keyboard scan start signal via the TRGM interface and routes the keyboard scan start signal to the first DMA timer to synchronously start the first DMA timer.

[0061] It should be noted that the keyboard scan start signal can be a SYNC synchronization signal, which is sent periodically by the host controller.

[0062] It should be understood that the communication connection methods between the keyboard and the host controller mainly include: USB wired connection, Bluetooth wireless connection, and radio frequency wireless connection. The keyboard scan start signal sent by the host controller at regular intervals includes various types, such as USB SOF packets. After receiving the keyboard scan start signal, the trigger manager can select a trigger source according to the signal type to accurately and synchronously start the first DMA timer.

[0063] Preferably, the first DMA timer is set to single-pulse mode and the delay time is set to a first duration T1. The first DMA timer starts timing, and after the preset first duration T1, the DMA controller is started at regular intervals.

[0064] Step S2: Through the DMA controller, configure the slave task chain according to the pre-configured master control task chain, and synchronously start the second DMA timer and the ADC timer.

[0065] It should be noted that the main control task chain is pre-configured by the CPU processor during initialization before scanning and detecting the keyboard matrix. The main control task chain is a descriptor chain, including one or more descriptors. Each descriptor includes a source address, a destination address, a data transfer length, and a pointer to the next descriptor. During CPU processor initialization, the structure of each descriptor is defined, and multiple corresponding descriptors are created according to the transmission task. The pointer to the next descriptor in each descriptor is configured to link the descriptors, generating the main control task chain. This chain is used to start the DMA controller and simultaneously start the second DMA timer and the ADC timer.

[0066] Similarly, the subordinate task chain is also a descriptor chain, including one or more descriptors, which the DMA controller uses to automatically execute corresponding tasks, thereby scanning the keyboard matrix through a full hardware chain scanning method.

[0067] Both the second DMA timer and the ADC timer are set to cyclic mode, with a cycle period of a fourth duration T4. Specifically, the second DMA timer has a delay time set to a second duration T2, and the ADC timer has a delay time set to a third duration T3. The second DMA timer and the ADC timer start timing synchronously, and are used to periodically trigger the DMA controller or each analog-to-digital converter to execute the tasks configured in the subordinate task chain at preset durations T2, T3, and during heavy load.

[0068] It should be noted that the preset delay time of each timer can be dynamically adjusted, that is, the CMP comparison value in the timer can be dynamically adjusted. When the keyboard scan start signal sent by the host controller is a USB SOF packet, the electromagnetic interference window of the USB SOF packet can be accurately avoided by adjusting the CMP comparison value of each timer, thereby suppressing USB communication noise.

[0069] The initialization of the CPU processor also includes the initialization of the keyboard matrix, that is, setting all row lines of the keyboard matrix to a high level so as to allow subsequent detection and sampling of the electrical analog signals of each key.

[0070] Step S3: The DMA controller, according to the configured subordinate task chain and based on the second DMA timer and the ADC timer, controls each multiplexer and each analog-to-digital converter to start at regular intervals, so as to scan the keyboard matrix line by line using a full hardware chain scanning method and generate the analog data set of key travel of the keyboard matrix.

[0071] In one embodiment, the method of scanning the keyboard matrix row by row using a full hardware chain scanning method in step S3 includes: resetting the second DMA timer and the ADC timer; determining the current row to be scanned according to the configured subordinate task chain through the DMA controller, and controlling each multiplexer and each analog-to-digital converter to start periodically based on the second DMA timer and the ADC timer to scan and detect each key at the position of the current row to be scanned, generating analog key travel data of the current row to be scanned; resetting the second DMA timer and the ADC timer, and repeating the previous step to switch the current row to be scanned until the scanning of the entire keyboard matrix is ​​completed; generating the analog key travel dataset of the keyboard matrix based on the analog key travel data of each row.

[0072] Specifically, such as Figure 3 As shown, the method for scanning and detecting each button at the current position of the line to be scanned includes the following steps.

[0073] ① The second DMA timer starts timing. After a preset second duration T2, the DMA controller transmits the data of the current row line to be scanned stored in the first buffer to each multiplexer according to the configured subordinate task chain, so as to control the analog switch corresponding to each multiplexer to turn on and connect the connection circuit of each analog-to-digital converter to each button at the current row line position.

[0074] Preferably, the first buffer can be an I / O buffer, which allocates a specific area in memory to store the data of each row line, so that the DMA controller can acquire it and use it to switch the analog switches of each multiplexer to achieve the switching of the row line to be scanned.

[0075] ②The ADC timer starts timing. After a preset third duration T3, each analog-to-digital converter samples the electrical analog signal of each key at the current position of the row line to be scanned, and converts the sampled electrical analog signal into multiple corresponding key travel analog quantities, generating key travel analog quantity data of the current row line to be scanned and storing it in the third buffer.

[0076] In one embodiment, each analog-to-digital converter integrates a dedicated DMA controller, which can directly transfer the generated analog key travel data of the current scanned row line to a third buffer. Preferably, the third buffer can be a sequence buffer to process the data stream sequentially.

[0077] It should be noted that during the third time period T3, the connection circuits between each analog-to-digital converter and each button at the current scanned row line position should be connected. That is, within the time period (T3-T2), the DMA controller, according to the configured subordinate task chain, transmits the data of the current scanned row line stored in the first buffer to each multiplexer, and the analog switches corresponding to each multiplexer are turned on, connecting the connection circuits between each analog-to-digital converter and each button at the current scanned row line position.

[0078] ③ The second DMA timer starts timing. After a preset fourth duration T4, the DMA controller stores the analog key travel data of the current scanned row line into the fourth buffer according to the configured subordinate task chain.

[0079] Preferably, the fourth buffer can be a RAM buffer, in which a specific area is allocated in RAM (random access memory) to store the analog data of each key travel obtained by scanning.

[0080] It should be noted that after the fourth time period T4, each analog-to-digital converter should have completed sampling. That is, within the time period (T4-T3), each analog-to-digital converter samples the electrical analog signal of each key at the current position of the row line to be scanned, and converts the sampled electrical analog signal into multiple corresponding key travel analog quantities, generating the key travel analog quantity data of the current row line to be scanned.

[0081] After the fourth duration T4, the second DMA timer and the ADC timer are synchronously reset. After the second duration T2 following the start of the new cycle, the DMA controller switches the current scanned row line according to the configured subordinate task chain and repeats step ①. At this time, within the second duration T2, the DMA controller should have completed storing the analog key travel data of the previous scanned row line into the fourth buffer.

[0082] The following example further illustrates the method of scanning an M*N keyboard matrix line by line using a fully hardware chained scanning approach: The second DMA timer and the ADC timer are started synchronously. First, the data of the first row to be scanned, the data of the second row to be scanned, and so on up to the Mth row to be scanned are stored in the specified location of the first buffer in sequence, and the corresponding descriptors are configured to generate the subordinate task chain.

[0083] Then, begin scanning the first row of the M*N keyboard matrix. Specifically, after the preset second duration T2, as follows... Figure 3 As shown, the second DMA timer triggers the DMA controller to transmit the first row line data to be scanned stored in the first buffer to each multiplexer according to the first descriptor of the subordinate task chain, so as to control the analog switches of each button of the first row line to be turned on by each multiplexer, and connect the connection circuit between each analog-to-digital converter and each button at the position of the first row line.

[0084] After the preset third duration T3, as Figure 3 As shown, the ADC timer triggers each analog-to-digital converter to sample the electrical analog signals of each button in the circuit that has been turned on, and converts each sampled electrical analog signal into multiple corresponding button travel analog quantities, generating the button travel analog quantity data of the first row and storing it in the third buffer.

[0085] After the preset fourth duration T4, as Figure 3 As shown, the second DMA timer triggers the DMA controller to store the analog key travel data of the first row of lines into a designated location in the fourth buffer according to the first descriptor of the subordinate task chain.

[0086] At the same time, such as Figure 3 As shown, the second DMA timer and the ADC timer are reset, and scanning of the second row of the M*N keyboard matrix begins. After a second duration T2 at the start of the new cycle, as... Figure 3 As shown, the second DMA timer triggers the DMA controller to transmit the second row line data to be scanned stored in the first buffer to each multiplexer according to the second descriptor of the subordinate task chain, so as to control the analog switches of each button on the second row line of each multiplexer to be turned on, and connect the connection circuit between each analog-to-digital converter and each button at the position of the second row line.

[0087] Repeat the above steps, switching the current row to be scanned line by line, until the entire keyboard matrix is ​​scanned.

[0088] It should be noted that after starting to scan the Mth row of the M*N keyboard matrix, the second DMA timer and the ADC timer need to be reset again. The second DMA timer triggers the DMA controller to store the analog key travel data of the Mth row to the designated location in the fourth buffer according to the Mth descriptor of the subordinate task chain. Only after this can the second DMA timer and the ADC timer be stopped.

[0089] Therefore, scanning an M*N keyboard matrix requires a total of M+1 cycle times, meaning the time required to scan an M*N keyboard matrix satisfies the following condition:

[0090] T5 = (M+1)*T4; Formula (1)

[0091] Where T5 is the time required to scan the M*N keyboard matrix; T4 is the cycle period of the second DMA timer and the ADC timer; and M is the number of rows in the keyboard matrix.

[0092] The purpose of this design in this embodiment is that each task node, such as switching the analog switches of each multiplexer, starting each analog-to-digital converter for sampling, and storing the sampled data in the corresponding buffer, is automatically completed by hardware. The DMA controller autonomously advances the task flow according to the pre-configured task chain and automatically triggers each task through each high-precision timer. The entire process requires no CPU scheduling intervention, the CPU load is 0, effectively reducing the signal delay caused by the accumulation of CPU processing time, reducing the key response delay, and supporting the increase of key scanning frequency, where the single-line scanning cycle can reach 3.91μs and the full matrix scanning cycle can reach 22.7μs.

[0093] Furthermore, this application triggers each analog-to-digital converter to sample via the ADC timer and transfers data via the DMA controller, which can effectively avoid data bus interference during the sampling period of each analog-to-digital converter, ensure accurate control of sampling, and ensure that the generated analog key travel data has high accuracy.

[0094] In one embodiment, step S3 further includes another implementation method: through the DMA controller, according to the configured master control task chain, two subordinate task chains are configured, namely a first subordinate task chain and a second subordinate task chain, so that the DMA controller can control each multiplexer and each analog-to-digital converter to start at regular intervals, and use a full hardware chain scanning method to alternately scan each row of the keyboard matrix to generate the key travel analog quantity dataset of the keyboard matrix.

[0095] Specifically, such as Figure 4 As shown, the method of alternately scanning each row of the keyboard matrix using a full hardware chain scanning method includes the following steps.

[0096] ① Reset the second DMA timer and the ADC timer.

[0097] ② The second DMA timer starts timing. After a preset second duration T2, the DMA controller transmits the data of the current row line to be scanned stored in the first buffer to each multiplexer according to the configured first subordinate task chain, so as to control the analog switches corresponding to each multiplexer to turn on and connect the connection circuits of each analog-to-digital converter to each button at the current row line position.

[0098] ③ The ADC timer starts timing. After a preset third duration T3, each analog-to-digital converter samples the electrical analog signal of each key at the current position of the row line to be scanned, and converts the sampled electrical analog signal into multiple corresponding key travel analog quantities, generating key travel analog quantity data of the current row line to be scanned and storing it in the third buffer.

[0099] It should be noted that during the third time period T3, the connection circuits between each analog-to-digital converter and each button at the current scanned row line position should be connected. That is, within the time period (T3-T2), the DMA controller, according to the configured first subordinate task chain, transmits the data of the current scanned row line stored in the first buffer to each multiplexer, and the analog switches corresponding to each multiplexer are turned on, connecting the connection circuits between each analog-to-digital converter and each button at the current scanned row line position.

[0100] ④ The second DMA timer starts timing. After a preset fourth duration T4, the DMA controller stores the analog key travel data of the current scanned row line into the fourth buffer according to the configured first subordinate task chain.

[0101] It should be noted that after the fourth time period T4, each analog-to-digital converter should have completed sampling. That is, within the time period (T4-T3), each analog-to-digital converter samples the electrical analog signal of each key at the current position of the row line to be scanned, and converts the sampled electrical analog signal into multiple corresponding key travel analog quantities, generating the key travel analog quantity data of the current row line to be scanned.

[0102] ⑤ Simultaneously, the second DMA timer and the ADC timer are reset synchronously. After the second duration T2 of the new cycle begins, the DMA controller switches the next row line as the current row line to be scanned according to the configured second subordinate task chain, and transmits the row line data stored in the second buffer to each multiplexer to control the analog switch corresponding to each multiplexer to turn on, and connects the connection circuit between each analog-to-digital converter and each button at the row line position, so that each analog-to-digital converter can sample the electrical analog signal of each button at the row line position.

[0103] Preferably, the second buffer is the same as the first buffer, and can be an I / O buffer. A specific area is allocated in memory to store the data of each row line, so that the DMA controller can obtain it and use it to switch the analog switches of each multiplexer to realize the switching of the row line to be scanned.

[0104] In this embodiment, the present application employs a dual-buffer mechanism through two subordinate task chains to support synchronous data reading and writing. This means that the analog key travel data of the sampled previous scanned row line can be stored in the fourth buffer simultaneously, and the analog key travel data of the currently switched row line to be scanned can be obtained from the second buffer and transmitted to each multiplexer. Therefore, within the second duration T2 of the new cycle, the DMA controller does not need to complete the storage task of the previous scanned row line. That is, the cycle period T4 of the second DMA timer and the ADC timer is shorter than the cycle period T4 when scanning the keyboard matrix row by row according to a single subordinate task chain, effectively reducing the scanning time of the keyboard matrix and further reducing key response latency.

[0105] It should be noted that the first subordinate task chain is Figure 4 Chain 0 is shown, and the second subordinate task chain is... Figure 4 Chain 1 is shown.

[0106] ⑥ Repeat the above steps, alternating between the current row to be scanned, until the entire keyboard matrix is ​​scanned.

[0107] ⑦ Generate the key travel analog dataset of the keyboard matrix based on the key travel analog data of each row.

[0108] The following example further illustrates the method of alternately scanning an M*N keyboard matrix using a fully hardware chained scanning approach. Specifically, the second DMA timer and the ADC timer are started synchronously. First, the first row line data to be scanned, the third row line data to be scanned, and the fifth row line data to be scanned are stored sequentially in designated locations in the first buffer, and each descriptor is configured to generate the first subordinate task chain. Simultaneously, the second row line data to be scanned, the fourth row line data to be scanned, and the sixth row line data to be scanned are stored in designated locations in the second buffer, and each descriptor is configured to generate the second subordinate task chain.

[0109] Then, begin scanning the first row of the M*N keyboard matrix. Specifically, after the preset second duration T2, as follows... Figure 4As shown, the second DMA timer triggers the DMA controller to transmit the first row line data to be scanned stored in the first buffer to each multiplexer according to the first descriptor of the first subordinate task chain, so as to control the analog switches of each button of the first row line to be turned on by each multiplexer, and connect the connection circuit between each analog-to-digital converter and each button at the position of the first row line.

[0110] After the preset third duration T3, as Figure 4 As shown, the ADC timer triggers each analog-to-digital converter to sample the electrical analog signals of each button in the circuit that has been turned on, and converts each sampled electrical analog signal into multiple corresponding button travel analog quantities, generating the button travel analog quantity data of the first row and storing it in the third buffer.

[0111] After the preset fourth duration T4, as Figure 4 As shown, the second DMA timer triggers the DMA controller to store the analog key travel data of the first row of lines into a specified location in the fourth buffer according to the first descriptor of the first subordinate task chain.

[0112] At the same time, such as Figure 4 As shown, the second DMA timer and the ADC timer are reset, and scanning of the second row of the M*N keyboard matrix begins. After a second duration T2 at the start of the new cycle, as... Figure 4 As shown, the second DMA timer triggers the DMA controller to transmit the second row line data to be scanned stored in the second buffer to each multiplexer according to the first descriptor of the second subordinate task chain, so as to control the analog switches of each button on the second row line of each multiplexer to be turned on, and connect the connection circuit between each analog-to-digital converter and each button at the position of the second row line.

[0113] After the third duration T3 of the new cycle begins, as follows Figure 4 As shown, the ADC timer triggers each analog-to-digital converter to sample the electrical analog signals of each button in the circuit that has been turned on, and converts each sampled electrical analog signal into multiple corresponding button travel analog quantities, generating the button travel analog quantity data of the second row of data and storing it in the third buffer.

[0114] After the fourth duration T4 of the new cycle begins, as follows Figure 4 As shown, the second DMA timer triggers the DMA controller to store the analog key travel data of the second row to a specified location in the fourth buffer according to the first descriptor of the second subordinate task chain.

[0115] Repeat the above steps, switching the current row to be scanned alternately through the two subordinate task chains, until the entire keyboard matrix is ​​scanned.

[0116] It should be noted that after starting to scan the Mth row of the M*N keyboard matrix, the second DMA timer and the ADC timer need to be reset again. The second DMA timer triggers the DMA controller to store the analog key travel data of the Mth row to the designated location in the fourth buffer. Only after this can the second DMA timer and the ADC timer be stopped.

[0117] Therefore, scanning an M*N keyboard matrix requires a total of M+1 cycle periods, which means that the time required to scan an M*N keyboard matrix also satisfies formula (1).

[0118] Step S4: The CPU processor determines the key state changes of each key in the keyboard matrix based on the key travel analog data set, and generates key events to be reported to the host controller.

[0119] In one embodiment, after scanning the keyboard matrix using a full hardware chain scanning method in step S3, an interrupt is triggered by the DMA controller, and then the CPU processor completes step S4. In this embodiment, compared to existing key scanning and detection methods, the CPU processor in this application only needs to process the analog key travel data set obtained from the scan to generate corresponding key events. Therefore, the CPU processor's clock speed and system power consumption can be significantly reduced. In a specific embodiment, the CPU processor's clock speed can be reduced from 400MHz to 80MHz, and the system dynamic power consumption can be reduced by 40%.

[0120] Specifically, it includes the following steps.

[0121] ①The CPU processor performs signal preprocessing on the analog key travel dataset to obtain an optimized target analog key travel dataset.

[0122] The method of preprocessing the analog key travel data set includes: performing signal calibration and filtering on the analog key travel data set.

[0123] In a preferred embodiment, the key scanning and detection device further includes a coprocessor. The coprocessor is connected to both the DMA controller and the CPU processor, and can be integrated into a microcontroller. After the DMA controller generates a key travel analog dataset of the keyboard matrix, the coprocessor filters the dataset, allowing the CPU processor to determine the key state changes of each key in the keyboard matrix and generate key events based on the filtered dataset.

[0124] It should be understood that a coprocessor is a hardware component specifically designed to assist the CPU in completing specific tasks, thereby improving the overall performance and efficiency of the system by optimizing specific computational tasks. In this embodiment, the coprocessor is specifically used to filter the analog key travel dataset. The use of hardware acceleration technology not only speeds up the processing but also suppresses signal noise. Preferably, the signal noise of the analog key travel dataset obtained by each analog-to-digital converter using 12-bit resolution sampling can be suppressed to <±1 LSB.

[0125] In one embodiment, the Kalman filter algorithm can be used when the coprocessor filters the analog key travel data set. However, it should be noted that users can also choose other filtering algorithms as needed, and this application is not limited to any particular algorithm.

[0126] ② Iterate through the target key travel analog quantities of each key in the target key travel analog quantity dataset, and select one or more keys whose target key travel analog quantities meet the preset key trigger travel conditions as target keys.

[0127] The key trigger travel conditions include: exceeding a preset key trigger travel threshold, or exceeding the target key travel analog amount obtained from the previous key scan. Users can set these conditions as needed.

[0128] ③ Based on the key value of each target key and the analog travel amount of the target key, trigger the input event reporting mechanism, generate key events and store them in the fifth buffer for the host controller to retrieve periodically.

[0129] In one embodiment, the key events generated by the CPU processor can be stored in a data buffer at the keyboard EP endpoint.

[0130] Preferably, after the CPU processor generates a key event, it reserves a certain time to allow the host controller to synchronously acquire the key event when it sends a keyboard scan start signal at regular intervals. This is to address the jitter in the key event reporting time and prevent missing the keyboard scan start signal.

[0131] It should be noted that the host controller sends a keyboard scan start signal cyclically and periodically at certain intervals. Each time the key scan detection device receives the signal, it starts the first DMA timer through the trigger manager to begin scanning the keyboard matrix. At the same time, the host controller synchronously obtains the key events generated by the key scan detection device in the previous cycle.

[0132] Assume the cycle period for the host controller to send the keyboard scan start signal is the total duration T, which satisfies the following condition:

[0133] T = T1 + T5 + T6 + T7; Formula (2)

[0134] Where T is the cycle period for the host controller to send the keyboard scan start signal; T1 is the delay time of the first DMA timer; T5 is the time required to scan the M*N keyboard matrix; T6 is the time required for the CPU processor to generate the key event; and T7 is the time reserved after the CPU processor generates the key event.

[0135] This application uses multiple timers to synchronously trigger each task, which can achieve high-precision synchronization of each task node and ensure that the scanning of the keyboard matrix is ​​completed within a preset cycle. This fixes the time required to scan the keyboard matrix, thereby effectively eliminating the delay in key event reporting and avoiding jitter in key event reporting.

[0136] In one embodiment, steps S3 and S4 can be processed in parallel. That is, while the DMA controller is scanning the keyboard matrix, the CPU processor can simultaneously process the analog key travel data set generated from the previous scan of the keyboard matrix and generate key events. At this time, the cycle period for the host controller to send the keyboard scan start signal can be further reduced, satisfying the condition:

[0137] T = MAX((T1 + T5), (T6 + T7)); Formula (3)

[0138] Where T is the cycle period for the host controller to send the keyboard scan start signal; T1 is the delay time of the first DMA timer; T5 is the time required to scan the M*N keyboard matrix; T6 is the time required for the CPU processor to generate the key event; and T7 is the time reserved after the CPU processor generates the key event.

[0139] In this embodiment, the DMA controller and the CPU processor scan and process data in parallel, which helps to further reduce key response latency and increase key scanning frequency.

[0140] It should be noted that in other embodiments, the DMA controller can trigger an interrupt after scanning one or several rows of the keyboard matrix, and process the generated analog key travel data synchronously with the CPU processor. Specific users can design according to their needs; this application is not limited to this.

[0141] To verify the technical effectiveness of the key scanning and detection device, this application provides a test experiment:

[0142] ① The CPU processor, DMA controller, analog-to-digital converters, and timers of the key scanning and detection device are integrated into an HPM5300 microcontroller, and 13 six-channel multiplexers are connected to a 75-key magnetic axis keyboard. The keyboard matrix size of the 75-key magnetic axis keyboard is 6*13.

[0143] ② Connect an oscilloscope (SDS824X-HD) to the magnetic keyboard via a USB signal cable to capture the level signal when a key is pressed and the key value level signal reported by the magnetic keyboard to the USB signal cable. Connect a USB analyzer (T2) to the magnetic keyboard via a USB signal cable to capture the external level change triggered after the magnetic keyboard reports a key event.

[0144] ③ An oscilloscope and USB analyzer were used to perform 100,000 samplings, and the performance parameters of the key scanning device were calculated based on the sampling data. The test results showed: a row scan rate of 256 kHz, a 156% improvement over the traditional ≤100 kHz, with a row scan cycle ≤3.9 μs; an equivalent full keyboard scan rate of 44 kHz, a 450% improvement over the traditional ≤8 kHz, with a full matrix scan cycle ≤22.7 μs; a key travel detection resolution of 0.02 mm, a 400% improvement over the traditional 0.1 mm, thus significantly improving the key accuracy of the magnetic axis keyboard; a key response delay of 37.5 μs; and key event reporting jitter <±1 μs, reducing the reporting error rate from 15% in the traditional solution to 0%. The key scanning detection device can meet the high polling rate requirement of 8 kHz, meaning it can forcibly complete the keyboard matrix scan within a 125 μs cycle.

[0145] Therefore, the key scanning detection device described in this application has unexpected technical effects: it significantly reduces key response delay, increases key scanning frequency, and eliminates key event reporting jitter, thereby solving the technical problems of excessive CPU load, limited key scanning frequency, significant key response delay, and excessive key event reporting jitter caused by the deep involvement of the microcontroller MCU's CPU in the entire key scanning detection process in existing key scanning detection methods.

[0146] This application also provides a contactless electronic trigger keyboard. The contactless electronic trigger keyboard includes: a keyboard matrix and a key scanning and detection device as provided in the above embodiments.

[0147] The keyboard matrix includes multiple keys connected in a row-column crisscross pattern. Each key has an electronic sensor underneath it, used to collect the analog electrical signal generated when the user triggers the corresponding key.

[0148] In one embodiment, the contactless electronic trigger keyboard includes: a magnetic axis keyboard, an inductive keyboard, and an electrostatic capacitive keyboard. The magnetic axis keyboard primarily uses a Hall effect sensor to detect changes in the magnetic field of the magnet beneath the key when the user presses it, and converts this change into an analog electrical signal output. The inductive keyboard primarily uses an inductive sensor based on the principle of electromagnetic induction, triggering the analog electrical signal by detecting changes in the coil inductance caused by the displacement of an aluminum rod. The electrostatic capacitive keyboard uses an electrostatic capacitive sensor based on the principle of capacitance change, triggering the analog electrical signal by detecting changes in capacitance caused by changes in the distance between the capacitor plates when the keycap is pressed.

[0149] The key scanning and detection device is applicable to the magnetic axis keyboard, the inductive keyboard, and the electrostatic capacitive keyboard. It can be connected to the electronic sensors of the keyboard matrix, such as Hall sensors, inductive sensors, and electrostatic capacitive sensors, to collect the electrical analog signals output by each electronic sensor in order to scan and detect the keyboard matrix.

[0150] It should be understood that the contactless electronic trigger keyboard embodiment provided in the above embodiments and the key scanning detection device embodiment belong to the same concept. The structure of the key scanning detection device and the scanning detection method for the keyboard matrix have been described in detail in the above method embodiments, and will not be repeated here for the sake of brevity.

[0151] It should also be understood that the division of modules and units in the embodiments of this application is illustrative and only represents a logical functional division. In actual implementation, there may be other division methods. Furthermore, the functional modules and units in the various embodiments of this application can be integrated into a single processor, exist as separate physical entities, or have two or more modules integrated into a single module. The integrated modules or units described above can be implemented in hardware or as software functional modules or units.

[0152] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0153] In summary, this application provides a key scanning detection device and a contactless electronic trigger keyboard. By controlling multiple multiplexers and multiple analog-to-digital converters through a DMA controller, a fully hardware-chained scanning method is used to scan the connected keyboard matrix without CPU processor intervention. This effectively reduces CPU load and signal delay, thereby lowering key response latency and increasing key scanning frequency. Furthermore, by automatically triggering each task node through multiple timers, high-precision synchronization of each task node is achieved, ensuring that the keyboard matrix scanning is forcibly completed within a preset cycle. This effectively eliminates key event reporting delays and avoids key event reporting jitter, solving the technical problems of excessive CPU load, limited key scanning frequency, significant key response latency, and excessive key event reporting jitter caused by deep CPU involvement in the entire key scanning detection process in existing key scanning detection methods.

[0154] Therefore, this application effectively overcomes the various shortcomings of the prior art and has high industrial application value.

[0155] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this application should still be covered by the claims of this application.

Claims

1. A key scanning and detection device for scanning and detecting a connected keyboard matrix, characterized in that, include: CPU processor, DMA controller, multiple multiplexers, multiple analog-to-digital converters, and multiple timers; The DMA controller is connected to each multiplexer, each multiplexer is connected to each key at a position of a column in the keyboard matrix, and each multiplexer is connected to an analog-to-digital converter; each analog-to-digital converter is connected to the DMA controller; the CPU processor is connected to the DMA controller and to an external host controller. Each timer includes: an ADC timer connected to each analog-to-digital converter, and a first DMA timer and a second DMA timer connected to the DMA controller; The device scans and detects the keyboard matrix in the following ways: The system receives a keyboard scan start signal sent periodically by the host controller and starts the first DMA timer through the trigger manager to start the DMA controller periodically after a preset first duration. The DMA controller configures the slave task chain according to the pre-configured master task chain and synchronously starts the second DMA timer and the ADC timer. The DMA controller, based on the configured subordinate task chain and the second DMA timer and the ADC timer, controls each multiplexer and each analog-to-digital converter to start at regular intervals, thereby scanning the keyboard matrix line by line using a full hardware chain scanning method and generating a dataset of analog key travel of the keyboard matrix. The CPU processor determines the key state changes of each key in the keyboard matrix based on the key travel analog data set, and generates key events to be reported to the host controller.

2. The key scanning and detection device according to claim 1, characterized in that, The method of scanning the keyboard matrix row by row using a fully hardware chained scanning approach includes: Reset the second DMA timer and the ADC timer; The DMA controller determines the current row line to be scanned according to the configured subordinate task chain, and controls each multiplexer and each analog-to-digital converter to start at regular intervals based on the second DMA timer and the ADC timer, to scan and detect each key at the current row line position, and generate analog key travel data of the current row line to be scanned. Reset the second DMA timer and the ADC timer, and repeat the previous step to switch the current row to be scanned until the entire keyboard matrix is ​​scanned. Based on the key travel analog data of each row, a key travel analog dataset of the keyboard matrix is ​​generated.

3. The key scanning and detection device according to claim 2, characterized in that, The methods for scanning and detecting each button at the current position of the line to be scanned include: The second DMA timer starts timing. After a preset second duration, the DMA controller transmits the data of the current row line to be scanned stored in the first buffer to each multiplexer according to the configured subordinate task chain, so as to control the analog switch corresponding to each multiplexer to turn on and connect the connection circuit between each analog-to-digital converter and each button at the current row line position to be scanned. The ADC timer starts counting. After a preset third duration, each analog-to-digital converter samples the electrical analog signal of each key at the current position of the row line to be scanned, and converts the sampled electrical analog signal into multiple corresponding key travel analog quantities, generating key travel analog quantity data of the current row line to be scanned and storing it in the third buffer. The second DMA timer starts timing, and after a preset fourth duration, the DMA controller stores the analog key travel data of the current scanned row line into the fourth buffer according to the configured subordinate task chain; at the same time, the second DMA timer and the ADC timer are reset.

4. The key scanning and detection device according to claim 1, characterized in that, The DMA controller configures two slave task chains, namely the first slave task chain and the second slave task chain, according to the configured master control task chain. The DMA controller controls each multiplexer and each analog-to-digital converter to start at regular intervals and uses a full hardware chain scanning method to alternately scan each row of the keyboard matrix to generate the analog data set of key travel of the keyboard matrix.

5. The key scanning and detection device according to claim 4, characterized in that, The method of alternately scanning each row of the keyboard matrix using a fully hardware chain scanning approach includes: Reset the second DMA timer and the ADC timer; The second DMA timer starts timing. After a preset second duration, the DMA controller transmits the data of the current row line to be scanned stored in the first buffer to each multiplexer according to the configured first subordinate task chain, so as to control the analog switches corresponding to each multiplexer to turn on and connect the connection circuits of each analog-to-digital converter to each button at the current row line position. The ADC timer starts counting. After a preset third duration, each analog-to-digital converter samples the electrical analog signal of each key at the current position of the row line to be scanned, and converts the sampled electrical analog signal into multiple corresponding key travel analog quantities, generating key travel analog quantity data of the current row line to be scanned and storing it in the third buffer. The second DMA timer starts timing, and after a preset fourth duration, the DMA controller stores the analog key travel data of the current scanned row line into the fourth buffer according to the configured first subordinate task chain. Simultaneously, the second DMA timer and the ADC timer are reset. After the second duration of the new cycle begins, the DMA controller switches the next row line as the current row line to be scanned according to the configured second subordinate task chain, and transmits the row line data stored in the second buffer to each multiplexer to control the analog switch corresponding to each multiplexer to turn on, and connects the connection circuit between each analog-to-digital converter and each button at the row line position, so that each analog-to-digital converter can sample the electrical analog signal of each button at the row line position respectively. Repeat the above steps, switching the current row to be scanned alternately according to the two subordinate task chains, until the entire keyboard matrix is ​​scanned; Based on the key travel analog data of each row, a key travel analog dataset of the keyboard matrix is ​​generated.

6. The key scanning and detection device according to claim 1, characterized in that, Based on the analog key travel dataset, the key state changes of each key in the keyboard matrix are determined, and key events are generated in the following ways: The CPU processor performs signal preprocessing on the key travel analog dataset to obtain an optimized target key travel analog dataset. Iterate through the target key travel analog quantities of each key in the target key travel analog quantity dataset, and select one or more keys whose target key travel analog quantities meet the preset key trigger travel conditions as target keys; Based on the key value of each target key and the analog travel amount of the target key, the input event reporting mechanism is triggered to generate key events and store them in the fifth buffer for the host controller to retrieve periodically.

7. The key scanning and detection device according to claim 1, characterized in that, After the CPU processor generates a key event, it reserves a certain time so that the host controller can synchronously acquire the key event when it sends a keyboard scan start signal at regular intervals.

8. The key scanning and detection device according to claim 1, characterized in that, Also includes: A coprocessor, connected to both the DMA controller and the CPU processor, is configured to filter the key travel analog dataset after the DMA controller generates it, so that the CPU processor can determine the key state changes of each key in the keyboard matrix and generate key events based on the filtered key travel analog dataset.

9. A contactless electronic trigger keyboard, characterized in that, include: A keyboard matrix, comprising: multiple keys connected by a row-column intersection; and an electronic sensor disposed under each key to collect the electrical analog signal generated when the user triggers the corresponding key. The key scanning detection device according to any one of claims 1 to 8, wherein the key scanning detection device is connected to each electronic sensor of the keyboard matrix, and is used to collect each electrical analog signal to scan and detect the keyboard matrix.

10. The contactless electronic trigger keyboard according to claim 9, characterized in that, The types of contactless electronic trigger keyboards include: magnetic axis keyboards, inductive keyboards, and electrostatic capacitive keyboards.

Images