Power system wiring detection method based on block parallel processing

Abstract

The invention discloses an electric power system wiring detection method based on block parallel processing, and relates to the field of current detection, and the method comprises the steps: collecting real-time operation data through a sensor disposed at a key node, and constructing a basic data set after Kalman filtering denoising and normalization processing; establishing a sub-block identification system based on topological structure blocks, and extracting electrical and topological feature vectors; a master-slave parallel computing architecture is adopted, a master node allocates tasks according to priorities, and an improved random forest model is utilized to perform sub-block level anomaly preliminary screening; cross-sub-block collaborative verification is realized by verifying the boundary interconnection switch state, the branch current and the bus voltage; and finally, constructing a global wiring state map to perform difference analysis, accurately positioning abnormal equipment and types, and verifying a result through high-precision retest. The method has the advantages that the efficiency is improved through scientific partitioning and distributed parallel computing, the accuracy is guaranteed in combination with multi-dimensional detection, boundary verification and a retest mechanism, wiring abnormity is efficiently positioned, and reliable support is provided.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of power detection, in particular to a power system wiring detection method based on block parallel processing. BACKGROUND

[0002] With the continuous expansion of the scale and the increasing complexity of the structure of the power system, the traditional serial wiring detection method faces severe challenges in real-time performance and computational efficiency. On the one hand, modern power grids contain a large number of nodes and branches, and manual verification or single machine serial processing cannot meet the timeliness requirements of high-dimensional topology analysis. On the other hand, the high proportion of new energy access and the demand for dynamic reconstruction of smart grids significantly increase the frequency of system topology changes, and more efficient automated detection methods are urgently needed.

[0003] The current market power system wiring detection method lacks systematic noise reduction and standardization process in data processing, is easily disturbed by random noise and data missing, and leads to insufficient accuracy of basic data, which lays the foundation for errors in subsequent detection. In terms of computational efficiency, traditional methods mostly use centralized processing architecture and do not combine topology characteristics for scientific blocking. When facing large-scale power systems, the data processing pressure is concentrated, and it is easy to appear delay and lag. There is no priority task allocation mechanism, and the resource utilization efficiency is low. In terms of detection accuracy, it is often limited to single electrical feature detection, ignores the correlation of topology characteristics, and lacks cross-regional boundary verification link, and only relies on single model output result, which is easy to misjudge due to signal interference. In the abnormal positioning and verification link, most methods do not build a global state atlas comparison system, and the positioning accuracy is only at the equipment level but not at the specific port. There is a lack of high-precision retest and secondary verification mechanism, and the miss and false detection rate is high, which is difficult to meet the accurate detection needs of complex power grids. SUMMARY

[0004] In order to improve the existing method, a power system wiring detection method based on block parallel processing is provided. This method improves efficiency through accurate data processing, scientific blocking and distributed parallel computing, guarantees accuracy by combining multi-dimensional detection, boundary verification and retest mechanism, and can efficiently locate power system wiring abnormalities to provide reliable support for stable operation of the system.

[0005] To achieve the above purpose, the technical scheme adopted by the present application is: The power system wiring detection method based on block parallel processing comprises: Real-time operation data is collected by a sensing device deployed at a key node of the power system, and a basic data set is generated through Kalman filter denoising and normalization processing; A power system topology structure model is constructed based on the basic data set data, and the topology structure is layered based on voltage level and clustered based on device function. A sub-block identification system is established, and a unique topology code and data index are assigned. Local data of each sub-block is obtained from the basic data set and the data volume is counted, and feature extraction is performed in the electrical characteristic dimension and the topological characteristic dimension respectively to obtain a task feature vector of each sub-block; A distributed parallel computing architecture is built, including 1 master control node and at least 4 computing nodes, the master control node constructs a priority model based on the importance weight of the sub-block, the data volume and the feature extraction complexity, calculates the priority coefficient of the sub-block task, and performs task allocation by using the polling method; Through the pre-trained abnormality detection model based on the improved random forest algorithm, the task feature vector of each sub-block is compared with the normal feature template obtained by model training to obtain a preliminary detection result of the sub-block; The master control node summarizes the preliminary detection results of each sub-block, extracts the boundary data of the abnormal sub-block and its adjacent sub-block, performs cross-sub-block boundary collaborative verification, including verifying the state of the tie-in switch, the branch current across the sub-block, and the boundary bus voltage, fuses the boundary collaborative verification and the preliminary detection result, and confirms the validity of the abnormal sub-block; The master control node calls the acquisition data, the feature vector and the boundary verification data of the abnormal sub-block, constructs a global wiring state atlas, compares it with the normal topological atlas, locates the abnormal equipment by analyzing the positions of the difference nodes and edges, and identifies the abnormal type; Based on the abnormality positioning and type identification result, high-precision re-measurement is performed on the abnormal position, and the re-measurement data is input into the abnormality detection model for secondary detection to verify the detection result.

[0006] Preferably, the real-time operation data collected by the sensing devices deployed at the key nodes of the power system is denoised and normalized by Kalman filtering to generate the basic data set, which specifically includes: Real-time operation data of the power system is collected by sensing devices deployed at each key node of the power system, and the real-time operation data includes bus voltage, branch current, switch device state signal, transformer operating parameter and line topology correlation data; The collected real-time operation data is preprocessed, random noise interference in the data is eliminated by adaptive Kalman filtering algorithm, missing values generated in the data acquisition process are completed by Lagrange interpolation method, and electrical parameters are standardized based on Z-Score standardization method to obtain the basic data set.

[0007] Preferably, the power system topology structure model is constructed based on the basic data set, and the topology structure is layered based on the voltage level and the device function cluster characteristics, a sub-block identification system is established, and a unique topology code and data index are assigned, which specifically includes: Based on the obtained basic data set, the types and distributions of all key devices, including bus, transformer, switch device, are summarized, and the actual connection relationship between each device is obtained; A power system topology model is constructed by taking devices as nodes, taking connection lines between devices as edges, and adopting an adjacency matrix to represent the connection relationship between devices; Based on the voltage level hierarchical characteristics of the power system, and in combination with the device function cluster characteristics, a device cluster at the same voltage level and capable of direct power transmission is divided into a sub-block; Each sub-block after division contains at least one main supply line, two bus nodes and three key power transformation devices, and boundary constraint conditions are set, including the state threshold of the tie switch, the voltage fluctuation allowable range of the boundary bus, and the current transmission limit value of the cross-sub-block branch; Each sub-block is assigned unique identification information, including a dedicated topology code and a data index.

[0008] Preferably, the local data of each sub-block is obtained from the basic data set, and the data volume is counted, and feature extraction is performed in the electrical characteristic dimension and the topology characteristic dimension to obtain a task feature vector of each sub-block, which specifically includes: The local data corresponding to each sub-block is extracted from the basic data set, and multi-dimensional feature extraction is performed, including the electrical characteristic dimension and the topology characteristic dimension; The electrical characteristic dimension extracts the transient characteristics of the branch current through a wavelet transform algorithm, calculates the steady-state characteristics of the bus voltage through a sliding window method, and calculates the active power, reactive power and power factor characteristics of the line through a power calculation formula combined with voltage and current data; The topology characteristic dimension constructs a local topology adjacency matrix based on the connection relationship of the devices in the sub-block, and generates a switch state vector based on the real-time state data of the devices, and converts the on-off state of the switch into a binary feature value; The extracted multi-dimensional features are normalized to obtain a standardized feature vector of each sub-block.

[0009] Preferably, the distributed parallel computing architecture is built, which includes one master control node and at least four computing nodes, the master control node constructs a priority model based on the importance weight of the sub-block, the data volume and the feature extraction complexity, calculates the priority coefficient of the sub-block task, and the task allocation is performed by using a polling method, which specifically includes: The distributed parallel computing architecture is built, which includes one master control node and at least four computing nodes, and the master control node and the computing nodes interact data through Ethernet; A sub-block task priority model is constructed, and the input parameters of the priority model include the importance weight of the sub-block, the data volume of the sub-block, and the feature extraction complexity of the sub-block; Based on the priority model, the priority coefficient of each sub-block processing task is calculated, and the sub-block processing task is distributed to each computing node through a polling scheduling algorithm.

[0010] Preferably, the preliminary detection result of each sub-block is obtained by comparing the task feature vector of each sub-block with the normal feature template obtained by training the model based on the improved random forest algorithm. Each computing node obtains its standardized feature vector based on the assigned sub-block processing task and the sub-block identification information; Collect historical operation data of the power system, including abnormal connection data and normal operation data, to form a model training original data set, and construct an anomaly detection model based on the random forest algorithm. The number of decision trees is set based on the size of the training data set and the feature dimension, and the model is trained; Based on the trained anomaly detection model, compare the standardized feature vector of the current sub-block with the normal feature template in the model; If the matching degree of the feature vector and the normal feature template is greater than or equal to the threshold, output the normal identification, if the matching degree is less than, output the abnormal identification, and calculate the abnormal feature deviation, and obtain the preliminary detection result of the sub-block.

[0011] Preferably, the main control node aggregates the preliminary detection results of each sub-block, extracts the abnormal sub-block and its adjacent sub-block boundary data, and performs cross-sub-block boundary collaborative verification, including verifying the state of the tie switch, the branch current across the sub-block, and the boundary bus voltage, and fusing the boundary collaborative verification and the preliminary detection result to confirm the effectiveness of the abnormal sub-block, specifically including: The main control node receives the preliminary detection results of each sub-block uploaded by all computing nodes, filters out the sub-blocks labeled with abnormal identification, obtains the adjacent sub-block information of each abnormal sub-block, and extracts the boundary data of the abnormal sub-block and the adjacent sub-block; For the tie switch shared by the abnormal sub-block and the adjacent sub-block, the real-time state signals of the switch in the two sub-blocks are obtained and compared for consistency verification of the tie switch state; Select the cross-sub-block branch connecting the abnormal sub-block and the adjacent sub-block, collect the current data of the branch on the abnormal sub-block side and the current data of the branch on the adjacent sub-block side, compare the numerical difference of the current data on both sides, and perform continuity verification of the branch current; Determine the boundary bus of the abnormal sub-block and the adjacent sub-block, collect the real-time voltage data of the boundary bus on both sides, obtain the change trend of the voltage data on both sides, and perform collaborative verification of the boundary bus voltage; Match the results of various boundary collaborative verifications with the preliminary detection results of the sub-blocks, and determine the effectiveness of the abnormal identification of the abnormal sub-block.

[0012] Preferably, the main control node retrieves the collected data, feature vector and boundary verification data of the abnormal sub-block, constructs a global connection state atlas, compares it with the normal topology atlas, locates the abnormal equipment by analyzing the positions of the difference nodes and edges, and identifies the abnormal type, specifically including: The main control node calls the acquisition data, feature vector and boundary check data of the abnormal sub-block, constructs a global wiring state atlas based on a three-layer structure, including a device layer, a connection layer and a feature layer; The normal wiring topology atlas of the power system is called, and the global wiring state atlas constructed is compared with the normal wiring topology atlas element by element to calculate the overall similarity. If the similarity is lower than 90%, it is determined that there is a global wiring abnormality, the specific device and the specific connection port of the abnormality are determined by analyzing the positions of the difference nodes and edges, and the abnormality type is identified.

[0013] Preferably, based on the abnormality positioning and type identification result, the abnormal position is re-measured with high precision, the re-measured data is input into the abnormality detection model for secondary detection, and the detection result is verified, which specifically comprises: Based on the abnormality positioning and type identification result, the re-measured data of the abnormal position is continuously collected, and a re-measured feature vector is generated; The re-measured feature vector is input into the abnormality detection model, and whether there is an abnormality is judged by comparing the matching degree with the normal feature template; The re-measured feature vector is compared with the feature vector of the first abnormality detection, and the consistency of the two is calculated, and the second detection result is output to verify the first abnormality detection result.

[0014] Compared with the prior art, the advantages of the present application are: At the data processing level, the Kalman filter denoising, Lagrange interpolation completion and Z-Score standardization are used to ensure the quality of the basic data set and lay a precise data foundation for subsequent detection; in the block strategy, the sub-blocks are divided according to the voltage level and the device function cluster characteristics and the boundary constraints are set, which realizes the fine management of the topology structure and creates conditions for parallel computing. In terms of computing efficiency, the distributed parallel architecture is matched with the polling task allocation and priority model, relying on multiple computing nodes to synchronously process sub-block tasks, which greatly shortens the detection time and adapts to the demand of large-scale power systems. In terms of detection accuracy, the improved random forest abnormality detection model is combined with multi-dimensional feature extraction to accurately capture electrical and topological abnormality signals; cross-sub-block boundary collaborative verification further filters false positives, ensuring the effectiveness of the abnormal sub-block. In the abnormality positioning link, the global wiring state atlas is compared with the normal atlas, which can accurately locate the abnormal device and port and identify the type; the high-precision re-measurement and secondary detection mechanism double-verify the results, significantly reducing the false negative and false positive rates, and providing efficient and reliable technical support for the stable operation of the power system. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 The method proposed by the present application is shown in the schematic diagram; Figure 2 The basic data set generated by the present application is shown in the schematic diagram; Figure 3 A schematic diagram of constructing a power system topology model is provided for the present application. Figure 4 A schematic diagram of obtaining a sub-block task feature vector is provided for the present application. Figure 5 A schematic diagram of building a distributed parallel computing architecture is provided for the present application. Figure 6 A schematic diagram of obtaining a sub-block preliminary detection result is provided for the present application. Figure 7 A schematic diagram of confirming the validity of an abnormal sub-block is provided for the present application. Figure 8 A schematic diagram of positioning an abnormal device and identifying an abnormal type is provided for the present application. Figure 9 A schematic diagram of secondary detection is provided for the present application. DETAILED DESCRIPTION

[0016] The following description is provided to disclose the present application so that those skilled in the art can implement the present application. The preferred embodiments in the following description are only examples, and other obvious modifications can be made by those skilled in the art.

[0017] Referring to Figure 1 As shown, the power system wiring detection method based on block parallel processing includes: Step one: Collect real-time operation data through the sensing devices deployed at the key nodes of the power system, and generate a basic data set through Kalman filter denoising and normalization processing; Step two: Construct a power system topology model based on the basic data set data, and perform block division based on the voltage level layering of the topology structure and the device function cluster characteristics, establish a sub-block identification system, and assign a unique topology code and data index; Step three: Obtain the local data of each sub-block from the basic data set and count the data volume, and perform feature extraction in the electrical characteristic dimension and the topology characteristic dimension respectively to obtain the task feature vector of each sub-block; Step four: Build a distributed parallel computing architecture, including 1 main control node and at least 4 computing nodes, the main control node constructs a priority model based on the importance weight of the sub-block, the data volume and the feature extraction complexity, calculates the task priority coefficient of the sub-block, and uses the polling method for task allocation; Step five: Through the pre-trained abnormal detection model based on the improved random forest algorithm, compare the task feature vector of each sub-block with the normal feature template obtained by model training to obtain the preliminary detection result of the sub-block; Step six: The main control node aggregates the preliminary detection results of each sub-block, extracts the abnormal sub-block and its adjacent sub-block boundary data, and performs cross-sub-block boundary collaborative verification, including verifying the status of the tie switch, the branch current across the sub-block, and the boundary bus voltage, fusing the boundary collaborative verification and the preliminary detection results, and confirming the effectiveness of the abnormal sub-block; Step seven: The main control node retrieves the acquisition data, feature vector and boundary verification data of the abnormal sub-block, constructs a global wiring state atlas, compares it with the normal topology atlas, locates the abnormal equipment by analyzing the positions of the difference nodes and edges, and identifies the abnormal type; Step eight: Based on the abnormal positioning and type identification results, high-precision re-measurement is performed on the abnormal position, and the re-measurement data is input into the abnormal detection model for secondary detection to verify the detection results.

[0018] Referring to Figure 2 As shown, real-time operation data is collected by deploying sensing devices at key nodes of the power system, and Kalman filter denoising and normalization processing are performed to generate a basic data set, which specifically includes: Real-time operation data of the power system is collected by deploying sensing devices at key nodes of the power system, and the real-time operation data includes bus voltages, branch currents, switch device state signals, transformer operating parameters and line topology correlation data. The collected real-time operation data is preprocessed, random noise interference in the data is eliminated by an adaptive Kalman filter algorithm, missing values generated during data collection are completed by a Lagrange interpolation method, and electrical parameters are standardized based on a Z-Score standardization method to obtain a basic data set.

[0019] Referring to Figure 3 As shown, a power system topology structure model is constructed based on the basic data set, and based on the voltage level layering and device function clustering characteristics of the topology structure, a sub-block identification system is established, and a unique topology code and data index are assigned, specifically including: Based on the obtained basic data set, the types and distributions of all key devices, including buses, transformers and switch devices, are summarized, and the actual connection relationships between devices are obtained. Taking devices as nodes and the connection lines between devices as edges, the connection relationships between devices are represented in the form of an adjacency matrix to construct a power system topology structure model. Based on the voltage level layering characteristics of the power system, combined with the device function clustering characteristics, device clusters that are under the same voltage level and can directly transmit power are divided into a sub-block. For each sub-block, at least one main supply line, two bus nodes and three key substation equipment are contained, and boundary constraint conditions are set, including state threshold of tie-in switch, voltage fluctuation allowed range of boundary bus and current transmission limit value of cross-sub-block branch; A unique identification information is assigned to each sub-block, including exclusive topology code and data index.

[0020] Specifically, the state threshold of the tie-in switch between sub-blocks specifies the determination criteria for the normal on-off state of the tie-in switch, such as the normal time range of "continuous closing" and "continuous opening"; the voltage fluctuation allowed range of the boundary bus clearly specifies the maximum and minimum values of the boundary bus voltage that can fluctuate during normal operation; and the current transmission limit value of the cross-sub-block branch determines the maximum current value that the cross-sub-block line can carry under the premise of safe operation, avoiding the risk of overcurrent; Through the way of written records, the identification information of the sub-block is corresponded to the list of equipment in the sub-block and the boundary constraint conditions one by one, ensuring that the sub-block can be quickly located and all related data of the sub-block can be retrieved in the future.

[0021] Referring to Figure 4 The local data of each sub-block is obtained from the basic data set and the data volume is counted, and feature extraction is performed in the electrical characteristic dimension and the topology characteristic dimension to obtain the task feature vector of each sub-block, which specifically includes: The local data corresponding to each sub-block is extracted from the basic data set, and multi-dimensional feature extraction is performed, including the electrical characteristic dimension and the topology characteristic dimension; The electrical characteristic dimension extracts the transient characteristics of the branch current through the wavelet transform algorithm, calculates the steady-state characteristics of the bus voltage through the sliding window method, and calculates the active power, reactive power and power factor characteristics of the line through the power calculation formula combined with the voltage and current data; The topology characteristic dimension constructs a local topology adjacency matrix based on the connection relationship of the equipment in the sub-block, and generates a switch state vector based on the real-time state data of the equipment, and converts the on-off state of the switch into binary feature values; Based on the extracted multi-dimensional features, normalization processing is performed to obtain the standardized feature vector of each sub-block.

[0022] Specifically, the wavelet transform algorithm is used to process the branch current data to capture the characteristics of the current when it suddenly changes, and the peak value (the maximum value of the sudden increase of the current), the decay coefficient (the speed index of the current from the peak value) and the oscillation frequency (the cycle number of the current fluctuation) of the transient current are extracted. The bus voltage steady-state characteristics analyze the bus voltage by a sliding window method, and calculate the voltage effective value (equivalent stable value of the voltage), voltage deviation rate (difference between the actual voltage and the rated voltage), and three-phase voltage unbalance degree (difference between the three-phase voltages); The line power characteristics use the general power calculation logic of the power system, combine the voltage and current data, and obtain the active power (actual work power), reactive power (power for maintaining the electric field or magnetic field), and power factor (ratio of active power to total power) of the line, to complete the extraction of the electrical characteristic dimension; The local topology structure characteristics construct the local topology adjacency matrix of the sub-block according to the actual connection of the buses, lines, and devices in the sub-block, and extract the topology parameters from the matrix, including the node degree (number of other devices connected to a single device), edge density (ratio of the actual number of lines in the sub-block to the maximum possible number of lines), and loop number (number of closed lines in the sub-block); The switch state characteristics collect the real-time state signals (open or closed) of all switch devices in the sub-block, convert the "closed" state into a unified binary identifier and the "open" state into another binary identifier, form a switch state vector containing all switch states, and complete the extraction of the topology characteristic dimension.

[0023] Referring to Figure 5 The distributed parallel computing architecture is built, which includes 1 master control node and at least 4 computing nodes. The master control node constructs a priority model based on the importance weight of the sub-block, the data volume, and the feature extraction complexity, calculates the sub-block task priority coefficient, and uses a polling method for task allocation, which specifically includes: The distributed parallel computing architecture is built, which includes 1 master control node and at least 4 computing nodes. The master control node and the computing nodes interact with each other through Ethernet; A sub-block task priority model is constructed, and the input parameters of the priority model include the importance weight of the sub-block, the data volume of the sub-block, and the feature extraction complexity of the sub-block; Based on the priority model, the priority coefficient of each sub-block processing task is calculated, and the sub-block processing task is allocated to each computing node through a polling scheduling algorithm.

[0024] Specifically, the importance weight of the sub-block is divided according to the power supply attribute of the region where the sub-block is located. The weight of the sub-block in the core load power supply region is set to 0.8-1.0, and the weight of the sub-block in the non-core region is set to 0.3-0.6. The data volume of the sub-block is calculated by counting the total data volume of the local data set of each sub-block. The larger the data volume, the longer the task processing time, which needs to be considered in the priority. The feature extraction complexity of the sub-block is determined by the number of device types in the sub-block, the feature dimension, and whether it contains complex transient feature extraction requirements. The higher the complexity, the priority needs to be adjusted appropriately. Based on the established priority model, the importance weight of each sub-block, the data size, and the feature extraction complexity are respectively given reasonable influence weight, and the priority coefficient of each task is obtained through comprehensive evaluation; the higher the coefficient value, the higher the urgency and importance of the sub-block processing task, and the calculation resources need to be allocated in priority; By using the polling algorithm, the tasks are sorted from high to low according to the priority coefficient, and the tasks are distributed to each computing node in turn. After the distribution is completed, the resource usage state of each computing node is monitored to ensure that the CPU utilization difference between nodes is controlled within ± 15%, and the memory occupancy rate of all nodes is not more than 80%.

[0025] Referring to Figure 6 As shown, by comparing the feature vectors of each sub-block task with the normal feature templates obtained by training the model based on the improved random forest algorithm, the preliminary detection result of the sub-block is obtained, which specifically includes: Based on the allocated sub-block processing task, each computing node obtains its standardized feature vector based on the sub-block identification information; The historical operation data of the power system, including abnormal connection data and normal operation data, are collected to form the original data set for model training. The random forest algorithm is used to build an anomaly detection model. The number of decision trees is set based on the size and feature dimension of the training data set, and the model is trained; Based on the trained anomaly detection model, the standardized feature vector of the current sub-block is compared with the normal feature template in the model; If the matching degree of the feature vector and the normal feature template is greater than or equal to the threshold, the normal identification is output, and if the matching degree is less than the threshold, the abnormal identification is output, and the abnormal feature deviation is calculated to obtain the preliminary detection result of the sub-block.

[0026] Specifically, the abnormal connection data covers the operation data of typical abnormal scenarios such as switch misoperation, line misconnection, transformer connection group error, etc.; the normal operation data includes the same type of data during the stable operation period of the power system without abnormality; Based on the random forest algorithm, the number of decision trees, the core component of the model, is first determined. According to the size and feature dimension of the training data set, the number of decision trees is set to 100-200. The model parameters are optimized by cross-validation method. Specifically, the training data set is divided into multiple sub-data sets, and part of the sub-data sets are used to train the model and the remaining sub-data sets are used to verify the model effect. The node splitting criterion is adjusted repeatedly until the detection accuracy of the model on the validation set reaches the preset requirement; The processed training dataset is input into the improved random forest model to start the model training process. The model learns the feature patterns of normal data, extracts the feature distribution patterns of various sub-blocks under normal conditions, and forms normal feature templates. At the same time, the model will memorize the feature deviation patterns under different abnormal scenarios, establish a preliminary correspondence between abnormal features and abnormal types, and provide a basis for judgment for subsequent detection. The core of matching the standardized feature vector with the normal feature template is to quantify the difference between the current feature and the normal template. Let the standardized feature vector of the current sub-block be... Normal feature template is The formula is:

[0027] in, For feature matching degree, This is the standardized feature vector of the current sub-block. The normal feature template obtained from model training. The dimension of the feature vector. This is the k-th element of the current feature vector. The k-th element of the normal feature template. It is a local minimum.

[0028] See Figure 7 As shown, the main control node summarizes the preliminary detection results of each sub-block, extracts the boundary data of the abnormal sub-block and its adjacent sub-blocks, and performs cross-sub-block boundary collaborative verification, including verifying the status of tie switches, cross-sub-block branch currents, and boundary bus voltages. It then merges the boundary collaborative verification results with the preliminary detection results to confirm the validity of the abnormal sub-block. Specifically, this includes: The main control node receives the preliminary detection results of sub-blocks uploaded by all computing nodes, filters out sub-blocks marked with anomaly indicators, obtains the information of adjacent sub-blocks of each abnormal sub-block, and extracts the boundary data between the abnormal sub-block and its adjacent sub-blocks. For the communication switch shared by the abnormal sub-block and the adjacent sub-block, the real-time status signal of the switch in the two sub-blocks is obtained and compared to perform a communication switch status consistency check. Select the cross-sub-block branch connecting the abnormal sub-block and the adjacent sub-block, collect the current data of the branch on the abnormal sub-block side and the current data on the adjacent sub-block side, compare the numerical difference of the current data on both sides, and perform branch current continuity verification. Determine the boundary busbar between the abnormal sub-block and the adjacent sub-block, collect real-time voltage data of the boundary busbar on both sides of the sub-block, obtain the changing trend of the voltage data on both sides, and perform collaborative verification of the boundary busbar voltage. The results of boundary collaborative verification are matched with the preliminary detection results of sub-blocks to determine the validity of the abnormal identifiers of abnormal sub-blocks.

[0029] Specifically, in the consistency verification of the contactor switch state, if the states of the two contactor switches are consistent, both are closed or both are opened, it is determined that the state of the contactor switch is normal; if the states of the two contactor switches are inconsistent, the duration of the state deviation is recorded, and if the deviation duration exceeds 500 milliseconds, it is determined that the boundary state is abnormal, and the position of the contactor switch is marked; In the cross-subblock branch current continuity verification, if the difference value does not exceed 5% of the rated value of the branch current, it is determined that the branch current transmission is continuous and the state is normal; if the difference value exceeds 5% of the rated value of the current, it indicates that there is an abnormal mutation of the branch current at the boundary, and it is determined that the boundary current is abnormal, and the identification information of the branch is recorded; In the boundary bus voltage coordination verification, if the voltage change trends on both sides are consistent, and the voltage value difference does not exceed 3% of the rated voltage of the bus, it is determined that the boundary bus voltage is normal; if the voltage change trends on both sides are opposite, and the voltage difference exceeds 3% of the rated voltage, it is determined that the boundary voltage is abnormal, and the number of the boundary bus is recorded; For the boundary devices of the abnormal subblock and the adjacent subblock, the state data and the electrical quantity data of these devices in the continuous 10 sampling periods are extracted, and the time sequence is arranged in time sequence; the similarity of the time sequence of the same boundary device on both sides of the two subblocks is calculated by the dynamic time warping algorithm: if the similarity is higher than 85%, it is determined that the time sequence is consistent and the state is normal; if the similarity is lower than 85%, it is determined that the time sequence consistency is abnormal; combine the results of the previous boundary state abnormality, boundary current abnormality and boundary voltage abnormality, as long as there is any one type of abnormality, it is determined that there is a coordination abnormality at the boundary.

[0030] Referring to Figure 8 As shown, the main control node calls the collection data, feature vector and boundary verification data of the abnormal subblock, constructs a global wiring state atlas, compares with the normal topology atlas, locates the abnormal device by analyzing the positions of the difference nodes and edges, and identifies the abnormal type, which specifically includes: The main control node calls the collection data, feature vector and boundary verification data of the abnormal subblock, and constructs a global wiring state atlas based on a three-layer structure, including a device layer, a connection layer and a feature layer; The normal wiring topology atlas of the power system is called, the global wiring state atlas constructed is compared with the normal wiring topology atlas element by element, and the overall similarity is calculated; If the similarity is lower than 90%, it is determined that there is a global wiring abnormality, the specific device where the abnormality occurs and the specific connection port of the device are determined by analyzing the positions of the difference nodes and edges, and the abnormal type is identified.

[0031] Specifically, the device layer: all devices in the power system are marked one by one in the atlas, and the marking content includes device model, device parameters and real-time running state; the connection layer: for the connection relationship between devices, the corresponding devices are connected by edges in the atlas, and the type, physical length and impedance parameters of each connection line are marked to clearly show the actual connection mode between devices; the feature layer: the key electrical characteristic values are marked beside the corresponding devices and lines, such as the real-time voltage effective value of the bus, the real-time active power of the line, and the power transmission value of the transformer, forming a device-connection-feature integrated global atlas; The difference between the global wiring state atlas and the normal wiring topology atlas is analyzed in detail: First, locate the difference nodes, and check which device nodes in the global atlas, such as a certain switch, a certain line, or a certain transformer, have inconsistent marking information with the normal atlas. These nodes are suspected abnormal devices; Then, locate the difference edges, and check whether the connection edges between devices in the global atlas match the normal atlas, such as whether there are redundant connections, missing connections or misconnected connections, to determine the specific line of abnormal connection; Finally, determine the details of the abnormal position, combine the difference nodes and difference edges, and determine the specific part where the abnormality occurs, such as "the 2nd connection port of a certain 110kV switch" and "the two ends of a certain 10kV line are misconnected to the 2nd and 5th buses", to achieve precise positioning of the abnormal position; Retrieve the standardized feature vector of the effective abnormal sub-block, and check which features have obvious deviations; compare the current abnormal features with the historical abnormal case library stored by the system to verify whether the feature deviation rule is consistent with a certain type of historical abnormality; if the current features completely match the feature rule of a certain type of abnormality and are highly consistent with the corresponding case in the historical case library, the abnormal type can be determined.

[0032] Referring to Figure 9 Based on the results of abnormal positioning and type identification, the abnormal position is re-measured with high precision, and the re-measured data is input into the abnormal detection model for secondary detection. The detection results include: Based on the results of abnormal positioning and type identification, the re-measured data of the abnormal position is continuously collected, and a re-measured feature vector is generated; The re-measured feature vector is input into the abnormal detection model, and the matching degree with the normal feature template is compared to determine whether there is an abnormality; The re-measured feature vector is compared with the feature vector of the first abnormal detection, and the consistency is calculated to output the second detection result, which verifies the first abnormal detection result.

[0033] It should be noted that the above-mentioned embodiments of the application are merely intended to describe the application and are not intended to limit the application. In addition, the above-mentioned embodiments of the application are described in the order of the description. The order of the embodiments is not intended to represent the advantages of the embodiments. In some embodiments, multi-task processing and parallel processing are possible or advantageous.

[0034] Each embodiment in the specification is described in a progressive manner, and the same or similar parts between each embodiment can be referred to each other. Each embodiment focuses on the difference from other embodiments.

[0035] The above-mentioned embodiments are only the preferred embodiments of the application, and are not intended to limit the application. Any modification, equivalent replacement, improvement, etc. within the principles of the application shall be included in the protection scope of the application.

Claims

1. A power system wiring detection method based on block parallel processing, characterized in that, include: Real-time operational data is collected by sensing devices deployed at key nodes of the power system, and a basic dataset is generated by Kalman filtering for noise reduction and normalization. A power system topology model is constructed based on the basic dataset. The topology is then divided into blocks based on voltage level hierarchy and equipment functional cluster characteristics. A sub-block identification system is established, and a unique topology code and data index are assigned. Local data of each sub-block is obtained from the basic dataset and the data volume is statistically analyzed. Feature extraction is performed in the electrical feature dimension and the topology feature dimension respectively to obtain the task feature vector of each sub-block. A distributed parallel computing architecture is built, which includes one master control node and at least four computing nodes. The master control node constructs a priority model based on the importance weight of sub-blocks, data volume and feature extraction complexity, calculates the priority coefficient of sub-block tasks, and uses a round-robin method to allocate tasks. By comparing the feature vectors of each sub-block with the normal feature templates obtained during model training using a pre-trained anomaly detection model based on an improved random forest algorithm, preliminary detection results for each sub-block are obtained. The main control node summarizes the preliminary detection results of each sub-block, extracts the boundary data of abnormal sub-blocks and their adjacent sub-blocks, and performs cross-sub-block boundary collaborative verification, including verifying the status of tie switches, cross-sub-block branch currents, and boundary bus voltages. It then merges the boundary collaborative verification and preliminary detection results to confirm the validity of the abnormal sub-blocks. The main control node retrieves the collected data, feature vectors, and boundary verification data of the abnormal sub-blocks, constructs a global wiring status map, compares it with the normal topology map, and locates the abnormal device and identifies the abnormal type by analyzing the position of the difference nodes and edges. Based on the anomaly localization and type identification results, the anomaly location is re-measured with high precision. The re-measured data is then input into the anomaly detection model for secondary detection to verify the detection results.

2. The power system wiring detection method based on block parallel processing according to claim 1, characterized in that, The process of collecting real-time operational data through sensing devices deployed at key nodes of the power system, and generating a basic dataset through Kalman filtering for noise reduction and normalization, specifically includes: By deploying sensing devices at key nodes of the power system, real-time operating data of the power system is collected. The real-time operating data includes bus voltage, branch current, switch status signals, transformer operating parameters and line topology correlation data. The collected real-time operating data is preprocessed by using an adaptive Kalman filter algorithm to eliminate random noise interference in the data, using Lagrange interpolation to fill in missing values ​​generated during data acquisition, and using the Z-Score standardization method to standardize electrical parameters to obtain a basic dataset.

3. The power system wiring detection method based on block parallel processing according to claim 1, characterized in that, The process of constructing a power system topology model based on basic dataset data, dividing the topology into blocks based on voltage level hierarchy and equipment functional cluster characteristics, establishing a sub-block identification system, and assigning unique topology codes and data indexes specifically includes: Based on the acquired basic dataset, the types and distribution of all key equipment, including busbars, transformers, and switchgear, are summarized, and the actual connection relationships between each piece of equipment are obtained. Using devices as nodes and the connecting lines between devices as edges, an adjacency matrix is ​​used to represent the connection relationships between devices, and a power system topology model is constructed. Based on the voltage level hierarchical characteristics of the power system and combined with the functional cluster characteristics of equipment, equipment clusters that are at the same voltage level and can directly transmit power are divided into a sub-block. Each sub-block after division contains at least one main power supply line, two busbar nodes and three key power equipment, and sets boundary constraints, including the state threshold of tie switches, the allowable range of voltage fluctuations of boundary buses and the current transmission limit value of cross-sub-block branches. Each sub-block is assigned unique identification information, including a unique topology code and data index.

4. The power system wiring detection method based on block parallel processing according to claim 1, characterized in that, The process of obtaining local data and statistical data of each sub-block from the basic dataset, and extracting features in both the electrical and topological feature dimensions to obtain the task feature vector of each sub-block specifically includes: Local data corresponding to each sub-block is extracted from the basic dataset, and multi-dimensional feature extraction is performed, including electrical feature dimension and topological feature dimension; The electrical feature dimension extracts the transient features of branch current through wavelet transform algorithm, calculates the steady-state features of bus voltage through sliding window method, and obtains the active power, reactive power and power factor features of line by combining voltage and current data through power calculation formula. The topological feature dimension constructs a local topological adjacency matrix based on the device connection relationship within the sub-block, generates a switch state vector based on the real-time status data of the device, and converts the switch's open / closed state into binary feature values. Based on the extracted multi-dimensional features, normalization processing is performed to obtain the standardized feature vector of each sub-block.

5. The power system wiring detection method based on block parallel processing according to claim 4, characterized in that, The aforementioned distributed parallel computing architecture includes one master control node and at least four computing nodes. The master control node constructs a priority model based on the importance weight of sub-blocks, data volume, and feature extraction complexity, calculates the priority coefficients of sub-block tasks, and uses a round-robin method for task allocation. Specifically, this includes: A distributed parallel computing architecture is constructed, which includes one master control node and at least four computing nodes. The master control node and the computing nodes interact with each other via Ethernet. Construct a sub-block task priority model, the input parameters of which include the importance weight of the sub-block, the data size of the sub-block, and the feature extraction complexity of the sub-block; The priority coefficient of each sub-block processing task is calculated based on the priority model, and the sub-block processing tasks are allocated to each computing node through a round-robin scheduling algorithm.

6. The power system wiring detection method based on block parallel processing according to claim 1, characterized in that, The process of obtaining preliminary detection results for each sub-block by comparing the feature vectors of each sub-block with the normal feature templates obtained during model training using a pre-trained anomaly detection model based on an improved random forest algorithm specifically includes: Each computing node processes tasks based on the assigned sub-blocks and obtains its standardized feature vector based on the sub-block identification information; Historical power system operation data, including wiring anomaly data and normal operation data, are collected to form the original dataset for model training. An anomaly detection model is built based on the random forest algorithm. The number of decision trees is set according to the size of the training dataset and the feature dimension, and the model is trained. Based on the trained anomaly detection model, the standardized feature vector of the current sub-block is compared with the normal feature template in the model; If the matching degree between the feature vector and the normal feature template is greater than or equal to the threshold, a normal identifier is output; if the matching degree is less than the threshold, an abnormal identifier is output, and the deviation degree of the abnormal feature is calculated to obtain the preliminary detection result of the sub-block.

7. The power system wiring detection method based on block parallel processing according to claim 1, characterized in that, The main control node summarizes the preliminary detection results of each sub-block, extracts the boundary data of abnormal sub-blocks and their adjacent sub-blocks, and performs cross-sub-block boundary collaborative verification, including verifying the status of tie switches, cross-sub-block branch currents, and boundary bus voltages. It then merges the boundary collaborative verification and preliminary detection results to confirm the validity of the abnormal sub-blocks. Specifically, this includes: The main control node receives the preliminary detection results of sub-blocks uploaded by all computing nodes, filters out sub-blocks marked with anomaly indicators, obtains the information of adjacent sub-blocks of each abnormal sub-block, and extracts the boundary data between the abnormal sub-block and its adjacent sub-blocks. For the communication switch shared by the abnormal sub-block and the adjacent sub-block, the real-time status signal of the switch in the two sub-blocks is obtained and compared to perform a communication switch status consistency check. Select the cross-sub-block branch connecting the abnormal sub-block and the adjacent sub-block, collect the current data of the branch on the abnormal sub-block side and the current data on the adjacent sub-block side, compare the numerical difference of the current data on both sides, and perform branch current continuity verification. Determine the boundary busbar between the abnormal sub-block and the adjacent sub-block, collect real-time voltage data of the boundary busbar on both sides of the sub-block, obtain the changing trend of the voltage data on both sides, and perform collaborative verification of the boundary busbar voltage. The results of boundary collaborative verification are matched with the preliminary detection results of sub-blocks to determine the validity of the abnormal identifiers of abnormal sub-blocks.

8. The power system wiring detection method based on block parallel processing according to claim 1, characterized in that, The main control node retrieves the collected data, feature vectors, and boundary verification data of the abnormal sub-blocks to construct a global wiring status map. This map is compared with the normal topology map. By analyzing the positions of differing nodes and edges, the abnormal device is located, and the specific abnormal type is identified, including: The main control node retrieves the collected data, feature vectors, and boundary verification data of the abnormal sub-blocks, and constructs a global wiring status map based on a three-layer structure, including the device layer, connection layer, and feature layer. Retrieve the normal wiring topology map of the power system, compare the constructed global wiring status map with the normal wiring topology map element by element, and calculate the overall similarity. If the similarity is less than 90%, a global wiring anomaly is identified. By analyzing the positions of the differing nodes and edges, the specific device and its connection port where the anomaly occurred are determined, and the anomaly type is identified.

9. The power system wiring detection method based on block parallel processing according to claim 1, characterized in that, Based on the anomaly localization and type identification results, the anomaly location is re-measured with high precision. The re-measured data is then input into the anomaly detection model for secondary detection. The verification of the detection results specifically includes: Based on the anomaly localization and type identification results, retest data of the anomaly locations are continuously collected, and retest feature vectors are generated. The retested feature vector is input into the anomaly detection model, and the presence of anomalies is determined by comparing its matching degree with that of normal feature templates. The retest feature vector is compared with the feature vector of the first anomaly detection, and the consistency between the two is calculated. The second detection result is output to verify the first anomaly detection result.

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