Method for improving electromigration performance of copper interconnection

Abstract

The invention discloses a method for improving copper interconnection electromigration performance, and relates to the technical field of semiconductor manufacturing. The method comprises the steps that after a through hole and a groove structure which expose a lower-layer copper interconnection structure are formed, a substrate is subjected to etching post-processing, and processing gas containing reducing gas is adopted to remove etching residues and repair the damaged surface of the lower-layer copper interconnection structure. According to the method, through introduction of the reducing gas, residues can be efficiently removed, and copper damage can be repaired in situ, so that the interface quality of the through hole and the lower layer metal is improved, and the electromigration resistance and reliability of copper interconnection are remarkably improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for improving the electromigration performance of copper interconnects. Background Technology

[0002] In the manufacturing of semiconductor integrated circuits, as device feature sizes continue to shrink, multilayer metal interconnect technology is widely used to achieve electrical connections between various components within the chip. Copper, due to its low resistivity and excellent electromigration resistance, has replaced aluminum as the mainstream interconnect metal material. Copper interconnect structures are typically manufactured using a double damask process, which involves etching patterns for vias and metal trenches in the dielectric layer, filling them with copper, and finally removing excess copper through chemical mechanical polishing to form the desired interconnect lines.

[0003] In the double damascus etching process, especially after the integrated etching process, etching byproducts inevitably remain at the bottom of the vias and on the inner walls of the trenches. These byproducts include polymers containing elements such as carbon, fluorine, copper, and titanium, as well as minute residues. Simultaneously, the plasma bombardment used for etching also causes physical and chemical damage to the exposed underlying copper interconnect surfaces, such as forming amorphous or oxide layers, thereby increasing interface defects and vacancy concentration.

[0004] Electromigration is one of the key failure mechanisms affecting the reliability of copper interconnects. When a high current density passes through a metal conductor, the electron flow exchanges momentum with metal ions, causing metal atoms to migrate net along the direction of the electron flow. This eventually forms voids at specific locations (such as the interface between a via and the underlying metal conductor), leading to open-circuit failure. For downstream process nodes, the weak point of electromigration is usually located at the interface between the via and the underlying metal. The quality of the interface, including its cleanliness and the integrity of the copper surface, directly determines its resistance to electromigration.

[0005] Existing technologies typically include a post-etching process after the main etching step to remove residual polymers. For example, plasma containing nitrogen and carbon monoxide may be used. However, this conventional approach has limited efficiency in removing polymers and minute residues, and more importantly, it cannot repair copper surfaces damaged during the main etching step. Consequently, the vacancy concentration at the via / underlying metal interface remains high, leading to poor electromigration performance. Failure modes are primarily via-dominated, limiting the overall reliability and lifespan of the interconnect structure.

[0006] Therefore, the industry urgently needs a new post-etching treatment method that can not only efficiently remove etching residues but also repair damaged copper surfaces, thereby optimizing the via / underlying metal interface, reducing interface vacancy concentration, and significantly improving the electromigration resistance of copper interconnects. Summary of the Invention

[0007] The technical problem to be solved by the present invention is to provide a method for improving the electromigration performance of copper interconnects by simultaneously and efficiently cleaning and repairing the interface, addressing the issues of low removal efficiency of etching residues and inability to repair damaged copper surfaces during the post-etching process of copper interconnect structures in the prior art.

[0008] To achieve the above and other related objectives, the present invention provides a method for improving the electromigration performance of copper interconnects, comprising:

[0009] Step 1: Provide a substrate on which vias and trench structures are formed to expose the underlying copper interconnect structure;

[0010] Step 2: Perform post-etching treatment on the substrate, wherein the post-etching treatment uses a processing gas containing a reducing gas to remove etching residues in the vias and trenches and repair the damaged surface of the underlying copper interconnect structure.

[0011] Preferably, in step one, the via and trench structures are formed by performing an integrated etching process on the dielectric layer.

[0012] Preferably, in step two, the reducing gas includes at least one of hydrogen, ammonia, or hydrogen-containing hydrocarbons.

[0013] Preferably, in step two, the processing gas consists of nitrogen and hydrogen.

[0014] Preferably, in step two, the flow ratio of nitrogen to hydrogen is 1:1 to 3:1.

[0015] Preferably, in step two, the flow rate of the processing gas is from 0 sccm to 600 sccm.

[0016] Preferably, in step two, the post-etching treatment is performed in a plasma environment, and the power of the plasma is from 0W to 400W.

[0017] Preferably, in step two, the duration of the post-etching treatment is 20 to 40 seconds.

[0018] Preferably, in step two, the etching residue includes at least one of a fluoropolymer, copper oxide, a carbon fluoropolymer, or a titanium fluoropolymer.

[0019] Preferably, through the post-etching treatment, the electromigration failure mode of the copper interconnect changes from via-dominated to metal-line-dominated.

[0020] As described above, the method for improving the electromigration performance of copper interconnects according to the present invention has the following beneficial effects:

[0021] This invention utilizes a processing gas containing reducing gases in the post-etching treatment step, enabling simultaneous and efficient removal of etching residues and in-situ repair of damaged surfaces on the underlying copper interconnect. This dual action of cleaning and repair effectively reduces the defect and vacancy concentration at the interface between the via and the underlying metal layer, significantly improving interface quality. Therefore, the method of this invention fundamentally enhances the electromigration resistance and overall reliability of copper interconnects, shifting the weak point of electromigration failure from the interface to the metal line itself. Attached Figure Description

[0022] Figure 1 The diagram shown is a flowchart illustrating a method for improving the electromigration performance of copper interconnects according to an embodiment of the present invention.

[0023] Figure 2 The diagram shows a cross-sectional view of the copper interconnect structure to be post-etched after the integrated etching process in an embodiment of the present invention.

[0024] Figure 3 The diagram shows a cross-sectional view of the copper interconnect structure after processing by the method of the present invention in an embodiment of the present invention.

[0025] Figure 4 This diagram illustrates the via-dominated mode of electromigration failure in the prior art.

[0026] Figure 5 The diagram shown illustrates a metal-line-dominated mode of electromigration failure in an embodiment of the present invention. Detailed Implementation

[0027] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0028] This invention provides a method for improving the electromigration performance of copper interconnects. By introducing a processing gas containing a reducing gas in the post-etching process, the method can not only efficiently remove the residues generated during the etching process, but also repair the damaged underlying copper surface in situ, thereby significantly improving the interface quality between the via and the underlying metal, and ultimately enhancing the electromigration (EM) reliability of the copper interconnect structure.

[0029] Please see Figure 1 The method includes the following steps:

[0030] Step 1: Provide a substrate on which vias and trenches are formed to expose the underlying copper interconnect structure. The substrate here typically refers to a semiconductor wafer that has undergone front-end online (FEOL) and partial back-end online (BEOL) processes. For example, it could be a silicon wafer on which active devices have already been formed and at least one metal interconnect layer has been constructed. Therefore, the "substrate" used to form the vias and trenches in this step is actually a multilayer structure, with the top layer being the dielectric layer 101 to be etched, and the "underlying copper interconnect structure" to be exposed being a portion of the already formed, lower-level metal wiring (i.e., the lower copper interconnect 102).

[0031] In some embodiments, in step one, the via and trench structures are formed by performing an integrated etching process on the dielectric layer 101. Specifically, the integrated etching process (AIO ET) involves continuously etching the metal hard mask 104, the interlayer dielectric layer 101, and the etch stop layer 103 in the same vacuum environment to form the vias and trenches in the double damask structure in a single operation. Please refer to [link to documentation]. Figure 2 The multilayer film structure on the substrate, namely the etched "copper interconnect structure" and its overlay film, can specifically include:

[0032] At the bottom is a lower copper (Cu) interconnect 102, which is itself wrapped in a barrier layer, such as a composite layer of tantalum (Ta) / tantalum nitride (TaN), to prevent copper from diffusing into the surrounding dielectric material.

[0033] Above the lower copper interconnect 102, there is a silicon carbonitride (SiCN) layer that serves as an etch stop layer and a diffusion barrier layer 103.

[0034] On top of the SiCN layer 103, dielectric layers 101 forming vias and trenches are stacked sequentially. These dielectric layers 101 are typically ultra-low-k (ULK) materials, such as carbon-doped silicon oxide (SiOC), porous carbon-doped silicon oxide, or other organosilicon glass (OSG) materials, to reduce the RC delay of signal transmission.

[0035] On top of the entire dielectric layer 101 stack, a metal hard mask 104, such as titanium nitride (TiN), is disposed to precisely define the pattern of the trenches.

[0036] Although the integrated etching process simplifies the process, once the etching penetrates the dielectric layer 101 and the SiCN layer 103 to reach the surface of the underlying copper interconnect 102, the continuous plasma environment bombards the exposed copper surface for a long time, resulting in severe surface damage and the accumulation of byproducts (Polymer) 105.

[0037] In one specific embodiment, the integrated etching process (Step 1) can itself be a complete etching procedure comprising multiple sub-steps. A baseline (BSL) integrated etching procedure may include: a stability step (Step 1) for stabilizing the process chamber environment; a main etching step (Main Etch, ME, Step 2) for removing most of the dielectric layer 101 material; and an over-etching step (Over Etch, OE, Step 3) for ensuring the bottom of the via is fully opened and removing any remaining etch stop layer 103. Following these etching steps, the baseline process performs a conventional post-etching treatment step (Step 4), such as treatment with nitrogen / carbon dioxide (N2 / CO2) plasma, the main purpose of which is to remove some of the polymer 105. A significant advantage of this invention is that it does not require alteration of the mature and stable main etching and over-etching steps. In other words, the main etching (ME) and over-etching (OE) steps in the method of this invention can use the exact same process parameters as the baseline process, which ensures that the size control and contour morphology of the patterned etching can maintain the existing high yield level. The improvement of this invention focuses on replacing the fourth step of the baseline process, i.e., the traditional post-etching treatment, with the innovative post-etching treatment using reducing gas described in step two.

[0038] Step 2: Perform post-etching treatment on the substrate. This post-etching treatment uses a processing gas containing reducing gas to remove etching residues 105 from the vias and trench structures and repair damaged surfaces of the underlying copper interconnects 102, forming a layer as shown in the image. Figure 3 The structure is shown. Compared to traditional post-processing processes that only use gases such as nitrogen / carbon dioxide, the reducing gas introduced in this invention can generate highly active reducing particles (such as hydrogen radicals) in a plasma environment. These particles have a dual function: on the one hand, they can chemically react with polymer residue 105, converting it into easily extractable volatile substances, achieving efficient cleaning of the bottom and sidewalls of the via; on the other hand, they can react with oxidized copper surfaces (such as copper oxide), reducing them to highly conductive metallic copper, while also providing some repair and annealing effects for lattice damage caused by etching bombardment. This synergistic effect of cleaning and repair can fundamentally reduce the vacancy concentration at the interface between the via and the underlying copper interconnect 102, strengthen the interface bonding, and improve electromigration performance.

[0039] In some embodiments, in step two, the etching residue 105 includes at least one of a fluoropolymer (CxFy), copper oxide (CuO), a copper-containing fluoropolymer (CuF), or a titanium-containing fluoropolymer (TixFy). These are common byproducts of dry etching of the dielectric layer 101 and the TiN hard mask layer using fluorine-containing gas etching, such as... Figure 2As shown, these residues deposit on the surface of the trench and the inner walls of the through-hole. The method of the present invention is highly effective in removing these complex residues 105.

[0040] In some embodiments, in step two, the reducing gas includes at least one of hydrogen, ammonia, or hydrogen-containing hydrocarbons. Hydrogen, ammonia, and certain hydrogen-containing hydrocarbons can all decompose in plasma to produce hydrogen-active species with strong reducing properties, thereby achieving the repair of the damaged copper surface and the effective removal of residue 105. These gases are widely available and have good process compatibility, providing a variety of feasible options for achieving the technical effects of this invention.

[0041] In some embodiments, in step two, the hydrogen-containing hydrocarbon can be selected from lower alkanes (e.g., C1-C4 alkanes), lower alkenes (e.g., C2-C4 alkenes), or combinations thereof. Specifically, gases such as methane (CH4), ethane (C2H6), propane (C3H8), and ethylene (C2H4) can be used. These hydrocarbon gases, due to the presence of CH bonds in their molecular structure that are easily broken in plasma, can effectively dissociate and release highly reactive hydrogen radicals. These hydrogen radicals have the ability to reduce oxides on the damaged copper interconnect 102 surface. By precisely controlling process parameters, such as gas flow rate, plasma power, and processing time, the deposition of unwanted carbon-based residues on the surface can be effectively controlled or avoided while achieving copper surface repair, thereby ensuring interface cleanliness and high conductivity.

[0042] In some embodiments, in step two, the processing gas consists of nitrogen and hydrogen. In this combination, hydrogen acts as the primary reducing gas, responsible for repairing copper damage and removing residue 105. Nitrogen can serve as a dilution gas or carrier gas to regulate plasma density and energy, stabilize the process, and ensure uniformity and controllability of the treatment. This combination is a preferred gas combination that combines effectiveness and process stability.

[0043] In some embodiments, in step two, the nitrogen to hydrogen flow ratio is 1:1 to 3:1. Controlling the gas flow ratio within this range ensures a sufficient concentration of hydrogen active species in the plasma to perform the repair and cleaning functions, while avoiding other process problems that may be caused by excessive hydrogen, thus achieving a good balance between processing efficiency and process window.

[0044] In some embodiments, in step two, the flow rate of the processing gas is from 0 sccm to 600 sccm. The setting of the total gas flow rate affects the gas pressure and residence time within the reaction chamber. Adjusting within this flow range can optimize the uniformity and rate of processing to accommodate the process requirements of wafers of different sizes and different equipment cavities.

[0045] In some embodiments, in step two, the post-etching treatment is performed in a plasma environment with a plasma power of 0W to 400W. By applying radio frequency power within this range, the process gas can be effectively dissociated into active particles, initiating a chemical reaction. Simultaneously, keeping the power at a low level avoids causing new physical damage to the exposed copper surface by high-energy ions, achieving gentle and efficient repair and cleaning.

[0046] In some embodiments, the duration of the post-etching treatment in step two is 20 to 40 seconds. This processing time window is optimized to ensure that the residue 105 is fully removed and the copper surface is effectively repaired, while avoiding the decrease in production efficiency or potential over-processing risks caused by excessively long processing times.

[0047] By employing the above-described post-etching treatment method, the electromigration failure mode of copper interconnects is dominated by vias (e.g., ...). Figure 4 (as shown) transforms into metal wire dominance (e.g.) Figure 5 (Structure shown). The failure mode shifted from the fragile via / metal (i.e., the underlying copper interconnect 102) interface to the metal line itself, directly demonstrating a fundamental improvement and strengthening of interface quality. The interface is no longer the weak point in the entire interconnect structure. This transformation signifies a significant improvement in the overall reliability and lifetime of the copper interconnect, enabling it to meet the requirements of more advanced process nodes for high-performance and high-reliability interconnects.

[0048] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0049] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method for improving electromigration performance of copper interconnects, comprising: At least comprising: Step one, providing a substrate, wherein a via and a trench structure exposing a lower copper interconnect structure are formed on the substrate; Step two, performing an etch post-treatment on the substrate, wherein the etch post-treatment uses a processing gas containing a reducing gas to remove etch residues in the via and the trench structure and repair damaged surfaces of the lower copper interconnect structure.

2. The method for improving the electromigration performance of copper interconnects according to claim 1, characterized in that: In step one, the via and the trench structure are formed by performing an integrated etching process on a dielectric layer.

3. The method of claim 1, wherein the copper interconnects are formed by a damascene process. In step two, the reducing gas includes at least one of hydrogen, ammonia or hydrogen-containing hydrocarbon.

4. The method of claim 3, wherein the copper interconnects are formed by a damascene process. In step two, the processing gas is composed of nitrogen and hydrogen.

5. The method of claim 4, wherein the copper interconnects are formed by a damascene process. In step two, a flow ratio of the nitrogen to the hydrogen is 1:1 to 3:

1.

6. The method of improving electromigration performance of copper interconnects of claim 4 or 5, wherein: In step two, a flow rate of the processing gas is 0 sccm to 600 sccm.

7. The method of claim 1, wherein the copper interconnect is formed on a substrate comprising a dielectric material. In step two, the etch post-treatment is performed in a plasma environment, and a power of the plasma is 0 W to 400 W.

8. The method of claim 1, wherein the copper interconnects are formed on a substrate comprising a dielectric material. In step two, a duration of the etch post-treatment is 20 seconds to 40 seconds.

9. The method of claim 1, wherein the copper interconnect is formed on a substrate comprising a dielectric material. In step two, the etch residues include at least one of fluorine-containing polymer, copper oxide, carbon-fluorine-containing polymer or titanium-fluorine-containing polymer.

10. The method for improving the electromigration performance of copper interconnects according to claim 1, characterized in that: Through the etch post-treatment, an electromigration failure mode of copper interconnects is changed from via-dominant to wire-dominant.

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