Double-loop anti-radiation phase-locked loop circuit and control method

Abstract

The invention relates to a double-loop anti-radiation phase-locked loop circuit and a control method. The double-loop anti-radiation phase-locked loop circuit comprises a digital regulation branch, an analog regulation branch, a multiband voltage-controlled oscillator and a frequency divider, the digital regulation branch, the multiband voltage-controlled oscillator and the frequency divider jointly form a coarse tuning loop, and the digital regulation branch is used for generating a frequency band control word according to a frequency difference between a reference clock and an output clock of the frequency divider to coarsely tune the frequency of the multiband voltage-controlled oscillator until the coarse tuning loop is locked; the analog regulation branch, the multiband voltage-controlled oscillator and the frequency divider jointly form a fine regulation loop, and the analog regulation branch is used for generating a control voltage signal according to the phase difference between the reference clock and the output clock of the frequency divider after the coarse regulation loop is locked, and performing fine regulation on the gain of the multiband voltage-controlled oscillator. The frequency range of the multi-band voltage-controlled oscillator can be expanded, the gain can be reduced, and radiation interference can be reduced. The method can be widely applied to the fields of microelectronic chip design and nuclear technology.

Description

Technical Field

[0001] This invention relates to the field of microelectronic chip design and nuclear technology, and in particular to a dual-loop radiation-resistant phase-locked loop circuit and control method for large-scale physical experimental devices. Background Technology

[0002] Clock generation circuits are crucial for digital circuits, and phase-locked loops (PLLs), as modules for generating high-speed, low-jitter clocks, are widely used. In large-scale physics experimental setups, the radiation environment can severely interfere with the operation of PLLs, leading to increased output clock jitter and, in severe cases, even PLL lockout. Therefore, radiation-hardened designs are required.

[0003] Most current radiation-hardened phase-locked loops (PLLs) involve hardening the modules. While this can give each module of the PLL a certain degree of radiation resistance, the hardening design of analog circuits cannot completely eliminate the effects of radiation. When exposed to radiation, the output clock of the PLL will still jitter. Summary of the Invention

[0004] To address the aforementioned problems, the purpose of this invention is to provide a dual-loop radiation-resistant phase-locked loop (PLL) circuit and control method. By controlling the frequency and phase of a multi-band voltage-controlled oscillator (VCO) through two separate loops, the gain of the VCO can be reduced while maintaining its frequency range. When radiation generates single-event effects in the analog regulation circuitry, such as the frequency and phase detectors and charge pumps, its impact ultimately leads to changes in the control voltage Vctrl. Therefore, by reducing the gain of the VCO, the interference of radiation on the entire analog regulation circuit can be reduced, thereby enhancing the radiation resistance of the entire PLL at the system level.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: In a first aspect, the present invention provides a dual-loop radiation-resistant phase-locked loop circuit, comprising: Digital control branch, analog control branch, multi-band voltage-controlled oscillator, and frequency divider; The digital adjustment branch, the multi-band voltage-controlled oscillator, and the frequency divider together constitute a coarse adjustment loop. The digital adjustment branch is used to generate a frequency band control word based on the frequency difference between the reference clock and the output clock of the frequency divider to coarsely adjust the frequency of the multi-band voltage-controlled oscillator until the coarse adjustment loop is locked. The analog adjustment branch, the multi-band voltage-controlled oscillator, and the frequency divider together constitute the fine-tuning loop. The analog adjustment branch is used to generate a control voltage signal based on the phase difference between the reference clock and the output clock of the frequency divider after the coarse-tuning loop is locked, so as to fine-tune the gain of the multi-band voltage-controlled oscillator.

[0006] Furthermore, the digital adjustment branch includes a counter frequency discriminator and a digital filter; The frequency counter discriminator is used to detect the frequency difference between the reference clock and the output clock of the frequency divider by counting, and outputs a lead or lag signal to the digital filter or outputs a lock signal to the analog adjustment branch based on the comparison result of the frequency difference with a preset threshold. The digital filter is used to filter the leading or lagging signal output by the counter frequency discriminator and generate the frequency band control word of the multi-band voltage-controlled oscillator.

[0007] Furthermore, the frequency counter and the digital filter adopt a triple-mode redundancy hardened design.

[0008] Furthermore, the frequency counter includes a first counter, a second counter, and a logic judgment module; The first counter is used to count the reference clock signal; The second counter is used to count the clock signal output by the frequency divider; The logic judgment module is used to compare the counting difference between the outputs of the first counter and the second counter according to a preset threshold: if the counting difference between the outputs of the first counter and the second counter is less than the preset threshold, a lock signal is output to the analog adjustment branch; if the counting difference between the outputs of the first counter and the second counter is greater than the preset threshold, a lead or lag signal is output to the digital filter according to the comparison result.

[0009] Furthermore, the analog regulation branch includes a frequency and phase detector, a charge pump, and a low-pass filter; The frequency and phase detector is used to detect the phase difference between the reference clock and the output clock of the frequency divider after receiving the lock signal from the frequency counter detector, and output a lead or lag signal. The charge pump is used to generate charging or discharging current based on the leading or lagging signal output by the frequency and phase detector. The low-pass filter is used to change the charging or discharging current, alter the control voltage of the multi-band voltage-controlled oscillator, and simultaneously filter the control voltage.

[0010] Furthermore, the frequency and phase detector adopts a three-mode redundancy hardened design.

[0011] Furthermore, the bias circuit of the charge pump employs a redundant design.

[0012] Furthermore, the multi-band voltage-controlled oscillator adopts an LC structure, and the gain of the multi-band voltage-controlled oscillator is determined by a variable capacitor, the gate voltage of the variable capacitor is determined by a control voltage; the frequency range of the multi-band voltage-controlled oscillator is determined by a capacitor array, and the number of capacitors connected in the capacitor array is determined by a frequency band control word.

[0013] Furthermore, the gain of the multi-band voltage-controlled oscillator is configured to be lower than that of the single-band voltage-controlled oscillator to reduce the sensitivity of the analog regulation branch to radiation; The frequency range of the multi-band voltage-controlled oscillator is extended by a capacitor array, enabling the voltage-controlled oscillator to maintain wide-band operation even under low-gain conditions.

[0014] In a second aspect, the present invention provides a control method for a dual-loop anti-radiation phase-locked loop circuit, comprising: The reference clock signal is connected to the input terminals of the digital adjustment branch and the analog adjustment branch respectively. At the same time, the digital adjustment branch and the analog adjustment branch are connected to the multi-band voltage-controlled oscillator and the frequency divider respectively to form the coarse adjustment loop and the fine adjustment loop. After reset, the control voltage Vctrl of the multi-band voltage-controlled oscillator remains unchanged. The digital adjustment branch obtains the frequency band control word of the multi-band voltage-controlled oscillator based on the frequency difference between the reference clock and the frequency divider output clock, and performs coarse adjustment of the frequency of the multi-band voltage-controlled oscillator until the coarse adjustment loop is locked. The analog adjustment branch obtains the control voltage of the multi-band voltage-controlled oscillator based on the phase difference between the reference clock and the clock output by the feedback branch, and then fine-tunes the phase of the multi-band voltage-controlled oscillator.

[0015] The present invention has the following advantages due to the adoption of the above technical solutions: 1. The dual-loop anti-radiation phase-locked loop proposed in this invention uses two loops to perform coarse and fine adjustments on the multi-band voltage-controlled oscillator, which can reduce the gain of the multi-band voltage-controlled oscillator while ensuring the frequency range of the multi-band voltage-controlled oscillator, thereby reducing the interference of radiation on the control voltage of the multi-band voltage-controlled oscillator and enhancing the anti-radiation capability of the entire analog regulation branch from the system perspective. 2. This invention further enhances the radiation resistance of the phase-locked loop by employing a radiation-insensitive LC multi-band voltage-controlled oscillator and a redundant charge pump bias circuit in the analog regulation branch, and by strengthening the frequency and phase detector, frequency divider, frequency counter and digital filter with triple redundancy, thereby achieving radiation resistance strengthening of all modules of the phase-locked loop.

[0016] Therefore, this invention can be widely applied to the fields of microelectronic chip design and nuclear technology. Attached Figure Description

[0017] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts. In the drawings: Figure 1This is a schematic diagram of the structure of the dual-loop anti-radiation phase-locked loop circuit provided in the embodiment of the present invention; Figure 2 This refers to the operating state of the dual-loop anti-radiation phase-locked loop circuit provided in this embodiment of the invention. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention are within the scope of protection of the present invention.

[0019] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of exemplary embodiments according to the invention. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0020] In some embodiments of the present invention, a dual-loop radiation-resistant phase-locked loop (PLL) circuit is provided, comprising a coarse adjustment loop and a fine adjustment loop. By using the dual loops, the frequency range of the multi-band voltage-controlled oscillator (VCO) is expanded while the gain of the VCO is reduced, thereby reducing radiation interference to the VCO. Furthermore, by employing a radiation-insensitive LC VCO and strengthening the frequency and phase detectors, frequency dividers, frequency counters, and digital filters with triple-modular redundancy, the radiation resistance of the PLL can be further enhanced. The dual-loop radiation-resistant PLL circuit proposed in this invention exhibits excellent radiation resistance.

[0021] Correspondingly, in some other embodiments of the present invention, a control method for a dual-loop anti-radiation phase-locked loop circuit is provided.

[0022] Example 1 like Figure 1As shown, this invention provides a dual-loop radiation-resistant phase-locked loop circuit, comprising a digital adjustment branch, an analog adjustment branch, a multi-band voltage-controlled oscillator (VCO), and a frequency divider. The digital adjustment branch, VCO, and frequency divider together form a coarse adjustment loop. The digital adjustment branch generates a frequency band control word based on the frequency difference between a reference clock and the frequency divider's output clock to coarsely adjust the frequency of the VCO, thereby expanding its frequency range until the coarse adjustment loop is locked. The analog adjustment branch, VCO, and frequency divider together form a fine adjustment loop. After the coarse adjustment loop is locked, the analog adjustment branch generates a control voltage signal based on the phase difference between the reference clock and the frequency divider's output clock to finely adjust the gain of the VCO.

[0023] Furthermore, the digital adjustment branch includes a counter frequency discriminator and a digital filter (DLF). The counter frequency discriminator is used to detect the frequency difference between the reference clock and the frequency divider output clock by counting, and outputs a lead or lag signal to the digital filter or a lock signal to the analog adjustment branch based on the comparison result of the frequency difference with a preset threshold. The digital filter is used to filter the lead or lag signal output by the counter frequency discriminator and generate the frequency band control word SW[n-1:0] for the multi-band voltage-controlled oscillator.

[0024] Furthermore, the frequency discriminator includes a first counter, a second counter, and a logic judgment module. The first counter counts the reference clock signal; the second counter counts the clock signal output by the frequency divider; and the logic judgment module compares the count values ​​output by the first and second counters: if the difference between the counts output by the first and second counters is less than a preset threshold, a lock signal is output to the analog adjustment branch; if the difference between the counts output by the first and second counters is greater than the preset threshold, a lead or lag signal is output to the digital filter based on the comparison result.

[0025] Furthermore, the analog regulation branch includes a phase-frequency detector (PFD), a charge pump (CP), and a low-pass filter (LPF). The PFD detects the phase difference between the reference clock and the divider output clock after receiving a lock signal from the counter detector, and outputs a lead or lag signal. The charge pump generates a charging or discharging current based on the lead or lag signal output by the PFD. The LPF changes the control voltage of the multi-band voltage-controlled oscillator based on the charging or discharging current generated by the charge pump, while also filtering the control voltage.

[0026] Furthermore, the multi-band voltage-controlled oscillator adopts an LC structure. The gain of the multi-band voltage-controlled oscillator is determined by the variable capacitor, and the gate voltage of the variable capacitor is determined by the control voltage. The frequency range of the multi-band voltage-controlled oscillator is determined by the capacitor array, and the number of capacitors connected in the capacitor array is determined by the frequency band control word.

[0027] Furthermore, the gain of the multi-band voltage-controlled oscillator is configured to be lower than that of the single-band voltage-controlled oscillator in order to reduce the sensitivity of the analog regulation branch to radiation; The frequency range of the multi-band voltage-controlled oscillator is extended by a capacitor array, enabling the voltage-controlled oscillator to maintain wide-band operation even under low-gain conditions.

[0028] Furthermore, the frequency divider is used to divide the high-frequency clock generated by the multi-band voltage-controlled oscillator and output it to the counter frequency discriminator in the digital adjustment branch and the frequency and phase discriminator in the analog adjustment branch, respectively.

[0029] Furthermore, the counter frequency discriminator, digital filter, frequency and phase discriminator, and frequency divider all adopt a triple-modular redundancy hardened design, which has good anti-radiation capability.

[0030] Furthermore, the bias circuit of the charge pump employs a redundant design to reduce the impact of radiation on the charge pump current.

[0031] In this embodiment, the modules of the digital adjustment branch all adopt a triple-modular redundancy hardened design, and the modules of the analog adjustment branch all adopt a radiation-insensitive structure. Furthermore, by extending the frequency range of the coarse adjustment loop, the VCO gain of the fine adjustment loop can be reduced, further reducing radiation interference with the VCO control voltage. Therefore, this invention can achieve good radiation resistance.

[0032] The radiation protection principle of the dual-loop anti-radiation phase-locked loop circuit provided in this embodiment is described below: When a node of the simulated regulating branch is bombarded by a high-energy particle, a single-particle transient current will be generated at the node. When the node is located in the frequency and phase detector, the single-event transient current will not change the output of the frequency and phase detector because the frequency and phase detector adopts a three-mode redundancy hardened design. When this node is located in the charge pump, the single-event transient current will cause the current output by the charge pump to change, which in turn will cause the control voltage of the multi-band voltage-controlled oscillator to change. When this node is located in a low-pass filter, single-event transient current will directly cause changes in the control voltage of the multi-band voltage-controlled oscillator; At this time, the frequency band control word of the multi-band voltage-controlled oscillator remains unchanged. Because the gain of the multi-band voltage-controlled oscillator is very small, the change in control voltage causes a small change in the phase of the output clock, which can effectively reduce radiated interference. When a node in a digital regulation branch is bombarded by a high-energy particle, a single-event upset will occur at the node, causing a change in the node voltage. Since the digital regulation branches all adopt a triple-modulus redundancy design, the output is obtained by the voltage voting of the three nodes. The flipping of a single node will not change the output. Therefore, the frequency control word of the multi-band voltage-controlled oscillator will not change when bombarded by high-energy particles.

[0033] Example 2 Based on the dual-loop anti-radiation phase-locked loop circuit provided in Embodiment 1, this embodiment provides a control method for the dual-loop anti-radiation phase-locked loop circuit, which includes the following steps: 1) Connect the reference clock signal to the input terminals of the digital adjustment branch and the analog adjustment branch respectively, and connect the digital adjustment branch and the analog adjustment branch to the multi-band voltage-controlled oscillator and the frequency divider respectively to form the coarse adjustment loop and the fine adjustment loop. 2) After reset, the control voltage of the multi-band voltage-controlled oscillator remains unchanged. The digital adjustment branch obtains the frequency band control word of the multi-band voltage-controlled oscillator based on the frequency difference between the reference clock and the frequency divider output clock, and performs coarse adjustment of the frequency of the multi-band voltage-controlled oscillator until the coarse adjustment loop is locked. 3) The analog adjustment branch obtains the control voltage of the multi-band voltage-controlled oscillator based on the phase difference between the reference clock and the output clock of the frequency divider, and then fine-tunes the phase of the multi-band voltage-controlled oscillator.

[0034] like Figure 2 The diagram shows the operating state of a dual-loop radiation-resistant phase-locked loop circuit provided in this embodiment. Initially, the coarse adjustment loop operates first, while the fine adjustment loop does not. After locking, coarse adjustment stops, and the fine adjustment loop begins to operate. Specifically, the operating process is as follows: Initial state: The state after reset is the initial state. At this time, the lock signal is "0", the coarse adjustment loop is working, the fine adjustment loop is not working, and the control voltage Vctrl of VCO remains unchanged.

[0035] During the coarse adjustment loop operation: the lock signal is "0", the VCO control voltage Vctrl remains unchanged, the counter frequency detector detects the frequency difference between the reference clock and the divider output clock, and adjusts the VCO frequency control word after passing through DLF filtering. In this embodiment, the VCO frequency control word is continuously increased until the VCO output frequency approaches the reference clock frequency, the counter phase detector outputs a lock signal of "1", the frequency locking loop operation is completed, and the phase-locked loop starts working.

[0036] When fine-tuning the loop: the lock signal is "1", and the VCO frequency control word remains unchanged. The PFD detects the phase difference between the reference clock and the divider output clock and outputs a lead or lag signal to control the CP to charge or discharge the LPF. The control voltage of the VCO begins to change until the phase difference between the reference clock and the divider output clock is 0, at which point the phase-locked loop locks.

[0037] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A dual-loop anti-radiation phase-locked loop circuit, characterized in that, include: Digital control branch, analog control branch, multi-band voltage-controlled oscillator, and frequency divider; The digital adjustment branch, the multi-band voltage-controlled oscillator, and the frequency divider together constitute a coarse adjustment loop. The digital adjustment branch is used to generate a frequency band control word based on the frequency difference between the reference clock and the output clock of the frequency divider to coarsely adjust the frequency of the multi-band voltage-controlled oscillator until the coarse adjustment loop is locked. The analog adjustment branch, the multi-band voltage-controlled oscillator, and the frequency divider together constitute the fine-tuning loop. The analog adjustment branch is used to generate a control voltage signal based on the phase difference between the reference clock and the output clock of the frequency divider after the coarse-tuning loop is locked, so as to fine-tune the gain of the multi-band voltage-controlled oscillator.

2. The dual-loop anti-radiation phase-locked loop circuit as described in claim 1, characterized in that, The digital adjustment branch includes a frequency counter and a digital filter; The frequency counter discriminator is used to detect the frequency difference between the reference clock and the output clock of the frequency divider by counting, and outputs a lead or lag signal to the digital filter or outputs a lock signal to the analog adjustment branch based on the comparison result of the frequency difference with a preset threshold. The digital filter is used to filter the leading or lagging signal output by the counter frequency discriminator and generate the frequency band control word of the multi-band voltage-controlled oscillator.

3. The dual-loop anti-radiation phase-locked loop circuit as described in claim 2, characterized in that, The frequency counter and digital filter adopt a triple-modular redundancy hardened design.

4. The dual-loop anti-radiation phase-locked loop circuit as described in claim 2, characterized in that, The frequency counter includes a first counter, a second counter, and a logic judgment module; The first counter is used to count the reference clock signal; The second counter is used to count the clock signal output by the frequency divider; The logic judgment module is used to compare the counting difference between the outputs of the first counter and the second counter according to a preset threshold: if the counting difference between the outputs of the first counter and the second counter is less than the preset threshold, a lock signal is output to the analog adjustment branch; if the counting difference between the outputs of the first counter and the second counter is greater than the preset threshold, a lead or lag signal is output to the digital filter according to the comparison result.

5. A dual-loop anti-radiation phase-locked loop circuit as described in claim 2, characterized in that, The analog regulation branch includes a frequency and phase detector, a charge pump, and a low-pass filter; The frequency and phase detector is used to detect the phase difference between the reference clock and the output clock of the frequency divider after receiving the lock signal from the frequency counter detector, and output a lead or lag signal. The charge pump is used to generate charging or discharging current based on the leading or lagging signal output by the frequency and phase detector. The low-pass filter is used to change the charging or discharging current, alter the control voltage of the multi-band voltage-controlled oscillator, and simultaneously filter the control voltage.

6. The dual-loop anti-radiation phase-locked loop circuit as described in claim 5, characterized in that, The frequency and phase detector adopts a three-mode redundancy hardened design.

7. The dual-loop anti-radiation phase-locked loop circuit as described in claim 5, characterized in that, The bias circuit of the charge pump employs a redundant design.

8. The dual-loop anti-radiation phase-locked loop circuit as described in claim 1, characterized in that, The multi-band voltage-controlled oscillator adopts an LC structure, and the gain of the multi-band voltage-controlled oscillator is determined by a variable capacitor, the gate voltage of the variable capacitor is determined by a control voltage; the frequency range of the multi-band voltage-controlled oscillator is determined by a capacitor array, and the number of capacitors connected in the capacitor array is determined by a frequency band control word.

9. A dual-loop anti-radiation phase-locked loop circuit as described in claim 8, characterized in that, The gain of the multi-band voltage-controlled oscillator is configured to be lower than that of the single-band voltage-controlled oscillator in order to reduce the sensitivity of the analog regulation branch to radiation. The frequency range of the multi-band voltage-controlled oscillator is extended by a capacitor array, enabling the voltage-controlled oscillator to maintain wide-band operation even under low-gain conditions.

10. A control method for a dual-loop radiation-resistant phase-locked loop circuit as described in any one of claims 1 to 9, characterized in that, Includes the following steps: The reference clock signal is connected to the input terminals of the digital adjustment branch and the analog adjustment branch respectively. At the same time, the digital adjustment branch and the analog adjustment branch are connected to the multi-band voltage-controlled oscillator and the frequency divider respectively to form the coarse adjustment loop and the fine adjustment loop. After reset, the control voltage of the multi-band voltage-controlled oscillator remains unchanged. The digital adjustment branch obtains the frequency band control word of the multi-band voltage-controlled oscillator based on the frequency difference between the reference clock and the frequency divider output clock, and performs coarse adjustment of the frequency of the multi-band voltage-controlled oscillator until the coarse adjustment loop is locked. Once the coarse adjustment loop is locked, the analog adjustment branch uses the phase difference between the reference clock and the clock output from the feedback branch to obtain the control voltage of the multi-band voltage-controlled oscillator and fine-tunes the gain of the multi-band voltage-controlled oscillator.

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