Capacitor floating unit friction resistance stress chip with high robustness
By employing an embedded structural design and flip-chip leadless packaging, the problems of contamination resistance and vibration resistance of traditional capacitive floating cells in complex flow field environments are solved, achieving highly robust frictional stress measurement and ensuring long-term stability and high accuracy.
Patent Information
- Application Number
- CN202511495227.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-20
- Publication Date
- 2026-01-16
AI Technical Summary
Traditional capacitive floating cell friction stress chips are susceptible to contaminant corrosion and high vibration in complex and harsh flow field environments, resulting in performance degradation, large measurement errors, and poor packaging reliability.
The embedded structure design reduces inertial mass and uses flip-chip leadless packaging, combined with a differential capacitance detection scheme, to ensure the protection of the capacitor-sensitive layer while exposing the shear stress-sensitive layer to the flow field, thus enhancing its resistance to contamination and vibration.
It achieves long-term stability and high-precision measurement in complex pollution and high-vibration environments, reduces dynamic measurement errors, and improves signal-to-noise ratio and robustness.
Smart Images

Figure CN121347036A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of friction-resistance chips, and more particularly to a highly robust capacitor floating unit friction-resistance stress chip. Background Technology
[0002] Frictional stress, also known as friction or wall shear stress, is an important parameter in fluid dynamics, helping to determine transitions and separations in the boundary layer. Studies have shown that surface frictional drag accounts for over 80% of total drag during high-Mach flight, and measuring the frictional distribution of an aircraft is helpful for drag reduction design and aerodynamic optimization. Floating capacitive shear stress chips manufactured using MEMS technology have been widely used in aircraft aerodynamic friction testing. The capacitive floating cell method offers advantages such as high accuracy, ease of miniaturization, non-invasive design, and high sensitivity under complex flow fields, showing promising application prospects in wind tunnel calibration systems and aerodynamic testing.
[0003] However, traditional capacitive floating cell shear stress chips still have significant limitations when dealing with complex and harsh real-world flow environments: First, their capacitive sensitive structures are usually exposed to the flow field, making them susceptible to contaminant erosion and accumulation, leading to performance degradation or failure, and insufficient anti-contamination capability and long-term stability; Second, the inertial mass and stiffness design of the floating cells are not fully optimized, making them prone to generating parasitic signals in high-vibration environments, resulting in large dynamic measurement errors and low signal-to-noise ratios; Finally, traditional wire bonding packaging methods have poor reliability in high-speed and high-vibration environments, and the leads are prone to breakage. Summary of the Invention
[0004] The purpose of this invention is to solve the aforementioned problems in the prior art and provide a highly robust capacitive floating cell friction stress chip for directly measuring wall friction stress. This chip has enhanced vibration resistance: by reducing inertial mass, the chip's natural frequency is increased, and combined with flip-chip buried leadless packaging, the long-term stability of the packaged sensor in high-vibration environments is guaranteed. Furthermore, this chip has enhanced contamination resistance: in traditional floating cell testing, its surface structure is exposed to high-speed airflow, micro-pollutant particles, and high-vibration impacts for extended periods, easily leading to capacitor structure degradation. This invention, through its buried structure design, ensures the long-term stability of the packaged sensor in contaminant particle environments.
[0005] To achieve the above objectives, the present invention adopts the following technical solution:
[0006] A highly robust capacitor floating unit friction stress chip includes electrodes, a capacitance-sensitive layer, a shielding layer, and a shear stress-sensitive layer stacked sequentially from top to bottom.
[0007] The capacitor-sensitive layer includes floating comb teeth connected to anchor points via folded beams, as well as left fixed differential comb teeth and right fixed differential comb teeth. The left fixed differential comb teeth and right fixed differential comb teeth are arranged alternately with the floating comb teeth to form a differential comb tooth capacitor structure.
[0008] The shielding layer includes an anchor point connection area and a floating unit connection area;
[0009] The shear stress sensitive layer includes a floating unit and a support layer that are suspended in place;
[0010] The floating unit is connected to the floating comb teeth of the capacitance-sensitive layer through the floating unit connection area of the shielding layer, and the anchor point is connected to the support layer of the shear stress-sensitive layer through the anchor point connection area of the shielding layer.
[0011] The floating unit is exposed upwards to the flow field to sense shear stress; the differential comb-shaped capacitor structure of the capacitor-sensitive layer is buried downwards to detect displacement, together forming a buried design.
[0012] The shear stress sensitive layer also includes a hollow groove formed at the center of the floating unit and at least one substrate support beam disposed within the hollow groove.
[0013] The capacitance-sensitive layer also includes a device layer support beam disposed on the floating comb teeth; the substrate layer support beam, the hollow groove and the device layer support beam together form a cavity, the depth of which is 100~400µm.
[0014] The capacitance-sensitive layer also includes a grounding layer arranged around the left fixed differential comb teeth, the right fixed differential comb teeth, the floating comb teeth, the folded beam, and the anchor points.
[0015] The ground layer of the capacitance-sensitive layer and the support layer of the shear stress-sensitive layer form a pair of adhesive steps for bonding and encapsulation through a height difference.
[0016] The thickness of the capacitive sensitive layer is 50~100µm, and the planar dimensions are 2000~4000µm × 4000~6000µm.
[0017] The number of electrodes is four, corresponding to the ground layer, floating comb teeth, left fixed differential comb teeth and right fixed differential comb teeth respectively to realize electrical interconnection; the shape of the electrodes is rectangular or square, with a thickness of 200~600nm and a side length of 400~800µm.
[0018] The thickness of the shear stress sensitive layer is 200~500µm, and the planar dimensions are 4000~6000µm × 4000~6000µm.
[0019] The thickness of the shielding layer is 2~6µm.
[0020] Compared with the prior art, the beneficial effects achieved by the technical solution of this invention are:
[0021] 1. When subjected to a forward flow, the lower surface of the floating unit in the shear stress sensitive layer is subjected to the flow, generating a shear stress in the same direction as the flow. The floating unit drives the displacement of the folded beam and the floating comb teeth. The folded beam serves to limit the displacement and provide elasticity. By detecting the change in differential capacitance between the floating comb teeth and the left and right fixed differential comb teeth, the displacement and shear stress can be calculated, thus fulfilling the requirement for friction stress measurement. In traditional floating unit testing, its surface structure is exposed to high-speed airflow, micro-pollutant particles, and high vibration and impact for a long time, which easily leads to capacitor structure degradation and lead wire detachment. This invention designs a capacitor floating unit friction stress chip with high robustness, high vibration resistance, and high pollution resistance by controlling the inertial mass design and the embedded structure.
[0022] 2. This invention achieves a "buried" design for the core detection unit by placing and encapsulating a precision capacitive sensing layer and its electrodes underneath, exposing only the robust shear stress-sensitive layer to the flow field. This design physically isolates the precision capacitor comb teeth from the direct impact, erosion, and accumulation of contaminants such as dust and water droplets in the high-speed flow field, fundamentally avoiding capacitor short circuits, performance drift, or structural damage caused by contamination, and greatly improving the long-term operational stability and lifespan of the chip in complex contaminated environments.
[0023] 3. This invention utilizes a hollow groove in the shear stress-sensitive layer and a substrate layer support beam to form a composite support structure with the device layer support beam of the capacitance-sensitive layer, effectively regulating and reducing the inertial mass of the floating system. This optimization significantly improves the sensor's natural frequency, enabling it to effectively avoid the main vibration frequency bands in the flow field and suppress parasitic displacement and resonance phenomena generated under high vibration and high impact environments, thereby ensuring the signal-to-noise ratio of the output signal and the accuracy of dynamic measurements.
[0024] 4. This invention employs a differential capacitance detection scheme consisting of left fixed differential comb teeth, right fixed differential comb teeth, and floating comb teeth, which effectively suppresses common-mode interference (such as temperature drift). Simultaneously, the grounding layer surrounding the capacitance-sensitive layer provides a good electromagnetic shielding environment. The combination of these two elements ensures the chip's high sensitivity to minute capacitance changes and a high signal-to-noise ratio, thereby achieving accurate measurement of minute frictional stresses.
[0025] 5. High Overall Robustness and Packaging Reliability: First, the integrated fabrication process based on SOI wafers ensures a robust mechanical connection and excellent structural integrity between the capacitive sensing layer, shielding layer, and shear stress sensing layer. Second, the adhesive steps formed by the height difference between the ground layer on both sides of the capacitive sensing layer and the support layer of the shear stress sensing layer provide a clear and stable packaging bonding area. Finally, the use of a flip-chip, leadless electrode design and packaging eliminates the risk of traditional bonding wires breaking under vibration. These design features collectively contribute to the chip's extremely high overall robustness and packaging reliability. Attached Figure Description
[0026] Figure 1 This is a schematic diagram of the overall structure of the high robustness capacitor floating unit friction stress chip described in this invention.
[0027] Figure 2 This is an exploded view of the high robustness capacitor floating unit friction stress chip described in this invention.
[0028] Figure 3 This is a view of the capacitance-sensitive layer.
[0029] Figure 4 This is a magnified view of a portion of the capacitance-sensitive layer.
[0030] Figure 5 This is a view of the shielding layer.
[0031] Figure 6 This is a front view of the shear stress-sensitive layer.
[0032] Figure 7 This is a rear view of the shear stress-sensitive layer.
[0033] Reference numerals: 1: Shear stress sensitive layer; 2: Capacitance sensitive layer; 3: Electrode; 4: Shielding layer; 5: Folded beam; 6: Left fixed differential comb teeth; 7: Device layer support beam; 8: Ground layer; 9: Anchor point; 10: Floating comb teeth; 11: Right fixed differential comb teeth; 12: Anti-clamping triangular prism; 13: Release hole; 14: Anchor point connection area; 15: Floating unit connection area; 16: Floating unit; 17: Support layer; 18: Hollow groove; 19: Substrate layer support beam. Detailed Implementation
[0034] To make the technical problems, technical solutions and beneficial effects of the present invention clearer and more understandable, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments.
[0035] Example 1
[0036] See Figures 1 to 7This embodiment provides a highly robust capacitor floating unit friction stress chip, which includes an electrode 3, a capacitor sensitive layer 2, a shielding layer 4 and a shear stress sensitive layer 1 stacked sequentially from top to bottom;
[0037] The capacitance-sensitive layer 2 includes a floating comb tooth 10 connected to the anchor point 9 via a folded beam 5, a left fixed differential comb tooth 6, and a right fixed differential comb tooth 11. The left fixed differential comb tooth 6 and the right fixed differential comb tooth 11 are arranged alternately with the floating comb tooth 10 to form a differential comb tooth capacitor structure, which is used to detect the magnitude of capacitance change.
[0038] The shielding layer 4 includes an anchor point connection area 14 and a floating unit connection area 15;
[0039] The shear stress sensitive layer 1 includes a floating unit 16 and a support layer 17 that are suspended in place.
[0040] Among them, the anchor point connection area 14 connects the anchor point 9 of the capacitance sensitive layer 2 to the support layer 17 of the shear stress sensitive layer 1; the floating unit connection area 15 connects the floating comb teeth 10 of the capacitance sensitive layer 2 to the floating unit 16 of the shear stress sensitive layer 1, and there are gaps at the corresponding positions of the floating parts.
[0041] The floating unit 16 is exposed upward to the flow field to sense shear stress; the differential comb-tooth capacitor structure of the capacitor-sensitive layer 2 is buried downward to detect displacement, together forming a buried design.
[0042] The shear stress sensitive layer 1 also includes a hollow groove 18 formed in the center of the floating unit 16 and at least one substrate support beam 19 disposed in the hollow groove 18. Specifically, the two substrate support beams 19 are located in the middle of the hollow groove 18 to improve the strength of the device, and there is an movable gap between the floating unit 16 and the support layer 17.
[0043] The capacitance-sensitive layer 2 also includes two device layer support beams 7 disposed on the floating comb teeth 10; the substrate layer support beam 19, the hollow groove 18 and the device layer support beams 7 together form a cavity, the depth of which is 100~400µm.
[0044] The capacitance-sensitive layer 2 also includes a grounding layer 8 arranged around the left fixed differential comb tooth 6, the right fixed differential comb tooth 11, the floating comb tooth 10, the folded beam 5 and the anchor point 9, for electromagnetic shielding.
[0045] The ground layer 8 of the capacitance sensitive layer 2 and the support layer 17 of the shear stress sensitive layer 1 form a pair of adhesive steps for bonding and encapsulation through a height difference.
[0046] The thickness of the capacitor-sensitive layer 2 is 50~100µm, and the planar dimensions are 2000~4000µm × 4000~6000µm.
[0047] The number of electrodes 3 is four, corresponding to the ground layer 8, floating comb teeth 10, left fixed differential comb teeth 6, and right fixed differential comb teeth 11 respectively to achieve electrical interconnection; the shape of the electrodes 3 is rectangular or square, with a thickness of 200~600nm and a side length of 400~800µm. Specifically, the electrodes 3 are arranged on the top of the capacitance-sensitive layer, made of aluminum material, and processed by hard mask metal vapor deposition.
[0048] The shear stress sensitive layer 1 has a thickness of 200~500µm and a planar dimension of 4000~6000µm × 4000~6000µm. The shielding layer 4 has a thickness of 2~6µm.
[0049] Specifically, the chip uses a standard SOI (silicon-on-insulator) wafer as the base material. The shear stress sensitive layer 1, the capacitance sensitive layer 2, and the shielding layer 4 are the substrate layer, device layer, and buried oxide layer of the SOI material, respectively. The shear stress sensitive layer 1 is made of silicon, the capacitance sensitive layer 2 is made of silicon, and the shielding layer 4 is made of silicon oxide. The connection between the capacitance sensitive layer, the shielding layer, and the shear stress sensitive layer originates from the multilayer characteristics of the SOI wafer itself.
[0050] The capacitive sensing layer is fabricated using the SOI device layer. The left fixed differential comb teeth, right fixed differential comb teeth, floating comb teeth, folded beams, release holes, anti-clamping triangular prisms, and anchor point structures are then fabricated using a first-side photolithography patterning and inductively coupled plasma etching (ICP-ED) process. A second front-side photolithography patterning and ICP-ED process are then used to fabricate the ground layer and device layer support beam structure.
[0051] The shielding layer is prepared by etching the buried oxide layer of SOI and wet etching is performed through the release hole of the capacitive sensitive layer using 50% HF etching solution. The part retained after etching is the anchor connection area and the floating unit connection area.
[0052] A shear stress sensitive layer is prepared using an SOI substrate. Hollow trenches, support layers, and substrate support beams are fabricated through a front-side photolithography patterning and inductively coupled plasma etching. Floating units are then formed through a back-side photolithography patterning and inductively coupled plasma etching.
[0053] In this embodiment, one end of the four sets of folding beams 5 is connected to the anchor point 9 and the other end is connected to the floating comb teeth 10. The displacement is restricted by the anti-sucking triangular prism 12, which is used to transmit the displacement. The two device layer support beams 7 are located in the middle of the floating comb teeth 10. The release holes 13 are distributed on the floating comb teeth 10.
[0054] The floating unit 16 is fabricated by back-side photolithography patterning and dry etching to sense external shear stress; the support layer 17, hollow groove 18, and substrate support beam 19 are fabricated by front-side photolithography patterning and dry etching; the hollow groove 18 and the two substrate support beams 19 are located at the center of the front side of the floating unit 16, and the support layer 17 surrounds the other components of the shear stress sensitive layer 1.
[0055] When an external flow occurs, shear stress acts on the floating unit 16, causing the folded beam 5 and the floating comb tooth 10 to shift. The differential capacitor composed of the left fixed differential comb tooth 6, the right fixed differential comb tooth 11, and the floating comb tooth 10 detects the change in capacitance, and then calculates the displacement and the magnitude of the shear stress.
[0056] In this invention, the floating unit 16 and the floating comb teeth 10 are on the same axis but arranged in layers and connected by the floating unit connection area 15 of the shielding layer. The floating unit 16 is exposed to the flow field upward, and the capacitive detection sensitive comb teeth are buried in the package downward, thus realizing the buried design.
Claims
1. A high robustness capacitive floating cell friction stress chip, characterized by: The electrode (3), the capacitive sensitive layer (2), the shielding layer (4) and the shear stress sensitive layer (1) are sequentially stacked from top to bottom. The capacitive sensitive layer (2) comprises floating comb teeth (10) connected with anchor points (9) through folding beams (5), and left fixed differential comb teeth (6) and right fixed differential comb teeth (11), the left fixed differential comb teeth (6) and the right fixed differential comb teeth (11) are staggered with the floating comb teeth (10) to form a differential comb tooth capacitive structure. The shielding layer (4) comprises an anchor point connection area (14) and a floating unit connection area (15). The shear stress sensitive layer (1) comprises a floating unit (16) and a support layer (17) which are suspended. The floating unit (16) is connected with the floating comb teeth (10) of the capacitive sensitive layer (2) through the floating unit connection area (15) of the shielding layer (4), and the anchor point (9) is connected with the support layer (17) of the shear stress sensitive layer (1) through the anchor point connection area (14) of the shielding layer (4).
2. A high robustness capacitive floating cell friction stress chip as claimed in claim 1, wherein: The floating unit (16) is exposed to the flow field upwardly for sensing shear stress, and the differential comb tooth capacitive structure of the capacitive sensitive layer (2) is buried downwardly for detecting displacement, which together constitute a buried design.
3. A high robustness capacitive floating cell friction stress chip as claimed in claim 1, wherein: The shear stress sensitive layer (1) further comprises a hollow groove (18) opened in the center of the floating unit (16) and at least one substrate layer support beam (19) arranged in the hollow groove (18).
4. A high robustness capacitive floating cell friction stress chip as claimed in claim 3, characterized in that: The capacitive sensitive layer (2) further comprises a device layer support beam (7) arranged on the floating comb teeth (10); the substrate layer support beam (19), the hollow groove (18) and the device layer support beam (7) together form a recess, and the depth of the recess is 100-400µm.
5. A high robustness capacitive floating cell friction stress chip as claimed in claim 1, wherein: The capacitive sensitive layer (2) further comprises a grounding layer (8) arranged around the left fixed differential comb teeth (6), the right fixed differential comb teeth (11), the floating comb teeth (10), the folding beam (5) and the anchor point (9).
6. A high robustness capacitive floating cell friction stress chip as claimed in claim 5, characterized in that: The two sides of the grounding layer (8) of the capacitive sensitive layer (2) and the support layer (17) of the shear stress sensitive layer (1) form a pair of adhesive steps for bonding and packaging through the height difference.
7. A high robustness capacitive floating cell friction stress chip as claimed in claim 1, wherein: The thickness of the capacitive sensitive layer (2) is 50-100µm, and the planar size is 2000-4000µm × 4000-6000µm.
8. A high robustness capacitive floating cell friction stress chip as claimed in claim 1, wherein: The number of the electrode (3) is four, which corresponds to the grounding layer (8), the floating comb teeth (10), the left fixed differential comb teeth (6) and the right fixed differential comb teeth (11) respectively to realize electrical interconnection; the shape of the electrode (3) is rectangular or square, the thickness is 200-600nm, and the side length is 400-800µm.
9. A high robustness capacitive floating cell friction stress chip as claimed in claim 1, wherein: The thickness of the shear stress sensitive layer (1) is 200-500µm, and the planar size is 4000-6000µm × 4000-6000µm.
10. A high robustness capacitive floating cell friction stress chip as claimed in claim 1, wherein: The thickness of the shielding layer (4) is 2-6µm.