Multifunctional test point distribution method and system based on adaptive switch matrix

Abstract

The invention provides a multifunctional test point distribution method and system based on a self-adaptive switch matrix, and relates to the technical field of electronic testing, and the method comprises the steps: building a switch matrix through obtaining the topological information of an integrated circuit, and achieving the dynamic connection of a physical probe and a logic test point; distributing the same probe to different test points in different time periods by using a time division multiplexing technology, collecting test response signals and calculating a deviation value; determining a fault point based on the deviation, analyzing the influence degree of the fault point on surrounding nodes, and obtaining a test priority level; the test time sequence is dynamically adjusted according to the priority level, high-priority nodes are preferentially tested, the on-off state is controlled to achieve intelligent distribution of test resources, and the test efficiency and the fault coverage rate are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to electronic testing technology, and in particular to a multifunctional test point allocation method and system based on an adaptive switch matrix. BACKGROUND

[0002] The integrated circuit testing field has long been faced with the contradiction between limited physical probe resources and numerous test points. The current testing method usually adopts a fixed probe allocation strategy, resulting in low testing efficiency and insufficient coverage, and it is difficult to meet the comprehensive testing needs of complex integrated circuits. In the prior art, the probe and the test point are usually in a one-to-one static connection relationship, which cannot dynamically adjust the testing strategy according to the faults found in the testing process, causing waste of testing resources.

[0003] The existing method also lacks in-depth analysis of the correlation between test points and fault propagation characteristics, and it is difficult to effectively identify the fault source and accurately evaluate the affected area. In high-density integrated circuit testing, limited probe resources cannot cover all test points at the same time, and the static polling method is inefficient and difficult to focus on testing the fault area. The prior art also fails to comprehensively consider multi-dimensional signal characteristics such as time domain and frequency domain for fault positioning, and lacks an adaptive optimization mechanism, making it difficult for the testing process to adjust itself according to real-time testing results, and unable to efficiently utilize limited physical probe resources to achieve optimal testing coverage and fault detection accuracy. SUMMARY

[0004] In view of the deficiencies of the prior art, the present application provides a multifunctional test point allocation method and system based on an adaptive switch matrix, which can solve the problems in the prior art.

[0005] In a first aspect of the embodiments of the present application, a multifunctional test point allocation method based on an adaptive switch matrix is provided, comprising: Obtaining circuit topology information of an integrated circuit to be tested, the circuit topology information including circuit connection relationships; According to the circuit topology information, an adaptive switch matrix is constructed, the adaptive switch matrix including a plurality of controllable switch units for connecting physical probes and logical test points; based on a time division multiplexing manner, by controlling the switch state of the controllable switch units, the same physical probe is allocated to different logical test points in different time periods, and a test timing arrangement table is generated; Collecting a test response signal of the logic test point, calculating a deviation value of the test response signal relative to an expected signal; determining a fault test point according to the deviation value, analyzing an affected degree of a test node connected with the fault test point based on the circuit connection relationship to obtain a test priority level of the test node; adjusting the test timing arrangement table according to the test priority level, preferentially allocating the physical probe to a test node with a high priority level to obtain an updated test timing arrangement table, and controlling a switching state of each controllable switching unit to realize dynamic allocation of test points.

[0006] In an optional embodiment, In different time periods, the same physical probe is allocated to different logic test points by controlling the switching state of the controllable switching unit, and the step of generating a test timing arrangement table includes: Obtaining a feature vector of a logic test point, calculating a correlation matrix between test points according to the feature vector of the logic test point, and constructing a probe allocation state space based on the correlation matrix, the probe allocation state space including a probe allocation state, a resource constraint condition and a test quality index; constructing a probe allocation action space, the probe allocation action space including a probe number, a test point number and an allocation time period; Constructing a reward function according to the probe allocation state space and the probe allocation action space, the reward function including a test coverage reward item, a test quality reward item and a constraint violation penalty item; iteratively optimizing a probe allocation strategy based on the reward function, the probe allocation strategy satisfying a single-time probe allocation constraint, a test point correlation constraint and a minimum test time constraint; Collecting a response signal of a test point, calculating a test quality evaluation value; when the test quality evaluation value is lower than a preset evaluation threshold, updating a weight parameter in the reward function based on a gradient descent method, and re-executing the iterative optimization of the probe allocation strategy; generating a test timing arrangement table according to the optimized probe allocation strategy.

[0007] In an optional embodiment, The step of iteratively optimizing a probe allocation strategy based on the reward function, the probe allocation strategy satisfying a single-time probe allocation constraint, a test point correlation constraint and a minimum test time constraint includes: Establishing a binary decision variable of the single-time probe allocation constraint, the binary decision variable representing an allocation relationship between a probe and a test point at each time; calculating a violation degree of the test point correlation constraint based on the binary decision variable, normalizing each constraint violation degree to obtain a normalized constraint violation degree, dynamically updating a constraint weight based on the normalized constraint violation degree, the updating of the constraint weight being realized by the product of a learning rate and the normalized constraint violation degree, and calculating a comprehensive evaluation index of constraint satisfaction degree according to the constraint weight; constructing a neighborhood structure of the probe distribution scheme, the neighborhood structure comprising a probe distribution time adjustment scheme and a probe and test point re-distribution scheme, recording a history scheme to form a tabu table, and locally optimizing the probe distribution scheme based on the tabu table; calculating an optimization convergence degree according to the comprehensive evaluation index, and dynamically adjusting an optimization step size based on the optimization convergence degree, taking the comprehensive evaluation index as an optimization basis of the reward function; calculating a variance of the probe distribution scheme in a plurality of continuous optimizations, and determining an optimization result of the probe distribution strategy when the variance is less than a preset variance threshold or a number of continuous optimizations reaches a preset iteration number.

[0008] In an optional implementation, The step of calculating the deviation value of the test response signal relative to the expected signal comprises: filtering the test response signal to obtain a filtered signal, dividing the filtered signal into signal segments according to a preset time window, establishing an expected signal template based on a standard waveform, calculating a root mean square error of the signal segments and the expected signal template to obtain a time domain deviation, calculating a frequency spectrum of the signal segments and the expected signal template to obtain a frequency domain deviation, and calculating a delay deviation based on a cross-correlation function of the signal segments and the expected signal template; multiplying the time domain deviation, the frequency domain deviation and the delay deviation by corresponding weight coefficients respectively and summing them to obtain a comprehensive deviation index, calculating a confidence degree of the test response signal based on the comprehensive deviation index, adjusting a sampling parameter to reacquire the test response signal when the confidence degree is lower than a preset confidence threshold, and outputting the comprehensive deviation index as the deviation value of the test response signal relative to the expected signal.

[0009] In an optional implementation, The step of determining a fault test point according to the deviation value and analyzing an affected degree of a test node connected to the fault test point based on the circuit connection relationship to obtain a test priority level of the test node comprises: constructing the deviation value as a deviation feature vector, weighting the standardized deviation feature vector by a deviation weight coefficient to obtain a fault score, and determining the fault test point based on the fault score; calculating an electric conductance coupling coefficient and a mutual inductance coupling coefficient between the fault test point and an adjacent test node, multiplying the electric conductance coupling coefficient and the mutual inductance coupling coefficient by coupling weight coefficients respectively and summing them to obtain a coupling coefficient matrix, and calculating a first-order influence intensity of the fault test point on the adjacent test node based on the coupling coefficient matrix. According to the connection distance between test nodes, a path attenuation factor is calculated, the product of the first-order influence strength and the path attenuation factor is taken as a propagation influence strength, and the multi-order influence strength of the fault test point on non-adjacent test nodes is calculated based on the propagation influence strength; different orders of influence strength are multiplied by corresponding influence weight coefficients and summed to obtain a total influence degree of a test node; The total influence degree is divided by a maximum total influence degree to obtain a basic priority, a timing adjustment coefficient is calculated according to the waiting time of the test node, and the product of the basic priority and the timing adjustment coefficient is taken as a test priority level of the test node; The accuracy of the test priority level is calculated, and the deviation weight coefficient, the coupling weight coefficient and the influence weight coefficient are adjusted according to the change of the accuracy.

[0010] In an optional implementation, The step of calculating the multi-order influence strength of the fault test point on non-adjacent test nodes based on the propagation influence strength includes: The shortest physical connection path length between test nodes is calculated, the frequency characteristics of the test response signal are obtained, a frequency-related attenuation coefficient is calculated according to the frequency characteristics, the product of the frequency-related attenuation coefficient and the shortest physical connection path length is taken as a basic attenuation value, a branch loss value is calculated according to the number of branches of the propagation path, and the basic attenuation value and the branch loss value are combined to obtain a path attenuation factor; The equivalent resistance value of the propagation path is calculated, the path propagation weight is determined based on the equivalent resistance value, and the product of the first-order influence strength, the path attenuation factor and the path propagation weight is taken as a propagation influence strength; For each non-adjacent test node, the influence strength propagated from adjacent nodes is calculated based on the propagation influence strength, and the influence strengths propagated from all adjacent nodes are superimposed to obtain the influence strength of the current order.

[0011] In an optional implementation, The step of adjusting the test timing schedule table according to the test priority level and preferentially allocating the physical probe to the test node with a high priority level includes: The occupation state of the probe in each time window is counted, the schedulable time period of the physical probe is calculated based on the occupation state; the test nodes are sorted according to the test priority level of the test nodes, and the test nodes are sequentially allocated to the schedulable time period in the order from high to low priority level; the switch control timing of the controllable switch unit is generated based on the connection relationship between each controllable switch unit and the test node, and the test timing schedule table is updated based on the switch control timing.

[0012] In a second aspect, a multifunctional test point allocation system based on an adaptive switch matrix is provided, comprising: A first unit configured to acquire circuit topology information of an integrated circuit under test, the circuit topology information comprising circuit connection relationships; A second unit configured to construct an adaptive switch matrix based on the circuit topology information, the adaptive switch matrix comprising a plurality of controllable switch units for connecting physical probes and logical test points; based on a time division multiplexing manner, the same physical probe is allocated to different logical test points in different time periods by controlling the switch states of the controllable switch units, and a test timing arrangement table is generated; A third unit configured to collect test response signals of the logical test points, calculate deviation values of the test response signals relative to expected signals, determine a faulty test point based on the deviation values, analyze the affected degree of test nodes connected to the faulty test point based on the circuit connection relationships to obtain a test priority level of the test nodes, adjust the test timing arrangement table based on the test priority level, preferentially allocate the physical probes to test nodes with high priority levels, obtain an updated test timing arrangement table, control the switch states of the controllable switch units, and realize dynamic allocation of test points.

[0013] In a third aspect, a computer-readable storage medium is provided, which stores computer program instructions, and the computer program instructions are executed by a processor to implement the method described above.

[0014] In this paper, time division multiplexing technology is used to realize dynamic allocation of physical probes, which significantly improves the utilization efficiency of test resources.

[0015] Machine learning and optimization algorithms are used to construct probe allocation strategies, considering test point correlation and resource constraints, and maximizing test coverage. Fault propagation analysis is introduced innovatively, which can analyze the influence degree of faulty test points on surrounding nodes, scientifically determine the priority level of test nodes, and concentrate limited probe resources in critical areas.

[0016] Through multi-dimensional signal analysis technology, time domain deviation, frequency domain deviation and delay deviation are considered comprehensively, which improves the accuracy of fault detection. The test strategy can be adjusted in real time according to the test response, an adaptive optimization mechanism is established, and the test process can be dynamically adjusted according to the actual situation. By introducing coupling coefficient matrix and path attenuation factor, the fault propagation path and influence degree are systematically evaluated, and accurate fault location is realized. The waiting time of test nodes is also considered, and a timing adjustment coefficient is introduced to avoid the situation that some test points are not tested for a long time, ensuring the fairness and comprehensiveness of the test. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 This is a flowchart illustrating the multifunctional test point allocation method based on an adaptive switch matrix according to an embodiment of the present invention. Figure 2 This is a flowchart for determining fault test points and dynamically calculating test priorities based on deviation analysis. Detailed Implementation

[0018] The technical solutions of the present invention will be described below with reference to the accompanying drawings. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0019] Figure 1 This is a schematic diagram of the process of the method of the present invention, as shown below. Figure 1 As shown, the multifunctional test point allocation method based on the adaptive switch matrix includes: Obtain the circuit topology information of the integrated circuit under test, wherein the circuit topology information includes test point location information and circuit connection relationship; An adaptive switch matrix is ​​constructed based on the circuit topology information. The adaptive switch matrix includes multiple controllable switch units for connecting physical probes and logic test points. Based on time-division multiplexing, the same physical probe is assigned to different logic test points by controlling the switching state of the controllable switch units in different time periods, thereby generating a test timing schedule. The test response signals of the logic test points are collected, and the deviation value of the test response signals relative to the expected signals is calculated. Fault test points are determined based on the deviation value. The degree of influence on test nodes connected to the fault test points is analyzed based on the circuit connection relationship to obtain the test priority level of the test nodes. The test timing schedule is adjusted according to the test priority level, and the physical probes are preferentially allocated to test nodes with higher priority levels to obtain an updated test timing schedule. The switching state of each controllable switch unit is controlled to achieve dynamic allocation of test points.

[0020] For example, the circuit topology information includes test point location information and circuit connection relationship. The test point location information describes the physical coordinates of each test point on the integrated circuit, such as the coordinates of a test point being (X=1250 microns, Y=850 microns). The circuit connection relationship describes the physical connection and logical relationship between test points, including wire connection, functional module attribution, and other information. The method for obtaining the circuit topology information includes reading circuit design files (such as netlist files), layout files, and test planning files. For example, from the netlist file, it can be extracted that node 12 and node 18 are connected through a 5-ohm resistor, and both belong to the same memory module; node 18 and node 25 are directly connected through a wire with a length of 180 microns, and belong to different functional modules. The circuit topology information should also include the electrical characteristics of each test point, such as the operating voltage range (such as 1.8V±0.1V), the operating frequency (such as 100MHz), the signal type (such as differential signal), and the like.

[0021] According to the obtained circuit topology information, an adaptive switch matrix is constructed to establish a controllable connection network between physical probes and logical test points. The adaptive switch matrix is composed of multiple controllable switch units, each of which can be regarded as an electronic switch and can switch states according to a control signal. The controllable switch unit can be implemented by using an analog multiplexer, a crossbar switch array, or a relay matrix. For example, for a unit with 32 test points and 8 physical probes, a 4×8 switch matrix can be designed, and each physical probe can be connected to 4 different test points through the switch matrix. The topology structure of the switch matrix needs to consider the spatial distribution of the test points, and adjacent test points tend to be connected to the same group of switch units to reduce the complexity of wiring.

[0022] The efficient use of physical probe resources is realized based on time division multiplexing. Time division multiplexing refers to dynamically allocating the same physical probe to different logical test points by controlling the switch state of the controllable switch unit in the switch matrix in different time periods. For example, physical probe P1 is connected to test point N5 in time period T1, to test point N12 in time period T2, and to test point N17 in time period T3. The division of time periods should consider the signal settling time, the measurement time required, and the switch switching time. For high-frequency digital signals, a shorter time period (such as 1 microsecond) is required; for slow analog signals, a longer time period (such as 5 microseconds) is required. The generated test timing schedule table records the complete test plan, including the allocation of each probe in each time period, the test order, and the switch control signal.

[0023] The test response signals of the logical test points are converted into digital signals by an analog-to-digital converter for processing. The deviation value of the test response signals from the expected signals reflects the working state of the test points, and a too large deviation indicates a fault. The fault test points are determined based on the deviation value, the influence range of the fault is analyzed through the circuit connection relationship, the affected degree of the test nodes connected to the fault test points is evaluated, and the test priority level of the test nodes is obtained. For example, if node A is determined as a fault test point, node B directly connected to node A is greatly affected and obtains a higher test priority level, and node C far away from node A is less affected and has a lower priority level.

[0024] The test timing arrangement table is adjusted according to the test priority level, the physical probe is preferentially allocated to the test nodes with high priority level, and important nodes can be tested in time. The updated test timing arrangement table needs to adjust the control timing of the switch matrix to realize the new probe allocation scheme. For example, if the priority level of node B is increased from 0.3 to 0.8, in the updated timing arrangement table, node B is tested from time period T8 to time period T2 in advance, which needs to adjust the switch state of time periods T2 and T8 accordingly. According to the updated test timing arrangement table, a switch control signal sequence is generated to drive each switch unit in the switch matrix to switch state according to the predetermined timing. The switch control signal can be generated by a dedicated controller or FPGA to ensure timing accuracy. The anti-jitter and settling time need to be considered when the switch is switched to avoid measurement errors caused by switch transients. For example, for a certain switch unit, it needs to wait for 50 nanoseconds after switching to ensure signal stability, and these timing parameters should be included in the calculation of the test timing arrangement table.

[0025] In an alternative embodiment, In different time periods, the same physical probe is allocated to different logical test points by controlling the switch state of the controllable switch unit, and the step of generating the test timing arrangement table comprises: The feature vector of the logical test point includes signal frequency characteristics, signal amplitude characteristics, timing requirement characteristics and coupling coefficient characteristics. The correlation matrix between the test points is calculated according to the feature vector of the logical test point, the probe allocation state space is constructed based on the correlation matrix, and the probe allocation state space includes probe allocation state, resource constraint condition and test quality index. The probe allocation action space is constructed, and the probe allocation action space includes probe number, test point number and allocation time period. constructing a reward function according to the probe allocation state space and the probe allocation action space, the reward function comprising a test coverage reward term, a test quality reward term and a constraint violation penalty term; iteratively optimizing a probe allocation strategy based on the reward function, the probe allocation strategy satisfying a single time point probe allocation constraint, a test point correlation constraint and a minimum test time constraint; collecting a response signal of the test point, calculating a test quality evaluation value; when the test quality evaluation value is lower than a preset evaluation threshold, updating a weight parameter in the reward function based on a gradient descent method, and re-executing the iterative optimization of the probe allocation strategy; generating a test timing arrangement table according to the optimized probe allocation strategy, the test timing arrangement table comprising time window division information, probe allocation scheme information, switch state control sequence information and quality monitoring index information, and controlling the switch state based on the test timing arrangement table to realize dynamic allocation of the test points.

[0026] For example, the feature vector of a logical test point is composed of signal frequency characteristics, signal amplitude characteristics, timing requirement characteristics and coupling coefficient characteristics. The signal frequency characteristics reflect the main frequency components of the required signal of the test point, for example, a certain test point requires a signal with a working frequency of 500MHz. The signal amplitude characteristics reflect the signal strength range of the test point, for example, the signal voltage range of a certain test point is 0.8V to 1.2V. The timing requirement characteristics include the rise time, fall time and hold time requirements of the test point signal, for example, the rise time requirement is not more than 2ns, the fall time requirement is not more than 3ns, and the hold time is at least 15ns. The coupling coefficient characteristics reflect the degree of mutual interference between the test points, for example, the capacitance coupling coefficient between two adjacent test points is 0.015pF, and the inductance coupling coefficient is 0.023nH.

[0027] According to these feature vectors, a correlation matrix between test points is calculated, including physical distance correlation, functional correlation and timing correlation. For the physical distance correlation, the correlation coefficient of test points within 0.5mm can be set to 0.85, the correlation coefficient of test points from 0.5mm to 1mm can be set to 0.65, the correlation coefficient of test points from 1mm to 2mm can be set to 0.45, and the correlation coefficient of test points above 2mm can be set to 0.25. The functional correlation is determined based on the functional module to which the test point belongs, the correlation coefficient of test points in the same functional unit can be set to 0.9, the correlation coefficient of test points of adjacent functional units can be set to 0.7, and the correlation coefficient of test points without direct functional connection can be set to 0.3. The timing correlation is determined based on the signal propagation path, for example, the correlation coefficient of adjacent test points on the signal propagation path can be set to 0.95, the correlation coefficient of test points one node apart can be set to 0.75, and the correlation coefficient of test points two nodes apart can be set to 0.55.

[0028] The correlation matrix is converted into test point grouping information, and test points with a correlation higher than 0.75 are grouped into the same test group to avoid simultaneous testing. For 32 logical test points, 12 test groups are formed, with the largest group containing 5 highly correlated test points and the smallest group containing only a single test point. The core of the probe allocation state space is the probe allocation state matrix, represented as an 8x32 matrix (assuming 8 physical probes and 32 logical test points), with element value 1 representing a connection and 0 representing no connection. The correlation matrix is directly mapped to a set of constraint conditions in the state space, for example, the test point pair (7, 15) with a correlation value of 0.92 generates the constraint condition "test point 7 and test point 15 cannot be tested in adjacent time windows". These constraint conditions are encoded as state transition rules, limiting the feasible change path of the probe allocation state. Resource constraints include probe number constraints (such as a physical probe limit of 8), time window constraints (with a total time window set to 64), and switch matrix physical connection constraints (some probes are restricted by physical layout and cannot be connected to certain test points). Test quality indicators are integrated into the state evaluation function, including test coverage indicators (targeting 98% coverage of all test points), signal integrity indicators (requiring a signal-to-noise ratio of no less than 35 dB), and test accuracy indicators (error rate no more than 0.2%). The state space also contains correlation-based test point priority mapping, with the row and column sum values of the correlation matrix used to calculate the criticality of the test points. Test points with high criticality (such as a criticality value of 90) obtain higher test priority. The entire state space construction process establishes a direct mapping relationship from the correlation matrix to the probe allocation strategy constraints, forming a complete state characterization system to guide probe allocation decisions.

[0029] The probe allocation action space contains three dimensions: probe number, test point number, and allocation time period. The probe number ranges from 1 to 8, corresponding to 8 physical probes. The test point number ranges from 1 to 32, corresponding to 32 logical test points. The allocation time period is in clock cycles, ranging from 1 to 64, representing 64 time windows. Each element in the action space represents a distribution decision, such as allocating probe 2 to test point 7 in time window 15.

[0030] In the reward function, the test coverage reward item is calculated by the formula: coverage reward = 100 x (number of tested points / total number of test points). For example, if 30 out of 32 test points are covered, the score is 93.75. The test quality reward item is composed of the signal-to-noise ratio score and the error rate score, which are weighted. The signal-to-noise ratio score = (actual signal-to-noise ratio / target signal-to-noise ratio) x 50. The error rate score = (1 - actual error rate / maximum allowed error rate) x 50. For example, if the signal-to-noise ratio is 40 dB (target 35 dB), the score is 57.14. If the error rate is 0.15% (maximum allowed 0.2%), the score is 37.5. When the weights are 0.6 and 0.4, respectively, the total quality reward is 49.29. The constraint violation penalty item is calculated as follows: single-time probe reassignment penalty = -20 x number of violations; correlation conflict penalty = -30 x correlation coefficient x number of violations; time overrun penalty = -1.5 x overrun percentage. For example, if the single-time probe reassignment occurs twice, the penalty is -40. If the test points with a correlation coefficient of 0.8 are tested simultaneously, the penalty is -24. If the test time exceeds 10%, the penalty is -15.

[0031] The iterative optimization process uses reinforcement learning methods to adjust the probe allocation scheme through multiple iterations. In each iteration, an allocation action is selected based on the current state, the reward value is calculated, and the policy parameters are updated. For example, under the initial policy, the average test time of 32 test points is 45 time windows, the coverage rate is 85%, and the total reward value is 105. After 50 iterations of optimization, the average test time is reduced to 32 time windows, the coverage rate is increased to 97%, and the total reward value is increased to 165. The optimization results meet the single-time probe allocation constraint, the test point correlation constraint, and the minimum test time constraint. The single-time probe allocation constraint ensures that each probe is connected to only one test point at the same time. The test point correlation constraint ensures that test points with a correlation higher than 0.8 are not tested in adjacent time windows. The minimum test time constraint ensures that the total time required to complete all necessary test points is minimized.

[0032] The response signal is collected using an analog-to-digital converter with a sampling rate of 2GS / s and a resolution of 12 bits. The test quality evaluation is based on signal integrity, measurement accuracy, and coverage comprehensiveness. The signal integrity is evaluated by the signal-to-noise ratio, such as a signal-to-noise ratio of 32dB, which is lower than the target of 35dB, and a score of 85. The measurement accuracy is evaluated by the deviation from the standard reference value, such as an average deviation of 0.25%, which is higher than the target of 0.2%, and a score of 90. The coverage comprehensiveness is evaluated by the test point coverage rate, such as a coverage rate of 94%, which is lower than the target of 98%, and a score of 92. The comprehensive evaluation value of the test quality is the weighted average of the three indicators, with weights of 0.35, 0.35, and 0.3 respectively. The calculation result is a comprehensive evaluation value of 88.85. The preset evaluation threshold is set to 90, and the current evaluation value of 88.85 is lower than the threshold, so the weight parameters need to be updated. The initial weight settings are: test coverage reward item weight 0.4, test quality reward item weight 0.4, and constraint violation penalty item weight 0.2. Through gradient descent calculation, the weight adjustment increments are +0.05, +0.03, and -0.08 respectively, and the adjusted weights become 0.45, 0.43, and 0.12. The updated weights are used to re-execute the iterative optimization of the probe allocation strategy.

[0033] The probe-test point-time period triple data in the probe allocation strategy is structured to construct an initial allocation matrix. For 8 physical probes and 32 test points, each allocation decision in the optimization strategy is traversed, and the matrix element at the corresponding position is set to 1. Then, time window division is performed, and the duration of each time window is determined based on the timing characteristics of the test points. For test points that require stable signals, such as analog signal test points, longer time windows such as 5μs are allocated; for digital logic test points, shorter time windows such as 2μs can be allocated. The cumulative time is automatically calculated to determine the starting point of each window, such as time window 1 starting at 0μs and window 2 starting at 5μs. The probe allocation scheme information is directly obtained by querying the allocation matrix, recording the connection relationship between each probe and test point in each time window. Then, the switch state control sequence is generated according to the probe allocation scheme and the physical connection topology of the switch matrix. This process requires querying the switch connection table, which stores the connection relationship between each switch unit and the probe and test point. For example, if probe 1 needs to connect to test point 5, it is found that switch units A1 and B3 need to be closed, so these switch states are set to closed in the corresponding time window. At the same time, quality monitoring indicators are calculated, including test coverage rate, signal integrity estimation, and timing margin. Potential conflicts are detected, such as simultaneous testing of adjacent high-frequency test points causing interference, at which time the time arrangement is automatically adjusted or shielding measures are added. Finally, a binary control sequence containing complete timing information is generated to drive the switch matrix hardware to perform the test process.

[0034] The application significantly improves the utilization efficiency of physical probes and test coverage by constructing an adaptive probe allocation mechanism. The optimization method based on reinforcement learning can adapt to the test requirements of different integrated circuits and dynamically adjust the probe allocation strategy. Through multi-dimensional feature vector analysis and correlation calculation, the association between test points is effectively identified to avoid test interference. The closed-loop quality evaluation and parameter adaptive adjustment mechanism are introduced to ensure continuous optimization of test quality.

[0035] In an alternative embodiment, The step of iteratively optimizing the probe allocation strategy based on the reward function, the probe allocation strategy satisfying the single-time probe allocation constraint, the test point correlation constraint, and the minimum test time constraint comprises: A binary decision variable of the single-time probe allocation constraint is established, and the binary decision variable represents the allocation relationship between the probe and the test point at each time; the violation degree of the test point correlation constraint is calculated based on the binary decision variable, and the violation degree is obtained by multiplying the correlation matrix and the test state of the test point; The constraint violation degree is normalized to obtain a normalized constraint violation degree, and the constraint weight is dynamically updated based on the normalized constraint violation degree, and the update of the constraint weight is realized by multiplying the learning rate and the normalized constraint violation degree, and the comprehensive evaluation index of constraint satisfaction degree is calculated according to the constraint weight; A neighborhood structure of the probe allocation scheme is constructed, the neighborhood structure includes a probe allocation time adjustment scheme and a probe and test point reallocation scheme, a history scheme is recorded to form a tabu table, and the probe allocation scheme is locally optimized based on the tabu table; The optimization convergence degree is calculated according to the comprehensive evaluation index, the optimization step is dynamically adjusted based on the optimization convergence degree, and the comprehensive evaluation index is taken as the optimization basis of the reward function; The variance of the probe allocation scheme of continuous multiple optimizations is calculated, and when the variance is less than a preset variance threshold or the number of continuous optimizations reaches a preset iteration number, the optimization result of the probe allocation strategy is determined.

[0036] Exemplarily, the present embodiment discloses a method for iteratively optimizing a probe allocation strategy based on a reward function, which ensures that the probe allocation strategy satisfies the single-time probe allocation constraint, the test point correlation constraint, and the minimum test time constraint. In actual implementation, the method is applicable to the field of integrated circuit testing, especially in the case of limited physical probe resources and a large number of logical test points.

[0037] In implementation, the binary decision variable of the single-time probe allocation constraint represents the allocation relationship between the probe and the test point at each time, in the form of a three-dimensional matrix, with dimensions corresponding to the probe number, test point number and time period number. Taking a unit with 8 physical probes, 32 test points and 64 time periods as an example, the decision variable matrix is 8x32x64 in size. Each element in the matrix takes a value of 0 or 1, with a value of 1 indicating that the corresponding probe is allocated to a specific test point in a specified time period, and a value of 0 indicating no allocation. For example, if the decision variable value at position (3, 15, 27) is 1, it means that the 3rd probe is allocated to the 15th test point in the 27th time period. The single-time probe allocation constraint requires that each probe can only be allocated to one test point in the same time period, which is manifested as the decision variable matrix having only one element with a value of 1 in the plane corresponding to each probe and time period, and the rest being 0.

[0038] When calculating the violation degree of the test point correlation constraint based on binary decision variables, it is necessary to check whether the test points with high correlation are tested in adjacent time periods. The test status of each test point in each time period is extracted from the decision variable. If test point i is tested in time period t and test point j is tested in time period t+1, the correlation value of the two test points in the correlation matrix is queried, which is taken as the violation degree. The correlation matrix is a two-dimensional array, where each element value represents the correlation coefficient between the corresponding two test points, with a value range of 0 to 1, determined by objective factors such as physical distance and electrical connection of test points. For example, assuming that the correlation between test point 5 and test point 12 is 0.85, if the decision variable shows that test point 5 is tested in time period 20 and test point 12 is tested in time period 21, the violation degree is 0.85. The violation degrees of all test point pairs and adjacent time periods are summed up to obtain the overall violation degree.

[0039] The minimum test time constraint is calculated based on the sum of the test durations of each test point to ensure that the total test time is minimized. Each test point has a minimum test duration requirement, such as 2 time periods for fast signal test points and 5 time periods for slow signal test points. The actual number of time periods allocated to each test point is calculated through the decision variable, and if it is less than the minimum requirement, it constitutes a violation. For example, if a test point requires a minimum of 3 time periods but is only allocated 1 time period, the violation degree is 2 time periods. At the same time, the optimization goal is to reduce the total test time, i.e. to minimize the total number of time periods required for all test points to complete testing.

[0040] The normalization method is to divide each constraint violation degree by its maximum violation degree. For example, the maximum violation degree of the single-time probe allocation constraint is the probe number x the time period number, i.e. 8 x 64 = 512; the maximum violation degree of the test point correlation constraint is the correlation sum x the time period number; and the maximum violation degree of the minimum test time constraint is the minimum required time sum of all test points. After normalization, the range of each constraint violation degree is between 0 and 1, such as the single-time constraint normalized violation degree is 0.05, the correlation constraint normalized violation degree is 0.12, and the minimum test time constraint normalized violation degree is 0.08.

[0041] The constraint weight determines the importance of each constraint in the optimization process. The initial constraint weight can be set to an equal value, such as the single-time constraint weight 0.33, the correlation constraint weight 0.33, and the minimum time constraint weight 0.34. In the optimization process, the weight is dynamically adjusted according to the violation degree, the constraint weight of the high violation degree is increased, and the constraint weight of the low violation degree is reduced. The weight update is realized by the product of the learning rate and the normalized constraint violation degree. The learning rate controls the speed of weight adjustment, a smaller learning rate such as 0.05 ensures the stability of the optimization process, and a larger learning rate such as 0.2 can accelerate the convergence speed. For example, when the normalized violation degrees are 0.05, 0.12, and 0.08 respectively, the weight adjustment amount is 0.005, 0.012, and 0.008 respectively using the learning rate 0.1 for updating, and the adjusted weights are 0.335, 0.342, and 0.323 respectively. The comprehensive evaluation index of constraint satisfaction is calculated according to the updated constraint weight, which is to subtract the weighted sum of each constraint violation degree and the corresponding weight from 1. For example, the comprehensive evaluation index = 1-(0.05 x 0.335 + 0.12 x 0.342 + 0.08 x 0.323) = 0.918.

[0042] The neighborhood structure of the probe allocation scheme defines how to generate new candidate schemes from the current scheme. The probe allocation time adjustment scheme involves changing the allocation time of a probe, such as changing probe 3 originally allocated to test point 8 in time period 10 to time period 15. The probe and test point re-allocation scheme involves changing the correspondence between a probe and a test point, such as changing probe 2 originally allocated to test point 5 to test point 9. When generating neighborhood schemes, the priorities and correlations of test points are considered. High-priority test points, such as test points in the processor core area, have a higher allocation probability; test points with high correlation are avoided in adjacent time periods. The neighborhood size is related to the problem size, such as 10-20 neighborhood schemes for 8 probes, 32 test points, and 64 time periods. The tabu list records the characteristics of recently visited schemes to avoid the search process from falling into a cycle. The size of the tabu list can be set to 15-20, i.e., the characteristics of the last 15-20 schemes are recorded. The scheme characteristics can be simplified as the combination of key allocation decisions, such as the decision of probe 3 allocated to test point 6 in time period 12 can be represented as (3, 6, 12). When generating a new neighborhood scheme, check if its characteristics are in the tabu list. If they are, skip the scheme unless the evaluation index of the scheme is significantly better than the current optimal scheme. Local optimization uses an iterative improvement strategy based on tabu search. In each iteration, select the scheme with the best evaluation index from the neighborhood schemes and not in the tabu list as the new current scheme, update the tabu list, and continue iteration. For example, the comprehensive evaluation index of the current scheme is 0.918, the best evaluation index in the neighborhood scheme is 0.935, and the scheme is not in the tabu list, then accept the scheme and update the current scheme.

[0043] The optimization convergence degree is the difference between the current scheme evaluation index and the previous round scheme evaluation index. For example, the current evaluation index is 0.935, the previous round is 0.918, and the improvement degree is 0.017. The optimization step size controls the change range of the neighborhood structure. A larger step size allows the scheme to change more, which is beneficial for jumping out of the local optimum; a smaller step size is suitable for fine adjustment, which improves the convergence accuracy. When the improvement degree is large, the step size can be reduced for fine search; when the improvement degree is small or negative, the step size can be increased to jump out of the local optimum. For example, when the improvement degree is 0.017, the step size can be reduced from the initial value 0.2 to 0.15; when the improvement degree is less than 0.005 for 5 consecutive rounds, the step size can be increased to 0.25. The comprehensive evaluation index is used as the optimization basis of the reward function, and the probe allocation strategy is adjusted according to the change of the evaluation index after each iteration.

[0044] The variance of the probe allocation scheme of continuous multiple optimizations is calculated to determine whether the optimization converges. The scheme variance reflects the stability of the results of continuous multiple rounds of optimization. The variance calculation is based on key performance indicators, such as the comprehensive evaluation index, the degree of violation of each constraint, etc. For example, the comprehensive evaluation index values of the last 10 iterations are recorded: 0.918, 0.935, 0.942, 0.946, 0.951, 0.953, 0.955, 0.955, 0.956, 0.956, and the variance of these values is 0.00015. The preset variance threshold is set to 0.0001. When the variance is less than the threshold or the number of continuous optimizations reaches the preset number of iterations (such as 100), it is considered that the optimization has converged, the iteration is stopped, and the current probe allocation strategy is output as the final optimization result. The final optimization result includes the allocation of each probe in each time period, as well as the corresponding constraint satisfaction degree and comprehensive evaluation index. For example, the single-time constraint violation degree of the final scheme is 0.01, the correlation constraint violation degree is 0.03, the minimum time constraint violation degree is 0.02, and the comprehensive evaluation index is 0.956.

[0045] The application effectively solves the complex constraint satisfaction problem of probe resource allocation by establishing a binary decision variable and a dynamic weight adjustment mechanism. The local optimization strategy based on tabu search avoids the search process from falling into local optimum, and improves the quality of the solution.

[0046] In an alternative embodiment, The step of calculating the deviation value of the test response signal relative to the expected signal includes: The test response signal is filtered to obtain a filtered signal, the filtered signal is divided into signal segments according to a preset time window, and an expected signal template is established based on a standard waveform; the root mean square error of the signal segment and the expected signal template is calculated to obtain a time domain deviation, the frequency spectrum of the signal segment and the expected signal template is calculated to obtain a frequency domain deviation, and the delay deviation is calculated based on the cross-correlation function of the signal segment and the expected signal template; The time domain deviation, the frequency domain deviation, and the delay deviation are multiplied by the corresponding weight coefficients and summed to obtain a comprehensive deviation index, and the confidence of the test response signal is calculated based on the comprehensive deviation index; when the confidence is lower than a preset confidence threshold, the sampling parameters are adjusted to reacquire the test response signal, until the confidence is greater than or equal to the preset confidence threshold, and the comprehensive deviation index is output as the deviation value of the test response signal relative to the expected signal.

[0047] For example, for an integrated circuit test signal with a frequency range of 1 MHz to 50 MHz, a band-pass filter can be set with a passband of 0.9 MHz to 55 MHz and a stopband attenuation of 60 dB.

[0048] The filtered signal is divided into signal segments according to a preset time window to facilitate segmented analysis and evaluation. The size of the time window depends on the characteristics of the signal under test, and a minimum window that can contain a complete cycle or feature of the signal is generally selected. For example, for a clock signal, a window containing 10-20 complete cycles can be selected; for a burst signal, a window containing a complete burst process can be selected. In practical applications, if the signal period is 10 ns, a time window of 200 ns can be set, i.e., containing 20 complete cycles. There can be some overlap between signal segments to enhance the continuity of analysis. For example, adjacent signal segments can overlap by 25% of the length, i.e., for a time window of 200 ns, the starting points of adjacent windows differ by 150 ns.

[0049] The standard waveform can be a design target waveform, a theoretical analysis waveform, or a verified high-quality reference waveform. The expected signal template should contain key features of the signal, such as amplitude, frequency, phase, rising edge / falling edge, duty cycle, etc. The construction of the template varies for different types of signals. For example, for a clock signal, the template can be an ideal square wave; for an analog signal, the template can be a sine wave, a triangular wave, etc. The expected signal template should also consider reasonable variation ranges in actual test environments to accommodate inherent errors in testing. For example, the expected signal template can allow a 5% amplitude variation and a 1% phase shift.

[0050] The signal segment and the expected signal template are time-aligned to ensure that they match at the starting point of time; then the square of the difference between the actual value and the expected value is calculated for each sampling point; all the square of the difference is accumulated and divided by the number of sampling points to obtain the average value; finally, the square root of the average value is taken to obtain the root mean square error as the time domain deviation index. The smaller the time domain deviation, the closer the test response signal is to the expected signal in waveform shape. For example, if a signal segment contains 1000 sampling points, the calculated root mean square error is 0.05 V, which indicates that the average deviation of the signal segment in the time domain from the expected signal template is 0.05 V.

[0051] The signal segment and the expected signal template are respectively subjected to spectral analysis to obtain respective frequency components; then the differences of the two at each frequency point are compared, and the amplitude difference of the signal main frequency and its harmonic components is focused on. The frequency domain deviation can be represented as the weighted sum of the amplitude difference at each frequency point, and the weight can be set according to the importance of the frequency. For example, a higher weight can be set for the main frequency and its low-order harmonics, and a lower weight can be set for high-frequency noise components. The frequency domain deviation can effectively identify problems such as frequency distortion, harmonic distortion and noise interference in the signal. For example, if the amplitude of the test response signal at the main frequency of 10 MHz is 5% lower than the expected value, and the second harmonic at 20 MHz is 8% higher than the expected value, it indicates that the signal has nonlinear distortion.

[0052] The cross-correlation function describes the change relationship of the similarity between two signals with time offset, and the correlation coefficient is calculated for the signal segment and the expected signal template at different time offsets; the time offset value that makes the correlation coefficient maximum is found, which is the delay deviation. The delay deviation reflects the time offset of the test response signal relative to the expected signal, which is particularly important for timing-sensitive circuit testing. For example, if the maximum correlation coefficient corresponds to a time offset of 2 ns, it means that the test response signal has a delay of 2 ns relative to the expected signal. In addition to the delay value, the size of the maximum correlation coefficient can also reflect the similarity of the two signals, which can be used as an auxiliary indicator for signal quality evaluation.

[0053] The time domain deviation, the frequency domain deviation and the delay deviation are respectively multiplied by the corresponding weight coefficients and summed to obtain the comprehensive deviation index, and the setting of the weight coefficient depends on the sensitivity of different application scenarios to each type of deviation. For example, for timing-critical circuits, a higher weight, such as 0.5, can be set for the delay deviation; for analog circuits with high waveform quality requirements, a higher weight, such as 0.4, can be set for the time domain deviation; for circuits sensitive to specific frequency response, a higher weight can be set for the frequency domain deviation. The sum of the weight coefficients is usually set to 1 to maintain the numerical scale consistency of the comprehensive deviation index. For example, if the time domain deviation weight is set to 0.4, the frequency domain deviation weight is set to 0.3, and the delay deviation weight is set to 0.3, and if the calculated time domain deviation is 0.05, the frequency domain deviation is 0.08, and the delay deviation is 0.03, then the comprehensive deviation index is 0.05x0.4+0.08x0.3+0.03x0.3=0.053.

[0054] The confidence is an inverse function of the comprehensive deviation index, and the smaller the deviation is, the higher the confidence is. The calculation method can be: mapping the comprehensive deviation index to the confidence range between 0 and 1, for example, confidence = 1-comprehensive deviation index / maximum allowed deviation. The maximum allowed deviation is a threshold set according to the test requirements, indicating the maximum acceptable deviation level. For example, if the maximum allowed deviation is set to 0.2 and the comprehensive deviation index is 0.053, then the confidence = 1-0.053 / 0.2 = 0.735, indicating that the test result has a confidence of 73.5%.

[0055] When the confidence is lower than the preset confidence threshold, the sampling parameters need to be adjusted to reacquire the test response signal. The preset confidence threshold is determined according to the test quality requirements, for example, it can be set to 0.8, indicating that the test result is required to reach at least 80% confidence. The adjustment of the sampling parameters includes multiple aspects: the sampling rate can be increased to improve the time resolution of the signal; the probe position can be adjusted to improve the signal acquisition quality; the sampling time length can be increased to obtain more signal periods to improve the statistical reliability; the filtering parameters can be adjusted to optimize the noise suppression effect. For example, if the initial sampling rate is 100 MSa / s and the confidence is 0.735, which is lower than the preset threshold 0.8, the sampling rate can be increased to 200 MSa / s to reacquire the signal. After adjusting the parameters, the signal is reacquired, and the confidence is calculated again until it reaches or exceeds the preset threshold. When the confidence meets the requirements, the comprehensive deviation index is output as the deviation value of the test response signal relative to the expected signal, which can be used for subsequent chip performance evaluation and good product screening.

[0056] The present application adopts an adaptive sampling strategy to dynamically adjust the test parameters according to the confidence, ensuring the reliability of the test results.

[0057] In an optional implementation, The step of determining a fault test point according to the deviation value and analyzing the affected degree of a test node connected to the fault test point based on the circuit connection relationship to obtain a test priority level of the test node includes: The deviation value is constructed into a deviation feature vector containing time domain, frequency domain, delay and amplitude, and the deviation feature vector is weighted with a deviation weight coefficient after being standardized to obtain a fault score, and the fault test point is determined based on the fault score; The conductance coupling coefficient and the mutual inductance coupling coefficient between the fault test point and adjacent test nodes are calculated, the conductance coupling coefficient and the mutual inductance coupling coefficient are multiplied by a coupling weight coefficient respectively and summed to obtain a coupling coefficient matrix, and the first-order influence intensity of the fault test point on the adjacent test nodes is calculated based on the coupling coefficient matrix; According to the connection distance between the test nodes, a path attenuation factor is calculated, the product of the first-order influence strength and the path attenuation factor is taken as a propagation influence strength, the influence strength of different orders is multiplied by the corresponding influence weight coefficient and summed to obtain a total influence degree of the test node; The total influence degree is divided by the maximum total influence degree to obtain a basic priority, a timing adjustment coefficient is calculated according to the waiting time of the test node, and the product of the basic priority and the timing adjustment coefficient is taken as a test priority level of the test node; The accuracy of the test priority level is calculated, and the deviation weight coefficient, the coupling weight coefficient and the influence weight coefficient are adjusted according to the change of the accuracy until the accuracy is greater than a preset accuracy threshold.

[0058] For example, in combination with Figure 2 The fault test point determination and test priority dynamic calculation flowchart based on deviation analysis are described: the deviation feature vector contains four dimensions: the time domain deviation reflects the waveform shape difference, the frequency domain deviation reflects the frequency component difference, the delay deviation reflects the timing synchronization difference, and the amplitude deviation reflects the signal strength difference. For example, the deviation feature vector of a certain test point is [0.05, 0.08, 2.5ns, 0.12], which respectively represents that the root mean square deviation in the time domain is 0.05, the frequency domain spectrum deviation is 0.08, the delay deviation is 2.5 nanoseconds, and the amplitude deviation is 0.12. The standardization method is to divide the deviation value of each dimension by the maximum allowed deviation value of the dimension, so that the value range of each dimension after standardization is unified to 0 to 1. For example, the maximum allowed time domain deviation is 0.2, the frequency domain deviation is 0.3, the delay deviation is 10ns, and the amplitude deviation is 0.5. The standardized deviation feature vector is [0.25, 0.27, 0.25, 0.24]. The standardized feature vector is weighted with the preset deviation weight coefficient to obtain a fault score. The deviation weight coefficient reflects the importance of different types of deviations on fault judgment. For example, the deviation weight coefficient can be set to [0.3, 0.25, 0.25, 0.2], and the fault score is 0.25x0.3+0.27x0.25+0.25x0.25+0.24x0.2=0.253. The test point with a fault score exceeding a preset threshold (such as 0.2) is determined as a fault test point.

[0059] For the fault test point and adjacent test nodes, the conductance coupling coefficient reflects the direct electrical connection relationship, which can be calculated according to the resistance of the shared wire, the connection mode, etc. For example, if test point A and test point B are connected by a wire with a resistance of 10 ohms, and the reference resistance of the circuit is 100 ohms, the conductance coupling coefficient between them can be calculated as 0.1. The mutual inductance coupling coefficient reflects the electromagnetic induction relationship, and the calculation method is: the parallel wire spacing is d, the parallel length is l, the wire diameter is r, and the mutual inductance M = μ0l / (2π) × [ln(2l / d)-0.75], where μ0 is the vacuum permeability 4π×10 -7 H / m. For a spacing of 0.1 mm, a parallel length of 5 mm, and a wire diameter of 0.05 mm, the calculation gives M = 1.15 nH, and the mutual inductance coefficient is 0.05 after dividing by the standardization factor. The conductance coupling coefficient and the mutual inductance coupling coefficient are multiplied by the coupling weight coefficient and summed to obtain the comprehensive coupling coefficient matrix. The coupling weight coefficient depends on the circuit operating frequency and signal characteristics. For example, in a high-frequency circuit, the weight of mutual inductance coupling is high, such as conductance weight 0.6 and mutual inductance weight 0.4; in a low-frequency circuit, the weight of conductance coupling is high, such as conductance weight 0.8 and mutual inductance weight 0.2. The coupling coefficient matrix is an N × N matrix (N is the number of test nodes), and each element in the matrix represents the comprehensive coupling strength between the corresponding two test nodes. Based on the coupling coefficient matrix, the first-order influence strength of the fault test point on the adjacent test nodes is calculated, that is, the degree of influence on the test nodes directly affected by the fault test point. For example, if the coupling coefficient between fault test point F and test node G is 0.15, then the first-order influence strength of F on G is 0.15.

[0060] The connection distance between test nodes can be a topological distance (number of nodes passed) or a physical distance (actual wiring length). The path decay factor usually exponentially decays with distance, for example, the decay factor can be set as 0.7 power of distance, if the distance between two nodes is 2, the decay factor is 0.7 square, i.e. 0.49. The product of the first-order influence strength and the path decay factor is taken as the propagation influence strength, which is used to calculate the multi-order influence strength of the fault test point on non-adjacent test nodes. The multi-order influence strength represents the degree of influence of the fault propagating through multiple intermediate nodes to the remote node. For example, if the first-order influence strength of the fault test point F on node G is 0.15, the first-order influence strength of G on node H is 0.2, and the path decay factor between F and H is 0.49, then the second-order influence strength of F on H can be calculated as 0.15x0.2x0.49=0.0147. Similarly, the influence strength of higher orders such as three orders, four orders, etc. can be calculated. The influence strengths of different orders are multiplied by the corresponding influence weight coefficients and summed to obtain the total influence degree of the test node. The influence weight coefficient reflects the importance of different orders of influence, and the weight of high-order influence is usually low, for example, the first-order influence weight can be set as 0.6, the second-order influence weight as 0.3, and the third-order influence weight as 0.1. If a test node receives a first-order influence of 0.15, a second-order influence of 0.03, and a third-order influence of 0.01, the total influence degree is 0.15x0.6+0.03x0.3+0.01x0.1=0.1x0.6+0.03x0.3+0.01x0.1=0.099.

[0061] The total influence degree is divided by the maximum total influence degree to obtain the basic priority, so that the priority of each node is between 0 and 1, facilitating comparison and sorting. The maximum total influence degree is the maximum value of the total influence degrees of all nodes in the current test period, which is calculated by comparing all nodes, or can be set as the theoretically maximum influence value. For example, if the maximum total influence degree is 0.25 and the total influence degree of a node is 0.099, the basic priority of the node is 0.099 / 0.25=0.396. A timing adjustment coefficient is calculated according to the waiting time of the test node to prevent low-priority nodes from being tested for a long time. The waiting time refers to the number of time periods elapsed since the last test of the node. The timing adjustment coefficient is designed as an increasing function of the waiting time, for example, expressed as 1 plus the product of the waiting time and a time factor. If the time factor is set as 0.05, a node has been waiting for 10 time periods, then the timing adjustment coefficient is 1+10x0.05=1.5. The product of the basic priority and the timing adjustment coefficient is taken as the test priority level of the test node, which takes into account both fault influence and timing fairness. For example, if the basic priority is 0.396 and the timing adjustment coefficient is 1.5, the test priority level is 0.396x1.5=0.594. Nodes with high test priority levels will be prioritized for testing.

[0062] The accuracy of the test priority level is obtained by comparing the consistency of the current priority ranking with the actual fault distribution. For example, using historical fault data or expert experience to label the true priority as a reference, the consistency ratio of the current priority ranking with the reference ranking is calculated. If 16 out of the top 20 high-priority nodes are consistent with the reference ranking, the accuracy is 80%. The deviation weight coefficient, coupling weight coefficient, and influence weight coefficient are adjusted according to the change of the accuracy to optimize the priority allocation effect. The adjustment method uses the gradient descent method to gradually find the parameter combination that maximizes the accuracy. For example, if the current accuracy is 80%, the accuracy is increased to 82% by adjusting the deviation weight coefficient from [0.3, 0.25, 0.25, 0.2] to [0.35, 0.25, 0.2, 0.2], then the new weight coefficient is used. Adjust each parameter continuously until the accuracy is greater than the preset accuracy threshold (such as 85%) or the maximum number of iterations is reached.

[0063] For example, taking a 32-node integrated circuit as an example, the deviation feature vector of node 7 is found to be [0.08, 0.12, 3.5ns, 0.15] during testing, and after standardization, it is [0.4, 0.4, 0.35, 0.3], and the weighted fault score is 0.367, which exceeds the threshold 0.2, and is determined as a fault test point. The coupling coefficient of node 7 and the adjacent nodes is calculated, and the conductance coupling with node 9 is 0.22, the mutual inductance coupling is 0.05, and the comprehensive coupling coefficient is 0.22x0.7+0.05x0.3=0.169. Similarly, the coupling coefficients with other adjacent nodes are calculated to form a coupling coefficient matrix. Based on the coupling coefficient, the first-order influence intensity of node 7 on adjacent nodes is calculated, such as the first-order influence on node 9 is 0.169. The multi-order influence of non-adjacent nodes is calculated, such as the coupling coefficient of node 9 and node 15 is 0.14, the path attenuation factor of node 7 to node 15 is 0.7 squared=0.49, then the second-order influence of node 7 on node 15 is 0.169x0.14x0.49=0.0116. The total influence degree of each node is obtained by integrating the influence of each order, such as the total influence degree of node 9 is 0.169x0.6+0.03x0.3+0.005x0.1=0.1143. Assuming that the maximum total influence degree is 0.2, then the base priority of node 9 is 0.1143 / 0.2=0.5715. If node 9 has been waiting for 8 time periods, the timing adjustment coefficient is 1+8x0.05=1.4, then the final test priority level is 0.5715x1.4=0.8001. The priority levels of all nodes are calculated in this way, and the test order is arranged according to the priority.

[0064] The application establishes a fault scoring mechanism based on multi-dimensional deviation characteristics and an influence propagation mechanism considering the influence of circuit topology structure, and can accurately identify fault test points and quantify the influence degree of the fault test points on surrounding nodes. By introducing a timing adjustment mechanism, test efficiency and fairness are considered, and low-priority nodes are avoided from being ignored for a long time. The parameter adaptive adjustment strategy ensures the accuracy and adaptability of priority allocation, improves the test coverage and fault detection rate, reduces the waste of test resources, and provides an efficient and reliable node priority sorting method for integrated circuit testing.

[0065] In an optional embodiment, According to the connection distance between test nodes, a path attenuation factor is calculated, and the product of the first-order influence strength and the path attenuation factor is taken as a propagation influence strength. Based on the propagation influence strength, the multi-order influence strength of the fault test point on non-adjacent test nodes is calculated. The shortest physical connection path length between test nodes is calculated. The frequency characteristics of the test response signal are obtained, and a frequency-dependent attenuation coefficient is calculated according to the frequency characteristics. The product of the frequency-dependent attenuation coefficient and the shortest physical connection path length is taken as a basic attenuation value. A branch loss value is calculated according to the number of branches of the propagation path. The basic attenuation value and the branch loss value are combined to obtain a path attenuation factor. The equivalent resistance value of the propagation path is calculated, and the path propagation weight is determined based on the equivalent resistance value. The product of the first-order influence strength, the path attenuation factor and the path propagation weight is taken as a propagation influence strength. The effective path of influence propagation is determined according to the propagation influence strength. For each non-adjacent test node, the influence strength propagated from adjacent nodes is calculated based on the propagation influence strength. The influence strengths propagated from all adjacent nodes are superimposed to obtain the influence strength of the current order. When the influence strength of the current order is less than one-tenth of the influence strength of the previous order, the calculation is stopped, and the multi-order influence strength is obtained.

[0066] For example, the length of the physical connection path between test nodes can be obtained from circuit layout information, expressed as the actual wire length in microns or nanometers. In actual implementation, a connection graph can be constructed based on the circuit netlist and layout data, and the shortest path algorithm can be used to calculate the shortest physical distance between any two test nodes. For example, in a certain integrated circuit, the shortest physical connection path length between node A and node B is 250 microns, and the shortest physical connection path length between node B and node C is 180 microns. Therefore, the length of a path between node A and node C is 430 microns. If there is another path, such as node A connecting to node C through node D, the path length is 390 microns. Therefore, the shortest physical connection path length between node A and node C is 390 microns. For complex circuits, the shortest path can be calculated using the breadth-first search or Dijkstra algorithm to ensure the accuracy of the path length calculation.

[0067] The frequency characteristics are obtained by performing spectral analysis on the test response signal, including the main frequency, bandwidth, harmonic components, etc. Signals of different frequencies have different attenuation characteristics during propagation, and high-frequency signals usually attenuate faster. The frequency-dependent attenuation coefficient can be expressed as an increasing function of frequency, for example, by setting the attenuation coefficient as the main frequency value divided by the reference frequency value and multiplied by the attenuation base. Assuming that the main frequency of the signal is 100 MHz, the reference frequency is 10 MHz, and the attenuation base is 0.05, then the frequency-dependent attenuation coefficient is 100 / 10 x 0.05 = 0.5. For complex signals containing multiple frequency components, a weighted average attenuation coefficient can be calculated, and the weight is related to the energy proportion of each frequency component. For example, if the signal contains 60% of 50 MHz component and 40% of 150 MHz component, the reference frequency is 10 MHz, and the attenuation base is 0.05, then the weighted average attenuation coefficient is (50 / 10 x 0.05 x 0.6) + (150 / 10 x 0.05 x 0.4) = 0.15 + 0.3 = 0.45.

[0068] The product of the frequency-dependent attenuation coefficient and the shortest physical connection path length is taken as the basic attenuation value, which can be understood as the total attenuation amount of the signal when it propagates along a straight line. For example, if the frequency-dependent attenuation coefficient is 0.45 and the shortest physical connection path length is 390 microns, the basic attenuation value is 0.45 x 390 / 1000 = 0.1755. The larger the basic attenuation value, the more serious the signal attenuation. In actual circuits, signals not only propagate along straight lines but also branch at branch points, resulting in additional attenuation. The branch loss value is calculated according to the number of branches of the propagation path, and can be represented as the product of the number of branches and the branch loss coefficient. The branch loss coefficient depends on the branch characteristics and is usually between 0.1 and 0.3. For example, if there are 2 branch points on the path and the branch loss coefficient is 0.2, the branch loss value is 2 x 0.2 = 0.4. The path attenuation factor is obtained by combining the basic attenuation value and the branch loss value, which can be done by adding the product of the basic attenuation value and 1 plus the branch loss value, or taking the negative exponential of the sum of the two. Using the former method, if the basic attenuation value is 0.1755 and the branch loss value is 0.4, the path attenuation factor is 0.1755 x (1 + 0.4) = 0.2457.

[0069] The equivalent resistance value of the propagation path is calculated based on the circuit topology and element parameters, representing the total resistance through which the signal propagates from the source node to the target node. In a simplified model, it can be assumed that each unit length of wire has a fixed resistance value, such as 0.1 ohms / 100 microns, so the equivalent resistance of a path with a length of 390 microns is 0.39 ohms. Considering the resistance, capacitance, and other elements present on the path, the actual equivalent resistance value is larger. For example, if the path also contains a 10 ohm resistor and an element with an equivalent resistance of 5 ohms, the total equivalent resistance is 0.39 + 10 + 5 = 15.39 ohms. The path propagation weight is determined based on the equivalent resistance value, which is inversely proportional to the equivalent resistance and can be represented as the reference resistance value divided by the equivalent resistance value. If the reference resistance value is 20 ohms and the equivalent resistance is 15.39 ohms, the path propagation weight is 20 / 15.39 = 1.3. The smaller the equivalent resistance value, the larger the propagation weight, indicating that the path contributes more to signal propagation.

[0070] The product of the first-order influence strength, path attenuation factor, and path propagation weight is taken as the propagation influence strength, for example, if the first-order influence strength of the fault test point on the adjacent node is 0.8, the path attenuation factor is 0.2457, and the path propagation weight is 1.3, the propagation influence strength is 0.8 x 0.2457 x 1.3 = 0.2556. Paths with a propagation influence strength greater than a preset threshold (such as 0.1) are determined to be effective paths that affect propagation. Effective paths are paths through which fault influences can be significantly propagated, and screening effective paths can reduce computational complexity and improve analysis efficiency.

[0071] For each non-adjacent test node, the influence strength propagated from adjacent nodes is calculated based on the propagation influence strength, and the influence strengths propagated from all adjacent nodes are superimposed to obtain the influence strength of the current order. This step realizes the layer-by-layer propagation calculation of multi-order influence. For non-adjacent node D, all nodes directly connected to D and adjacent to fault test point F, such as node B and node C, are investigated. The influence strength of F propagated to D through B is calculated, that is, the first-order influence strength of F on B multiplied by the propagation influence strength of B to D. Similarly, the influence strength of F propagated to D through C is calculated. These influence strengths are superimposed to obtain the second-order influence strength of F on D. For example, if the first-order influence strength of F on B is 0.8, the propagation influence strength of B to D is 0.3, the first-order influence strength of F on C is 0.6, and the propagation influence strength of C to D is 0.4, then the second-order influence strength of F on D is 0.8*0.3+0.6*0.4=0.24+0.24=0.48. When the influence strength of the current order is less than one-tenth of the influence strength of the previous order, the calculation is stopped, and the multi-order influence strength is obtained. This termination condition is based on the characteristic that the influence strength rapidly decays with the increase of the propagation order, avoiding unnecessary calculation. The multi-order influence strength is the sum of the influence strengths of each order, including direct influence (first order) and indirect influence (second order and above). For example, continue the above case, the third-order influence strength of F on E is calculated. If the propagation influence strength of D to E is 0.5, then the third-order influence strength of F propagated to E through D is 0.48*0.5=0.24. If the second-order influence strength of F on E is 2.5, then the third-order influence strength 0.24 is less than one-tenth of the second-order influence strength (2.5 / 10=0.25), and the calculation of higher-order influence is stopped. The multi-order influence strength of F on E is the sum of the influence strengths of each order, if the first order is 0, the second order is 2.5, and the third order is 0.24, then the multi-order influence strength is 0+2.5+0.24=2.74.

[0072] Taking an integrated circuit with 64 test nodes as an example, assuming that node 18 is determined as a fault test point, the multi-order influence strength of node 18 on other nodes needs to be calculated. Node 18 is directly adjacent to node 23, node 31 and node 42, and the first-order influence strength is 0.75, 0.62 and 0.58 respectively. When calculating the influence of node 18 on non-adjacent node 27, the propagation path from node 18 to node 27 needs to be analyzed. Node 23 and node 42 are directly connected to node 27, constituting two paths from node 18 to node 27. The physical connection length from node 18 to node 23 is 120 microns, and the physical connection length from node 23 to node 27 is 150 microns, constituting a path with a total length of 270 microns; the physical connection length from node 18 to node 42 is 180 microns, and the physical connection length from node 42 to node 27 is 80 microns, constituting a path with a total length of 260 microns. The path 18-42-27 is slightly shorter, which is the shortest physical connection path. If the main frequency of the test response signal is 80 MHz, the calculated frequency-dependent attenuation coefficient is 0.4, then the basic attenuation value is 0.4*260 / 1000=0.104. There is 1 branch point on the path, and the branch loss coefficient is 0.2, so the branch loss value is 0.2*1=0.2, and the path propagation weight is 15 / 12=1.25. The first-order influence strength of node 18 on node 42 is 0.58, so the propagation influence strength through the path 18-42-27 is 0.58*0.1248*1.25=0.09048. Similarly, the propagation influence strength of the path 18-23-27 is 0.75*0.135*1.2=0.1215. Therefore, the second-order influence strength of node 18 on node 27 is 0.09048+0.1215=0.21198. Continue to calculate higher-order influences until the termination condition is met to obtain the multi-order influence strength of node 18 on node 27.

[0073] The multi-order influence calculation method of the present application effectively captures the cascade propagation effect of faults in complex circuits, and the intelligent termination condition optimizes the calculation efficiency, realizes the accurate quantization of fault influence propagation, provides a reliable basis for test node priority ranking, significantly improves the pertinence and efficiency of integrated circuit testing, reduces test blind spots, and enhances fault detection capability and circuit reliability evaluation level.

[0074] In an alternative embodiment, The step of adjusting the test timing schedule table according to the test priority level and preferentially allocating the physical probe to the test node with high priority level comprises: The occupation states of the probes in each time window are counted, and schedulable time periods of the physical probes are calculated based on the occupation states; the test nodes are sorted according to test priority levels of the test nodes, and the test nodes are sequentially assigned to the schedulable time periods in a descending order of the priority levels; when a time period conflict occurs, a test node with a low priority is postponed to a subsequent available time period; a switch control timing sequence of the controllable switch unit is generated based on a connection relationship between each controllable switch unit and the test nodes, and the test timing arrangement table is updated based on the switch control timing sequence.

[0075] For example, the occupation states of the probes in each time window are counted, and the time window refers to a basic time unit in a test process, usually in units of microseconds or nanoseconds. The probe occupation state represents the use of each physical probe in each time window, which can be represented by a binary flag, 1 indicating that it has been occupied, and 0 indicating that it is available. For example, for a test unit with 8 physical probes, an 8xT occupation state matrix can be constructed, where T is the total number of time windows. Assuming that there are 8 probes P1 to P8, the test is divided into 10 time windows T1 to T10, and initially P1 has been occupied in T1 to T3 time windows, P2 has been occupied in T2 to T4 time windows, and the remaining probes and time windows are available. The schedulable time periods of the physical probes are calculated based on the occupation states, that is, the continuous available time periods of each probe are calculated. For example, the schedulable time period of probe P1 is [T4-T10], the schedulable time period of probe P2 is [T1-T1] and [T5-T10], and so on. At the same time, the test duration required by each test node is considered, for example, a certain test node needs to complete the test in 3 continuous time windows, so only the probes with a continuous available time period greater than or equal to 3 can be assigned to the node.

[0076] The test nodes are sorted according to test priority levels of the test nodes, and the test nodes are sequentially assigned to the schedulable time periods in a descending order of the priority levels. For example, there are 5 test nodes N1 to N5 to be tested, and the test priority levels of the test nodes are 0.95, 0.82, 0.76, 0.58, and 0.43, respectively. The sorted order is N1, N2, N3, N4, and N5. For the node N1 with the highest priority, assuming that the test needs 2 continuous time windows, the earliest available time period is first searched in the schedulable time period. If probe P3 is available in T1-T5 time period, N1 can be assigned to T1-T2 time period of P3. For the node N2 with the second priority, assuming that the test needs 3 continuous time windows, N2 can be assigned to T1-T3 time period of probe P4. In this way, all nodes are assigned or there is no available resource.

[0077] When a time period conflict occurs, a low-priority test node is postponed to a subsequent available time period. A time period conflict refers to that the required time period of a current node has been occupied by a high-priority node. For example, node N3 requires testing in the T2-T4 time period, but probe P5 is only continuously available in the T1-T3 time period, at which time other probes need to be found or the testing time is postponed. If probe P6 is available in the T2-T6 time period, N3 can be assigned to the T2-T4 time period of P6; if all probes are unavailable in the T2-T4 time period, N3 needs to be postponed to a subsequent available time period, such as the T5-T7 time period of P5. For nodes N4 and N5 with lower priorities, the assignment is also performed according to the same principle. If a node cannot be assigned after being postponed for multiple times, a maximum number of postponements can be set, and if the number of postponements exceeds the maximum number, the node is marked as "unable to schedule" and waits for the next round of testing.

[0078] The controllable switch unit is an electronic switch connecting the physical probe and the test node, and the connection of the probe and the different test nodes is realized by controlling the opening and closing states of the switch. It is assumed that there are four controllable switch units S1 to S4, and each switch unit can connect two test nodes. S1 connects nodes N1 and N2, S2 connects nodes N2 and N3, S3 connects nodes N3 and N4, and S4 connects nodes N4 and N5. According to the probe assignment result, a switch control timing sequence is generated. For example, if node N1 is assigned to the T1-T2 time period of probe P3, S1 needs to open the N1 channel in the T1-T2 time period; if node N2 is assigned to the T1-T3 time period of probe P4, S1 needs to open the N2 channel in the T1-T3 time period, and S2 needs to open the N2 channel in the T1-T3 time period. Based on the switch control timing sequence, a test timing arrangement table is updated to obtain a complete test plan. The test timing arrangement table contains the working state of each probe, the connected test node, and the control signal of the switch unit in each time window. For example, in the time window T1, probe P3 connects node N1, and the N1 channel of switch S1 is opened; probe P4 connects node N2, and the N2 channels of switches S1 and S2 are opened; the states of the remaining probes and switches remain unchanged. The updated test timing arrangement table will guide the automatic test equipment to perform the test operation, and ensure that the test is performed in the optimized order.

[0079] The present application realizes the optimized allocation of test resources by counting the probe occupation state, priority sorting, conflict resolution, and switch control timing sequence generation, ensures that the high-priority nodes are tested in time, and improves the test efficiency and the detection rate of critical faults.

[0080] In a second aspect, a multifunctional test point allocation system based on an adaptive switch matrix is provided, which comprises: A first unit is configured to acquire circuit topology information of an integrated circuit to be tested, wherein the circuit topology information comprises a circuit connection relationship. a second unit configured to construct an adaptive switch matrix according to the circuit topology information, the adaptive switch matrix comprising a plurality of controllable switch units for connecting the physical probes and the logical test points; based on a time-division multiplexing manner, the same physical probe is assigned to different logical test points by controlling the switch states of the controllable switch units in different time periods, and a test timing arrangement table is generated; a third unit configured to collect test response signals of the logical test points, calculate deviation values of the test response signals relative to expected signals, determine a faulty test point according to the deviation values, analyze an affected degree of a test node connected to the faulty test point based on the circuit connection relationship, obtain a test priority level of the test node, adjust the test timing arrangement table according to the test priority level, preferentially assign the physical probe to the test node with a high priority level, obtain an updated test timing arrangement table, control switch states of the controllable switch units, and realize dynamic allocation of the test points.

[0081] In a third aspect, a computer readable storage medium is provided, and computer program instructions are stored on the computer readable storage medium. When the computer program instructions are executed by a processor, the foregoing method is implemented.

Claims

1. A multi-functional test point allocation method based on an adaptive switch matrix, characterized in that, The method comprises the following steps: Obtaining circuit topology information of a to-be-tested integrated circuit, wherein the circuit topology information comprises a circuit connection relationship; Constructing an adaptive switch matrix according to the circuit topology information, wherein the adaptive switch matrix comprises a plurality of controllable switch units and is used for connecting a physical probe and a logical test point; Based on a time division multiplexing mode, the same physical probe is allocated to different logical test points in different time periods by controlling the switch state of the controllable switch unit, and a test timing arrangement table is generated; Collecting a test response signal of the logical test point, calculating a deviation value of the test response signal relative to an expected signal, determining a fault test point according to the deviation value, and analyzing the influence degree of a test node connected with the fault test point based on the circuit connection relationship to obtain a test priority level of the test node; According to the test priority level, the test timing arrangement table is adjusted, the physical probe is preferentially allocated to the test node with a high priority level, an updated test timing arrangement table is obtained, the switch state of each controllable switch unit is controlled, and dynamic allocation of the test point is realized.

2. The method of claim 1, wherein, The step of generating a test timing arrangement table by controlling the switch state of the controllable switch unit and allocating the same physical probe to different logical test points in different time periods comprises the following steps: Obtaining a feature vector of a logical test point, calculating a correlation matrix between test points according to the feature vector of the logical test point, constructing a probe allocation state space based on the correlation matrix, wherein the probe allocation state space comprises a probe allocation state, a resource constraint condition and a test quality index; constructing a probe allocation action space, wherein the probe allocation action space comprises a probe number, a test point number and an allocation time period; According to the probe allocation state space and the probe allocation action space, a reward function is constructed, wherein the reward function comprises a test coverage reward item, a test quality reward item and a constraint violation penalty item; based on the reward function, a probe allocation strategy is iteratively optimized, and the probe allocation strategy satisfies a single-time probe allocation constraint, a test point correlation constraint and a minimum test time constraint; Collecting a response signal of a test point, calculating a test quality evaluation value; when the test quality evaluation value is lower than a preset evaluation threshold, updating a weight parameter in the reward function based on a gradient descent method, and re-executing the iterative optimization of the probe allocation strategy; according to the optimized probe allocation strategy, a test timing arrangement table is generated.

3. The method of claim 2, wherein, The step of iteratively optimizing the probe allocation strategy based on the reward function, wherein the probe allocation strategy satisfies the single-time probe allocation constraint, the test point correlation constraint and the minimum test time constraint, comprises the following steps: A binary decision variable of the single-time probe allocation constraint is established, wherein the binary decision variable represents the allocation relationship between the probe and the test point at each time; the violation degree of the test point correlation constraint is calculated based on the binary decision variable, the constraint violation degrees are normalized to obtain a normalized constraint violation degree, the constraint weight is dynamically updated based on the normalized constraint violation degree, the update of the constraint weight is realized by the product of a learning rate and the normalized constraint violation degree, and a comprehensive evaluation index of the constraint satisfaction degree is calculated according to the constraint weight; A neighborhood structure of a probe distribution scheme is constructed, the neighborhood structure including a probe distribution time adjustment scheme and a probe and test point re-distribution scheme, a history scheme is recorded to form a tabu table, and the probe distribution scheme is locally optimized based on the tabu table; An optimization convergence degree is calculated according to the comprehensive evaluation index, and an optimization step is dynamically adjusted based on the optimization convergence degree, and the comprehensive evaluation index is taken as an optimization basis of the reward function; A variance of the probe distribution scheme of continuous multiple optimizations is calculated, and when the variance is less than a preset variance threshold or a continuous optimization number reaches a preset iteration number, an optimization result of the probe distribution strategy is determined.

4. The method of claim 1, wherein, The step of calculating the deviation value of the test response signal relative to the expected signal includes: The test response signal is filtered to obtain a filtered signal, the filtered signal is divided into signal segments according to a preset time window, and an expected signal template is established based on a standard waveform; a root mean square error of the signal segment and the expected signal template is calculated to obtain a time domain deviation, a spectrum of the signal segment and the expected signal template is calculated to obtain a frequency domain deviation, and a delay deviation is calculated based on a cross-correlation function of the signal segment and the expected signal template; The time domain deviation, the frequency domain deviation and the delay deviation are respectively multiplied by corresponding weight coefficients and summed to obtain a comprehensive deviation index, and a confidence degree of the test response signal is calculated based on the comprehensive deviation index; when the confidence degree is lower than a preset confidence threshold, a sampling parameter is adjusted to reacquire the test response signal, and the comprehensive deviation index is output as the deviation value of the test response signal relative to the expected signal.

5. The method of claim 1, wherein, The step of determining a fault test point according to the deviation value and analyzing an affected degree of a test node connected to the fault test point based on the circuit connection relationship to obtain a test priority level of the test node includes: The deviation value is constructed as a deviation feature vector, the deviation feature vector is standardized and weighted with a deviation weight coefficient to obtain a fault score, and the fault test point is determined based on the fault score; An electric conductance coupling coefficient and a mutual inductance coupling coefficient between the fault test point and adjacent test nodes are calculated, the electric conductance coupling coefficient and the mutual inductance coupling coefficient are respectively multiplied by coupling weight coefficients and summed to obtain a coupling coefficient matrix, and a first-order influence intensity of the fault test point on the adjacent test nodes is calculated based on the coupling coefficient matrix; A path attenuation factor is calculated according to a connection distance between the test nodes, a product of the first-order influence intensity and the path attenuation factor is taken as a propagation influence intensity, and a multi-order influence intensity of the fault test point on non-adjacent test nodes is calculated based on the propagation influence intensity, different orders of influence intensities are multiplied by corresponding influence weight coefficients and summed to obtain a total influence degree of the test node; The total influence degree is divided by a maximum total influence degree to obtain a basic priority, a timing adjustment coefficient is calculated according to a waiting time of the test node, and a product of the basic priority and the timing adjustment coefficient is taken as a test priority level of the test node; An accuracy rate of the test priority level is calculated, and the deviation weight coefficient, the coupling weight coefficient and the influence weight coefficient are adjusted according to a change of the accuracy rate.

6. The method of claim 5, wherein, The step of calculating the multi-order influence strength of the fault test point on non-adjacent test nodes based on the propagation influence strength includes: calculating the shortest physical connection path length between test nodes; obtaining the frequency characteristics of the test response signal, calculating the frequency-dependent attenuation coefficient based on the frequency characteristics, taking the product of the frequency-dependent attenuation coefficient and the shortest physical connection path length as the basic attenuation value, calculating the branch loss value based on the number of branches of the propagation path, and combining the basic attenuation value and the branch loss value to obtain the path attenuation factor; calculating the equivalent resistance value of the propagation path, determining the path propagation weight based on the equivalent resistance value, and taking the product of the first-order influence strength, the path attenuation factor and the path propagation weight as the propagation influence strength; for each non-adjacent test node, calculating the influence strength propagated from adjacent nodes based on the propagation influence strength, and superimposing the influence strengths propagated by all adjacent nodes to obtain the influence strength of the current order.

7. The method of claim 1, wherein, The step of adjusting the test timing arrangement table according to the test priority level and preferentially allocating the physical probe to the test node with high priority includes: statistically analyzing the occupation state of the probe in each time window, calculating the schedulable time period of the physical probe based on the occupation state, sorting the test nodes according to the test priority level of the test nodes, and sequentially allocating the test nodes to the schedulable time period in the order of priority level from high to low; based on the connection relationship between each controllable switching unit and the test node, generating the switching control timing of the controllable switching unit, and updating the test timing arrangement table based on the switching control timing.

8. A multi-functional test point allocation system based on an adaptive switch matrix for implementing the method according to any one of the preceding claims 1 to 7, characterized in that, comprise: a first unit configured to obtain circuit topology information of an integrated circuit under test, the circuit topology information comprising circuit connection relationships; a second unit configured to construct an adaptive switching matrix based on the circuit topology information, the adaptive switching matrix comprising a plurality of controllable switching units for connecting physical probes and logical test points; based on time division multiplexing, the same physical probe is allocated to different logical test points by controlling the switching state of the controllable switching unit in different time periods, and a test timing arrangement table is generated; a third unit configured to collect test response signals of the logical test points and calculate deviation values of the test response signals relative to expected signals; determine a fault test point based on the deviation values, analyze the affected degree of a test node connected to the fault test point based on the circuit connection relationship, and obtain a test priority level of the test node; adjust the test timing arrangement table according to the test priority level, preferentially allocate the physical probe to the test node with high priority, obtain an updated test timing arrangement table, control the switching state of each controllable switching unit, and realize dynamic allocation of test points.

9. A computer-readable storage medium having stored thereon computer program instructions, wherein, The computer program instructions, when executed by a processor, implement the method of any one of claims 1 to 7. The computer program instructions, when executed by a processor, implement the method of any one of claims 1 to 7.

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