Multifunctional logic device based on double ferroelectric coupling interfaces and preparation method thereof
By constructing an ε-Ga2O3/Al1-xScxN dual ferroelectric heterostructure in ferroelectric logic devices, the problems of limited polarization states and insufficient reliability in existing technologies are solved. This enables polymorphic non-volatile storage and logic expression, improves the stability and integration of the devices, and is suitable for low-power, high-density logic chips.
Patent Information
- Application Number
- CN202511628162.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-07
- Publication Date
- 2026-02-06
AI Technical Summary
Existing ferroelectric logic devices have limitations in polarization state control, functional integration, polarization interaction control, and silicon-based process compatibility, making it difficult to meet the requirements of high-density, low-power, and reconfigurable logic units, and the devices lack reliability and stability.
Using ε-Ga2O3 as the lower ferroelectric material and Al1-xScxN as the upper ferroelectric material, a double ferroelectric heterostructure is formed by stacking. Combined with interface engineering and annealing process, a multi-polar stable state multifunctional logic device is constructed to realize multi-state non-volatile storage and logic expression.
It achieves multi-polarity state control, improves the device's information density, functional reconfigurability, polarization stability and fatigue resistance, reduces power consumption, is suitable for stable operation under high temperature and high frequency conditions, and is compatible with existing CMOS processes.
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Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the technical field of the integration of semiconductor electronic devices and ferroelectric materials, and particularly relates to a multifunctional logic device based on a double-ferroelectric coupling interface constructed by epsilon-phase gallium oxide (epsilon-Ga2O3) and scandium-doped aluminum nitride (Al 1-x Sc x N) and a preparation method thereof, and belongs to the category of novel nonvolatile storage and logic integrated devices, and is suitable for the manufacturing of high-integration, low-power-consumption and reconfigurable computing chips. BACKGROUND
[0002] With the integrated circuit technology entering the post-moore era, the traditional silicon-based complementary metal-oxide semiconductor (CMOS) logic devices are facing challenges such as physical size limit, power consumption bottleneck and low data transfer efficiency. In order to break through the limitations of the "storage-operation separation" architecture, new logic-storage integrated devices have become a research focus.
[0003] At present, nonvolatile memory devices based on ferroelectric materials have attracted widespread attention in academia and industry; among them, the material systems represented by scandium-doped aluminum nitride (Al 1-x Sc x N) and doped hafnium-zirconium oxide (HfZrO2) are widely used in the construction of ferroelectric capacitors, ferroelectric transistors and related nonvolatile logic structures. However, these existing technologies, although important breakthroughs have been made in certain aspects, still have many limitations in device structure, functional integration, polarization control and process adaptation, etc., and cannot meet the urgent needs of current integrated circuits for high density, low power consumption and reconfigurable logic units.
[0004] From the perspective of polarization state control ability, existing devices generally adopt single-layer ferroelectric structure, and the polarization direction can usually only realize "up" and "down" two orientations, corresponding to "0" and "1" in the binary logic system. Although this has met the basic storage function requirements, it is still insufficient for realizing multi-state logic expression, multi-input signal processing and deep integration of logic operation and information retention, limiting the improvement of information density and the expansion of functional integration. In addition, in the process of multiple polarization reversal, the ferroelectric thin film is prone to polarization fatigue, increased leakage current and decreased data retention ability, especially under high temperature, high frequency and long-term operation conditions, these reliability problems are more prominent, which seriously restricts the device life and performance stability.
[0005] On the other hand, current devices attempt to achieve "storage-logic integration" by introducing ferroelectric characteristics into the transistor channel or gate structure, but due to the lack of systematic interface coupling mechanism and polarization interaction control, the non-volatile characteristics of the device are unstable, the logic operation ability is weak, and it is still difficult to support complex calculation and state retention. In addition, some traditional ferroelectric materials such as BaTiO3 have contradictions in thermal stability, lattice structure and silicon process compatibility, and are difficult to be directly integrated into the existing CMOS platform. While Al 1-x Sc x N has good silicon compatibility, but in a single ferroelectric layer structure, the polarization state is limited to simple switching behavior and cannot support multi-state storage and more complex logic mapping.
[0006] In existing research, Zhao et al. (Zhao et al., Nano-Micro Letters, 2024) proposed a ferroelectric transistor structure based on Al 1-x Sc x N film (New-Generation Ferroelectric AlScN Materials), which achieved strong non-volatile storage performance by optimizing the composition and annealing process, but this scheme still uses a single ferroelectric configuration and cannot achieve multi-polarization state control, and the logic processing ability is still weak, making it difficult to perform multi-input logic operations. Another study (Kawazoe et al., Advanced Electronic Materials, 2024) proposes to introduce a polarization regulation mechanism in ε-Ga2O3 film (Growth mechanism and ferroelectric properties of ε-Ga2O3), which uses its symmetry breaking structure to achieve room temperature ferroelectricity, but this research does not design a multi-ferroelectric interface structure, the device structure is simple, and cannot form coupled polarization behavior, also lacks a control mechanism that cooperates with other ferroelectric layers, limiting its further expansion in logic-storage integrated applications.
[0007] In summary, existing technologies cannot simultaneously consider ferroelectric multi-state control ability, logic-storage function integration, polarization coupling mechanism design, and compatibility with silicon-based processes. Therefore, it is urgent to develop a new multi-functional logic device based on a double-ferroelectric coupling interface, which can achieve multi-state non-volatile logic expression and compact system integration by reasonably designing multi-layer ferroelectric structures and hetero-integrated interfaces, while ensuring polarization stability and low power consumption, to meet the key application requirements of integrated circuits in the post-moore era. SUMMARY
[0008] In order to solve the above problems in the prior art, the present application aims to provide a multifunctional logic device based on a double ferroelectric coupling interface and a preparation method thereof, which uses ε-Ga2O3 as a lower ferroelectric material, Al 1-x Sc x N as an upper ferroelectric material, and forms a double ferroelectric hetero-interface structure with polarization coupling characteristics through a laminating manner, which utilizes the ferroelectric response characteristics of ε-Ga2O3 and the strong spontaneous polarization ability of Al 1-x Sc x N, so as to realize the construction of multiple polarization stable states in the same device, and can be applied to a new type of multi-value nonvolatile memory or multifunctional logic circuit; and simultaneously has nonvolatile storage capability and can be compatible with the existing semiconductor process.
[0009] In order to achieve the above-mentioned purpose, the technical scheme adopted by the present application is as follows:
[0010] A multifunctional logic device based on a double ferroelectric coupling interface, comprising a silicon substrate layer 1, wherein the silicon substrate layer 1 is provided with a TiN / Al 1-x Sc x N / ε-Ga2O3 / TiN heterostructure, and the value range of x is 0.225-0.275; the TiN / Al 1- x Sc x N / ε-Ga2O3 / TiN heterostructure comprises a TiN lower electrode layer 2, an ε-Ga2O3 ferroelectric thin film layer 3, an Al 1-x Sc x N ferroelectric thin film layer 4 and a TiN upper electrode layer 5, which are sequentially laminated from bottom to top.
[0011] The thicknesses of the TiN lower electrode layer 2 and the TiN upper electrode layer 5 are both 27-33 nm, the thickness of the ε-Ga2O3 ferroelectric thin film layer 3 is 8-22 nm, and the thickness of the Al 1-x Sc x N ferroelectric thin film layer 4 is 54-88 nm.
[0012] A preparation method of a multifunctional logic device based on a double ferroelectric coupling interface, comprising the following steps:
[0013] Step 1: depositing a TiN lower electrode layer 2 on a cleaned silicon substrate layer 1 by using a magnetron sputtering method and annealing in a nitrogen atmosphere;
[0014] Step 2: epitaxially depositing an ε-Ga2O3 ferroelectric thin film layer 3 on the TiN lower electrode layer 2 by using a MOCVD process;
[0015] Step 3: depositing an Al 1-x Scx N ferroelectric thin film layer 4 and annealing;
[0016] Step 4: depositing TiN upper electrode layer 5 on the Al 1-x Sc x N ferroelectric thin film layer 4 and annealing in nitrogen atmosphere.
[0017] In steps 1 and 4, the process flow of the magnetron sputtering method is as follows: taking a titanium target with a purity of 99.999% as the sputtering source, after vacuumizing, argon and nitrogen are simultaneously introduced, the cavity pressure is maintained at 0.18-0.22 Pa, the sputtering power is set to 144-176 W; after pre-sputtering for 8-11 minutes, main sputtering is started, and after depositing for 7-9 minutes, a TiN lower electrode layer 2 or a TiN upper electrode layer 5 with a thickness of 27-33 nm is obtained.
[0018] In steps 1 and 4, the gas flow of the argon and nitrogen is respectively 18-22 sccm and 1.35-1.65 sccm.
[0019] In step 2, the MOCVD process flow is as follows: taking one of Ga(acac)3, GaCl3 and Ga(tmhd)3 as the gallium source precursor, the molar fraction of the gallium source precursor is 1.8-2.2%, and the source bottle temperature is controlled between 155-185℃, epitaxial deposition is carried out in an oxygen and ozone mixed atmosphere, the reaction temperature is 750-800℃, the deposition rate is 0.09-0.11 nm / s, and an ε-Ga2O3 ferroelectric thin film layer 3 with a thickness of 18-22 nm is obtained; the flow rates of the oxygen and ozone are 90-110 sccm and 9-11 sccm respectively, and the gas flow ratio is (8-12):1.
[0020] In step 2, nitrogen gas with a gas flow of 90-110 sccm is used as the carrier gas to transport the gallium source precursor into the reaction chamber, and the total gas flow in the reaction chamber is controlled at 400-500 sccm.
[0021] In step 3, the process flow of the double-target co-sputtering method is as follows: taking an aluminum target and a scandium target with a purity of 99.999% as the sputtering source, the scandium target power is 63-77 W, and the aluminum target power is 135-165 W; after vacuumizing, argon and nitrogen are simultaneously introduced, and the cavity pressure is controlled at 0.27-0.33 Pa; deposition is carried out at 360-440℃ for 2-18 minutes, and an Al 1-x Sc x N ferroelectric thin film layer 4.
[0022] In step 3, the gas flow of the argon and nitrogen is respectively 45-55 sccm and 18-22 sccm.
[0023] In steps 1 and 4, the annealing temperature is 540~660℃ and the time is 55~60 minutes; in step 3, the annealing temperature is 720~880℃ and the time is 1.8~2.2 hours.
[0024] Compared with the prior art, the beneficial effects of the present invention are as follows:
[0025] 1. This invention constructs AI 1-x Sc x The N / ε-Ga2O3 double ferroelectric heterostructure not only retains the unique polarization behavior of each ferroelectric material but also introduces a systematic polarization synergy effect through the coupling between the interfaces, thus forming a controllable multi-polarization stable state. By utilizing different types of ferroelectric materials in the upper and lower layers and controlling the arrangement and combination of polarization directions, four different polarization states are achieved and mapped to the logic values "00", "01", "10", and "11". This introduces a multi-stable polarization distribution based on traditional binary polarization, realizing a multi-polarization state control mechanism. This supports multi-state logic expression and multi-input signal mapping, overcoming the technical limitation of a single ferroelectric layer only being able to output "0 / 1", and improving the information density and functional reconfigurability of logic units.
[0026] 2. This invention uses ε-Ga2O3 as the lower-layer ferroelectric material, Al 1-x Sc x Multifunctional logic devices constructed using nitrogen as the upper-layer ferroelectric material exhibit excellent polarization stability and fatigue resistance; ε-Ga2O3, as an emerging ferroelectric-like material, demonstrates superior lattice stability and thermal reliability compared to traditional perovskite structures, exhibiting better structural retention in high-temperature environments; while Al... 1-x Sc x N exhibits high polarization density and low leakage current. The combination of these two factors not only improves the overall lifespan of the device but also enhances the readability and retention of the logic state during long-term operation.
[0027] 3. This invention utilizes sequential deposition of Al 1-x Sc x A double ferroelectric heterostructure was constructed using N and ε-Ga₂O₃ thin films. Combined with interface engineering techniques (such as surface treatment and stress modulation) and subsequent annealing optimization, a stable double ferroelectric coupling interface was formed. During polarization switching, this structure exhibited significant synergistic polarization behavior. The potential gradient at the interface and lattice coupling effectively enhanced the polarization switching barrier and charge retention capability. The resulting potential-assisted stabilization mechanism significantly alleviated polarization fatigue and suppressed leakage channel formation, improved data retention, and enhanced the device's operational stability and long-term reliability under complex conditions such as high temperature and high frequency, significantly outperforming traditional single ferroelectric layer devices.
[0028] 4. This invention utilizes Al1-x Sc x N / ε-Ga2O3 double ferroelectric interface coupling effect, realizes the non-volatile logic-memory integration function, can keep the logic state without additional power supply, greatly reduces the data carrying energy consumption, and relieves the problem of high power consumption and large delay of traditional "logic-memory separation" system, and provides a hardware foundation for a new on-chip storage and computing fusion architecture.
[0029] 5、 The application provides a low-temperature compatible and integrable process path, which realizes complete construction of a device structure and function initialization through TiN metal electrode magnetron sputtering, ε-Ga2O3 thin film epitaxial deposition, Al 1-x Sc x N co-sputtering doping regulation and post annealing treatment processes, and all processes are completed in the mainstream silicon-based temperature range, which is helpful for seamless connection with the existing CMOS process.
[0030] To sum up, the multifunctional logic device based on the double ferroelectric coupling interface provided by the application not only realizes the leap from "single-layer ferroelectric" to "coupling heterostructure" in the structure level, but also completes the expansion from "single-function storage" to "logic-memory integration" in the function level. The device can be used as a multi-state storage unit and also as a core device unit of a reconfigurable logic circuit, and exhibits good flexibility and system integration potential. In terms of function expansion, material stability, polarization control accuracy and integration compatibility, the device is superior to the single-layer ferroelectric device which is widely researched and applied at present, and provides a new technical scheme and theoretical support for the next generation of low-power, high-density and programmable logic chips. BRIEF DESCRIPTION OF DRAWINGS
[0031] Figure 1 The structure schematic diagram of the multifunctional logic device provided by the application is shown.
[0032] Figure 2 The XRD pattern of the ε-Ga2O3 ferroelectric thin film provided for Example 3 is shown.
[0033] Figure 3 The polarization-current density biaxial characteristic curve diagram of the multifunctional logic provided for Example 3 is shown. DETAILED DESCRIPTION
[0034] The technical scheme of the application will be further introduced below in combination with examples and drawings.
[0035] As Figure 1 shown, a multifunctional logic device based on a double ferroelectric coupling interface comprises a silicon substrate layer 1, a TiN / Al 1-x Sc xN / ε-Ga2O3 / TiN heterostructure, x is in the range of 0.225~0.275; the TiN / Al 1-x Sc x The N / ε-Ga2O3 / TiN heterostructure comprises a TiN lower electrode layer 2, an ε-Ga2O3 ferroelectric thin film layer 3, an Al 1-x Sc x N ferroelectric thin film layer 4, a TiN upper electrode layer 5, which are sequentially stacked from bottom to top; wherein the thickness of the TiN lower electrode layer 2 and the TiN upper electrode layer 5 is 27~33 nm, the thickness of the ε-Ga2O3 ferroelectric thin film layer 3 is 8~22 nm, and the thickness of the Al 1-x Sc x N ferroelectric thin film layer 4 is 54~88 nm.
[0036] In the multifunctional logic device structure, the TiN lower electrode layer 2 and the TiN upper electrode layer 5 are used to provide electric field control and conductive connection; the ε-Ga2O3 ferroelectric thin film layer 3 is used to provide asymmetric polarization switching characteristics, with the characteristics of low power consumption and high switching ratio; the Al 1-x Sc x N ferroelectric thin film layer 4 is used to enhance the ferroelectric stability and multi-state storage characteristics; the above multi-layer structure can realize the integration of multifunctional logic operation and non-volatile storage function through the Al 1- x Sc x N / ε-Ga2O3 double ferroelectric interface coupling effect, which can realize the integration of multifunctional logic operation and non-volatile storage function.
[0037] A preparation method of a multifunctional logic device based on a double ferroelectric coupling interface, comprising the following steps:
[0038] Step 1: select a 4-inch single crystal silicon wafer as a substrate material, place it in an ultrasonic cleaning machine, and sequentially clean it with deionized water, acetone, isopropyl alcohol and deionized water for 8-12 minutes each to remove surface dust and organic residues; then use a nitrogen gun to dry the substrate, obtaining a silicon substrate layer 1;
[0039] Step 2: deposit TiN as the lower electrode layer of the device on the cleaned silicon substrate layer 1 by magnetron sputtering method; fix the silicon substrate on the magnetron sputtering tray, use a titanium target with a purity of 99.999% as the sputtering source, introduce argon and nitrogen after vacuumizing, maintain the cavity pressure at 0.18-0.22 Pa, set the sputtering power at 144-176 W; start main sputtering after pre-sputtering for 8-11 minutes, control the deposition time at 7-9 minutes, and obtain a TiN lower electrode layer 2 with a thickness of 27-33 nm; after deposition, anneal in a horizontal tube furnace at 540-660 ℃ in a nitrogen atmosphere for 55-60 minutes to improve the electrode crystallization quality and stability; the gas flow rates of the argon and nitrogen are 18-22 sccm and 1.35-1.65 sccm respectively;
[0040] Step 3: epitaxially deposit an ε-Ga2O3 ferroelectric film layer 3 on the TiN lower electrode layer 2 by metal organic chemical vapor deposition (MOCVD) process; the gallium source precursor is one of gallium acetylacetonate (Ga(acac)3), GaCl3 and acetylacetonate samarium (Ga(tmhd)3); the gallium source precursor is stored in a source bottle, and the source bottle temperature is controlled in the range of 155-185 ℃ to maintain a stable vapor pressure; use nitrogen as the carrier gas with a gas flow rate of 90-110 sccm to transport the gallium source precursor into the reaction chamber; the total gas flow rate of nitrogen and gallium source vapor in the reaction chamber is controlled at 400-500 sccm, and the molar fraction of the gallium source precursor is limited to 1.8-2.2%; the epitaxial deposition process is carried out in an oxygen and ozone mixed atmosphere, and the reaction temperature is 750-800 ℃; the flow rates of the oxygen and ozone are 90-110 sccm and 9-11 sccm respectively, and the gas flow rate ratio is (8-12):1. The deposition rate is 0.09-0.11 nm / s, and finally a ε-Ga2O3 ferroelectric film layer 3 with a thickness of 18-22 nm is deposited;
[0041] Step 4: deposit an Al 1-x Sc x N ferroelectric film layer 4 on the ε-Ga2O3 ferroelectric film layer 3 by double-target co-sputtering process; use aluminum and scandium targets with a purity of 99.999% as the sputtering source, the scandium target power is 63-77 W, and the aluminum target power is 135-165 W; introduce argon and nitrogen after vacuumizing, and control the cavity pressure at 0.27-0.33 Pa; deposit at 360-440 ℃ for 2-18 minutes to obtain an Al 1-x Sc x N ferroelectric film layer 4 with a thickness of 54-88 nm; after deposition, anneal at 720-880 ℃ for 1.8-2.2 hours to stabilize the ferroelectric domain structure; the gas flow rates of the argon and nitrogen are 45-55 sccm and 18-22 sccm respectively.
[0042] Step 5: TiN upper electrode layer 5 was deposited on the Al 1-x Sc x N ferroelectric thin film layer 4 using the same deposition parameters as in Step 1, with a thickness of 27-33 nm; after deposition, annealing was performed in a nitrogen atmosphere at 540-660℃ for 55-60 minutes to form a TiN / Al 1-x Sc x N / ε-Ga2O3 / TiN heterostructure, obtaining a multifunctional logic device based on a double ferroelectric coupling interface.
[0043] Example 1
[0044] A 4-inch single crystal silicon wafer was selected as the substrate material, and a multifunctional logic device structure was formed by sequential deposition, with the specific steps as follows:
[0045] 1. A TiN lower electrode layer 2 with a thickness of 27 nm was deposited on the cleaned silicon substrate using a magnetron sputtering method, with a deposition power of 144 W, a chamber pressure controlled at 0.18 Pa, argon and nitrogen flow rates of 18 sccm and 1.35 sccm respectively, and a deposition time of 8 minutes; followed by annealing at 540℃ in a nitrogen atmosphere for 60 minutes;
[0046] 2. An ε-Ga2O3 ferroelectric thin film with a thickness of 18 nm was epitaxially deposited on the TiN lower electrode layer 2 using a MOCVD method, with Ga(acac)3 as the gallium source precursor, a source bottle temperature of 155℃, a nitrogen flow rate of 90 sccm, and a molar fraction of Ga(acac)3 of 1.8%; the deposition temperature was 750℃, the oxygen and ozone flow rates were 90 sccm and 9 sccm respectively, and the deposition rate was 0.09 nm / s;
[0047] 3. An Al 0.775 Sc 0.225 N ferroelectric thin film with a thickness of 54 nm was deposited on the ε-Ga2O3 ferroelectric thin film layer using a double-target co-sputtering method, with an aluminum target power of 135 W, a scandium target power of 63 W, a deposition temperature of 360℃, and a time of 2 minutes; the atmosphere was 45 sccm argon and 18 sccm nitrogen; followed by annealing at 720℃ for 2 hours;
[0048] 4. A TiN upper electrode layer 5 with a thickness of 27 nm was deposited on the Al 0.775 Sc 0.225 N ferroelectric thin film using a magnetron sputtering method, with the same deposition parameters as for the TiN lower electrode layer 2; after deposition, annealing was performed in a nitrogen atmosphere at 540℃ for 60 minutes to form a multifunctional logic device.
[0049] Example 2
[0050] 4-inch single crystal silicon wafer is selected as the substrate material, and a multifunctional logic device structure is formed by deposition in sequence. The specific steps are as follows:
[0051] 1. A magnetron sputtering method is used to deposit a TiN lower electrode layer 2 with a thickness of 33 nm on a cleaned silicon substrate, the power is set to 176 W, the cavity pressure is 0.22 Pa, the argon and nitrogen flow rates are 22 sccm and 1.65 sccm respectively, and the deposition time is controlled to be 8 minutes; then annealing at 660℃ in nitrogen atmosphere for 60 minutes;
[0052] 2. A MOCVD method is used to epitaxially deposit an ε-Ga2O3 ferroelectric film with a thickness of 22 nm on the TiN lower electrode layer 2, the gallium source precursor is GaCl3, the source bottle temperature is 185℃, the nitrogen flow rate is 110 sccm, and the molar fraction of GaCl3 is 2.2%; the deposition temperature is 800℃, the oxygen and ozone flow rates are 110 sccm and 11 sccm respectively, and the deposition rate is 0.11 nm / s;
[0053] 3. A double-target co-sputtering method is used to deposit an Al 0.725 Sc 0.275 N ferroelectric film with a thickness of 88 nm on the ε-Ga2O3 ferroelectric film layer, the aluminum target power is 165 W, the scandium target power is 77 W, the deposition temperature is 440℃, and the time is 18 minutes; the atmosphere is 55sccm argon and 22 sccm nitrogen; then annealing at 880℃ for 2 hours;
[0054] 4. A magnetron sputtering method is used to deposit a TiN upper electrode layer 5 with a thickness of 33 nm on the Al 0.725 Sc 0.275 N ferroelectric film, the deposition parameters are the same as those of depositing the TiN lower electrode layer 2; after deposition, annealing at 660℃ in nitrogen atmosphere for 60 minutes to form a multifunctional logic device.
[0055] Example 3
[0056] 4-inch single crystal silicon wafer is selected as the substrate material, and a multifunctional logic device structure is formed by deposition in sequence. The specific steps are as follows:
[0057] 1. A magnetron sputtering method is used to deposit a TiN lower electrode layer 2 with a thickness of 30 nm on a cleaned silicon substrate, the power is 160 W, the cavity pressure is controlled to be 0.2 Pa, the argon and nitrogen flow rates are 20 sccm and 1.5 sccm respectively, and the deposition time is 8 minutes; then annealing at 600℃ in nitrogen atmosphere for 60 minutes;
[0058] 2. An ε-Ga2O3 ferroelectric thin film with a thickness of 20 nm was epitaxially deposited on the TiN lower electrode layer 2 using the MOCVD method. The gallium source precursor was Ga(tmhd)3, the source bottle temperature was 170℃, the carrier gas flow rate was 100 sccm, the molar fraction of Ga(tmhd)3 was 2.0%, the deposition temperature was 775℃, the oxygen and ozone flow rates were 100 sccm and 10 sccm, respectively, and the deposition rate was 0.10 nm / s.
[0059] 3. A 70 nm thick Al film was deposited on an ε-Ga₂O₃ ferroelectric thin film using a dual-target co-sputtering method. 0.75 Sc 0.25 Nitrogen ferroelectric thin film, aluminum target power 150 W, scandium target power 70 W, deposition temperature 400℃, time 13 minutes; atmosphere 50 sccm argon and 20 sccm nitrogen; followed by annealing at 800℃ for 2 hours;
[0060] 4. Using magnetron sputtering method on Al 0.75 Sc 0.25 A TiN upper electrode layer 5 with a thickness of 30 nm was deposited on the N ferroelectric thin film, with the same deposition parameters as the TiN lower electrode layer 2. After deposition, the film was delaminated at 600℃ in a nitrogen atmosphere for 60 minutes to form a multifunctional logic device.
[0061] After the device of this invention is fabricated, its polarization characteristics are initialized and its state verified using a ferroelectric testing system. By applying an external electric field, its polarization-electric field (PE) hysteresis curve and current density-electric field (JE) response curve are tested to confirm the establishment of the ferroelectric domain structure inside the device and the reversibility of polarization switching. The PE curve is used to evaluate polarization switching behavior and bistable characteristics, while the JE curve is used to identify the current response during polarization reversal. Together, they verify the stability and controllability of the device's polarization state, supporting its use in non-volatile logic function operations.
[0062] like Figure 2 The XRD pattern shown reveals obvious diffraction peaks of ε-phase Ga2O3, which exhibits good crystallinity and clear orientation, indicating that the preparation method of the present invention successfully prepared Ga2O3 with an ε-phase crystal structure.
[0063] This invention, through the rational design of the material system and deposition parameters, forms a stable dual-polarization coupling interface within the device, exhibiting excellent polarization response and logic readability. The device's polarization-current density biaxial characteristic curve is shown below. Figure 3 As shown, in the constructed double ferroelectric heterostructure, the device exhibits significant ferroelectric properties. Figure 3The middle blue polarization hysteresis loop can be seen, the device polarization intensity is up to ± 150 μC / cm², the polarization flip behavior is clear and symmetric, and presents a typical square characteristic, which shows that it has good polarization switching ability and non-volatility. The double-layer ferroelectric structure can realize four stable polarization combination states through the coupling regulation of the polarization directions of the upper and lower layers, and can be mapped into "00", "01", "10" and "11" logic codes, which provides a physical basis for constructing multi-state logic units and multi-input signal mapping mechanism, thereby effectively breaking through the technical bottleneck of traditional single ferroelectric layer structure supporting only binary storage.
[0064] Figure 3 In the middle, the current density curve (green) shows that the polarization reversal position corresponds to a sharp peak, the overall current density is well controlled, and there is no obvious symmetry deviation or abnormal leakage phenomenon, which reflects that the device has a potential auxiliary stability mechanism in the polarization switching process. The excellent lattice stability of ε-Ga2O3 and the high polarization density characteristics of Al 1-x Sc x The high polarization density characteristics of N under the synergistic effect of the interface help to inhibit the formation of polarization fatigue and leakage channels, improve the data retention capability and long-term operation reliability. This characteristic verifies the ability of the application to maintain the stability of the logic state and low-power switching under high temperature and high frequency conditions, and provides strong support for the new logic-storage integrated architecture.
Claims
1. A multifunctional logic device based on a dual ferroelectric coupling interface, comprising a silicon substrate layer (1), characterized in that, TiN / Al is disposed on the silicon substrate layer (1). 1-x Sc x The N / ε-Ga₂O₃ / TiN heterostructure has x ranging from 0.225 to 0.275; the TiN / Al 1-x Sc x The N / ε-Ga2O3 / TiN heterostructure includes, from bottom to top, a TiN bottom electrode layer (2), an ε-Ga2O3 ferroelectric thin film layer (3), and an Al layer. 1-x Sc x N ferroelectric thin film layer (4), TiN top electrode layer (5).
2. The multifunctional logic device according to claim 1, characterized in that: The thicknesses of the TiN lower electrode layer (2) and the TiN upper electrode layer (5) are both 27~33 nm, the thickness of the ε-Ga2O3 ferroelectric thin film layer (3) is 8~22 nm, and the Al 1-x Sc x The thickness of the N ferroelectric thin film layer (4) is 54~88 nm.
3. A method for fabricating a multifunctional logic device based on a dual ferroelectric coupling interface, characterized in that, Includes the following steps: Step 1: A TiN lower electrode layer (2) is deposited on the cleaned silicon substrate (1) by magnetron sputtering and then annealed in a nitrogen atmosphere; Step 2: An ε-Ga2O3 ferroelectric thin film layer 3 is epitaxially deposited on the TiN lower electrode layer (2) using MOCVD process; Step 3: Al was deposited on the ε-Ga2O3 ferroelectric thin film layer (3) using a dual-target co-sputtering process. 1-x Sc x N ferroelectric thin film layer (4) and annealed; Step 4: Using magnetron sputtering to deposit Al 1-x Sc x A TiN top electrode layer (5) is deposited on the N ferroelectric thin film layer (4) and annealed in a nitrogen atmosphere.
4. The method for fabricating a multifunctional logic device according to claim 3, characterized in that, In steps 1 and 4, the process flow of the magnetron sputtering method is as follows: using a titanium target with a purity of 99.999% as the sputtering source, after evacuation, argon and nitrogen are introduced simultaneously to maintain the cavity pressure at 0.18~0.22 Pa, and the sputtering power is set to 144~176 W; after pre-sputtering for 8-11 minutes, the main sputtering begins, and after deposition for 7~9 minutes, a TiN lower electrode layer (2) or TiN upper electrode layer (5) with a thickness of 27~33 nm is obtained.
5. The method for fabricating a multifunctional logic device according to claim 4, characterized in that, In steps 1 and 4, the gas flow rates of argon and nitrogen are 18~22 sccm and 1.35~1.65 sccm, respectively.
6. The method for fabricating a multifunctional logic device according to claim 3, characterized in that, In step 2, the MOCVD process is as follows: one of Ga(acac)3, GaCl3, and Ga(tmhd)3 is used as the gallium source precursor, the molar fraction of the gallium source precursor is 1.8~2.2%, and the source bottle temperature is controlled between 155~185℃. Epitaxial deposition is carried out in a mixed atmosphere of oxygen and ozone, the reaction temperature is 750~800℃, the deposition rate is 0.09~0.11 nm / s, and an ε-Ga2O3 ferroelectric thin film layer with a thickness of 18~22 nm is obtained (3); the flow rates of oxygen and ozone are 90~110 sccm and 9~11 sccm, respectively, and the gas flow ratio is (8~12):
1.
7. The method for fabricating a multifunctional logic device according to claim 3, characterized in that, In step 2, nitrogen gas with a flow rate of 90~110 sccm is used as the carrier gas to transport the gallium source precursor into the reaction chamber, and the total gas flow rate in the reaction chamber is controlled at 400~500 sccm.
8. The method for fabricating a multifunctional logic device according to claim 3, characterized in that, In step 3, the dual-target co-sputtering process is as follows: using an aluminum target and a scandium target with a purity of 99.999% as sputtering sources, the scandium target power is 63~77 W and the aluminum target power is 135~165 W; after evacuation, argon and nitrogen are simultaneously introduced, and the cavity pressure is controlled at 0.27~0.33 Pa; deposition is carried out at 360~440℃ for 2~18 minutes to obtain Al with a thickness of 54~88 nm. 1-x Sc x N ferroelectric thin film layer (4).
9. The method for fabricating a multifunctional logic device according to claim 8, characterized in that, In step 3, the gas flow rates of argon and nitrogen are 45~55 sccm and 18~22 sccm, respectively.
10. The method for fabricating a multifunctional logic device according to claim 3, characterized in that, In steps 1 and 4, the annealing temperature is 540~660℃ and the time is 55~60 minutes; in step 3, the annealing temperature is 720~880℃ and the time is 1.8~2.2 hours.