Multi-source collaborative green electric power energy optimization scheduling system

Abstract

The invention discloses a multi-source cooperative green electric power energy optimization scheduling system, and relates to the technical field of electric power system computing power scheduling, and the system comprises an interaction construction module which constructs a direct connection signal channel of a supercomputing CPU and an intelligent computing GPU; the impedance matching module monitors a signal transmission reflection coefficient in real time and obtains signal transmission delay to realize impedance compensation; the supercomputing power supply layer configuration module regulates and controls output voltage in real time through a voltage monitoring unit; the intelligent calculation power supply layer configuration module adapts to the instantaneous peak current demand of the intelligent calculation module; the supercomputing water-cooling heat dissipation execution module is used for adjusting the flow of a water-cooling pump after receiving the temperature signal; the intelligent calculation air cooling linkage control module is used for collecting the real-time temperature of the intelligent calculation module and controlling the rotating speed of a speed-adjustable fan according to a fan rotating speed adjusting formula so as to realize pulse type heating adaptive heat dissipation; and the comprehensive evaluation module constructs a comprehensive evaluation model and evaluates the system performance. The problems of high transmission delay, mismatched heat dissipation and unstable power supply are solved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power system computing power scheduling, and more particularly, to a multi-source coordinated green power energy optimization scheduling system. BACKGROUND

[0002] The multi-source coordinated green power energy optimization scheduling system is a special computing power scheduling platform adapted to the digitalization needs of the power industry. The core is to integrate heterogeneous computing power resources of high-performance computing (HPC) and artificial intelligence (AI), realize unified scheduling and collaborative work, and its key features meet the special needs of the power industry. The HPC part focuses on high-precision computing of double-precision floating point, which can support complex engineering calculations such as power grid simulation and power system physical modeling. The AI part is characterized by low-precision hybrid computing, which uses GPU, NPU and other acceleration devices to adapt to AI tasks such as power model training, load forecasting and equipment defect intelligent identification. The hybrid deployment of HPC MPI jobs and AI containerized tasks is realized through a hybrid orchestration engine, and resources are dynamically allocated based on power task priorities. For example, urgent tasks such as power grid fault simulation can be preferentially scheduled to HPC resources, while daily load forecasting tasks are allocated to AI resources. Cross-period resource scheduling is also supported to reduce idle computing power and reduce the cost of computing power construction and operation in the power industry.

[0003] Disadvantages of the prior art:

[0004] The PCBs of the HPC and AI modules are designed independently, and the signals are connected through external cables. The transmission path is long (usually > 50 cm), and the delay is > 100 ns, which cannot meet the real-time task requirements of power fault simulation.

[0005] The traditional cabinet uses a unified fan for cooling, and the cooling efficiency of the HPC module (steady-state power consumption 500W, uniform heating) and the AI module (pulse power consumption 800W, instantaneous concentrated heating) is low, and the local temperature can reach more than 85℃, triggering the computing power frequency reduction.

[0006] There is high-frequency electromagnetic interference (10-500MHz) in the power scenario, and the existing shielding structure cannot uniformly suppress the interference of HPC (mainly low-frequency signals) and AI (mainly high-frequency signals), resulting in scheduling command errors.

[0007] To solve the above problems, the present application provides a solution. SUMMARY

[0008] In order to overcome the above-mentioned defects of the prior art, the embodiments of the present application provide a multi-source coordinated green power energy optimization scheduling system to solve the problems raised in the background art.

[0009] To achieve the above object, the present application provides the following technical scheme:

[0010] The application discloses a multi-source cooperative green power energy optimization scheduling system, which comprises an interactive construction module, an impedance matching module, a supercomputer power layer configuration module, a smart computer power layer configuration module, a supercomputer water cooling heat dissipation execution module, a smart computer air cooling linkage control module, a comprehensive evaluation module, and connections between the modules.

[0011] The interactive construction module constructs a direct connection signal channel of the supercomputer CPU and the smart computer GPU, and provides a physical carrier for signal transmission and impedance adjustment.

[0012] The impedance matching module collects output impedance of the supercomputer module, input impedance of the smart computer module and signal path length parameters, calculates target matching impedance according to an impedance matching formula, and realizes impedance compensation by monitoring a signal transmission reflection coefficient in real time and acquiring signal transmission delay.

[0013] The supercomputer power layer configuration module realizes real-time regulation and control of output voltage through a voltage monitoring unit.

[0014] The smart computer power layer configuration module adapts to transient peak current demand of the smart computer module through a current buffer unit.

[0015] The supercomputer water cooling heat dissipation execution module collects real-time temperature of the supercomputer module, and adjusts water cooling pump flow after receiving the temperature signal.

[0016] The smart computer air cooling linkage control module collects real-time temperature of the smart computer module, controls the rotating speed of the adjustable speed fan according to a fan rotating speed adjustment formula, and realizes pulse type heat dissipation adaptation.

[0017] The comprehensive evaluation module constructs a comprehensive evaluation model according to signal transmission delay, real-time temperature of the smart computer module and real-time temperature of the supercomputer module in combination with a preset temperature range, and evaluates system performance.

[0018] In a preferred embodiment, the impedance matching module realizes the following process:

[0019] The impedance matching module establishes physical connection with the signal interaction layer construction module, deploys impedance collection sensors, and respectively collects output impedance of the supercomputer module, input impedance of the smart computer module and actual length of a signal channel.

[0020] The output impedance of the supercomputer module, the input impedance of the smart computer module and the actual length of the signal channel are substituted into an impedance matching formula to calculate target matching impedance.

[0021] A control signal is sent to an adjustable capacitance array (10-100 pF) integrated in the signal interaction layer, and the capacitance value is adjusted to match the target matching impedance.

[0022] The signal transmission reflection coefficient is monitored in real time, if the reflection coefficient is greater than -20 dB, the process is repeated until the reflection coefficient is less than or equal to -20 dB, and impedance compensation is completed.

[0023] In a preferred embodiment, the control signal is sent to the adjustable capacitance array integrated in the signal interaction layer, and the capacitance value is adjusted to match the target matching impedance as follows:

[0024] According to the calculated target matching impedance, combined with the characteristic impedance model of the direct channel of the signal interaction layer, the total capacitance value of the adjustable capacitance array required to achieve the target matching impedance is calculated, and the formula is:

[0025]

[0026] In the formula, The total capacitance value of the adjustable capacitance array required to achieve the target matching impedance, f is the center frequency of the power computing force signal, The target matching impedance;

[0027] The communication protocol of the control unit is configured to convert the total capacitance value of the adjustable capacitance array into a digital control word, and the signal output level is set to match the driving requirements of the capacitance array;

[0028] The digital control word is sent through the PCB trace between the control unit and the adjustable capacitance array;

[0029] The actual total capacitance value of the current array is collected through the capacitance value feedback pin of the adjustable capacitance array;

[0030] The total capacitance value of the adjustable capacitance array required to achieve the target matching impedance is compared with the actual total capacitance value of the current array;

[0031] If the difference between the total capacitance value of the adjustable capacitance array required to achieve the target matching impedance and the actual total capacitance value of the current array is greater than a preset threshold, a fine tuning control signal is generated according to the deviation direction until the target matching impedance is matched.

[0032] In a preferred embodiment, the super-computing power supply layer configuration module realizes the following steps:

[0033] The top layer of the signal interaction layer construction module is connected by pressing process, and 2oz thick copper foil is used as power circuit substrate, which is cut to match the size of the top layer of the signal interaction layer module;

[0034] The position coordinates of the super-computing module power supply interface are obtained, and the power circuit trace is planned based on the PCB voltage drop model according to the position of the super-computing module power supply interface to reduce the voltage drop of the circuit;

[0035] A voltage monitoring unit is deployed at the output end of the power circuit to collect the output voltage value in real time;

[0036] The output voltage value is compared with the rated voltage of the super calculation module, the voltage fluctuation coefficient is calculated, and the output voltage is dynamically regulated by the voltage regulation chip, the PWM duty cycle regulation coefficient of the regulation chip is optimized, or a larger capacity output filter capacitor is replaced to ensure that the voltage fluctuation is ≤±2%.

[0037] In a preferred embodiment, the intelligent power supply layer configuration module implements the following steps:

[0038] The bottom layer of the signal interaction layer construction module is connected by compression process, and 4oz copper thick copper foil is used as power line substrate, and the size is cut to match the bottom layer of the signal interaction layer;

[0039] According to the power supply demand of the intelligent calculation GPU, multiple parallel power lines are designed to improve the current carrying capacity;

[0040] A current buffer unit is arranged at the input end of the power line to suppress transient current impact;

[0041] The response time and line voltage drop of the current buffer unit are tested by simulating the peak load of the intelligent calculation module;

[0042] Optimize the parameters of the current buffer unit. If the response time is greater than the preset range, replace the array of Schottky diodes with a small forward voltage drop;

[0043] If the line voltage drop is greater than the allowable voltage drop range, the parallel line width is widened to ensure that the transient peak current demand of the intelligent calculation module is met.

[0044] In a preferred embodiment, the super calculation water cooling heat dissipation execution module implements the following process:

[0045] The PCB area corresponding to the super calculation power supply layer configuration module is thermally connected by heat-conducting silicone grease, and a micro-channel copper water cooling plate is embedded in the area;

[0046] The inlet and outlet of the water cooling plate, the water cooling pump and the heat dissipation row form a closed water cooling loop, and the loop sealing test is performed;

[0047] A thermocouple is pasted on the surface of the super calculation module to collect real-time temperature;

[0048] The thermocouple temperature signal is received and substituted into the water cooling flow regulation formula to calculate the target flow.

[0049] In a preferred embodiment, the intelligent calculation air cooling linkage control module implements the following process:

[0050] The PCB area corresponding to the intelligent calculation power supply layer configuration module is thermally connected by heat-conducting silicone grease, and a micro-channel copper water cooling plate is embedded in the area;

[0051] A thermocouple is pasted on the surface of the super calculation module to collect real-time temperature;

[0052] The temperature signal is transmitted to the control unit, and the target rotating speed is calculated by substituting the fan rotating speed adjustment formula;

[0053] The target rotating speed interval range is set according to the target rotating speed, and the control signal is sent to the adjustable speed fan to adjust the fan rotating speed to the target rotating speed interval range;

[0054] The actual temperature of the intelligent algorithm module is monitored in real time, and the pulse type heating is adapted to the heat dissipation.

[0055] In a preferred embodiment, the comprehensive evaluation model expression is as follows:

[0056]

[0057] In the formula, K is a comprehensive evaluation coefficient, is a signal transmission delay, is a signal transmission delay weight coefficient, is a temperature deviation of the intelligent algorithm module, is a temperature deviation weight coefficient of the intelligent algorithm module, is a temperature deviation of the supercomputer module, is a temperature deviation weight coefficient of the supercomputer module.

[0058] In a preferred embodiment, the evaluation system performance process is as follows:

[0059] If the comprehensive evaluation coefficient is greater than the first threshold value, there is a risk of dispatch interruption;

[0060] If the comprehensive evaluation coefficient is less than or equal to the first threshold value and greater than the second threshold value, there is a local performance bottleneck;

[0061] If the comprehensive evaluation coefficient is less than or equal to the second threshold value, the demand for real-time response of power dispatching and stable operation is met.

[0062] The technical effects and advantages of the multi-source collaborative green power energy optimization scheduling system are as follows:

[0063] 1. The present application constructs a heterogeneous computing power adaptive layered printed circuit (PCB) signal interaction layer and a dynamic impedance matching module, adopts a low-loss polytetrafluoroethylene substrate to shorten the supercomputer CPU and the intelligent algorithm GPU direct signal path to ≤15 cm, and through an adjustable capacitor array, the signal loss is compensated in real time according to the impedance matching formula, the reflection coefficient is closed-loop optimized to ≤-20dB, the signal transmission delay is reduced to ≤30ns, the real-time performance of power dispatching is significantly improved, and the technical bottleneck of high signal delay and poor transmission stability caused by traditional dispersed layout is solved.

[0064] 2. The application designs a partition adaptive heat dissipation structure and a precise power supply configuration module, the super-computing area adopts micro-channel water cooling and dynamically controls temperature according to a flow regulation formula, the intelligent computing area adopts a heat spreading plate + air cooling linkage to adapt to pulse type heating, and through a 2oz / 4oz copper thick power layer, voltage closed loop regulation and Schottky diode array buffer design, the super-computing temperature is stably kept at 55-65 DEG C, the intelligent computing temperature is stably kept at 65-75 DEG C, the super-computing voltage fluctuation is less than or equal to 2%, and the intelligent computing peak voltage drop is less than or equal to 0.3V, thereby effectively avoiding the risk of overheating and unstable power supply, and guaranteeing the continuous and efficient operation of the heterogeneous computing power. BRIEF DESCRIPTION OF DRAWINGS

[0065] Figure 1 A structure schematic diagram of a multi-source collaborative green power energy optimal scheduling system is given. DETAILED DESCRIPTION

[0066] The technical solutions in the embodiments of the application will be clearly and completely described below with reference to the drawings in the embodiments of the application. Obviously, the described embodiments are only part of the embodiments of the application, rather than all the embodiments. Based on the embodiments in the application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of the application.

[0067] Embodiment 1, Figure 1 A multi-source collaborative green power energy optimal scheduling system is given.

[0068] The interactive layer construction module constructs a direct connection signal channel of the super-computing CPU and the intelligent computing GPU in the integrated multi-layer PCB, and provides a physical carrier for subsequent signal transmission and impedance adjustment;

[0069] A low-loss polytetrafluoroethylene substrate (dielectric constant 3.2, loss tangent less than or equal to 0.002) is selected, and the substrate cutting and surface cleaning treatment are completed;

[0070] The layer structure of the integrated multi-layer PCB is determined, and the signal interaction layer is planned as a middle layer (between the super-computing power layer and the intelligent computing power layer);

[0071] The laser etching process is adopted to draw the direct connection signal line pattern of the super-computing CPU and the intelligent computing GPU on the signal interaction layer, and the path direction is designed to shorten the distance;

[0072] The line length measuring tool is used for real-time calibration, and the path length of the direct connection signal channel is ensured to be less than or equal to 15 cm;

[0073] The signal channel is subjected to conduction test and insulation test, and a stable signal transmission physical carrier is formed.

[0074] Impedance matching module, collecting the output impedance of super calculation module, the input impedance of intelligent calculation module and the signal path length parameter, calculating the target matching impedance according to the impedance matching formula, and monitoring the signal transmission reflection coefficient in real time, obtaining the signal transmission delay, and completing the impedance compensation;

[0075] The signal interaction layer construction module establishes physical connection, deploys impedance collection sensor, and collects the output impedance of super calculation module, the input impedance of intelligent calculation module and the actual length of signal channel respectively;

[0076] The output impedance of super calculation module, the input impedance of intelligent calculation module and the actual length of signal channel are substituted into the impedance matching formula to calculate the target matching impedance, and the formula is as follows:

[0077]

[0078] In the formula, The target matching impedance is Z0, The output impedance of super calculation module is Z1, The input impedance of intelligent calculation module is Z2, and α is the signal attenuation coefficient (about 0.02 dB / cm under polytetrafluoroethylene substrate), and L is the actual length of signal channel.

[0079] The control signal is sent to the adjustable capacitance array (capacity value 10-100 pF) integrated in the signal interaction layer, and the capacitance value is adjusted to match the target matching impedance, and the process is as follows:

[0080] According to the calculated target matching impedance, the characteristic impedance model of the direct channel of the signal interaction layer is combined to calculate the total capacitance value of the adjustable capacitance array required to realize the target matching impedance, and the formula is:

[0081]

[0082] In the formula, The total capacitance value of the adjustable capacitance array required to realize the target matching impedance is C0, and f is the center frequency of the power computing power signal, The target matching impedance is Z0;

[0083] The communication protocol of the control unit is configured, the total capacitance value of the adjustable capacitance array is converted into a digital control word, and the signal output level is set to match the driving requirements of the capacitance array;

[0084] The digital control word is sent through the PCB wiring between the control unit and the adjustable capacitance array, and the differential driving mode is started during transmission to suppress crosstalk in signal transmission;

[0085] The actual total capacitance value of the current array is collected through the capacitance value feedback pin of the adjustable capacitance array;

[0086] comparing the total capacitance value of the adjustable capacitance array required to achieve the target matching impedance with the actual total capacitance value of the current array, if the difference between the total capacitance value of the adjustable capacitance array required to achieve the target matching impedance and the actual total capacitance value of the current array is greater than a preset threshold, generating a fine tuning control signal according to the deviation direction;

[0087] If the total capacitance value of the adjustable capacitance array required to achieve the target matching impedance is greater than the actual total capacitance value of the current array, increase the control word, otherwise decrease, until it matches the target matching impedance.

[0088] Real-time monitoring of signal transmission reflection coefficient, if the reflection coefficient > -20dB, repeat the steps until the reflection coefficient ≤-20dB, complete the impedance compensation, the process is as follows:

[0089] The test port of the vector network analyzer (VNA) is connected to the input end of the signal interaction layer through the SMA joint, and the output end is connected to the input impedance load of the intelligent algorithm module. Calibrate the VNA to eliminate the influence of the test link itself reflection;

[0090] Start VNA continuous frequency sweep, control unit real-time receive VNA output reflection coefficient data through Ethernet interface, extract the maximum value of full frequency band reflection coefficient (i.e. the reflection coefficient under the worst working condition) every 50ms;

[0091] The maximum value sequence of the collected full frequency band reflection coefficient is filtered by moving average filtering (window size is 5 groups of data), and random noise interference is removed to obtain the filtered reflection coefficient;

[0092] If the fluctuation amplitude of the filtered reflection coefficient of the last 3 groups is ≤0.2dB, the data is valid; otherwise, extend the filtering window to 10 groups and recalculate;

[0093] Compare the filtered reflection coefficient with the preset threshold (-20dB):

[0094] If the filtered reflection coefficient is less than or equal to the preset threshold, record the current array actual total capacitance value, reflection coefficient data and signal transmission delay (measured by VNA at the same time, delay ≤30ns), determine that the impedance compensation meets the standard, and enter the stable running state;

[0095] If the filtered reflection coefficient is greater than the preset threshold, calculate the deviation value of the filtered reflection coefficient and the preset threshold, and correct the target matching impedance according to the deviation value until the filtered reflection coefficient is less than or equal to the preset threshold. The correction formula is as follows:

[0096]

[0097] In the formula, is the corrected target matching impedance, is the target matching impedance, the filtered reflection coefficient, a preset threshold.

[0098] The super-computing power layer configuration module is designed to lay power lines, and the output voltage is adjusted in real time through the voltage monitoring unit.

[0099] The top layer of the signal interaction layer construction module is connected through the pressing process, 2oz thick copper foil is used as the power line substrate, and the size is cut to match the size of the top layer of the signal interaction layer module.

[0100] The power supply interface position coordinates of the super-computing module are obtained, the power line direction is planned based on the PCB voltage drop model according to the power supply interface position of the super-computing module, and the line voltage drop is reduced.

[0101] A voltage monitoring unit (precision ±0.01V) is arranged at the output end of the power line to collect the output voltage value in real time.

[0102] The collected output voltage value is compared with the rated voltage (such as 12V) of the super-computing module, the voltage fluctuation coefficient is calculated, and the output voltage is dynamically adjusted through the voltage adjustment chip, the PWM duty cycle adjustment coefficient (the proportional coefficient is increased to 0.8) is optimized, or a larger capacity output filter capacitor (such as 220μF) is replaced, to ensure that the voltage fluctuation is ≤±2%.

[0103] The intelligent computing power layer configuration module: design and lay power lines, and adapt to the instantaneous peak current demand of the intelligent computing module through the current buffer unit.

[0104] The bottom layer of the signal interaction layer construction module is connected through the pressing process, 4oz thick (1.402mm) copper foil is used as the power line substrate, and the size is cut to match the size of the bottom layer of the signal interaction layer.

[0105] According to the power supply demand of the intelligent computing GPU (such as Ascend 910), multiple parallel power lines are designed to improve the current carrying capacity.

[0106] A current buffer unit (selecting a Schottky diode array) is arranged at the input end of the power line to suppress the instantaneous current impact.

[0107] The peak load of the intelligent computing module is simulated, and the response time and line voltage drop of the current buffer unit are tested.

[0108] Optimize the parameters of the current buffer unit. If the response time is greater than the preset range, replace the Schottky diode array with a smaller forward voltage drop; if the line voltage drop is greater than the allowed voltage drop range, widen the parallel line width to ensure that the instantaneous peak current demand of the intelligent computing module is met.

[0109] The super-computing module is used for high-precision calculation such as power grid simulation and physical modeling. The operation precision of the core chip (CPU) is directly related to the supply voltage. If the voltage fluctuation is too large, the internal logic level of the chip will be disturbed, and calculation data deviation (such as power grid simulation error exceeding the allowed range) will occur, which cannot meet the demand of "real-time and accurate decision-making" of power dispatching. The rated voltage (such as 12V) of the super-computing chip is the design working reference. If the voltage is too high (exceeding 13.5V), it will break through the internal insulation layer of the chip. If the voltage is too low (lower than 10.5V), it will cause the logic circuit of the chip to fail to trigger normally. By calculating and controlling the voltage fluctuation to be ≤±2%, the service life of the super-computing module can be effectively prolonged, and the probability of hardware failure can be reduced. The power dispatching system is the core infrastructure, and the calculation power cannot be interrupted due to unstable power supply. The calculation of voltage parameters is the premise of designing the "voltage monitoring-closed loop regulation" link to ensure continuous and stable power supply.

[0110] The intelligent computing GPU (such as Ascend 910) will have a transient peak current (such as 50A) in tasks such as large model training and load prediction, which is much higher than the steady-state current (such as 20A). If the peak current is not calculated, the line will be designed based on the steady-state current (such as 2oz copper foil, 3 groups in parallel), and the line will generate intense heat (temperature exceeding 100℃) due to overload under peak current, causing the copper foil to melt and the line to burn out. The design of 4oz copper foil + 5 groups of parallel lines is based on the matching of the carrying capacity of the peak current calculation. The "sudden change characteristics" (such as rising from 0A to 50A within 1μs) of the peak current will generate a large current impact. If the peak value and rising rate are not calculated, it is not possible to select a suitable current buffer unit (such as the response time of a Schottky diode array and the forward current need to match the peak impact). If the parameters of the buffer unit do not match, the impact current will directly act on the GPU, causing the chip pins to be ablated and the core circuit to be damaged. When the intelligent computing module detects that the supply voltage is suddenly reduced due to the peak current (such as a voltage drop exceeding 0.5V), it will automatically reduce the frequency to reduce power consumption, causing AI task processing delay (such as increased time consumption for device defect identification), which cannot meet the demand of "real-time response" of power dispatching. Calculating the peak current and optimizing the line and buffer unit can effectively control the voltage drop and avoid power reduction.

[0111] The super-computing water-cooled heat dissipation execution module embeds a micro-channel copper water-cooled plate in the PCB super-computing area. After receiving the temperature signal, it adjusts the water-cooled pump flow, and collects the real-time temperature of the super-computing module to realize stable heat dissipation.

[0112] The PCB area corresponding to the super-computing power supply layer configuration module is thermally connected through thermal silicone grease. A micro-channel copper water-cooled plate is embedded in this area.

[0113] The inlet and outlet of the water-cooled plate, the water-cooled pump, and the heat dissipation row form a closed-loop water-cooled circuit, which is tested for loop tightness.

[0114] A thermocouple is pasted on the surface of the super-computing module to collect real-time temperature.

[0115] Receiving the thermocouple temperature signal, substituting into the water cooling flow regulation formula to calculate the target flow, the formula is as follows:

[0116]

[0117] In the formula, is the target flow, is the water cooling flow regulation coefficient, is the real-time temperature of the supercomputing module, is the target temperature of the supercomputing module.

[0118] The water cooling pump control signal interface is connected with the output end of the control unit, PWM signal is adopted to adjust the water cooling pump speed, a micro flow sensor is installed at the water outlet of the water cooling plate to collect the actual flow in real time, the actual flow is compared with the target flow, if the deviation is greater than the preset threshold, the PWM duty cycle is adjusted until the deviation is less than or equal to the preset threshold, and the stable heat dissipation of the supercomputing module is realized.

[0119] The intelligent computing air cooling linkage control module deploys a heat plate in the GPU core area, collects the real-time temperature of the intelligent computing module through a thermocouple, controls the speed of the adjustable fan according to the fan speed regulation formula, and realizes pulse heating adaptive cooling.

[0120] The PCB area corresponding to the intelligent computing power layer configuration module is connected through heat-conducting glue, and a heat plate is deployed in the GPU core area;

[0121] A thermocouple is pasted on the surface of the heat plate to collect the real-time temperature of the intelligent computing module;

[0122] The temperature signal is transmitted to the control unit, and the target speed is calculated by substituting into the fan speed regulation formula, and the formula is as follows:

[0123]

[0124] In the formula, is the target speed, is the minimum speed limit, is the fan speed regulation coefficient, is the real-time temperature of the intelligent computing module, is the target temperature of the intelligent computing module;

[0125] According to the target speed, the target speed interval range is set, the control signal is sent to the adjustable fan, and the fan speed is adjusted to the target speed interval range.

[0126] The actual temperature of the intelligent computing module is monitored in real time, and pulse heating adaptive cooling is realized.

[0127] The comprehensive evaluation module constructs a comprehensive evaluation model according to the signal transmission delay, the real-time temperature of the intelligent algorithm module and the real-time temperature of the supercomputer module in combination with a preset temperature range, and evaluates the system performance.

[0128] The comprehensive evaluation model expression is as follows:

[0129]

[0130] In the formula, K is a comprehensive evaluation coefficient, is a signal transmission delay, is a signal transmission delay weight coefficient, is an intelligent algorithm module temperature deviation, is an intelligent algorithm module temperature deviation weight coefficient, is a supercomputer module temperature deviation, is a supercomputer module temperature deviation weight coefficient.

[0131] The process of evaluating the system performance according to the comprehensive evaluation coefficient is as follows:

[0132] If the comprehensive evaluation coefficient is greater than a first threshold value, there is a risk of dispatch interruption; if the comprehensive evaluation coefficient is less than or equal to the first threshold value and greater than a second threshold value, there is a local performance bottleneck; and if the comprehensive evaluation coefficient is less than or equal to the second threshold value, the demand for real-time response and stable operation of power dispatching is met.

[0133] The above formulas are all dimensionless numerical calculations, the formulas are obtained by software simulation of a large amount of data to obtain a formula of the most recent real situation, and the preset parameters in the formula are set by a person skilled in the art according to the actual situation.

[0134] The above embodiments can be realized wholly or partially by software, hardware, firmware or any other combination. When realized by software, the above embodiments can be realized wholly or partially in the form of a computer program product.

[0135] Those skilled in the art can realize that the modules and algorithm steps of the examples described in combination with the embodiments disclosed herein can be realized by electronic hardware or a combination of computer software and electronic hardware. Whether the functions are realized by hardware or software depends on the specific application and design constraints of the technical solutions. A person skilled in the art can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0136] In addition, each functional module in each embodiment of the present application can be integrated in one processing module, or each module can exist physically alone, or two or more modules can be integrated in one module.

[0137] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0138] In conclusion, the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A multi-source collaborative green power energy optimization dispatch system, characterized in that, It includes an interactive building module, an impedance matching module, a supercomputing power layer configuration module, an intelligent computing power layer configuration module, a supercomputing water-cooling heat dissipation execution module, an intelligent computing air-cooling linkage control module, and a comprehensive evaluation module. These modules are interconnected. The interactive building module constructs a direct signal channel between the supercomputing CPU and the intelligent computing GPU, providing a physical carrier for signal transmission and impedance adjustment; The impedance matching module collects the output impedance of the supercomputing module, the input impedance of the intelligent computing module, and the signal path length parameters. It calculates the target matching impedance according to the impedance matching formula, and monitors the signal transmission reflection coefficient in real time to obtain the signal transmission delay and achieve impedance compensation. The supercomputing power layer configuration module adjusts the output voltage in real time through a voltage monitoring unit. The intelligent computing power layer configuration module adapts to the instantaneous peak current requirements of the intelligent computing module through a current buffer unit. The supercomputing water cooling heat dissipation execution module collects the real-time temperature of the supercomputing module and adjusts the water cooling pump flow rate after receiving the temperature signal. The intelligent computing and air-cooling linkage control module collects the real-time temperature of the intelligent computing module and controls the speed of the adjustable fan according to the fan speed adjustment formula to achieve pulse-type heat generation and heat dissipation. The comprehensive evaluation module constructs a comprehensive evaluation model based on signal transmission delay, real-time temperature of the intelligent computing module and the real-time temperature of the supercomputing module, combined with a preset temperature range, to evaluate system performance.

2. The multi-source collaborative green power energy optimization dispatching system according to claim 1, characterized in that, The impedance matching module is implemented as follows: Establish a physical connection with the signal interaction layer construction module, deploy impedance acquisition sensors, and collect the output impedance of the supercomputing module, the input impedance of the intelligent computing module, and the actual length of the signal channel, respectively. Substitute the output impedance of the supercomputing module, the input impedance of the intelligent computing module, and the actual length of the signal channel into the impedance matching formula to calculate the target matching impedance. Send a control signal to the adjustable capacitor array (capacitance 10-100pF) integrated in the signal interaction layer to adjust the capacitor value to match the target impedance; Monitor the signal transmission reflection coefficient in real time. If the reflection coefficient is greater than -20dB, repeat the steps until the reflection coefficient is less than or equal to -20dB to complete the impedance compensation.

3. The multi-source collaborative green power energy optimization dispatching system according to claim 2, characterized in that, The process of sending a control signal to the adjustable capacitor array integrated in the signal interaction layer to adjust the capacitance value to match the target impedance is as follows: Based on the calculated target matching impedance and combined with the characteristic impedance model of the direct connection channel of the signal interaction layer, the total capacitance of the adjustable capacitor array required to achieve the target matching impedance is calculated using the following formula: In the formula, The total capacitance of the adjustable capacitor array required to achieve the target impedance matching, where f is the center frequency of the power computing signal. Match the impedance to the target; Configure the communication protocol of the control unit to convert the total capacitance value of the adjustable capacitor array into a digital control word, and set the signal output level to match the driving requirements of the capacitor array. Digital control words are sent via PCB traces between the control unit and the adjustable capacitor array; The actual total capacitance value of the adjustable capacitor array is collected through the capacitance feedback pin. Compare the total capacitance of the adjustable capacitor array required to achieve the target impedance matching with the actual total capacitance of the current array. If the difference between the total capacitance of the adjustable capacitor array required to achieve the target matching impedance and the actual total capacitance of the current array is greater than a preset threshold, a fine-tuning control signal is generated according to the direction of the deviation until the target matching impedance is matched.

4. The multi-source collaborative green power energy optimization dispatching system according to claim 3, characterized in that, The implementation steps for the supercomputing power layer configuration module are as follows: The top layer of the signal interaction layer module is connected to the top layer through a lamination process. 2oz thick copper foil is used as the power line substrate and is cut to match the size of the top layer of the signal interaction layer module. Obtain the coordinates of the supercomputing module's power supply interface. Based on the location of the supercomputing module's power supply interface, plan the power supply line routing using the PCB voltage drop model to reduce line voltage drop. A voltage monitoring unit is deployed at the output end of the power line to collect the output voltage value in real time. The collected output voltage value is compared with the rated voltage of the supercomputing module to calculate the voltage fluctuation coefficient. The output voltage is then dynamically adjusted through the voltage regulation chip. The PWM duty cycle adjustment coefficient of the regulation chip is optimized, or a larger capacity output filter capacitor is replaced to ensure that the voltage fluctuation is ≤±2%.

5. The multi-source collaborative green power energy optimization dispatching system according to claim 4, characterized in that, The implementation steps of the intelligent computing power layer configuration module are as follows: The bottom layer of the signal interaction layer building module is connected to the bottom layer through a lamination process. 4oz thick copper foil is used as the power line substrate, and the cutting size matches the bottom layer of the signal interaction layer. Based on the power supply requirements of the intelligent computing GPU, multiple sets of parallel power supply lines are designed to improve the current carrying capacity. A current buffer unit is deployed at the power line input to suppress instantaneous current surges; Simulate peak load of intelligent computing module to test response time of current buffer unit and line voltage drop; Optimize the parameters of the current buffer unit. If the response time is greater than the preset range, replace it with a Schottky diode array with a smaller forward voltage drop. If the line voltage drop exceeds the allowable voltage drop range, the parallel line width should be increased to ensure it can meet the instantaneous peak current requirements of the intelligent computing module.

6. The multi-source collaborative green power energy optimization dispatching system according to claim 5, characterized in that, The implementation process of the supercomputing water-cooling heat dissipation module is as follows: The PCB area corresponding to the supercomputing power layer configuration module is thermally connected through thermal grease, and a microchannel copper water-cooling plate is embedded in this area. The inlet and outlet of the water-cooled plate are connected to the water-cooled pump and radiator to form a closed-loop water-cooling circuit, and the circuit sealing performance is tested. Thermocouples are attached to the surface of the supercomputing module to collect real-time temperature data. Receive the thermocouple temperature signal and substitute it into the water cooling flow rate adjustment formula to calculate the target flow rate.

7. A multi-source collaborative green power energy optimization dispatching system according to claim 6, characterized in that, The implementation process of the intelligent computing air-cooling linkage control module is as follows: A thermal connection is established in the PCB area corresponding to the intelligent computing power layer configuration module through thermal adhesive, and a heat sink is deployed in the GPU core area; Thermocouples are attached to the surface of the heat spreader to collect the real-time temperature data of the intelligent computing module. The temperature signal is transmitted to the control unit, and the target speed is calculated by substituting it into the fan speed adjustment formula. Set the target speed range according to the target speed, send a control signal to the adjustable speed fan, and adjust the fan speed to the target speed range. Real-time monitoring of the actual temperature of the intelligent computing module enables pulsed heat dissipation.

8. A multi-source collaborative green power energy optimization dispatching system according to claim 7, characterized in that, The comprehensive evaluation model expression is as follows: In the formula, K is the comprehensive evaluation coefficient. For signal transmission delay, This is the signal transmission delay weighting coefficient. Temperature deviation of the intelligent computing module The temperature deviation weighting coefficient for the intelligent computing module. Temperature deviation of the supercomputing module This is the weighting coefficient for the temperature deviation of the supercomputing module.

9. A multi-source collaborative green power energy optimization dispatching system according to claim 8, characterized in that, The process for evaluating system performance is as follows: If the comprehensive evaluation coefficient is greater than the first threshold, there is a risk of scheduling interruption. If the comprehensive evaluation coefficient is less than or equal to the first threshold but greater than the second threshold, then there is a local performance bottleneck. If the comprehensive evaluation coefficient is less than or equal to the second threshold, it meets the requirements for real-time response and stable operation of power dispatch.

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