Polyimide die substrate
By using polyimide as a non-conductive substrate material, the complexity and electric field distribution issues in MCM design and manufacturing are resolved, enabling more flexible design and efficient manufacturing processes, and improving the performance and reliability of multi-chip module packaging.
Patent Information
- Application Number
- CN202511158324.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-08-30
- Filing Date
- 2025-08-19
- Publication Date
- 2026-03-17
AI Technical Summary
Existing multi-chip module packages (MCMs) suffer from problems such as long design time, high cost, large hardware complexity, unreasonable electric field distribution, and red box oxide formation during the design and manufacturing process. Especially in isolation applications, the design and placement of bare die pads are limited, affecting design flexibility and manufacturing yield.
Polyimide is used as a non-conductive substrate material to replace the traditional metal die pads. The semiconductor die is coupled to the polyimide substrate through an adhesive layer and a molding compound covering structure is used to ensure that the semiconductor die operates independently in different voltage domains and does not require segmented die pads. The polyimide substrate is at least 50 micrometers thick to provide rigid support.
It simplifies the design process, reduces costs and complexity, improves design flexibility, avoids uneven electric field distribution and red box oxide formation, and enhances the simplicity and reliability of manufacturing.
Smart Images
Figure CN121693202A_ABST
Abstract
Description
Technical Field
[0001] This invention generally relates to the field of semiconductor packaging, and more specifically to a polyimide bare die substrate. Background Technology
[0002] A semiconductor package may include a semiconductor die and a housing to cover the semiconductor die. The semiconductor package may further include conductive terminals exposed on the outer surface of the housing. The conductive terminals are coupled to the semiconductor die. The conductive terminals provide an electrical path between the circuitry on the semiconductor die and components outside the semiconductor package (e.g., a printed circuit board). Summary of the Invention
[0003] In one example, a semiconductor package includes a semiconductor die having a device side comprising a circuit system and a non-device side opposite the device side. The semiconductor package includes a polyimide substrate coupled to the non-device side of the semiconductor die via an adhesive layer. The semiconductor package includes conductive terminals coupled to the polyimide substrate via the adhesive layer, and bonding wires coupled to the device side of the semiconductor die and coupled to the conductive terminals. The semiconductor package includes a molding compound covering at least a portion of the semiconductor die, the polyimide substrate, the bonding wires, and the conductive terminals, wherein the conductive terminals extend beyond the molding compound.
[0004] In one example, a method for manufacturing a semiconductor package includes dicing a semiconductor wafer to produce a semiconductor die, wherein the semiconductor die has a device side in which a circuit system is formed and a non-device side opposite the device side. The method further includes coupling the non-device side of the semiconductor die to a non-conductive strip using an adhesive layer, coupling conductive terminals to the non-conductive strip using an adhesive layer, coupling bonding wires to the device side of the semiconductor die and to the conductive terminals, and covering the semiconductor die, conductive terminals, bonding wires, and non-conductive strip with a molding compound. Attached Figure Description
[0005] Figure 1A-1E These are top views, cross-sectional views, sectional views, and perspective views of semiconductor packages containing polyimide die substrates, based on various examples.
[0006] Figure 2 This is a flowchart illustrating methods for manufacturing semiconductor packages containing polyimide die substrates, based on various examples.
[0007] Figure 3 This is a flowchart illustrating methods for manufacturing semiconductor packages containing polyimide die substrates, based on various examples.
[0008] Figure 4A-4F4 It is a process flow diagram for manufacturing semiconductor packages containing polyimide bare die substrates, based on various examples. Detailed Implementation
[0009] A multi-chip module, or MCM, is a specialized electronic package that contains multiple integrated circuits (ICs) in each package. MCMs offer advantages over other package types, such as improved performance through reduced latency between ICs, a more compact and lightweight design, enhanced reliability with fewer interconnects, improved power efficiency by minimizing the distance between ICs, and potential cost savings in high-volume production. MCMs are widely used in applications requiring high performance, compact size, and reliability, such as telecommunications, computing, aerospace, and military systems. MCMs can also be used in applications requiring voltage isolation between ICs, such as in some power applications.
[0010] However, MCMs also have several drawbacks. For example, each package requires its own specific die pad design to accommodate a particular die placement, which can increase design time, cost, and hardware complexity. Furthermore, in MCMs used for isolation applications, the die cannot be positioned near the edges of the conductive die pads, as doing so could generate unwanted electric fields at the package edges or even extending beyond the package. This negatively limits design flexibility. Additionally, in isolation applications, the die pads must be divided into two or more segments, rather than as a single piece, each segment corresponding to a different die and a different voltage domain. The dies must be separated by a minimum threshold distance to maintain voltage isolation. Moreover, the process of preventing red box oxide (RBO) formation on the die attachment pads after die mounting can cause epoxy resin to flow into unwanted areas, thus reducing manufacturing yield.
[0011] This disclosure describes various examples of a semiconductor package comprising a semiconductor die substrate formed of a non-conductive strip, such as polyimide instead of a metal (e.g., copper). The polyimide substrate may have a minimum thickness of 50 micrometers to provide rigidity and mechanical strength to support structures mounted on the substrate. Multiple semiconductor dies, configurable to operate in individual voltage domains, may be coupled to the substrate, with no gaps between the semiconductor dies and no minimum required distance between them. The device sides of the semiconductor dies may be wire-bonded to conductive terminals. Molding compound may cover at least a portion of the substrate, the multiple semiconductor dies, bonding wires, and conductive terminals. Because the substrate is formed of a non-conductive strip, custom die pads are not required, saving design time and cost and minimizing complexity. Furthermore, because the substrate is a non-conductive strip, there is no need to mitigate the electric field at the package periphery, and the semiconductor dies can be positioned more flexibly throughout the package, including positioning near the edges of the non-conductive strip. Additionally, the non-conductive strip does not need to be divided into multiple segments for different voltage domains. In practice, multiple semiconductor dies configured to operate in separate voltage domains can be coupled to the same monolithic nonconductive stripe (e.g., polyimide), thus increasing design and fabrication simplicity. Furthermore, RBO mitigation is unnecessary for the nonconductive stripe, thereby eliminating the technical challenges associated with RBO mitigation.
[0012] Figure 1A-1E These are top views, cross-sectional views, sectional views, and perspective views of semiconductor packages containing polyimide die substrates, based on various examples. Specifically, Figure 1A This is a top view of a semiconductor package 100 according to various embodiments. The semiconductor package 100 includes a polyimide die substrate 102. The term "polyimide die substrate 102" is included, but in this embodiment, the die substrate 102 may be made of any non-conductive material, and the polyimide die substrate 102 may also be referred to herein as a non-conductive die substrate, non-conductive substrate, die substrate, polyimide substrate, or substrate. An adhesive layer 104 is coupled to the top surface of the polyimide die substrate 102. The semiconductor package 100 includes semiconductor dies 106, 108, and 110. One or more of the semiconductor dies 106, 108, and 110 may be configured to operate in a different voltage domain than one or more of the remaining semiconductor dies 106, 108, and 110. "Different voltage domain" or similar terms mean that one or more semiconductor dies operate electrically independently of one or more other semiconductor dies, without sharing electrical connections, including a ground connection. Figure 1A In a specific instance, semiconductor dies 106, 108 are configured to operate in a first voltage domain, and semiconductor die 110 is configured to operate in a second voltage domain. An adhesive layer 104 couples a polyimide die substrate 102 to each of the semiconductor dies 106, 108, 110.
[0013] Semiconductor package 100 may include a plurality of conductive terminals or “leads” 112, 114. The conductive terminals 112, 114 may have a gull-wing shape, but the scope of this disclosure is not limited thereto. The conductive terminals 112 extend from within a molding compound 116 covering various aforementioned components of the semiconductor package 100 to the outside of the molding compound 116, as shown. Similarly, the conductive terminals 114 extend from within the molding compound 116 to the outside of the molding compound 116, as shown. Bonding wires 118 may couple semiconductor dies 106, 108 to each other, and bonding wires 118 may further couple semiconductor die 106 to the conductive terminals 112. Bonding wires 120 may couple semiconductor die 110 to the conductive terminals 114. Because semiconductor dies 106 and 108 are configured to operate in a different voltage domain than semiconductor die 110, and further because semiconductor dies 106 and 108 are coupled to conductive terminal 112, while semiconductor die 110 is coupled to conductive terminal 114, conductive terminals 112 and 114 are also configured to operate in a separate voltage domain. Figure 1A The specific configurations shown are different from those shown, and are also included within the scope of this disclosure.
[0014] As described above, the polyimide die substrate 102 can be made of any suitable non-conductive material, such as polyimide. Other examples of materials that can constitute the polyimide die substrate 102 in place of polyimide include multilayer films, such as... Stacked film (ABF) and similar molding compound materials. For consistency, regardless of the specific material constituting the polyimide die substrate 102, it may be referred to herein as polyimide die substrate 102. The polyimide die substrate 102 is used to provide structural support for one or more semiconductor dies, replacing structures such as metal die pads. For example, instead of using die attachment materials to couple semiconductor dies to metal die pads, an adhesive layer 104 can be used to couple semiconductor dies to the polyimide die substrate 102. Examples of adhesives used in the adhesive layer 104 may include thermosetting adhesives. In some instances, the adhesive layer 104 may be composed of a combination of one or more adhesives.
[0015] As explained above, the polyimide die substrate 102 is included in the semiconductor package 100 in place of the metal die pads, and in some instances, the semiconductor package 100 lacks the metal die pads. More precisely, the polyimide die substrate 102 is not coupled to a metal substrate (or die pads) that is parallel to the horizontal plane in which the monolithic non-conductive polyimide substrate 102 is located.
[0016] The polyimide die substrate 102 must have sufficient rigidity to structurally support the semiconductor dies coupled to it, such as semiconductor dies 106, 108, and 110. Insufficient rigidity in the polyimide die substrate 102 will prevent the maintenance of coupling to the semiconductor dies 106, 108, and 110, resulting in decoupling at the connection points to the semiconductor dies 106, 108, and 110. Furthermore, insufficient rigidity in the polyimide die substrate 102 will prevent the maintenance of bonding wire connections, such as those to bonding wires 118 and 120. The molding compound 116 will experience structural integrity problems, such as cracking. Generally, insufficient rigidity in the polyimide die substrate 102 will have a catastrophic impact on the structural and functional integrity of the semiconductor package 100. Therefore, the rigidity of the polyimide die substrate 102 must be greater than the corresponding wire bending stress; rigidity below this threshold is detrimental, at least for the reasons stated above. Furthermore, this rigidity of the polyimide die substrate 102 can be achieved by ensuring that the thickness of the polyimide die substrate 102 is at least 50 micrometers. A thickness of less than 50 micrometers for the polyimide die substrate 102 would lead to the aforementioned rigidity problem. The thickness of the adhesive layer 104 ranges from 10 micrometers to 20 micrometers. Thicknesses below this range are disadvantageous because the resulting adhesive strength is weak, and thicknesses above this range are disadvantageous because the adhesive layer may float on top of the die surface.
[0017] Because the polyimide die substrate 102 is non-conductive, semiconductor dies configured to operate in different voltage domains can coexist on the polyimide die substrate 102 without any gaps between them. The polyimide die substrate 102 is a monolithic structure, rather than multiple separate structures or two or more structures bonded together by coupling (e.g., adhesives or other coupling members).
[0018] Figure 1B It is based on each instance. Figure 1A A cross-sectional view of the structure is shown. As shown, adhesive layer 104 contacts the top surface of polyimide die substrate 102. (As used herein, the term "contact" refers to physical contact between two or more items.) Semiconductor dies 106, 108, 110 have device sides in which circuit systems are formed, and these device sides face away from polyimide die substrate 102 and adhesive layer 104. Bonding lines 118, 120 are coupled to these device sides. Semiconductor dies 106, 108, 110 also include non-device sides opposite to the device sides. The non-device sides of semiconductor dies 106, 108, 110 face polyimide die substrate 102 and adhesive layer 104. The non-device sides of semiconductor dies 106, 108, 110 are approximately coplanar with the bottom surfaces of conductive terminals 112, 114, which face the monolithic non-conductive substrate 102.
[0019] Each of the semiconductor dies 106, 108, and 110 is coupled to a different portion of the polyimide die substrate 102 via a different portion of the adhesive layer 104. The different portions of the polyimide die substrate 102 coupled to the different semiconductor dies 106, 108, and 110 (via the adhesive layer 104) are not separated by gaps, but are part of a single polyimide die substrate 102. Similarly, the different portions of the adhesive layer 104 coupled to the different semiconductor dies 106, 108, and 110 are not separated by gaps, but are part of a single adhesive layer 104. This monolithic structure is faster, cheaper, and more efficient to manufacture and use, and is made possible by the fact that the polyimide die substrate 102 and the adhesive layer 104 are non-conductive, thus enabling the semiconductor dies 106, 108, and 110 to be coupled to a common monolithic structure despite operating in different voltage domains.
[0020] Figure 1C It is based on each instance. Figure 1A A cross-sectional view of the structure. Figure 1D It is based on each instance. Figure 1A A cross-sectional view of the structure. Figure 1E It is based on each instance. Figure 1A A perspective view of the structure.
[0021] Figure 2 This is a flowchart of a method 200 for manufacturing a semiconductor package comprising a polyimide die substrate, according to various embodiments. More specifically, according to various embodiments, method 200 includes a step for manufacturing a lead frame, which in turn can be used to manufacture a semiconductor package comprising a polyimide die substrate. Method 200 includes stamping and / or etching a lead frame (202) containing conductive terminals (e.g., leads) and without die pads. For example, the conductive terminals of the lead frame can be coupled to each other by tie rods. However, there are no metal die pads. The conductive terminals can be made of any suitable metal or alloy (e.g., copper) and can be formed using any suitable technique (e.g., stamping, etching, or other techniques).
[0022] Method 200 includes trimming a nonconductive strip, such as a polyimide strip (204). For example, a polyimide strip with relatively large dimensions (e.g., length and width) in the xy-plane can be trimmed to more easily match the dimensions of the lead frame manufactured in step 202. For instance, the lead frame manufactured in step 202 could be a strip of approximately x centimeters in length and y micrometers in width. Therefore, the polyimide strip or other suitable nonconductive strip can be trimmed such that its length is approximately x centimeters and its width is approximately y micrometers. In some instances, trimming the nonconductive strip may also include trimming the nonconductive strip in the z-direction, which means trimming the thickness of the nonconductive strip.
[0023] Method 200 may include coupling the back side of the lead frame to the non-conductive strip (206) using an adhesive layer. For example, an adhesive layer already trimmed to have xy dimensions similar to those of the non-conductive strip may be applied to the non-conductive strip, and the resulting assembly may then be coupled to the back side of the lead frame produced in step 202 using the adhesive layer. In some instances, trimming the adhesive layer may also include trimming the adhesive layer in the z-direction, which means trimming the thickness of the adhesive layer.
[0024] Method 200 may include, if the leadframe has not yet been trimmed into a strip and if the leadframe dimensions do not yet approximately match the dimensions of the nonconductive strip, optionally trimming the leadframe into a strip shape to match the shape of the nonconductive strip (208). For example, if the nonconductive strip has a length of x centimeters and a width of y micrometers, and if the leadframe has dimensions greater than x and y, the leadframe may be trimmed to approximately match x and y. The advantage of trimming the leadframe after coupling it to the nonconductive strip is that appropriate leadframe dimensions can be easily achieved by using the nonconductive strip as a template.
[0025] Therefore, method 200 produces a structure comprising a leadframe strip with conductive terminals and a non-conductive die substrate coupled to the leadframe strip. This structure can then be used in method 300, described below, to form a semiconductor package having a non-conductive (e.g., polyimide) die substrate.
[0026] Figure 3 This is a flowchart of a method 300 for manufacturing a semiconductor package containing a polyimide die substrate, based on various examples. Figure 4A-4F4 These are process flow diagrams for manufacturing semiconductor packages containing polyimide bare die substrates, based on various examples. Therefore, they are now described in parallel. Figure 3 and 4A -4F4.
[0027] Method 300 includes dicing a semiconductor wafer (e.g., silicon, gallium nitride) to produce a semiconductor die, wherein the semiconductor die has a device side in which a circuit system is formed and a non-device side opposite to the device side (302). Figure 4A Depicting semiconductor chip 400, and Figure 4B A semiconductor die 402 is depicted, produced by dicing a semiconductor wafer 400 (e.g., by mechanical or laser sawing). As shown, the semiconductor die 402 may have a device side 404 and bonding pads 406, but the scope of this disclosure is not limited to any particular type of semiconductor die. Circuitry may be formed in and / or on the device side 404. Bonding pads 406 may be electrically coupled to various portions of the circuitry.
[0028] Method 300 includes coupling the non-device side of a semiconductor die to a non-conductive strip using an adhesive layer, wherein the non-conductive strip has first and second surfaces orthogonal to each other and is coupled to a conductive terminal on the first surface, wherein the conductive terminal extends through a plane (304) containing the second surface. Figure 4C1 This is a top view of the structure obtained by performing step 304. Structure 408 includes a lead frame strip 410 coupled to the non-conductive strip 412 (for clarity, tie rods and baffles are omitted from the view). For example, conductive terminals 112, 114 may be part of the lead frame strip 410, and the lead frame strip 410 may be coupled to the non-conductive strip 412, as described in method 200. Furthermore, in step 302 (e.g., Figure 4A and 4B Semiconductor dies produced in the process (e.g., semiconductor dies 106, 108, 110) Figure 1A An adhesive layer can be used (e.g., adhesive layer 104). Figure 1A , 1B The conductive terminals 112 and 114 are coupled to a non-conductive strip 412. The non-conductive strip 412 has a first top surface (facing the lead frame strip 410) and a second side surface 405 orthogonal to the first top surface. The second side surface 405 of the non-conductive strip 412 lies in a first plane, and some of the conductive terminals 112 and 114 extend through the first plane. A second plane parallel to the first plane contains another side surface 407 of the non-conductive strip 412, and some of the conductive terminals 112 and 114 extend through this second plane. Figure 4C2 It is based on each instance. Figure 4C1 A cross-sectional view of the structure. Figure 4C3 It is based on each instance. Figure 4C1 Another cross-sectional view of the structure. Figure 4C4 It is based on each instance. Figure 4C1 A perspective view of the structure.
[0029] Method 300 includes coupling a bonding wire to the device side of a semiconductor die and to a conductive terminal (306). Figure 4D1 yes Figure 4C1 The top view of the structure differs in that bonding lines 118 and 120 are coupled to semiconductor dies 106, 108, and 110 and to conductive terminals 112 and 114, as shown. Other configurations of bonding line connections have been carefully considered and are included within the scope of this disclosure. Furthermore, various types of bonding elements have been carefully considered and are included within the scope of this disclosure, such as ball joints, stitched joints, etc. Figure 4D2 It is based on each instance. Figure 4D1 A cross-sectional view of the structure. Figure 4D3 It is based on each instance. Figure 4D1 Another cross-sectional view of the structure. Figure 4D4 It is based on each instance. Figure 4D1 A perspective view of the structure.
[0030] Method 300 includes covering a semiconductor die, conductive terminals, bonding wires, and non-conductive strips with molding compound (308). Figure 4E1 It is as shown in the figure and according to each example Figure 4D1 The top view of the structure differs in that molding compound 116 has been applied to the structure. Molding compound 116 can be applied using any suitable technique, such as by using a mold and a molding injection system. Figure 4E2 It is based on each instance. Figure 4E1 A cross-sectional view of the structure. Figure 4E3 It is based on each instance. Figure 4E1 Another cross-sectional view of the structure. Figure 4E4 It is based on each instance. Figure 4E1 A perspective view of the structure.
[0031] Method 300 includes trimming and bending the conductive terminals and cutting the molding compound into individual semiconductor packages (310). Figure 4F1 The display can be adjusted Figure 4E1 The conductive terminals 112 and 114 are bent and the molding compound 116 is cut to produce individual semiconductor packages 100, resulting in an example structure. Figure 4F2 It is based on each instance. Figure 4F1 A cross-sectional view of the structure. Figure 4F3 It is based on each instance. Figure 4F1 Another cross-sectional view of the structure. Figure 4F4 It is based on each instance. Figure 4F1 A perspective view of the structure.
[0032] In this specification, the term "coupling" may encompass a connection, link, or signal path that achieves a functional relationship consistent with this specification. For example, if device A generates a signal to control device B to perform an action, then: (a) in a first instance, device A is coupled to device B via a direct connection; or (b) in a second instance, if intermediate component C does not alter the functional relationship between device A and device B, then device A is coupled to device B via intermediate component C such that device B is controlled by the control signal generated by device A.
[0033] A device “configured to” perform a task or function can be configured by the manufacturer at manufacturing time (e.g., programming and / or hardwiring) to perform a function and / or can be configured (or reconfigured) by the user after manufacturing to perform a function and / or other additional or alternative functions. Configuration can be done via firmware and / or software programming of the device, via the construction and / or layout of the device’s hardware components and interconnections, or a combination thereof.
[0034] In this specification, unless otherwise stated, "about," "approximately," or "generally" preceding a parameter means within + / - 10% of said parameter. Modifications to the described examples are possible within the scope of the claims, and other examples are also possible.
[0035] As used herein, the terms “terminal,” “node,” “interconnect,” “pin,” and “lead” are used interchangeably. Unless specifically stated otherwise, these terms are generally used to refer to interconnections or ends between device elements, circuit elements, integrated circuits, devices, or semiconductor components.
Claims
1. A semiconductor package comprising: a first semiconductor die having a first device side including first circuitry and a first non-device side opposite the first device side, the first semiconductor die configured to operate in a first voltage domain; a second semiconductor die having a second device side including second circuitry and a second non-device side opposite the second device side, the second semiconductor die configured to operate in a second voltage domain different from the first voltage domain; a non-conductive substrate coupled to the first and second non-device sides of the first and second semiconductor dies, respectively, by an adhesive layer; first and second conductive terminals coupled to the non-conductive substrate by the adhesive layer; a first bond wire coupled to the first device side of the first semiconductor die and to the first conductive terminal; a second bond wire coupled to the second device side of the second semiconductor die and to the second conductive terminal; and a mold compound covering at least portions of the first and second semiconductor dies, the non-conductive substrate, the first and second bond wires, and the first and second conductive terminals, the first and second conductive terminals extending outside of the mold compound.
2. The semiconductor package of claim 1, wherein the non-conductive substrate is not coupled to a metal substrate parallel to a horizontal plane in which the non-conductive substrate lies.
3. The semiconductor package of claim 1, wherein the first non-device side of the first semiconductor die and the second non-device side of the second semiconductor die are approximately coplanar with bottom surfaces of the first and second conductive terminals, the bottom surfaces of the first and second conductive terminals facing the non-conductive substrate.
4. The semiconductor package of claim 1, wherein the non-conductive substrate comprises polyimide.
5. The semiconductor package of claim 1, wherein the non-conductive substrate is at least 50 microns thick.
6. The semiconductor package of claim 1, wherein the adhesive layer includes a heat- curable adhesive.
7. The semiconductor package of claim 1, wherein the non-conductive substrate is monolithic.
8. A semiconductor package comprising: a semiconductor die having a device side including circuitry and a non-device side opposite the device side; a polyimide substrate coupled to the non-device side of the semiconductor die by an adhesive layer; a conductive terminal coupled to the polyimide substrate by the adhesive layer; a bond wire coupled to the device side of the semiconductor die and to the conductive terminal; and a mold compound covering at least portions of the semiconductor die, the polyimide substrate, the bond wire, and the conductive terminal, the conductive terminal extending outside of the mold compound.
9. The semiconductor package of claim 8, wherein the polyimide substrate is not coupled to a metal substrate parallel to a horizontal plane in which the polyimide substrate lies. 10. The semiconductor package of claim 8, wherein the non-device side of the semiconductor die is approximately coplanar with a bottom surface of the conductive terminal, the bottom surface of the conductive terminal facing the polyimide substrate.
11. The semiconductor package of claim 8, further comprising a second semiconductor die having a second device side including second circuitry and a second non-device side opposite the second device side, wherein the second non-device side is coupled to the polyimide substrate by the adhesive layer.
12. The semiconductor package of claim 11, wherein the second device side is coupled to a second conductive terminal by a second wire bond.
13. The semiconductor package of claim 11, wherein the semiconductor die and the second semiconductor die are in separate voltage domains.
14. The semiconductor package of claim 13, wherein a portion of the polyimide substrate coupled with the semiconductor die and a second portion of the polyimide substrate coupled with the second semiconductor die are not separated by a gap in the polyimide substrate.
15. The semiconductor package of claim 8, wherein the polyimide substrate has a thickness of at least 50 microns.
16. A method for manufacturing a semiconductor package, comprising: singulating a semiconductor wafer to produce a semiconductor die having a device side with circuitry formed therein and a non-device side opposite the device side; coupling the non-device side of the semiconductor die to a non-conductive tape using an adhesive layer; coupling a conductive terminal to the non-conductive tape using the adhesive layer; coupling a wire bond to the device side of the semiconductor die and to the conductive terminal; and covering the semiconductor die, the conductive terminal, the wire bond, and the non-conductive tape with a molding compound.
17. The method of claim 16, wherein the non-conductive tape comprises polyimide.
18. The method of claim 16, wherein the non-conductive tape has a minimum thickness of 50 microns.
19. The method of claim 16, wherein the semiconductor package does not include a metal die pad coupled with the semiconductor die.
20. The method of claim 16, wherein the adhesive layer includes a heat-curable adhesive.
21. The method of claim 16, further comprising coupling a second semiconductor die to the non-conductive tape using the adhesive layer, the semiconductor die and the second semiconductor die configured to operate in different voltage domains.
22. The method of claim 21, wherein a first portion of the non-conductive tape coupled with the semiconductor die and a second portion of the non-conductive tape coupled with the second semiconductor die are not separated by a gap in the non-conductive tape.