On-chip integrated laser light source and optical coupling integration method thereof

Abstract

The invention provides an on-chip integrated laser light source and an optical coupling integration method thereof.The on-chip integrated laser light source comprises a silicon optical substrate and a light source chip assembly integrated on the silicon optical substrate, and the silicon optical substrate comprises an optical signal transmission waveguide; the light source chip assembly comprises a surface-emitting distributed feedback laser chip so as to generate laser beams emitted in the direction perpendicular to the surface of the chip. The on-chip integrated laser light source further comprises a grating coupling structure arranged between the surface emission distributed feedback laser chip and the optical signal transmission waveguide. The light-emitting surface of the surface-emitting distributed feedback laser chip is arranged towards the silicon light substrate, and a laser beam generated by the surface-emitting distributed feedback laser chip is directly projected and coupled into the light signal transmission waveguide through the grating coupling structure; the surface-emitting distributed feedback laser chip is fixedly combined on the silicon optical substrate through a flip chip technology, so that the high-precision end face alignment requirement of the heterogeneous integrated waveguide is converted into high-efficiency grating coupling based on a surface light emitting mode. In this way, harsh end face coupling is converted into efficient grating coupling.

Description

Technical Field

[0001] This application relates to the field of semiconductor optoelectronic integration technology, specifically to an on-chip integrated laser source and its optical coupling integration method. Background Technology

[0002] With the development of silicon-based photonic integration technology, photonic integrated circuits are increasingly widely used in fields such as optical communication due to their high integration advantages. However, in existing technologies, the integration of laser sources and silicon optical waveguides mostly adopts end-face coupling or evanescent wave coupling schemes, which have the following limitations: On the one hand, whether it is flip-chip bonding or heterogeneous integration, the requirements for the three-dimensional spatial alignment accuracy between the laser chip and the silicon optical waveguide are extremely stringent, usually needing to reach the sub-micron level, resulting in complex packaging processes, low yields, and high production costs; on the other hand, the high-precision alignment requirements also limit the scalability and production testing efficiency of light source array integration, making it difficult to meet the urgent needs of data centers and other scenarios for low-cost, high-density on-chip integrated light sources. Summary of the Invention

[0003] Therefore, it is necessary to provide an integrated laser source and its optical coupling integration method to solve at least one of the above-mentioned technical problems.

[0004] In a first aspect, this application provides an on-chip integrated laser light source, including a silicon optical substrate and a light source chip assembly integrated on the silicon optical substrate, wherein the silicon optical substrate includes an optical signal transmission waveguide. The light source chip assembly includes a surface-emitting distributed feedback laser chip to generate a laser beam emitted in a direction perpendicular to the chip surface; The on-chip integrated laser source also includes a grating coupling structure between the distributed feedback laser chip emitted from the surface and the optical signal transmission waveguide; The light-emitting surface of the surface-emitting distributed feedback laser chip faces the silicon optical substrate, and the laser beam generated by the surface-emitting distributed feedback laser chip is directly projected and coupled into the optical signal transmission waveguide through the grating coupling structure. The surface-emitting distributed feedback laser chip is fixedly bonded to the silicon photonic substrate using a flip-chip process, so as to transform the high-precision end-face alignment requirement of heterogeneous integrated waveguide into a high-efficiency grating coupling based on surface emission.

[0005] In this way, the demanding end-face coupling is transformed into efficient grating coupling.

[0006] Furthermore, the grating coupling structure includes a first grating and a second grating. The first grating is composed of a distributed feedback grating arranged in the resonant cavity of the surface-emitting distributed feedback laser chip to control the lasing wavelength and form surface-emitting light. The second grating is composed of a surface-coupled grating arranged on the surface of the silicon photonics substrate and physically connected to the optical signal transmission waveguide. The surface-emitting distributed feedback laser chip is configured such that the optical signal emitted perpendicularly from the first grating is received by the second grating based on a certain angle between its light-emitting surface and the surface of the silicon photonics substrate, so as to define the transmission optical path from the laser source to the optical signal transmission waveguide.

[0007] In this way, the transmission optical path from the vertical light output to the waveguide is precisely defined.

[0008] Furthermore, the light source chip assembly includes a plurality of surface-emitted distributed feedback laser chips arranged side-by-side at longitudinal or transverse intervals along the silicon photonic substrate to achieve parallel generation of multiple communication optical signals; each of the plurality of surface-emitted distributed feedback laser chips corresponds to a different lasing wavelength; the optical signal transmission waveguide includes a plurality of input waveguide branches to receive laser beams from the respective surface-emitted distributed feedback laser chips of different wavelengths.

[0009] In this way, the parallel generation of multiple optical signals of different wavelengths is achieved.

[0010] Furthermore, a multiplexer is integrated on the silicon photonics substrate, which connects the multiple input waveguide branches to a common transmission main waveguide. The multiplexer is configured to multiplex and combine laser beams with different emission wavelengths from the multiple input waveguide branches into the common transmission main waveguide, thereby forming a multi-wavelength arrayed integrated light source suitable for wavelength division multiplexing (WDM) systems.

[0011] In this way, multiple wavelengths can be reused to construct a high-density integrated light source array.

[0012] Furthermore, one side of the surface-emitting distributed feedback laser chip is connected to a metal solder bump, and the other side is connected to a heat-conducting component. When the surface-emitting distributed feedback laser chip is in a physically fixed state, it is electrically connected to the feed network on the silicon photonic substrate through the metal solder bump. When the surface-emitting distributed feedback laser chip generates waste heat due to continuous lasing, the heat-conducting component quickly conducts the heat to the external environment to maintain the stability of the laser output wavelength.

[0013] This ensures the electrical conduction and thermal stability of the lasing wavelength.

[0014] Furthermore, the silicon optical substrate is a silicon-on-insulator (SOI) chip, and the optical signal transmission waveguide is a silicon optical waveguide formed by processing the top silicon layer of the SOI chip; the surface-emitting distributed feedback laser chip is an independent active device made of III-V compound semiconductor material, and the emission wavelength of the surface-emitting distributed feedback laser chip is located in the optical communication band.

[0015] Thus, a heterogeneous material system suitable for optical communication frequency bands was established.

[0016] Furthermore, there is a physical gap between the light-emitting surface of the surface-emitting distributed feedback laser chip and the second grating, and the physical gap is filled with an optical refractive index matching adhesive material. The refractive index of the optical refractive index matching adhesive material is between the material refractive index of the first grating and the material refractive index of the second grating, and is configured to reduce the refractive index abrupt change at the interface to reduce Fresnel reflection loss in the transmission optical path.

[0017] This reduces reflection loss caused by abrupt changes in the interface refractive index.

[0018] Furthermore, the structural parameters of the first grating and the second grating are configured in a coordinated manner in physical space so that the output light field mode of the first grating matches the received light field mode of the second grating; wherein, the second grating has a waveguide transition region with a gradually changing width in the direction toward the optical signal transmission waveguide.

[0019] In this way, precise matching of the emitted and received light field modes is achieved.

[0020] Furthermore, the mounting alignment tolerance between the surface-emitting distributed feedback laser chip and the silicon photonic substrate, achieved through flip-chip bonding, is set within the range of 1 micrometer to 3 micrometers. This ensures that the grating coupling structure maintains a beam coupling efficiency higher than the end-face coupling efficiency even under the mounting alignment tolerance, thereby avoiding the sub-micrometer alignment requirements and yield loss issues caused by heterogeneous wafer bonding.

[0021] This relaxed the alignment tolerance requirements and significantly improved the production yield.

[0022] Secondly, this application provides an optical coupling integration method for an on-chip integrated laser light source based on any of the above embodiments, comprising the following steps: Obtain the physical position parameters of the silicon photonic substrate and the pre-fabricated surface-emitting distributed feedback laser chip, and establish the initial mounting alignment reference; The optical alignment image of the pick-and-place machine vision system is acquired in real time. Based on the initial placement alignment reference, the surface-emitting distributed feedback laser chip is placed with the light-emitting surface facing down on the grating coupling structure of the silicon photonic substrate. If the alignment error is within the preset tolerance range of 1 micrometer to 3 micrometers, the alignment is deemed qualified and the pressing bonding action is performed. The pressure and thermosetting temperature values ​​applied during the curing process are periodically collected, and the distribution feedback laser chip emitted from the surface is monitored for lateral positional shift based on physical position parameters to ensure that the spatial vertical correspondence of the grating coupling structure remains relatively stable. A driving current is injected into the distributed feedback laser chip emitted from the surface, and the optical power transmitted inside the optical signal transmission waveguide is monitored: if the injected current shows a stable output trend and the difference in the rate of change of optical power is within the preset error range, the optical path coupling is determined to be successful and the connection is stable; if the driving current remains relatively stable but the monitored optical power drops significantly, it is determined to be a mounting failure or an abnormal optical path coupling. In response to the multi-wavelength communication requirements of wavelength division multiplexing systems, multiple arrayed installation nodes on a silicon photonics substrate are scanned. Based on the optical communication frequency band configuration information corresponding to different nodes, multiple surface-emitting distributed feedback laser chips with different emission wavelengths are flip-mounted and attached to the corresponding positions in sequence to determine the arrayed parallel diffusion range of the multi-wavelength light source on the silicon photonics substrate.

[0023] This ensures both the efficiency of the assembly process and the stability of the coupling state. Attached Figure Description

[0024] The accompanying drawings are for illustrative purposes only and should not be construed as limiting this patent; the same reference numerals are used for components with the same structure and function. Wherein: Figure 1 This is a three-dimensional structural schematic diagram of an on-chip integrated laser light source provided in one embodiment of this application; Figure 2 This is a cross-sectional schematic diagram of an on-chip integrated laser source provided in another embodiment of this application; Figure 3 is a three-dimensional structural schematic diagram of a multi-wavelength arrayed on-chip integrated laser source suitable for wavelength division multiplexing systems provided in another embodiment of this application; Figure 4 is a flowchart illustrating an optical coupling integration method provided in one embodiment of this application.

[0025] Explanation of reference numerals in the attached figures: 100-On-chip integrated laser light source; 1-Silicon photonics substrate; 11-Optical signal transmission waveguide; 111-Input waveguide branch; 112-Synthetic combiner; 113-Common transmission main waveguide; 2-Light source chip assembly; 21-Surface-emitting distributed feedback laser chip; 211-Light emitting surface; 212-Resonant cavity; 22-Metal solder bumps; 23-Heat-conducting components; 3-Grate coupling structure; 31-First grating; 32-Second grating; 321-Waveguide transition region. Detailed Implementation

[0026] The technical solutions of the embodiments of this application will be described below with reference to the accompanying drawings. In the description of the embodiments of this application, unless otherwise stated, " / " means "or," for example, A / B can mean A or B; "and / or" in this text is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Furthermore, in the description of the embodiments of this application, "multiple" refers to two or more than two.

[0027] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature.

[0028] In the description of this embodiment, unless otherwise stated, "a plurality of" means two or more.

[0029] This application provides an on-chip integrated laser source 100, whose main function is to efficiently and with low alignment tolerance integrate an active laser chip that generates optical signals onto a passive silicon photonic circuit using a flip-chip process based on surface emission and grating coupling mechanisms. This achieves a light source system with high integration, high reliability, and support for multi-wavelength array expansion. This architecture aims to solve the sub-micron level alignment accuracy challenge faced when traditional edge-emitting lasers are coupled to silicon waveguides via end-face or evanescent wave coupling, effectively reducing packaging process complexity and improving mass production yield, while meeting the stringent requirements of wavelength division multiplexing systems for multi-wavelength parallel light sources.

[0030] To achieve the above functions, the on-chip integrated laser light source 100 mainly includes a basic silicon photonic substrate 1 and a light source chip assembly 2 integrated on the silicon photonic substrate 1. In some embodiments, it also includes a grating coupling structure 3 configured between the two to achieve efficient transfer of light energy.

[0031] The silicon photonics substrate 1 serves as the fundamental optical carrier and transmission platform for the entire integrated light source system, forming the underlying framework for realizing optical signal routing, modulation, multiplexing, and mode conversion. Internally, it forms an optical signal transmission waveguide 11 for confining and guiding the propagation of light waves, and its surface is equipped with a feed network for connection to an external electrical control system.

[0032] The light source chip assembly 2 is fully integrated on the surface of the silicon photonics substrate 1 and is a high-efficiency electro-optical conversion system. The assembly includes a surface-emitting distributed feedback laser chip 21, metal solder bumps 22, and a heat-conducting component 23. These three main parts work closely together in terms of electrical injection, optical gain, and heat dissipation.

[0033] Each component is precisely matched in physical space. The silicon photonics substrate 1 supports and houses the light source chip assembly 2 and the grating coupling structure 3. The laser beam generated by the light source chip assembly 2 is directly projected onto the silicon photonics substrate 1; the grating coupling structure 3 receives the laser beam and completes the mode conversion from a free-space optical field to a waveguide-confined optical field; the optical signal transmission waveguide 11 of the silicon photonics substrate 1 receives the converted optical signal and performs subsequent on-chip signal processing and transmission. Through strict physical and optical coordination, the three components transform the light-emitting device and passive optical waveguide network in the heterogeneous material system into an on-chip light-emitting system with high parallel scalability and low process tolerance sensitivity, achieving high-reliability unification of large-scale silicon-based optoelectronic integration.

[0034] A. Silicon photonics substrate The silicon photonic substrate 1 serves as the fundamental optical physical platform for the on-chip integrated laser source 100, providing a channel for optical signal convergence, an interface for accommodating surface coupling structures, and a transmission network for carrying drive current. It is made of silicon-on-insulator material. Its main components include an optical signal transmission waveguide 11, an input waveguide branch 111, a combiner 112, a common transmission main waveguide 113, and a feed network.

[0035] The silicon photonics substrate 1 serves as the base architecture for the entire device, housing all passive optical components and withstanding the physical and thermal stresses from the wafer-level packaging environment and the mechanical pressure from flip-chip bonding. Its basic material structure conforms to standard microelectromechanical systems (MEMS) to ensure compatibility with complementary metal-oxide-semiconductor (CMOS) processes. The silicon photonics substrate 1 is typically fabricated from a silicon-on-insulator (SiI) wafer, specifically comprising a bottom silicon substrate, an intermediate silicon dioxide buried oxide layer, and a top device silicon layer. The top device silicon layer has a high refractive index, while the silicon dioxide buried oxide layer has a low refractive index; the refractive index difference between the two defines the three-dimensional total internal reflection constraint boundary for the optical signal. The overall thickness of the silicon photonics substrate 1 is typically set within the standard wafer thickness range. Its top surface undergoes chemical mechanical polishing to create a highly flat surface, and the sidewalls are fabricated with end-face structures for external fiber optic connections. Thus, the silicon photonics substrate 1, through its stable and low-loss optical physical properties, constructs a long-term, low-loss transmission network for the flow of optical signals within the chip.

[0036] Understandably, in some embodiments, the silicon photonic substrate 1 is designed as a heterogeneous stacked structure comprising multiple layers of silicon nitride and single-crystal silicon. When the optical signal needs to withstand higher optical power density or requires a wider transparent window, the optical signal can be transferred from the single-crystal silicon layer to the silicon nitride layer for transmission through interlayer grating coupling, thereby reducing the optical nonlinear loss caused by the two-photon absorption effect and significantly improving the high-power output threshold of the on-chip integrated laser source 100.

[0037] Understandably, in some embodiments, doped active regions are integrated within the top silicon layer of the silicon photonic substrate 1 to form miniature thermo-optical phase shifters and / or electro-optic modulators. These integrated elements can be biased by an externally applied voltage to adjust the beam phase and refractive index distribution inside the optical signal transmission waveguide 11 in real time. This facilitates microscopic phase compensation of the optical signal coupled into the waveguide, enabling precise shaping of the output spectrum of multi-wavelength light sources.

[0038] Understandably, in some embodiments, the back side of the silicon photonics substrate 1 is provided with multiple through-silicon vias formed by deep reactive ion etching, which allow for vertical interconnection with the bottom complementary metal-oxide-semiconductor driver circuit wafer in the three-dimensional stacked packaging process, significantly shortening the RF trace length and reducing parasitic capacitance and inductance.

[0039] The optical signal transmission waveguide 11 is a dielectric channel within the silicon optical substrate 1 used to confine and conduct optical energy. Its cross-sectional dimensions determine the optical field modes supported for transmission. The boundary of the optical signal transmission waveguide 11 is formed by the sidewall etching surfaces of the top-layer silicon device and the covering silicon dioxide cladding. Its inner surface is designed with extremely low roughness to reduce scattering resistance during total internal reflection of the beam at the sidewalls and to reduce transmission loss. The geometric parameters of the optical signal transmission waveguide 11 are crucial for single-mode transmission conditions and are often designed as strip waveguides or ridge waveguide structures to ensure that optical signals of all wavelengths can travel along a predetermined path in the fundamental mode state, avoiding mode dispersion and crosstalk caused by higher-order modes. As a core transmission carrier, the optical signal transmission waveguide 11 enables the beam emitted from the surface to maintain a stable polarization state and then enter the subsequent optical link in a controlled mode distribution.

[0040] The input waveguide branch 111 is the front-end receiving unit of the optical signal transmission waveguide 11, responsible for independently collecting the optical energy emitted from the distributed feedback laser chip 21 from different surfaces. Its spacing determines the mounting density of the light source chip assembly 2 on the silicon photonics substrate 1. The input waveguide branches 111 are arranged side-by-side along the longitudinal or transverse direction of the silicon photonics substrate 1, forming an array structure. The end of each input waveguide branch 111 is physically connected to the grating coupling structure 3. This design is suitable for wavelength division multiplexing applications that require the simultaneous generation and transmission of multiple discrete wavelength optical signals.

[0041] Understandably, in some embodiments, the input waveguide branches 111 are spatially differentiated through offset waveguide segments of specific lengths. This design allows different input waveguide branches 111 to accumulate a specific optical phase difference before transmitting the optical signal to the combiner 112, thereby meeting the stringent phase matching requirements of the interferometric combiner for the input signal.

[0042] The multiplexer 112 and the common transmission main waveguide 113 together constitute a wavelength multiplexing system, which combines different wavelength optical signals dispersed in multiple input waveguide branches 111 into a single broadband signal. This is the key to ensuring that the wavelength division multiplexing system can improve communication bandwidth and reduce the number of output ports. The multiplexer 112 is an optical interference component located at the intersection of the optical signal transmission waveguides 11. The common transmission main waveguide 113 is a single broadband waveguide connected to the output of the multiplexer 112. The optical signals carried by the input waveguide branches 111 enter the multiplexer 112, and then the multiplexer 112 uses the optical interference principle of arrayed waveguide gratings or cascaded Mach-Zehnder interferometers to superimpose the light fields of different wavelengths to the same spatial position and output them to the common transmission main waveguide 113. By using multi-beam interference, the optical field spatial reconstruction effect applied by the combiner 112 enables discrete laser beams with different lasing wavelengths to form a multiplexed beam containing all wavelength information within the common transmission main waveguide 113, thereby creating a high-capacity communication link that can be adapted to single-mode fiber transmission.

[0043] Understandably, in some embodiments, the multiplexer 112 is designed as a multimode interference multiplexer based on the multimode interference effect. When the system requires a wide wavelength spacing and needs to reduce polarization-dependent loss, the multimode interference structure can provide a wider spectral operating bandwidth and lower manufacturing sensitivity, and can complete the multiplexing operation without the need for extremely high-precision phase control for a single wavelength.

[0044] The power supply network is the sole fundamental channel for power injection. It must allow the external drive circuitry to transmit continuous or high-frequency modulated current to the light source chip assembly 2, and maintain extremely low ohmic contact resistance under long-term high current density operation to prevent excessive Joule heat buildup. The power supply network is fabricated from a high-conductivity, electromigration-resistant metallic material via physical vapor deposition and patterning etching. This material system exhibits excellent conductivity and chemical stability, and can withstand the high-temperature environment of the packaging reflow soldering process. The power supply network is in the form of a two-dimensional planar microstrip line or coplanar waveguide, tightly attached to the insulating dielectric layer on top of the silicon photonic substrate 1. One end extends to the wire bonding pad at the chip edge, and the other end extends to the contact pad corresponding to the metal solder bumps 22. The power supply network is firmly attached and fixed by the barrier metal layer beneath the contact pads, ensuring a high-bonding interface between it and the silicon photonic substrate 1, preventing interlayer delamination or impedance abrupt changes even under extreme thermal cycling stress.

[0045] Understandably, in some embodiments, the feed network can be designed as a high-frequency transmission line structure with an impedance matching network. Its metal linewidth, spacing, and underlying dielectric thickness are rigorously optimized using three-dimensional electromagnetic field simulation to ensure that the characteristic impedance of the transmission line matches the output impedance of the external RF driver. This effectively suppresses microwave reflections of the high-frequency modulated electrical signal at the interface, maintaining the integrity of the drive signal and enabling the on-chip integrated laser source 100 to support high-speed direct modulation operation.

[0046] B. Light source chip assembly The main function of the light source chip assembly 2 is to convert the input external electrical energy into coherent photons emitted by stimulated emission, and to emit a laser beam in a direction perpendicular to the chip surface, providing a stable optical carrier for the entire on-chip optical interconnect system. It mainly includes a surface-emitting distributed feedback laser chip 21, metal solder bumps 22, and a heat-conducting component 23.

[0047] The surface-emitting distributed feedback laser chip 21 is the optical core of the light source chip assembly 2. Its function is to realize the recombination of electrons and holes for light emission, and to achieve single-mode selection and surface-oriented emission through an internal grating structure. In this embodiment, the surface-emitting distributed feedback laser chip 21 is an independent active device manufactured based on a III-V compound semiconductor material system.

[0048] The surface-emitting distributed feedback laser chip 21 generates photons through radiative recombination by injecting a forward current to induce population inversion within the gain region containing a multi-quantum-well structure. The surface-emitting distributed feedback laser chip 21 is flipped and positioned above the surface of the silicon photonics substrate 1. To achieve extremely high internal quantum efficiency, the surface-emitting distributed feedback laser chip 21 is precisely epitaxially grown from a direct bandgap material such as indium phosphide or gallium arsenide, forming a long strip-shaped die structure. Its cleavage edge dimensions are precisely controlled and it is suspended above the silicon photonics substrate 1 by metal solder bumps 22. A predetermined physical gap is maintained between the bottom surface of the surface-emitting distributed feedback laser chip 21 and the top surface of the silicon photonics substrate 1. This assembly relationship ensures that the surface-emitting distributed feedback laser chip 21 can directly project the laser beam into the silicon photonics waveguide without generating destructive lattice stress at the contact surface due to the difference in thermal expansion coefficients of the two materials, thus guaranteeing the stability of the lasing wavelength and the device lifetime. When the injected current exceeds the threshold current, the optical field in the internal resonant cavity 212 establishes stable oscillations in the longitudinal direction. The light-emitting surface 211 of the surface-emitting distributed feedback laser chip 21 is at a certain angle (e.g., 5 to 20 degrees) relative to the silicon optical substrate 1. In this way, by means of this tilt angle, it is possible to further suppress residual back-reflected light at the interface from returning along the original path and re-entering the resonant cavity 212 (this phenomenon will cause light injection lock-in perturbation and noise degradation), and any light reflected from the air interface or the surface of the silicon substrate will deviate from the original optical axis and cannot be reverse-coupled back into the laser cavity.

[0049] Understandably, in some embodiments, the surface-emitting distributed feedback laser chip 21 is designed as a multi-segment structure comprising independent phase adjustment regions and gain regions. When changes in the injected current cause fluctuations in carrier concentration, the effective refractive index can be altered by injecting a compensation current into the phase adjustment region, thereby fine-tuning the optical constructive interference conditions within the resonant cavity 212. This approach offers a fast tuning response rate, enabling continuous mode-hopping-free tuning of the lasing wavelength within a few nanometers.

[0050] The resonant cavity 212 and the light-emitting surface 211 are mainly used to amplify and filter the broadband spontaneous emission light through multiple reciprocating cycles, converting it into monochromatic coherent light with an extremely narrow linewidth, and releasing it from inside the chip into free space. The resonant cavity 212 is located inside the semiconductor epitaxial layer of the surface-emitting distributed feedback laser chip 21, and is composed of refractive index perturbation structures arranged periodically along the optical waveguide direction. The light-emitting surface 211 is the interface on the side of the chip's physical surface facing the silicon photonic substrate 1. To ensure vertical emission efficiency, an anti-reflection coating composed of multiple dielectric thin films is deposited on the surface of the light-emitting surface 211. The equivalent refractive index of this anti-reflection coating is precisely calculated to form destructive interference conditions. When the light field diffracted upwards through the second-order grating in the resonant cavity 212 reaches the light-emitting surface 211, the anti-reflection coating suppresses Fresnel reflection of the light wave at the semiconductor-air interface, allowing the beam to escape with extremely high transmittance. This optical transmission action allows the high-intensity laser beam to leave the active cavity intact and be projected onto the silicon photonic substrate 1.

[0051] Understandably, in some embodiments, a high-reflectivity coating is provided on the side of the surface-emitting distributed feedback laser chip 21 facing away from the light-emitting surface 211. When the resonant cavity 212 generates diffracted light in both upward and downward directions, the high-reflectivity coating can completely reflect the upward beam back downward, causing it to undergo constructive interference with the downwardly emitted beam, thereby multiplying the optical power output by the light-emitting surface 211 and enhancing the overall electro-optical conversion efficiency.

[0052] The main function of the metal solder bumps 22 is to provide mechanical fixation support and low-resistance electrical interconnection paths for the surface-emitting distributed feedback laser chip 21. This ensures that the surface-emitting distributed feedback laser chip 21 remains stably suspended in a defined spatial position under long-term thermal cycling and current surges.

[0053] In this embodiment, the metal solder bumps 22 are specifically multiple high-melting-point alloy microspheres. The metal solder bumps 22 are metallurgical bonds connecting the electrode pads of the surface-emitting distributed feedback laser chip 21 to the feed network of the silicon photonic substrate 1. They undergo intermetallic compound reactions in a molten state under the temperature and pressure applied by the flip-chip bonding equipment, forming a robust mechanical support after solidification. To control the solder collapse height, the metal solder bumps 22 typically contain a composite metal system with a certain melting point gradient, such as a copper pillar at the bottom and a tin-silver-copper alloy at the top. During reflow soldering, the surface tension of the liquid solder generates a self-alignment effect, driving the surface-emitting distributed feedback laser chip 21 to produce minute lateral movements, automatically correcting the initial placement deviation. The rigid connector formed after the metal solder bumps 22 solidify can withstand external mechanical vibrations and resist shear stress generated at the interface. This solidification process effectively locks the three-dimensional spatial coordinates of the surface-emitting distributed feedback laser chip 21, ensuring that the spatial alignment of the internal optical path system remains within the tolerance range of the optical design regardless of changes in the external ambient temperature.

[0054] To achieve a precise tilt angle between the light-emitting surface 211 and the silicon photonics substrate 1 in the flip-chip process, this embodiment provides two solutions: The first approach is achieved by altering the geometry of the metal solder bumps 22. Specifically, the metal solder bumps 22 located at both ends (or sides) of the surface-emitting distributed feedback laser chip 21 have different volume or height dimensions. After reflow soldering and final solidification, the chip naturally forms a set pitch angle based on the volume difference of the solder.

[0055] The second approach involves altering the local morphology of the silicon photonics substrate 1. Specifically, in the region of the silicon photonics substrate 1 that supports the metal solder bumps 22, a stepped support platform with a physical height difference is pre-formed using a semiconductor etching process. Even if all the metal solder bumps 22 have the same height, when they are positioned on etched platforms with different elevations, the surface-emitting distributed feedback laser chip 21 can still be forced to establish the required tilted assembly posture. The main function of the thermal component 23 (which essentially constitutes the miniature heat sink or transition heat sink of the device) is to provide a heat dissipation path with extremely low thermal resistance for the surface-emitting distributed feedback laser chip 21. When the active device operates under high injection current, a large amount of nonradiative recombination generates Joule heating. If the heat accumulates, it can cause a sharp rise in the temperature of the active region, leading to a redshift in the gain spectrum and a lasing wavelength drift, and even thermal breakdown of the device. The thermal component 23 is typically made of an insulating material with extremely high thermal conductivity, such as aluminum nitride or diamond film. The thermally conductive component 23 is not limited to a traditional, separate heat sink bonded by solder or thermal adhesive. In a preferred embodiment, the heat dissipation material (such as a ceramic or diamond film) of the thermally conductive component 23 is directly fabricated on the back side of the substrate opposite the light-emitting surface 211 of the surface-emitting distributed feedback laser chip 21 using wafer-level deposition or growth processes. This directly fabricated integrated structure completely eliminates the interfacial thermal resistance (such as adhesive layer thermal resistance) introduced by traditional mounting processes, resulting in a more compact physical connection. Utilizing Fourier's law of thermal conduction, when the surface-emitting distributed feedback laser chip 21 generates waste heat, a large temperature gradient drives heat flow through the thermally conductive component 23, rapidly diffusing to the external macroscopic heat sink or heat transfer structure. This heat pumping process leads to significant energy dissipation. This energy transfer is macroscopically manifested as a constant temperature in the active region of the device. This isothermal state effectively suppresses the thermal drift of the effective refractive index of the resonant cavity 212, ensuring that the lasing wavelength is always locked within the set ITU standard wavelength grid.

[0056] Understandably, in some embodiments, the thermally conductive component 23 is designed as a closed-loop temperature control system incorporating a micro-semiconductor cooler. A thermistor is integrated near the surface-emitting distributed feedback laser chip 21 to monitor the local temperature in real time. When the monitored temperature deviates, an external control circuit alters the direction and magnitude of the current injected into the micro-semiconductor cooler, absorbing or releasing heat at the cold end through the Peltier effect, thereby achieving sub-Kelvin level precision control of the laser junction temperature. This method offers extremely high control accuracy and excellent wavelength stability.

[0057] C. Grating coupling structure The grating coupling structure 3 is an indispensable passive optical mode conversion module, whose main function is to connect the free-space optical field and the waveguide-confined optical field. It efficiently redirects and compresses the macroscopic beam emitted vertically from the surface-emitted distributed feedback laser chip 21 into the sub-micron-sized optical signal transmission waveguide 11 through a diffraction mechanism. It mainly includes a first grating 31, a second grating 32, a waveguide transition region 321, and an optical refractive index matching adhesive material.

[0058] The first grating 31 is a periodic microstructure arranged within the resonant cavity 212 of the surface-emitting distributed feedback laser chip 21. Its function is to define the lasing wavelength and provide a momentum vector to deflect the beam by 90 degrees. It controls the frequency selection of the laser through the Bragg scattering principle. The second grating 32 is a corresponding microstructure arranged on the surface of the silicon photonic substrate 1. Its function is to receive the perpendicularly incident beam and deflect it parallel to the substrate direction. The period and duty cycle parameters of the second grating 32 are calculated using a rigorous three-dimensional finite-difference time-domain algorithm to satisfy the phase matching conditions for a specific incident angle and wavelength. When the beam reaches the second grating 32, the periodically alternating grating teeth modulate the equiphase surface of the light field, causing the light wave to produce constructive interference in a specific direction. By changing the etching depth and grating period, the second grating 32 generates a received light field mode at the receiving window that matches the size of the incident Gaussian beam. This mode matching ensures that the light energy can be converted into guided modes in the waveguide to the maximum extent, reducing radiation losses from leakage to the substrate or reflection into free space.

[0059] Understandably, in some embodiments, the second grating 32 is designed as an apodized grating structure with a variable period or a variable duty cycle. A grating with a constant period exhibits an exponentially decaying diffracted light field, which theoretically mismatches with the Gaussian distributed light field emitted by the surface-emitted distributed feedback laser chip 21 in terms of spatial overlap integral. By gradually changing the duty cycle of the second grating 32 along the propagation direction, its received light field mode can be artificially reshaped into a Gaussian profile, thereby breaking the coupling efficiency limit of conventional uniform gratings and achieving extremely low insertion loss.

[0060] The waveguide transition region 321 is primarily used for adiabatic compression of the optical field size between the broad receiving region of the second grating 32 and the narrow confinement region of the optical signal transmission waveguide 11. The waveguide transition region 321 is located on the surface of the silicon photonics substrate 1, physically connecting the second grating 32 and the optical signal transmission waveguide 11. The width of the waveguide transition region 321 exhibits a gradually decreasing geometric characteristic along the direction of optical signal propagation. This geometric gradient must satisfy the adiabatic evolution condition, i.e., the rate of change of the waveguide width must be sufficiently small so that the optical field can smoothly adapt to changes in boundary conditions during propagation. When the optical signal enters the waveguide transition region 321 from the second grating 32, the lateral dimension of the optical field is gradually compressed, and the optical power density increases accordingly. Due to the existence of the gradient profile, the optical field energy will not be scattered into the cladding space or excited into untransmittable higher-order modes due to abrupt changes in cross-section. Through this gentle physical constraint, the waveguide transition region 321 achieves lossless conversion from a macroscopic optical field to a microscopic single-mode optical field.

[0061] Understandably, in some embodiments, the sidewalls of the waveguide transition region 321 are designed as nonlinear gradient curves, such as exponential or parabolic curves. Compared to a simple linear gradient, the nonlinear curve structure can significantly shorten the physical length of the waveguide transition region 321 under the same adiabatic compressibility, thereby reducing the parasitic absorption loss and area occupied by the overall device.

[0062] The primary function of the optical refractive index matching adhesive material is to fill the physical gap between the light-emitting surface 211 of the surface-emitting distributed feedback laser chip 21 and the surface of the second grating 32, eliminating optical impedance mismatch caused by the air interface. The optical refractive index matching adhesive material is a high-transmittance fluid made of UV-curable resin or thermosetting siloxane polymer, which forms a transparent elastomer after curing. Its refractive index parameter is precisely tuned so that its value lies precisely between the refractive index of the epitaxial layer of the surface-emitting distributed feedback laser chip 21 and the refractive index of the silica cladding layer on the surface of the second grating 32. The optical refractive index matching adhesive material completely encapsulates the path of the light beam propagating in free space. According to Fresnel's law of reflection, when a light wave passes through the interface of two media with different refractive indices, the greater the difference in refractive index, the higher the reflectivity. The optical refractive index matching adhesive material introduces a gradually changing refractive index transition buffer layer. When the light beam penetrates this region, the abrupt change in dielectric constant at the interface is significantly smoothed, thereby suppressing the formation of back-reflected waves. This elimination of back reflection not only increases the forward light power coupled into the second grating 32, but more importantly, it prevents reflected photons from re-entering the resonant cavity 212 and causing light injection lock-in disturbances to the laser, thus ensuring extremely high purity of the light source output spectrum and extremely low level of relative intensity noise.

[0063] D. Optical coupling integration method To assemble the aforementioned individual physical components into a high-performance, high-yield on-chip integrated laser source 100, this embodiment also provides an optical coupling integration method based on machine vision and optoelectronic joint monitoring. This method executes specific physical assembly logic, transforming the passive mechanical alignment process into a real-time closed-loop compensation intelligent integration sequence. By setting a series of tolerance judgment and status monitoring links, alignment errors and coupling failures are eliminated from the process.

[0064] The optical coupling integration method in this embodiment includes the following steps: S100: Obtain the physical position parameters of the silicon photonic substrate 1 and the pre-prepared surface-emitting distributed feedback laser chip 21, and establish an initial mounting alignment reference.

[0065] In this step, the machine vision system of the pick-and-place machine is activated first. A high-resolution charge-coupled device (CCD) camera captures images of the top surface of the silicon photonic substrate 1 placed on the stage and the bottom surface of the surface-emitting distributed feedback laser chip 21 adsorbed on the placement head. The image processing algorithm executes an edge detection operator to extract preset metal crosshair alignment marks on the silicon photonic substrate 1 and preset alignment marks (e.g., crosshair alignment marks) on the surface-emitting distributed feedback laser chip 21. The computing unit processes the extracted feature pixel coordinates, performs spatial geometric transformation matrix operations, and calculates the geometric center and relative yaw angle of both. After obtaining the physical position parameters, the system maps the relative spatial vectors of the two in the virtual coordinate system of the controller, thereby establishing the initial placement alignment reference for all subsequent robotic arm motion calculations.

[0066] S200: The optical alignment image of the pick-and-place machine vision system is acquired in real time. Based on the initial mounting alignment reference, the surface-emitting distributed feedback laser chip 21 with its light-emitting surface 211 facing down is placed above the grating coupling structure 3 of the silicon photonic substrate 1. If the alignment error is within the preset tolerance range of 1 micrometer to 3 micrometers, the alignment is deemed qualified and the pressing bonding action is performed.

[0067] This step utilizes the tolerance advantage of grating coupling to replace the core process of high-precision end-face coupling. The control system sends displacement commands to the multi-axis servo motor of the placement head, driving the surface-emitted distributed feedback laser chip 21 to move above the silicon photonic substrate 1. During the descent, the vision system acquires interference microscopic images of the upper and lower focal planes in real time, comparing the deviation between the current position and the desired coordinates. Because the receiving area of ​​the second grating 32 in the grating coupling structure 3 is relatively large and the Gaussian waist of the received light field is wide, the system algorithm performs a comparison judgment: as long as the calculated lateral XY plane offset does not exceed the preset tolerance range of 1 micrometer to 3 micrometers, the controller determines that the current physical alignment is qualified. After the judgment is passed, the controller triggers the pressing bonding action, and the placement head overcomes the spring damping and descends, so that the metal solder bump 22 contacts the corresponding pad on the surface of the silicon photonic substrate 1, completing the initial physical contact. This tolerance judgment mechanism greatly reduces the equipment seeking time and increases the hourly output rate.

[0068] S300 periodically collects the applied pressure value and thermosetting temperature value during the curing process, and monitors whether the distributed feedback laser chip 21 emitted from the surface has a lateral position shift based on the physical position parameters, so as to ensure that the spatial vertical correspondence of the grating coupling structure 3 remains relatively stable.

[0069] After physical contact is established, the system initiates the reflow soldering or thermosetting bonding process. The heater inputs heat energy to the worktable, causing the temperature to rise according to the preset reflow profile. During this period, a torque sensor and infrared thermometer installed in the placement head periodically collect the pressure values ​​applied to the back of the chip and the thermosetting temperature values ​​at the interface. The system controller executes a closed-loop proportional-integral-differential algorithm to dynamically adjust the stepper motor's downward pressure and heating power based on the collected values, preventing sudden pressure changes from crushing the thin epitaxial layer or temperature overshoot from causing solder bumps to splatter. Simultaneously, the laser interferometry positioning system continuously scans the chip edge based on physical position parameters. If the surface-emitting distributed feedback laser chip 21 tends to slide during the solder melting stage due to the mismatch of the thermal expansion coefficients of silicon-based materials and III-V group materials, the system will use the self-alignment effect of the liquid surface tension of the solder or fine-tune the holding posture of the patch head to constrain it when it detects the lateral position shift. This ensures that the light-emitting surface 211 of the surface-emitting distributed feedback laser chip 21 and the second grating 32 at the bottom maintain their spatial vertical correspondence within the initial acceptable tolerance range after solidification and cooling, thus completing a stable mechanical fixation.

[0070] S400, inject driving current into the distributed feedback laser chip 21 emitted from the surface, and monitor the optical power transmitted inside the optical signal transmission waveguide 11: if the injected current shows a stable output trend and the difference in the rate of change of the optical power is within a preset error range, it is determined that the optical path coupling is successful and the connection is stable; if the driving current remains relatively stable and the monitored optical power drops significantly, it is determined that the mounting is unsuccessful or the optical path coupling is abnormal.

[0071] After curing, the system enters the online electro-optic performance verification stage. The test probes of the probe station descend and contact the test pads of the feed network. The power measurement unit executes a current scanning program, continuously injecting a gradually increasing DC drive current into the surface-emitting distributed feedback laser chip 21. Simultaneously, the photodetector coupled to the output of the common transmission main waveguide 113 measures the escaping photons and converts them into current signals to monitor the internal optical power. The system microprocessor processes the sequence data of the injected current and the output optical power, and calculates the power-current slope. If the injected current exceeds the threshold and shows a stable upward trend, and the calculated difference in the rate of change of optical power (i.e., the deviation of the second derivative) remains within the preset 5% error range, the system determines that the photons have successfully passed through the grating coupling structure 3 and entered the optical signal transmission waveguide 11, and the optical path coupling is successful and the connection is stable. Conversely, if the system output drive current data is stable, but the monitored optical power value shows a step drop or is continuously lower than 30% of the theoretical estimate, the system executes the abnormal handling protocol, determines that the solder joint of the current node has a poor solder joint causing electrical injection failure, or that there are air bubbles in the physical gap causing excessive scattering resistance, marks the package die as a failed component and issues an alarm.

[0072] S500, in response to the multi-wavelength communication requirements of the wavelength division multiplexing system, scans multiple arrayed installation nodes on the silicon photonic substrate 1, and according to the optical communication frequency band configuration information corresponding to different nodes, sequentially flip-mounts multiple surface-emitted distributed feedback laser chips 21 with different emission wavelengths to the corresponding positions, thereby determining the arrayed parallel diffusion range of the multi-wavelength light source on the silicon photonic substrate 1.

[0073] To meet the communication requirements of high-capacity data centers, the system executes a multi-chip assembly cycle according to a pre-loaded production recipe. The control program scans the coordinates of the mounting nodes at the ends of multiple input waveguide branches 111 reserved on the silicon photonics substrate 1 design drawing. The processor extracts the optical communication frequency band configuration information for each node's assigned ITU-T grid channel (e.g., wavelengths of 1530 nm, 1535 nm, etc.). Subsequently, the chip mounter picks up surface-emitted distributed feedback laser chips 21 with different lasing wavelengths from the blue film on wafers corresponding to different wavelengths. The mounting system repeats steps S100 to S400, precisely flipping and mounting the chips to the corresponding spatial nodes. After each mounting operation, the system updates the spatial matrix state of the assembled chips, ultimately determining and solidifying the physical distribution boundaries of all wavelength chips on the silicon photonics substrate 1, completing the complex transition from single-wavelength devices to a multi-wavelength parallel diffusion array light source system.

[0074] In summary, the on-chip integrated laser source 100, through an optical architecture combining surface emission mechanisms and relaxed geometric constraint grating design, coupled with an intelligent optical coupling integration method, successfully solves the long-standing submicron-level alignment and low yield challenges in the field of silicon-based optoelectronic heterogeneous integration. It provides a more efficient, scalable, and cost-controllable underlying hardware solution for building next-generation high-bandwidth, low-power large-scale data center optical interconnect networks, and has extremely significant engineering application value and mass production economic benefits.

[0075] In the description of this embodiment, unless otherwise stated, "a plurality of" means two or more. The above content is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions within the technical scope disclosed in this application should be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. An on-chip integrated laser light source, comprising a silicon optical substrate and a light source chip assembly integrated on the silicon optical substrate, wherein the silicon optical substrate includes an optical signal transmission waveguide, characterized in that, The light source chip assembly includes a surface-emitting distributed feedback laser chip to generate a laser beam emitted in a direction perpendicular to the chip surface. The on-chip integrated laser source also includes a grating coupling structure between the distributed feedback laser chip emitted from the surface and the optical signal transmission waveguide; The light-emitting surface of the surface-emitting distributed feedback laser chip faces the silicon photonic substrate, and the laser beam generated by the surface-emitting distributed feedback laser chip is directly projected and coupled into the optical signal transmission waveguide through the grating coupling structure. The surface-emitted distributed feedback laser chip is fixedly bonded to the silicon photonic substrate using a flip-chip process, thereby transforming the high-precision end-face alignment requirement of the heterogeneous integrated waveguide into a high-efficiency grating coupling based on surface emission.

2. The on-chip integrated laser light source according to claim 1, characterized in that, The grating coupling structure includes a first grating and a second grating. The first grating is composed of a distributed feedback grating arranged in the resonant cavity of the surface-emitting distributed feedback laser chip to control the lasing wavelength and form surface-emitting light. The second grating is composed of a surface-coupled grating arranged on the surface of the silicon photonic substrate and physically connected to the optical signal transmission waveguide. The surface-emitting distributed feedback laser chip is configured such that the light-emitting surface forms a certain angle with the surface of the silicon photonic substrate, so that the optical signal emitted perpendicularly from the first grating is received by the second grating to define the transmission optical path from the laser source to the optical signal transmission waveguide.

3. The on-chip integrated laser light source according to claim 1, characterized in that, The light source chip assembly includes a plurality of surface-emitting distributed feedback laser chips arranged side-by-side at longitudinal or transverse intervals along the silicon photonic substrate to achieve parallel generation of multiple communication optical signals; each of the plurality of surface-emitting distributed feedback laser chips corresponds to a different lasing wavelength. The optical signal transmission waveguide includes multiple input waveguide branches to receive laser beams emitted from the distributed feedback laser chips of different wavelengths from the respective surfaces.

4. The on-chip integrated laser light source according to claim 3, characterized in that, A multiplexer is also integrated on the silicon photonics substrate. The multiplexer connects the plurality of input waveguide branches to a common transmission main waveguide. The multiplexer is configured to multiplex and combine the laser beams with different emission wavelengths from the plurality of input waveguide branches into the common transmission main waveguide, thereby forming a multi-wavelength arrayed integrated light source suitable for wavelength division multiplexing (WDM) systems.

5. The on-chip integrated laser light source according to claim 1, characterized in that, One side of the surface-emitting distributed feedback laser chip is connected to a metal solder bump, and the other side is connected to a heat-conducting component. When the surface-emitting distributed feedback laser chip is in a physically fixed state, it is electrically connected to the feed network on the silicon photonic substrate through the metal solder bump. When the surface-emitting distributed feedback laser chip generates waste heat due to continuous lasing, the heat-conducting component quickly conducts the heat to the external environment to maintain the stability of the laser output wavelength.

6. The on-chip integrated laser light source according to claim 1, characterized in that, The silicon optical substrate is a silicon-on-insulator (SOI) chip, and the optical signal transmission waveguide is a silicon optical waveguide formed by processing the top silicon layer of the SOI chip; the surface-emitting distributed feedback laser chip is an independent active device made of III-V compound semiconductor material, and the emission wavelength of the surface-emitting distributed feedback laser chip is located in the optical communication band.

7. The on-chip integrated laser light source according to claim 2, characterized in that, The surface-emitting distributed feedback laser chip has a physical gap between its light-emitting surface and the second grating, and the physical gap is filled with an optical refractive index matching adhesive material. The refractive index of the optical refractive index matching adhesive material is between the refractive index of the material of the first grating and the refractive index of the material of the second grating, and is configured to reduce the refractive index abrupt change at the interface to reduce Fresnel reflection loss in the transmission optical path.

8. The on-chip integrated laser light source according to claim 2, characterized in that, The structural parameters of the first grating and the structural parameters of the second grating are configured in physical space to match the output light field mode of the first grating with the received light field mode of the second grating; wherein the second grating has a waveguide transition region with a gradually changing width in the direction toward the optical signal transmission waveguide.

9. The on-chip integrated laser light source according to claim 1, characterized in that, The mounting alignment tolerance between the surface-emitting distributed feedback laser chip and the silicon photonic substrate, achieved through the flip-chip process, is set within the range of 1 micrometer to 3 micrometers. This ensures that the grating coupling structure maintains a beam coupling efficiency higher than the end-face coupling efficiency even under the mounting alignment tolerance, thereby avoiding the sub-micrometer alignment requirements and yield loss issues caused by heterogeneous wafer bonding.

10. An optical coupling integration method based on the on-chip integrated laser light source according to any one of claims 1 to 9, characterized in that, Includes the following steps: Obtain the physical position parameters of the silicon photonic substrate and the pre-fabricated surface-emitting distributed feedback laser chip, and establish an initial mounting alignment reference; The optical alignment image of the pick-and-place machine vision system is acquired in real time. Based on the initial mounting alignment reference, the surface-emitting distributed feedback laser chip is placed with its light-emitting surface facing down on the grating coupling structure of the silicon photonic substrate. If the alignment error is within the preset tolerance range of 1 micrometer to 3 micrometers, the alignment is deemed qualified and the pressing bonding action is performed. The applied pressure and thermosetting temperature values ​​during the curing process are periodically collected, and the distribution feedback laser chip emitted from the surface is monitored for lateral positional shift based on the physical position parameters to ensure that the spatial vertical correspondence of the grating coupling structure remains relatively stable. A driving current is injected into the distributed feedback laser chip emitted from the surface, and the optical power transmitted inside the optical signal transmission waveguide is monitored: if the injected current shows a stable output trend and the difference in the rate of change of the optical power is within a preset error range, it is determined that the optical path coupling is successful and the connection is stable; if the driving current remains relatively stable but the monitored optical power drops significantly, it is determined that the mounting is unsuccessful or the optical path coupling is abnormal. In response to the multi-wavelength communication requirements of the wavelength division multiplexing system, multiple arrayed installation nodes on the silicon photonics substrate are scanned. Based on the optical communication frequency band configuration information corresponding to different nodes, multiple surface-emitted distributed feedback laser chips with different emission wavelengths are sequentially flip-mounted to the corresponding positions to determine the arrayed parallel diffusion range of the multi-wavelength light source on the silicon photonics substrate.

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