Composite piezoelectric structure, method for manufacturing the same, and semiconductor device

Abstract

The application provides a composite piezoelectric structure, comprising a supporting substrate and a composite piezoelectric layer, the composite piezoelectric layer is located on one side surface of the supporting substrate, and comprises at least two piezoelectric film layers, the at least two piezoelectric film layers have the same crystal cutting type, and a preset included angle is formed between the same in-plane crystal axes of the two adjacent piezoelectric film layers. In the composite piezoelectric structure provided by the application, the at least two piezoelectric film layers have the same crystal cutting type, so that the thermal expansion coefficient matching degree of each piezoelectric film layer is high, the internal stress caused by thermal mismatch can be significantly reduced, and the structural integrity and service life are improved; by setting the preset included angle between the same in-plane crystal axes of the two adjacent piezoelectric film layers, the thermal expansion directions of the two adjacent piezoelectric film layers can be offset to each other, a complementary structure is formed, the composite piezoelectric layer tends to be isotropic, and the thermal stress between the composite piezoelectric layer and the supporting substrate can be reduced.

Description

Technical Field

[0001] This application relates to the field of microelectronic device technology, specifically to a composite piezoelectric structure, its preparation method, and a semiconductor device. Background Technology

[0002] Piezoelectric single-crystal thin films, represented by lithium niobate and lithium tantalate, have become key materials for fabricating core devices in modern wireless, sensing, and optical communication systems due to their excellent piezoelectric, electro-optic, and acoustic properties. With the development of communication towards higher frequencies, wider bandwidths, and lower losses, and the increasing demand for high-speed modulation in optical communication, higher requirements are being placed on the performance of devices based on piezoelectric thin films. Traditional microelectronic devices are typically based on heterostructures of single-layer piezoelectric thin films; however, single-layer structures have certain limitations. First, the electromechanical coupling coefficient of acoustic wave devices is limited, making it difficult to simultaneously meet the requirements of wide bandwidth and high Q value. Second, the thermal expansion coefficient of piezoelectric thin films differs significantly from that of commonly used substrates, making them prone to cracking or performance drift of microelectronic devices due to thermal mismatch stress during fabrication and use. Furthermore, in high-frequency applications, the thickness of the piezoelectric thin film needs to be reduced, increasing processing difficulty and losses.

[0003] Multilayer stacking of piezoelectric thin films can overcome the limitations of single-layer piezoelectric films, but existing structures and fabrication methods still face many challenges. First, improper design of the lattice orientation and crystal axis arrangement between piezoelectric film layers can lead to the complexity of acoustic or optical modes, increasing parasitic modes and device losses. Second, the thermal mismatch accumulation effect between the multilayer piezoelectric material itself and the substrate is more severe, easily leading to film cracking or delamination. In some applications, the physical coupling between layers is difficult to suppress effectively, affecting the independence and performance of device design. Furthermore, the fabrication process of multilayer piezoelectric structures is complex, making it difficult to achieve precise alignment and bonding between layers with different orientations. Therefore, there is an urgent need to develop a novel multilayer composite piezoelectric structure and its fabrication method. Summary of the Invention

[0004] To address the aforementioned problems in the prior art, this application provides a composite piezoelectric structure, its fabrication method, and a semiconductor device thereof. The specific technical solution is as follows: On one hand, this application provides a composite piezoelectric structure, comprising: Support substrate; A composite piezoelectric layer, located on one side surface of the supporting substrate, includes at least two piezoelectric thin film layers, wherein the at least two piezoelectric thin film layers have the same crystal cutting type, and there is a predetermined included angle θ between the same in-plane crystal axes of two adjacent piezoelectric thin film layers.

[0005] In a possible implementation, the crystal axes of the thickness directions of two adjacent piezoelectric thin film layers in the composite piezoelectric layer are aligned or opposite.

[0006] In a possible implementation, the composite piezoelectric layer satisfies at least one of the following characteristics: The piezoelectric thin film layer includes at least one of lithium niobate single crystal material and lithium tantalate single crystal material; The thickness of the piezoelectric thin film layer is 100-2000 nm; The preset included angle, |θ|, is 0-180°.

[0007] In a possible implementation, the crystal axis orientation in the thickness direction of two adjacent piezoelectric thin film layers is the same, and the preset included angle |θ| is 0-180°.

[0008] In a possible implementation, the crystal axes of two adjacent piezoelectric thin film layers are oriented in opposite directions in the thickness direction, and the preset included angle |θ| is 50°-180°.

[0009] In a possible implementation, the composite piezoelectric layer further includes an isolation layer located between two adjacent piezoelectric thin film layers, the isolation layer satisfying at least one of the following characteristics: The isolation layer comprises at least one of silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, tantalum oxide, and niobium oxide. The thickness of the isolation layer is 5-500 nm.

[0010] In a possible implementation, a stress compensation layer is further included on at least one side surface of the supporting substrate, the stress compensation layer satisfying at least one of the following characteristics: The stress compensation layer includes at least one of silicon oxide, silicon nitride, amorphous silicon, polycrystalline silicon, aluminum oxide, and aluminum nitride. The thickness of the stress compensation layer is 100-15000 nm.

[0011] In a possible implementation, a stress buffer layer is further included between the stress compensation layer and the supporting substrate, the stress buffer layer satisfying at least one of the following characteristics: The stress buffer layer comprises at least one of polycrystalline silicon and amorphous silicon; The thickness of the stress buffer layer is 50-1500 nm.

[0012] In a possible implementation, the stress compensation layer includes a first sub-layer and a second sub-layer, the first sub-layer being located between the supporting substrate and the composite piezoelectric layer, and the second sub-layer being located on the side surface of the supporting substrate facing away from the composite piezoelectric layer; The stress buffer layer includes a third sublayer and a fourth sublayer, the third sublayer being located between the first sublayer and the supporting substrate, and the fourth sublayer being located between the second sublayer and the supporting substrate.

[0013] In a possible implementation, a metal patterning layer is further included between the supporting substrate and the composite piezoelectric layer, the metal patterning layer satisfying at least one of the following characteristics: The metal pattern layer has a partition structure, which includes one of gas, vacuum, and insulating medium material; The metal pattern layer includes at least one of gold, silver, copper, aluminum, nickel, platinum, titanium, tantalum, tungsten, chromium, and molybdenum.

[0014] In a possible implementation, the supporting substrate satisfies at least one of the following characteristics: The supporting substrate includes at least one of silicon, silicon oxide, sapphire, silicon carbide, diamond, gallium nitride, and quartz; The thickness of the supporting substrate is 200-1000 μm.

[0015] On the other hand, this application also provides a method for preparing a composite piezoelectric structure, comprising: S1: Provides a support substrate and piezoelectric wafer; S2: The piezoelectric wafer is bonded to the supporting substrate at a bonding angle corresponding to a preset angle to obtain a bonding structure; S3: Thinning is performed on one side surface of the bonding structure containing the piezoelectric wafer to form a piezoelectric thin film layer, resulting in an intermediate composite structure; the preset angle is the angle between the crystal axes in the same plane of two adjacent piezoelectric thin film layers; S4: Repeat steps S2 and S3 until a composite piezoelectric layer is formed on the support substrate, the composite piezoelectric layer comprising at least two piezoelectric thin film layers, to obtain a composite piezoelectric structure; the at least two piezoelectric thin film layers have the same crystal cutting type.

[0016] In a possible implementation, S2 further includes: After ion implantation, the piezoelectric wafer is bonded to the supporting substrate at a bonding angle corresponding to a preset angle to obtain a bonding structure.

[0017] In a possible implementation, the thinning process includes: performing a high-temperature annealing process on the bonding structure to separate the piezoelectric wafer along the implantation damage layer formed by ion implantation.

[0018] In a possible implementation, the thinning process includes: grinding and etching one side of the bonding structure having the piezoelectric wafer to form a piezoelectric thin film layer.

[0019] On the other hand, this application also provides a semiconductor device, including the composite piezoelectric structure described in any of the above embodiments, or including a composite piezoelectric structure prepared by the preparation method described in any of the above embodiments.

[0020] Based on the above technical solution, this application has the following beneficial effects: This application provides a composite piezoelectric structure, including a supporting substrate and a composite piezoelectric layer. The composite piezoelectric layer is located on one side surface of the supporting substrate and includes at least two piezoelectric thin film layers. These at least two piezoelectric thin film layers have the same crystal cutting type, and a predetermined angle is formed between the crystal axes of adjacent piezoelectric thin film layers in the same plane. Having at least two piezoelectric thin film layers with the same crystal cutting type results in a high degree of matching of the thermal expansion coefficients of each piezoelectric thin film layer, which can significantly reduce internal stress caused by thermal mismatch, improve structural integrity and lifespan, and facilitate crystal axis alignment between different piezoelectric thin film layers, thus improving the quality control of the composite piezoelectric structure and reducing fabrication difficulty. By setting a predetermined angle between the crystal axes of adjacent piezoelectric thin film layers in the same plane, the thermal expansion directions of adjacent piezoelectric thin film layers can cancel each other out, forming a complementary structure. This makes the composite piezoelectric layer tend to be isotropic, which helps reduce thermal stress between the composite piezoelectric layer and the supporting substrate. Furthermore, this complementary structure can cancel out some of the frequencies that drift with temperature, which is beneficial for achieving stable frequency output, while also suppressing parasitic modes and improving the purity of the acoustic signal. Attached Figure Description

[0021] To more clearly illustrate the technical solutions and advantages in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 This application provides a schematic diagram of a composite piezoelectric structure. Figure 2 : A schematic diagram of another composite piezoelectric structure provided in the embodiments of this application; Figure 3 : A schematic diagram of another composite piezoelectric structure provided in the embodiments of this application; Figure 4 This application provides a schematic diagram of the structure of a support substrate.

[0023] Figure reference numerals: 1-Supporting substrate, 2-Composite piezoelectric layer, 3-Piezoelectric thin film layer, 4-Stress compensation layer, 5-Stress buffer layer, 6-Isolation layer, 7-Metal pattern layer. Detailed Implementation

[0024] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0025] It should be noted that, in the description of this application, the following definitions shall apply unless a different definition is given elsewhere in the claims or this specification. All numerical values, whether or not explicitly indicated, are defined herein as being modified by the term "about". The term "about" generally refers to a range of numerical values ​​that a person skilled in the art would consider equivalent to the stated values ​​to produce substantially the same properties, functions, results, etc. A range of numerical values ​​indicated by a low value and a high value is defined as including all numerical values ​​within that range and all subranges included within that range.

[0026] It should be noted that in the description of this application, the terms "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion.

[0027] It should be noted that, in the description of this application, the terms “on,” “above,” “on top of,” and “above” should be interpreted in the broadest sense, meaning that a description containing these terms is interpreted as “a component may be disposed on another component in direct contact, or there may be an intermediate component or layer between the components.”

[0028] As used in this application, the term "layer" refers to a portion of material comprising a region of a certain thickness. A layer may extend over the entire lower or upper structure, or it may extend within a localized area of ​​the lower or upper structure. Furthermore, a layer may be a region of a homogeneous or heterogeneous continuous structure with a thickness less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure, or between any pair of horizontal planes therebetween. A layer may extend horizontally, vertically, and / or along a conical surface. A single layer may comprise multiple layers.

[0029] It should be understood that the term "plane" as used in this application, such as "first plane" or "second plane", refers to the XY plane of the supporting substrate 1, and "thickness direction" refers to the Z direction perpendicular to the XY plane. The terms "thickness" or "height" used in this application refer to the Z-direction thickness or Z-direction height.

[0030] The following is for reference Figures 1-4 This application describes a composite piezoelectric structure, including a supporting substrate 1 and a composite piezoelectric layer 2. The composite piezoelectric layer 2 is located on one side surface of the supporting substrate 1 and includes at least two piezoelectric thin film layers 3. The at least two piezoelectric thin film layers 3 have the same crystal cutting type, and there is a predetermined angle between the crystal axes of adjacent piezoelectric thin film layers 3 in the same plane. Thus, the at least two piezoelectric thin film layers 3 have the same crystal cutting type, resulting in a high degree of matching of the thermal expansion coefficients of each piezoelectric thin film layer. This significantly reduces internal stress caused by thermal mismatch, improves structural integrity and lifespan, and facilitates crystal axis alignment between different layers of the piezoelectric thin film layers 3, which is beneficial for controlling the quality of the composite piezoelectric structure and reducing fabrication difficulty. By setting a preset angle between the crystal axes in the same plane of two adjacent piezoelectric thin film layers 3, the thermal expansion directions of the two adjacent piezoelectric thin film layers 3 can cancel each other out, forming a complementary structure. This makes the composite piezoelectric layer 2 more isotropic, which helps to reduce the thermal stress between the composite piezoelectric layer 2 and the supporting substrate 1. Furthermore, this complementary structure can cancel out some of the frequencies that drift with temperature, which helps to achieve stable frequency output. At the same time, it can suppress parasitic modes and improve the purity of acoustic signals.

[0031] Specifically, the crystal cutting type is used to indicate the axis corresponding to the thickness direction of the piezoelectric thin film layer 3 in the crystal coordinate system. The crystal coordinate system can be represented by three axes: X, Y, and Z. The crystal cutting type can be at least one of X-cut, Y-cut, and Z-cut. X-cut is used to indicate that the thickness direction of the piezoelectric thin film layer 3 is parallel to the X-axis of the crystal, Y-cut is used to indicate that the thickness direction of the piezoelectric thin film layer 3 is parallel to the Y-axis of the crystal, and Z-cut is used to indicate that the thickness direction of the piezoelectric thin film layer 3 is parallel to the Z-axis of the crystal.

[0032] In some embodiments, the crystal cutting type may also include a special cutting type, which is used to indicate that the crystal is cut after rotating around the crystal axis by a preset angle, and can utilize the combination of crystal properties in different directions to improve the performance of the piezoelectric thin film.

[0033] Specifically, the piezoelectric thin film layer 3 can be XZ-cut, indicating that the surface normal direction of the piezoelectric thin film layer 3 lies in the plane formed by the X and Z axes of the crystal coordinate system. Understandably, XZ-cut does not indicate a single cutting angle, but rather a series of rotation angles within the XZ plane. By selecting different rotation angles, different performance optimization goals can be achieved. For example, by rotating the piezoelectric thin film 128° around the Y-axis before cutting, the crystal cutting type of the piezoelectric thin film is an XZ-plane cut, which can effectively excite the piezoelectric effect in the shear mode, achieving an extremely high electromechanical coupling coefficient, thereby supporting a larger bandwidth.

[0034] In a possible implementation, in the piezoelectric thin film composite layer, the crystal axes of the thickness direction of each piezoelectric thin film layer 3 may be oriented in the same way or in completely opposite directions.

[0035] Specifically, the crystal axes of adjacent piezoelectric thin film layers 3 in the composite piezoelectric layer 2 are oriented in opposite directions along their thickness. Understandably, in optical modulators, light waves and electromagnetic waves travel at different speeds in the same material, easily leading to signal cancellation and reduced conversion efficiency. By adjusting the crystal axes along the thickness direction of the piezoelectric thin films, making the crystal axes of adjacent piezoelectric thin film layers 3 in the composite piezoelectric layer 2 opposite in direction, an alternating structure of positive and negative crystal axis directions can be formed, creating an effect similar to periodic polarization and achieving quasi-phase matching. This allows the optical signal to continuously accumulate and strengthen during propagation, significantly improving the modulation efficiency and nonlinear effects of optical devices with this composite piezoelectric layer 2.

[0036] In a possible implementation, the crystal axes of the piezoelectric thin film layers 3 in the composite piezoelectric layer 2 are aligned along their thickness direction. This ensures that the polarization directions of each piezoelectric thin film layer 3 are consistent, allowing the changes in electric dipole moments generated under external force to be superimposed in phase, which is beneficial for improving the effective piezoelectric coefficient. Furthermore, the consistent crystal axes along the thickness direction enable the electric field to effectively excite mechanical vibrations along the thickness direction, reducing energy loss in other directions.

[0037] In a possible implementation, the crystal axes in the same plane of two adjacent piezoelectric thin film layers 3 are rotated relative to each other by a predetermined angle around the crystal axis in the thickness direction, so that there is a predetermined angle θ between the crystal axes in the same plane of the two adjacent piezoelectric thin film layers 3. Specifically, the rotation of the crystal axes in the same plane of the two adjacent piezoelectric thin film layers 3 around the crystal axis in the thickness direction can be clockwise or counterclockwise.

[0038] Specifically, the preset angle |θ| is 0-180°; understandably, the preset angle can be any value within the range of 0-180°; for example, the preset angle can be 0, 45°, 90°, 120°, 180°, etc. Thus, the preset angle can take any value within the above range, allowing the same crystal axis of each piezoelectric thin film layer 3 to have different orientations, effectively suppressing unnecessary vibration modes and significantly improving the device's quality factor and frequency purity. Simultaneously, the thermal expansion coefficient and lattice constant of grains with different orientations are anisotropic; the preset angle can partially cancel out internal stresses, reducing the risk of thin film cracking or warping, and improving the mechanical stability and lifespan of the device with the composite piezoelectric layer 2.

[0039] In some embodiments, the preset included angle |θ| can be 105-120°, which can effectively achieve parasitic mode suppression and increase the electromechanical coupling coefficient.

[0040] In a possible implementation, the preset included angle is related to the thermal expansion direction of the two adjacent piezoelectric thin film layers 3. Understandably, after the crystal axes of the two adjacent piezoelectric thin film layers 3 are rotated relative to each other around the crystal axes in the thickness direction by the preset included angle, the thermal expansion directions of the two adjacent piezoelectric thin film layers 3 intersect, so that the thermal expansion behavior of the piezoelectric thin film layers 3 is uniformly distributed within the layer.

[0041] In some embodiments, the preset included angle between the crystal axes in the same plane of two adjacent piezoelectric thin film layers 3 is 80-100°, so that the thermal expansion directions of the two adjacent thin films cancel each other out or complement each other, which is beneficial to reducing the thermal stress between the composite piezoelectric layer 2 and the supporting substrate 1.

[0042] In a possible implementation, the crystal axis orientations in the thickness direction of two adjacent piezoelectric thin film layers are the same, and the preset angle |θ| is 0-180°. The same crystal axis orientation can provide a basis for the synergy between the electric field and the crystal axis. By adjusting the preset angle θ, the coupling coefficient can be effectively controlled, and specific parasitic modes can be suppressed.

[0043] In a possible implementation, the crystal axes of two adjacent piezoelectric thin film layers are oriented in opposite directions in the thickness direction, and the preset angle |θ| is 50°-180°, which can precisely adjust the superposition method of interlayer strain.

[0044] In a possible implementation, the piezoelectric thin film layer 3 comprises at least one of lithium niobate single crystal material and lithium tantalate single crystal material; these materials possess excellent piezoelectric properties, high electromechanical coupling coefficient, and high quality factor, enabling wider operating bandwidth, reduced insertion loss, and improved frequency selectivity and device efficiency. It is understood that the lithium niobate single crystal material and lithium tantalate single crystal material in the embodiments of this application can be undoped intrinsic single crystal materials or doped modified single crystal materials.

[0045] Specifically, the piezoelectric thin film layer 3 may also include doped lithium niobate and doped lithium tantalate; both doped lithium niobate and doped lithium tantalate contain doping materials, including but not limited to at least one of magnesium, iron, zinc, hafnium, copper and erbium; understandably, the piezoelectric wafer may be other single crystal materials with piezoelectric effect.

[0046] In a possible implementation, the thickness of the piezoelectric thin film layer 3 is 100-2000 nm; understandably, the thickness of the piezoelectric thin film layer 3 can be any value within the range of 100-2000 nm; for example, the thickness of the piezoelectric thin film layer 3 is 100 nm, 500 nm, 1000 nm, 1500 nm, 2000 nm, etc. Thus, controlling the thickness of the piezoelectric thin film layer 3 within the above range can effectively disperse the mechanical stress within the composite piezoelectric layer 2, improve power capacity and thermal stability, and prevent cracking of the piezoelectric thin film layer 3. Preferably, the thickness of the piezoelectric thin film layer 3 is 500-1000 nm. Understandably, the thickness of the piezoelectric thin film layer 3 can be selected according to the actual application requirements to balance the frequency and performance of the device, thereby improving power and stability.

[0047] In possible implementations, refer to Figure 3 The composite piezoelectric layer 2 further includes an isolation layer 6 located between two adjacent piezoelectric thin film layers 3. The isolation layer 6 includes at least one of silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, tantalum oxide, and niobium oxide. The isolation layer 6 can effectively reduce the interlayer coupling of acoustic waves or electromagnetic fields, which is beneficial to further improving the performance of the composite piezoelectric thin film structure.

[0048] Specifically, the thickness of the isolation layer 6 is 5-500 nm; understandably, the thickness of the isolation layer 6 can be any value within the range of 5-500 nm; for example, the thickness of the isolation layer 6 is 5 nm, 10 nm, 100 nm, 300 nm, 500 nm, etc. Thus, controlling the thickness of the isolation layer 6 within the above range can effectively reduce the interlayer coupling of acoustic waves or electromagnetic fields, alleviate the stress between the piezoelectric thin film layers 3, and improve the reliability of the composite piezoelectric structure. Understandably, the thickness of the isolation layer 6 is matched with the thickness of the piezoelectric thin film layer 3 and adjusted according to the thickness of the piezoelectric thin film layer 3.

[0049] In a possible implementation, the composite piezoelectric structure further includes a stress compensation layer 4, which is located on at least one side surface of the supporting substrate 1. The stress compensation layer 4 includes at least one of silicon oxide, silicon nitride, amorphous silicon, polycrystalline silicon, aluminum oxide, and aluminum nitride. The stress compensation layer 4 can provide support for the supporting substrate 1, offset the stress generated during the bonding process between the composite piezoelectric layer 2 and the supporting substrate 1, and compensate for the thermal mismatch stress caused by the composite piezoelectric layer 2, prevent the film from cracking, and achieve isolation between the piezoelectric thin film layer 3 and the supporting substrate 1.

[0050] Specifically, the thickness of the stress compensation layer 4 is 100-15000 nm; understandably, the thickness of the stress compensation layer 4 can be any value within the range of 100 nm to 15000 nm; for example, the thickness of the stress compensation layer 4 can be 100 nm, 500 nm, 1000 nm, 10000 nm, 15000 nm, etc. Thus, controlling the thickness of the stress compensation layer 4 within the above range can effectively balance the overall stress of the composite piezoelectric film structure, significantly reduce the warpage of the supporting substrate 1, and ensure the flatness of the supporting substrate 1. Preferably, the thickness of the stress compensation layer 4 is 5000-10000 nm. Understandably, the thickness of the stress compensation layer 4 can be adjusted according to the thickness of the supporting substrate 1 and the thickness of the composite piezoelectric layer 2, so that the stress compensation layer 4 can effectively disperse thermal mismatch stress.

[0051] In a possible implementation, the stress compensation layer 4 includes a first sub-layer and a second sub-layer. The first sub-layer is located between the supporting substrate 1 and the composite piezoelectric layer 2, and the second sub-layer is located on the surface of the supporting substrate 1 facing away from the composite piezoelectric layer 2. Understandably, the first and second sub-layers are symmetrically arranged relative to the supporting substrate 1. This effectively counteracts thermal mismatch stress, suppresses warping deformation of the supporting substrate 1 during fabrication, and improves mechanical stability.

[0052] In possible implementations, refer to Figure 2 The composite piezoelectric structure also includes a stress buffer layer 5 located between the stress compensation layer 4 and the support substrate 1. The stress buffer layer 5 includes at least one of polycrystalline silicon and amorphous silicon; it can effectively reduce the radio frequency loss of the device and play a role in stress buffering.

[0053] Specifically, the thickness of the stress buffer layer 5 is 50-1500 nm; understandably, the thickness of the stress buffer layer 5 can be any value within the range of 50-1500 nm; for example, the thickness of the stress buffer layer 5 can be 50 nm, 100 nm, 500 nm, 1000 nm, 1500 nm, etc. In this way, the stress buffer layer 5 can work together with the stress compensation layer 4 to provide stress compensation, offsetting the thermal stress generated by the subsequent fabrication of the composite piezoelectric layer 2, and effectively reducing the RF loss of the device.

[0054] In a possible implementation, the stress buffer layer 5 includes a third sublayer and a fourth sublayer. The third sublayer is located between the supporting substrate 1 and the first sublayer, and the fourth sublayer is located between the supporting substrate 1 and the second sublayer. Understandably, the third and fourth sublayers are symmetrically arranged relative to the supporting substrate 1, which can further buffer the thermal mismatch stress of the supporting substrate 1 and suppress warping deformation of the supporting substrate 1 layer during fabrication.

[0055] In a possible implementation, a metal pattern layer 7 is further included. The metal pattern layer 7 is discontinuously distributed in the horizontal direction and is located between the supporting substrate 1 and the composite piezoelectric layer 2. The metal pattern layer 7 has a partition structure. The metal pattern layer 7 partially isolates the stress compensation layer 4 and the composite piezoelectric layer 2, and the partition structure partially isolates them, thus releasing localized stress. In an electromagnetic shield or absorber, the metal pattern layer 7 can interact with incident electromagnetic waves to generate resonance, thereby efficiently absorbing or reflecting electromagnetic energy in a specific frequency band.

[0056] Specifically, the isolation structure includes one of gas, vacuum, and insulating dielectric materials, which can achieve effective isolation between the supporting substrate 1 and the composite piezoelectric layer 2.

[0057] Specifically, the metal pattern layer 7 includes at least one of gold, silver, copper, aluminum, nickel, platinum, titanium, tantalum, tungsten, chromium and molybdenum. The metal pattern layer 7 can effectively optimize the occurrence of parasitic modes in acoustic devices and prevent energy leakage.

[0058] Specifically, the shape of the metal pattern layer 7 can be at least one of a circle, rectangle, polygon, and interdigitated structure; preferably, the metal pattern layer 7 is an interdigitated structure, which is beneficial for achieving specific electric field coupling and acoustic wave reflection functions. Understandably, the shape of the metal pattern layer 7 can be adjusted according to device design requirements.

[0059] In a possible implementation, the support substrate 1 includes at least one of silicon, silicon oxide, sapphire, silicon carbide, diamond, gallium nitride, and quartz; it can provide mechanical support for the composite piezoelectric thin film structure, ensuring structural flatness and stability; and it can effectively conduct and dissipate heat, ensuring the reliability of subsequent fabrication steps.

[0060] Specifically, the thickness of the support substrate 1 is 200-1000 μm; understandably, the thickness of the support substrate 1 can be any value within the range of 200-1000 μm; for example, the thickness of the support substrate 1 is 200 μm, 400 μm, 500 μm, 700 μm, 1000 μm, etc. Controlling the thickness of the support substrate 1 within the above range can provide the support substrate 1 with mechanical strength and flatness, avoiding breakage or warping during preparation and use; and the support substrate 1 layer can effectively dissipate heat, avoiding local overheating.

[0061] The following describes a method for fabricating a composite piezoelectric structure according to embodiments of this application. This specification provides the method operation steps as described in the embodiments, but based on conventional or non-inventive methods, more or fewer operation steps may be included. The order of steps listed in the embodiments is merely one possible execution order among many steps and does not represent the only possible execution order. In actual fabrication, the method can be executed in the order shown in the embodiments or accompanying drawings, or in parallel. The method for fabricating a composite piezoelectric structure may include steps S1-S4.

[0062] S1: Provides a support substrate 1 and a piezoelectric wafer.

[0063] Specifically, the piezoelectric wafer is cut in the opposite way to the piezoelectric thin film subsequently prepared, so that the piezoelectric thin film prepared in the subsequent steps has the target crystal cutting type.

[0064] In a possible implementation, after providing the support substrate 1, the fabrication method further includes: depositing a thin film on at least one surface of the support substrate 1 to form a stress compensation layer 4. Specifically, depositing a thin film on two opposite surfaces of the support substrate 1 can form a first sublayer and a second sublayer.

[0065] Specifically, before forming the stress compensation layer 4, a thin film is deposited on at least one side surface of the support substrate 1 to form a stress buffer layer 5; the stress compensation layer 4 is formed on the stress buffer layer 5.

[0066] In some embodiments, thin films can be deposited on two opposing surfaces of the support substrate 1 to form a third sublayer and a fourth sublayer, and then a first sublayer can be formed on the third sublayer and a second sublayer can be formed on the fourth sublayer.

[0067] In a possible implementation, after providing the support substrate 1, the fabrication method further includes: forming a metal pattern layer 7 on one side surface of the support substrate 1; specifically, one side surface of the support substrate 1 has a stress compensation layer 4, and the metal pattern layer 7 is formed on the stress compensation layer 4. Specifically, the isolation structure of the metal pattern layer 7 includes one of gas and vacuum, and forming the metal pattern layer 7 includes: depositing a metal layer on one side surface of the support substrate 1, performing photolithography and etching on the metal layer to form the isolation structure.

[0068] S2: Bond the piezoelectric wafer to the support substrate 1 to obtain a bonding structure.

[0069] In some embodiments, a stress compensation layer 4 is formed on one side of the support substrate 1, and the piezoelectric wafer is bonded to the side of the support substrate 1 with the stress compensation layer 4 to obtain a bonding structure.

[0070] In some embodiments, a metal pattern layer 7 is formed on one side of the support substrate 1, and the piezoelectric wafer is bonded to the side of the support substrate 1 with the metal pattern layer 7 to obtain a bonding structure.

[0071] In a possible implementation, step S2 further includes: after ion implantation of the piezoelectric wafer, bonding the piezoelectric wafer to the supporting substrate 1 at a bonding angle corresponding to a preset angle to obtain a bonding structure.

[0072] Specifically, the ion implantation uses at least one of hydrogen ions, helium ions, or argon ions; the implantation energy is 20keV-300keV; understandably, the implantation energy can be any value within the 20keV-300keV range; for example, the implantation energy can be 20keV, 50keV, 100keV, 200keV, 300keV, etc. Controlling the ion implantation energy within the above range can avoid wafer damage caused by excessively high implantation energy, while avoiding the inability to form a continuous damage layer due to excessively low implantation energy, thus preventing effective stripping.

[0073] Specifically, the implantation dose of ion implantation is 10. 14 ions / cm 2 -10 17 ions / cm 2 Understandably, the implantation dose of ion implantation is 10. 14 ions / cm 2 -10 17 ions / cm 2 Any point value in the range; for example, the implantation dose of ion implantation can be 10. 14 ions / cm 2 10 15 ions / cm 2 10 16 ions / cm 2 10 17 ions / cm 2 By controlling the ion implantation energy within the aforementioned range, it is possible to avoid insufficient implantation dose, which would prevent the formation of enough charge carriers to alter material properties; and to avoid excessive implantation dose, which would introduce too many ions and cause excessive lattice damage.

[0074] In a possible implementation, the composite piezoelectric structure includes a first piezoelectric thin film layer 3 and a second piezoelectric thin film layer 3. During the preparation of the second piezoelectric thin film layer 3, the high-temperature annealing time of the piezoelectric wafer used to prepare the second piezoelectric thin film layer 3 is greater than or equal to the high-temperature annealing time of the piezoelectric wafer used to prepare the first piezoelectric thin film layer 3.

[0075] Specifically, the piezoelectric wafer used to prepare the first piezoelectric thin film layer 3 undergoes high-temperature annealing for a time greater than or equal to 30 minutes, and the piezoelectric wafer used to prepare the second piezoelectric thin film layer 3 undergoes high-temperature annealing for a time greater than or equal to 3 hours.

[0076] Specifically, before bonding the piezoelectric thin film side of the intermediate composite structure to the support substrate 1, the main positioning edge of the intermediate composite structure is rotated by a preset angle relative to the main positioning edge of the support substrate 1, so that there is a preset angle between the same crystal axes in the plane of the two adjacent piezoelectric thin films, wherein the preset angle can be 0-180 degrees.

[0077] S3: Thinning is performed on one side surface of the bonding structure containing the piezoelectric wafer to form a piezoelectric thin film layer 3, thus obtaining an intermediate composite structure.

[0078] Specifically, before thinning the piezoelectric wafer, step S3 also includes a first annealing process on the bonding structure.

[0079] Specifically, the temperature of the first annealing treatment is 60-120℃; understandably, the temperature of the first annealing treatment can be any value within 60-120℃; for example, the temperature of the first annealing treatment is 60℃, 70℃, 100℃, 110℃, 120℃, etc. The time of the first annealing treatment can be any value within 3-10 hours, and will not be enumerated here. In this way, residual internal stress caused by temperature and pressure during the bonding process of the piezoelectric wafer can be eliminated, and stronger chemical bonds can be formed at the bonding interface.

[0080] In a possible implementation, after ion implantation of the piezoelectric wafer, an implantation damage layer is formed on the piezoelectric wafer, and the thinning process includes: high-temperature annealing of the bonding structure to separate the piezoelectric wafer along the implantation damage layer.

[0081] In possible implementations, the high-temperature annealing temperature is 300℃-900℃; understandably, the high-temperature annealing temperature can be any value within the range of 300℃-900℃; exemplary examples include 300℃, 450℃, 500℃, 750℃, and 900℃. Controlling the high-temperature annealing temperature within the above range allows for effective restoration of crystal quality. Understandably, the high-temperature annealing temperature can be adjusted according to actual fabrication requirements. In some embodiments, the piezoelectric wafer is lithium tantalate, and the high-temperature annealing temperature for lithium tantalate is 300-600℃; in other embodiments, the piezoelectric wafer is lithium niobate, and the high-temperature annealing temperature for lithium niobate is 300-900℃.

[0082] Specifically, the high-temperature annealing time is 0.5-5 hours; understandably, the high-temperature annealing time can be any value within the range of 0.5-5 hours; for example, the high-temperature annealing time is 0.5 hours, 1 hour, 3 hours, 4 hours, 5 hours, etc. Controlling the high-temperature annealing time within the above range allows atoms sufficient time to diffuse and migrate to the damaged area, thereby effectively eliminating lattice defects.

[0083] Specifically, the gas atmosphere for high-temperature annealing is at least one of nitrogen, vacuum, and inert gas atmosphere.

[0084] In a possible implementation, step S3 further includes: thinning and planarizing one side surface of the bonding structure having a piezoelectric wafer to form a piezoelectric thin film layer 3, thereby obtaining an intermediate composite structure.

[0085] Specifically, the thinning process includes: grinding and etching one side of the bonding structure with a piezoelectric wafer to form a piezoelectric thin film layer 3.

[0086] Specifically, after thinning the piezoelectric wafer and before planarization, the fabrication method further includes: performing a second annealing treatment on the bonding structure; the temperature of the second annealing treatment is 100-250℃; understandably, the temperature of the second annealing treatment can be any value within 100-250℃; exemplaryly, the temperature of the first annealing treatment is 100℃, 120℃, 150℃, 200℃, 250℃, etc. The time of the second annealing treatment can be any value within 3-10 hours, and will not be enumerated here. This further promotes the diffusion and flow of material at the bonding interface, fills microscopic voids, and eliminates interface voids.

[0087] In a possible implementation, during the transfer of the piezoelectric thin film layer 3, the piezoelectric thin film layer 3 is subjected to a third annealing treatment. The temperature of the third annealing treatment can be any value between 100°C and 300°C. This can alleviate the thermal stress caused by the mismatch of the thermal expansion coefficients of different materials and significantly reduce the warpage of the piezoelectric thin film layer 3.

[0088] Specifically, the gas atmosphere for the first annealing treatment, the second annealing treatment, and the third annealing treatment can be at least one of nitrogen, vacuum, and inert gas.

[0089] S4: Repeat steps S2 and S3 until a composite piezoelectric layer 2 is formed on the support substrate 1, the composite piezoelectric layer 2 comprising at least two piezoelectric thin film layers 3, to obtain a composite piezoelectric structure.

[0090] In a possible implementation, with the piezoelectric thin film layer 3 on the support substrate 1, before repeating step S2, the preparation method further includes: depositing an isolation material on the side of the piezoelectric thin film layer 3 facing away from the support substrate 1 to form an isolation layer 6.

[0091] Specifically, the insulating material may include at least one of silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, tantalum oxide, and niobium oxide. The deposition method of the insulating layer 6 may include one of physical vapor deposition and chemical vapor deposition.

[0092] Based on the above preparation method, at least two piezoelectric thin film layers 3 in the prepared composite piezoelectric structure have the same crystal cutting type, and there is a preset included angle between the same in-plane crystal axes of two adjacent piezoelectric thin film layers 3.

[0093] This application also provides a semiconductor device comprising the composite piezoelectric structure described in any of the above embodiments, or comprising a composite piezoelectric structure prepared by the preparation method described in any of the above embodiments. Specifically, the semiconductor device includes a composite piezoelectric structure and a surface electrode, the surface electrode being disposed on the surface of the composite piezoelectric layer.

[0094] Specifically, semiconductor devices include one of acoustic wave devices and optoelectronic devices.

[0095] The foregoing description has fully disclosed the specific embodiments of this application. It should be noted that any modifications made by those skilled in the art to the specific embodiments of this application do not depart from the scope of the claims. Accordingly, the scope of the claims of this application is not limited to the foregoing specific embodiments.

Claims

1. A composite piezoelectric structure, characterized in that, include: Support substrate; A composite piezoelectric layer, located on one side surface of the supporting substrate, includes at least two piezoelectric thin film layers, wherein the at least two piezoelectric thin film layers have the same crystal cutting type, and there is a predetermined included angle θ between the same in-plane crystal axes of two adjacent piezoelectric thin film layers.

2. The composite piezoelectric structure according to claim 1, characterized in that, In the composite piezoelectric layer, the thickness direction of the crystal axis of two adjacent piezoelectric thin film layers is either the same or opposite.

3. The composite piezoelectric structure according to claim 1, characterized in that, The composite piezoelectric layer satisfies at least one of the following characteristics: The piezoelectric thin film layer includes at least one of lithium niobate single crystal material and lithium tantalate single crystal material; The thickness of the piezoelectric thin film layer is 100-2000 nm; The preset included angle, |θ|, is 0-180°.

4. The composite piezoelectric structure according to claim 3, characterized in that, The crystal axis orientation in the thickness direction of two adjacent piezoelectric thin film layers is the same, and the preset included angle |θ| is 0-180°; or, The crystal axes of two adjacent piezoelectric thin film layers are oriented in opposite directions, and the preset included angle |θ| is 50°-180°.

5. The composite piezoelectric structure according to any one of claims 1-4, characterized in that, The composite piezoelectric layer further includes an isolation layer located between two adjacent piezoelectric thin film layers, the isolation layer satisfying at least one of the following characteristics: The isolation layer comprises at least one of silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, tantalum oxide, and niobium oxide. The thickness of the isolation layer is 5-500 nm.

6. The composite piezoelectric structure according to any one of claims 1-4, characterized in that, It also includes a stress compensation layer located on at least one side surface of the supporting substrate, the stress compensation layer satisfying at least one of the following characteristics: The stress compensation layer includes at least one of silicon oxide, silicon nitride, amorphous silicon, polycrystalline silicon, aluminum oxide, and aluminum nitride. The thickness of the stress compensation layer is 100-15000 nm.

7. The composite piezoelectric structure according to claim 6, characterized in that, It also includes a stress buffer layer located between the stress compensation layer and the support substrate, the stress buffer layer satisfying at least one of the following characteristics: The stress buffer layer comprises at least one of polycrystalline silicon and amorphous silicon; The thickness of the stress buffer layer is 50-1500 nm.

8. The composite piezoelectric structure according to claim 7, characterized in that, The stress compensation layer includes a first sub-layer and a second sub-layer. The first sub-layer is located between the supporting substrate and the composite piezoelectric layer, and the second sub-layer is located on the side surface of the supporting substrate opposite to the composite piezoelectric layer. The stress buffer layer includes a third sublayer and a fourth sublayer, the third sublayer being located between the first sublayer and the supporting substrate, and the fourth sublayer being located between the second sublayer and the supporting substrate.

9. The composite piezoelectric structure according to any one of claims 1-4, characterized in that, It also includes a metal patterning layer located between the supporting substrate and the composite piezoelectric layer, the metal patterning layer satisfying at least one of the following characteristics: The metal pattern layer has a partition structure, which includes one of gas, vacuum, and insulating medium material; The metal pattern layer includes at least one of gold, silver, copper, aluminum, nickel, platinum, titanium, tantalum, tungsten, chromium, and molybdenum.

10. The composite piezoelectric structure according to any one of claims 1-4, characterized in that, The supporting substrate satisfies at least one of the following characteristics: The supporting substrate includes at least one of silicon, silicon oxide, sapphire, silicon carbide, diamond, gallium nitride, and quartz; The thickness of the supporting substrate is 200-1000 μm.

11. A method for preparing a composite piezoelectric structure, characterized in that, include: S1: Provides a support substrate and piezoelectric wafer; S2: The piezoelectric wafer is bonded to the supporting substrate at a bonding angle corresponding to a preset angle to obtain a bonding structure; S3: Thinning is performed on one side surface of the bonding structure containing the piezoelectric wafer to form a piezoelectric thin film layer, resulting in an intermediate composite structure; the preset angle is the angle between the crystal axes in the same plane of two adjacent piezoelectric thin film layers; S4: Repeat steps S2 and S3 until a composite piezoelectric layer is formed on the support substrate, the composite piezoelectric layer comprising at least two piezoelectric thin film layers, to obtain a composite piezoelectric structure; the at least two piezoelectric thin film layers have the same crystal cutting type.

12. The preparation method according to claim 11, characterized in that, S2 further includes: After ion implantation, the piezoelectric wafer is bonded to the supporting substrate at a bonding angle corresponding to a preset angle to obtain a bonding structure.

13. The preparation method according to claim 12, characterized in that, The thinning process includes: performing high-temperature annealing on the bonding structure to separate the piezoelectric wafer along the implantation damage layer formed by ion implantation; Alternatively, the bonding structure may be ground or etched on one side of the piezoelectric wafer to form the piezoelectric thin film layer.

14. A semiconductor device, characterized in that, Includes the composite piezoelectric structure as described in any one of claims 1-10, or includes the composite piezoelectric structure prepared by the preparation method described in claims 11-13.

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