Device control method, electronic device, and storage medium

Abstract

A device control method, an electronic device and a storage medium, relate to the technical field of terminals. After the electronic device enters a recovery mode, memory repair processing is sequentially performed until the internal memory supports the electronic device to successfully boot up; wherein each time the memory repair processing includes: controlling the internal memory to enter a test mode; and adjusting a parameter value of a memory timing parameter of the internal memory in the test mode of the internal memory. The internal memory is repaired by a software method, so that the electronic device can be restored to normal booting based on the repaired internal memory without restoring factory settings.

Description

Technical Field

[0001] This application relates to the field of terminal technology, and in particular to a device control method, electronic device, and storage medium. Background Technology

[0002] System stability is a primary concern for users of electronic devices. Only with a stable system can electronic devices run various system programs and perform various functions and processes correctly. If an electronic device experiences abnormal restarts, freezes, or fails to boot, it will result in a poor user experience.

[0003] Currently, when electronic devices experience system malfunctions, they typically enter Recovery mode. In Recovery mode, a factory reset restores the device to normal operation. However, this process results in data loss, causing inconvenience for the user. Summary of the Invention

[0004] This application provides a device control method, an electronic device, and a storage medium that enable the electronic device to power on normally without restoring factory settings.

[0005] To achieve the above objectives, the embodiments of this application adopt the following technical solutions:

[0006] Firstly, a device control method is provided, applied to an electronic device including internal memory. After the electronic device enters Recovery mode due to a system malfunction, the electronic device can perform memory repair processes sequentially until the internal memory supports successful booting of the electronic device.

[0007] Each memory repair process includes: controlling the internal memory to enter test mode; and adjusting the parameter values ​​of the memory timing parameters of the internal memory in the test mode.

[0008] In the above solution, the electronic device can control its internal memory to enter Test Mode within Recovery mode. While the internal memory is in Test Mode, memory repair is performed by adjusting the memory timing parameters, allowing the electronic device to boot normally again. This solves the problem of electronic devices failing to boot and operate normally due to system anomalies. Furthermore, the electronic device can resume normal operation without deleting user data, improving user data security.

[0009] In one possible implementation of the first aspect, after each memory repair process, the electronic device can control the internal memory to exit the test mode and control the electronic device to restart, during which the internal memory is trained; if the training is successful, the electronic device is successfully powered on; if the training fails, the next memory repair process is performed.

[0010] In the above solution, after each memory repair process (i.e., after adjusting the memory timing parameters of the internal memory), the effectiveness or success of the memory repair process can be verified through restarting and memory training, which is very convenient. Furthermore, upon successful training, the electronic device can be directly powered on, combining memory repair with the electronic device's boot process, further improving the efficiency of restoring the electronic device to normal boot status.

[0011] In one possible implementation of the first aspect, the memory timing parameters correspond to multiple preset parameter values; during each memory repair process, the parameter value of the memory timing parameters of the internal memory is adjusted to one of the multiple preset parameter values; the first preset parameter value corresponding to the previous memory repair process is less than the second preset parameter value corresponding to the next memory repair process.

[0012] Generally speaking, the smaller the memory timing parameter values, the better the device performance. In the above solution, adjusting the memory timing parameter values ​​in ascending order allows the electronic device to resume normal boot while maintaining optimal performance.

[0013] In one possible implementation of the first aspect, there are multiple memory timing parameters whose values ​​are adjusted, and these multiple memory timing parameters have a priority relationship. The priority of each memory timing parameter is positively correlated with the probability that it will cause internal memory failure or anomaly. That is, if an inappropriate value of a memory timing parameter increases the probability of causing internal memory failure or anomaly, then the priority of that memory timing parameter is higher. Conversely, if an inappropriate value of a memory timing parameter decreases the probability of causing internal memory failure or anomaly, then the priority of that memory timing parameter is lower.

[0014] In each memory repair process, the parameter value of one of the multiple memory timing parameters is adjusted to a corresponding preset parameter value; if the system fails to boot successfully after adjusting the multiple preset parameter values ​​of the first priority memory timing parameter, the parameter value of the second priority memory timing parameter is adjusted, where the first priority is greater than the second priority.

[0015] In the above scheme, memory timing parameters are adjusted sequentially from highest to lowest priority. This is equivalent to prioritizing the adjustment of timing parameters most likely to cause internal memory failures or anomalies, thus enabling more efficient memory repair and improving repair efficiency. Furthermore, it also minimizes unnecessary adjustments, saving system resources.

[0016] In one possible implementation of the first aspect, if multiple memory timing parameters are adjusted one by one but the system still fails to boot normally, in each subsequent memory repair process, the values ​​of the memory timing parameters of the internal memory are adjusted according to a parameter combination. This parameter combination includes at least two memory timing parameters and a corresponding preset parameter value; different parameter combinations are used in different memory repair processes. For example, different parameter combinations may include different adjusted memory timing parameters and / or different preset parameter values.

[0017] It should be understood that in some cases, internal memory malfunctions may be caused by mismatched values ​​of multiple memory timing parameters. Therefore, in the above solution, if the electronic device still fails to boot normally after adjusting the values ​​of multiple memory timing parameters one by one, the electronic device can adjust the values ​​of multiple memory timing parameters according to the parameter combination during each memory repair process, thereby increasing the possibility of restoring the electronic device to normal boot.

[0018] In one possible implementation of the first aspect, after the electronic device enters Recovery mode, it can display a first control. This first control is used to trigger a memory timing repair mechanism. Therefore, after the user inputs a first operation on the first control, the electronic device can respond to the first operation input on the first control and sequentially perform memory repair processing.

[0019] In the above solution, the first control is a new functional control added to the interface after entering Recovery mode. By adding this first control, users can choose or decide whether to initiate memory repair processing. This essentially allows users to decide whether memory repair processing is needed, improving the flexibility of memory repair.

[0020] In one possible implementation of the first aspect, the display screen of the electronic device is in a black screen state during the successive memory repair processes. This saves system resources during the memory repair process.

[0021] In one possible implementation of the first aspect, the mobile phone may display prompts during the successive memory repair processes. These prompts are system prompts related to memory repair. For example, the prompts may include at least one of the estimated duration of the memory repair or device status prompts during the memory repair process.

[0022] In the above solution, displaying prompts can more accurately present the relevant processing status of memory repair to the user, reducing the occurrence of memory repair failure due to user error without their knowledge.

[0023] In one possible implementation of the first aspect, the internal memory has a first register interface. The electronic device can write first information to the first register interface; the first information is used to instruct the internal memory to enter the test mode.

[0024] In the above scheme, a first register interface is set in the internal memory, and the purpose of controlling the internal memory to enter the test mode is achieved based on the first register interface.

[0025] In one possible implementation of the first aspect, the internal memory has a second register interface. The electronic device can write second information to the second register interface; the second information is used to instruct the internal memory to adjust the parameter value of the memory timing parameter to a corresponding preset parameter value.

[0026] In the above scheme, a second register interface is set in the internal memory, and the purpose of controlling the internal memory to adjust parameter values ​​is achieved based on the second register interface.

[0027] In one possible implementation of the first aspect, the internal memory has a third register interface and a fourth register interface. The electronic device can write third information to the third register interface and fourth information to the fourth register interface; wherein the third information is used to indicate memory timing parameters in the internal memory that need to be adjusted; and the fourth information is used to indicate preset parameter values ​​that need to be adjusted.

[0028] In the above scheme, the internal memory is equipped with a third register interface and a fourth register interface, which are used to receive the specified memory timing parameters to be adjusted and to receive the preset parameter values ​​indicating that adjustments are needed, respectively. Based on the third register interface and the fourth register interface, the memory timing parameters to be adjusted and the preset parameter values ​​to be adjusted can be transmitted to the internal memory through two information channels or two signal sequences, thereby conveying the instruction information more accurately.

[0029] In one possible implementation of the first aspect, the method further includes:

[0030] If a second operation is received during the successive memory repair process, the memory repair process is stopped, and the memory timing parameters of the internal memory are restored to their corresponding default values.

[0031] In one possible implementation of the first aspect, the electronic device may store a first target parameter value corresponding to the memory timing parameter in a non-volatile memory; the first target parameter value is a parameter value that supports the successful power-on of the electronic device; wherein the stored first target parameter value is used to configure the internal memory during the power-on process of the electronic device.

[0032] In the above solution, the first target parameter value of the memory timing parameters that support the successful boot of the mobile phone is stored in non-volatile memory. This first target parameter value can be used to configure the internal memory every time the phone is booted up, instead of using the default parameter value of the internal memory, thus improving the boot success rate.

[0033] In one possible implementation of the first aspect, when the electronic device re-enters Recovery mode, a target memory timing parameter is used as the initial memory timing parameter to be adjusted during the first memory repair process, and a second target parameter value corresponding to the target memory timing parameter is used as the initial parameter value to be adjusted during the first memory repair process, and memory repair processes are performed sequentially; wherein, the target memory timing parameter is the memory timing parameter adjusted when the electronic device last entered Recovery mode for the last memory repair process; and the second target parameter value is the parameter value to which the target memory timing parameter was adjusted during the last memory repair process.

[0034] In the above scheme, the memory timing parameters and corresponding parameter values ​​that were successfully repaired when entering Recovery mode last time are used as the basis for memory repair processing each time the system enters Recovery mode this time. This reduces unnecessary and repetitive adjustment processing, improves the efficiency of memory repair, and avoids or reduces unnecessary resource consumption.

[0035] Secondly, this application provides an electronic device comprising at least a memory and one or more processors. The memory stores computer instructions, which, when executed by the one or more processors, cause the electronic device to perform the methods described in any of the first aspects above.

[0036] Thirdly, this application provides a chip system applied to an electronic device, the chip system including one or more processors, the processors being used to invoke computer instructions to cause the electronic device to perform any of the methods described in the first aspect above.

[0037] Fourthly, this application provides a computer storage medium including computer instructions that, when executed on an electronic device, cause the electronic device to perform any of the methods described in the first aspect above.

[0038] Fifthly, this application provides a computer program product that, when run on a computer, causes the computer to perform any of the methods described in the first aspect above. Attached Figure Description

[0039] Figure 1A A schematic flowchart of the device control method provided in this application embodiment;

[0040] Figure 1B A hardware structure block diagram of a mobile phone provided in an embodiment of this application;

[0041] Figure 2 A schematic diagram of the memory timing repair menu provided in an embodiment of this application;

[0042] Figure 3 Flowchart of the device control method provided in the embodiments of this application Figure 2 ;

[0043] Figure 4 This is a schematic diagram of the prompting information provided in the embodiments of this application;

[0044] Figure 5 Flowchart of the device control method provided in the embodiments of this application Figure 3 ;

[0045] Figure 6 A schematic diagram illustrating the principle of controlling the internal memory to enter test mode, provided in an embodiment of this application;

[0046] Figure 7 A schematic diagram illustrating the principle of adjusting the memory timing parameters of the internal memory as provided in an embodiment of this application;

[0047] Figure 8 A system framework diagram provided for embodiments of this application;

[0048] Figure 9 Flowchart of the device control method provided in the embodiments of this application Figure 4 . Detailed Implementation

[0049] The technical solutions of the embodiments of this application are described below with reference to the accompanying drawings. In the description of the embodiments of this application, the terminology used in the following embodiments is for the purpose of describing specific embodiments only and is not intended to limit the application. As used in the specification and appended claims of this application, the singular expressions "a," "the," "the," and "this" are intended to also include expressions such as "one or more," unless the context clearly indicates otherwise. It should also be understood that in the following embodiments of this application, "at least one" and "one or more" refer to one or more (including two). The term "and / or" is used to describe the relationship between related objects, indicating that three relationships can exist; for example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. In the description of the embodiments, unless otherwise stated, "multiple" means two or more.

[0050] References to "one embodiment" or "some embodiments" in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized. The term "connection" includes direct connections and indirect connections, unless otherwise stated. The terms "first," "second," "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first," "second," "third," etc., may explicitly or implicitly include one or more of that feature.

[0051] In the embodiments of this application, the words "exemplary," "for example," or "for instance" are used to indicate examples, illustrations, or explanations. Any embodiment or design described as "exemplary," "for example," or "for instance" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of the words "exemplary," "for example," or "for instance" is intended to present the relevant concepts in a specific manner.

[0052] This application provides a device control method applied to system anomaly scenarios. It should be understood that a system anomaly refers to an abnormal situation occurring in the electronic device's system. Abnormal situations such as abnormal restarts, freezes, or inability to power on of the electronic device all fall under the category of system anomaly scenarios.

[0053] In the event of a system malfunction, the electronic device performs memory repair by executing the device control method described in this embodiment of the application. That is, the internal memory is repaired by software, thereby restoring the electronic device to normal operation. For example, the internal memory being repaired in this embodiment of the application can be RAM, such as DDR (Double Data Rate SDRAM).

[0054] It should be understood that the aforementioned system malfunction scenarios occur after the electronic device has left the factory and during user use. That is, the device control method in this application embodiment aims to address situations where system malfunctions occur during user use after the electronic device has left the factory.

[0055] Currently, when users encounter system malfunctions while using electronic devices, they typically enter Recovery mode. In Recovery mode, users can attempt to restore the device to normal operation by restoring factory settings or clearing the cache. However, both methods have certain limitations.

[0056] Specifically, performing a factory reset in Recovery mode will result in data loss on the electronic device, affecting data security and causing a poor user experience. Using the cache clearing function in Recovery mode can only clear temporary data generated during system operation, thus only resolving minor malfunctions or performance degradation caused by system cache issues, resulting in limited effectiveness in restoring the electronic device to normal boot status. In other words, using the cache clearing function usually cannot restore the electronic device to normal boot status; for example, it may prevent the electronic device from booting and operating normally.

[0057] The inventors of this application, through in-depth research, discovered that since the system programs of electronic devices are primarily cached in internal memory during operation, the performance of internal memory significantly impacts the normal operation of the electronic device. Abnormalities such as abnormal restarts, freezes, or inability to power on in electronic devices are largely due to malfunctions in the internal memory (e.g., damage or aging of the internal memory).

[0058] Based on this, this application provides a device control method. This method adds a memory timing repair mechanism for Recovery mode. After an electronic device enters Recovery mode due to a system malfunction, it can automatically repair its internal memory based on the memory timing repair mechanism. This allows the electronic device to boot normally without deleting large amounts of data, ensuring the security of user data. Furthermore, the device control method of this application can repair the internal memory to a certain extent, increasing the probability of the electronic device booting normally compared to simply clearing the cache, thus more effectively restoring the electronic device to normal operation.

[0059] Specifically, after an electronic device enters Recovery mode, it can perform memory repair processes sequentially based on a memory timing repair mechanism until the internal memory supports successful booting. For example, if the internal memory cannot support successful booting after the first memory repair process, a second memory repair process is performed. If the internal memory still cannot support successful booting after the third memory repair process, the memory repair process continues. This process is repeated multiple times until the internal memory supports successful booting.

[0060] During each memory repair process, the electronic device tunes its internal memory timing parameters, adjusting their values. If the internal memory allows the electronic device to boot successfully, the memory repair is considered successful. In other words, configuring the internal memory with the adjusted timing parameter values ​​ensures its proper functioning, preventing internal memory malfunctions from preventing the electronic device from booting.

[0061] Memory timing parameters are parameters that describe the performance of internal memory (such as Synchronous Dynamic Random Access Memory, SDRAM). Memory timing parameters are measured in clock cycles and specify the latency that affects the speed of the internal memory.

[0062] It should be understood that the memory timing parameters of internal memory are generally related to the internal circuitry of the internal memory. Therefore, adjusting the values ​​of the memory timing parameters is equivalent to adjusting the parameters of the corresponding internal circuitry. Thus, memory repair can be achieved by adjusting the values ​​of the memory timing parameters.

[0063] For example, there can be multiple memory timing parameters describing the performance of the internal memory. In each memory repair process, the value of one memory timing parameter can be adjusted, or the values ​​of multiple memory timing parameters can be adjusted based on a combination of parameters; there is no limitation on this.

[0064] In some embodiments, the plurality of memory timing parameters may include at least one of tRAS (Row Active Time), tRCD (Row Cycle Delay), tWR (Write Recovery Time), tDQSCK (Differential Clock Signal Crossover to Data Strobe Clock Signal Crossover Time), tREF (Refresh Interval), tRFCab (Refresh Cycle Time for Abort, describing the time interval required for one refresh operation to be aborted before another refresh operation or other memory operation can begin), or tRFCpb (Refresh Cycle Time for Precharge Bank).

[0065] After an electronic device leaves the factory, the memory timing parameters of its internal memory are generally fixed at the factory default values. Therefore, the values ​​of the internal memory timing parameters generally do not change. Through the improvements made in this application embodiment, in Recovery mode, the electronic device can adjust the values ​​of the internal memory timing parameters to perform memory repair processing.

[0066] In some embodiments, during each memory repair process, the electronic device can control the internal memory to enter a test mode. While the internal memory is in test mode, the values ​​of its memory timing parameters can be adjusted. Therefore, after the internal memory enters test mode, the electronic device can adjust the values ​​of its memory timing parameters. It should be understood that in other embodiments, the Recovery mode can be improved in other ways, enabling the electronic device to adjust the values ​​of the internal memory timing parameters for memory repair in the improved Recovery mode. This is not limited to any particular embodiment.

[0067] Traditionally, performance testing of electronic devices is typically conducted during the testing phase before the device leaves the factory. After passing the test, the device is shipped and provided to ordinary users (i.e., non-testing personnel). Once the device is shipped, ordinary users generally cannot access the test mode. The memory timing repair mechanism proposed in this application is applicable to electronic devices intended for use by ordinary users after they have left the factory. When an electronic device enters Recovery mode due to a system malfunction, it can control the device's internal memory to enter the test mode.

[0068] For example, after the electronic device leaves the factory, an interface for entering test mode is reserved for the electronic device. Thus, when the electronic device enters Recovery mode after leaving the factory, the internal memory can be controlled to enter test mode through the interface for entering test mode, and the parameter values ​​of the memory timing parameters of the internal memory can be adjusted while the internal memory is in test mode.

[0069] To facilitate understanding, we will now combine Figure 1A A diagram is provided. Please refer to [link / reference]. Figure 1A The device control method in this application embodiment specifically includes the following steps 1 to 3:

[0070] 1. The system is experiencing an abnormal situation.

[0071] For example, electronic devices may experience abnormal situations such as the device failing to power on or repeatedly restarting.

[0072] 2. The software triggers the entire device to enter Recovery mode.

[0073] Specifically, the software generates a trigger condition that causes the electronic device (i.e., the entire device) to enter Recovery mode.

[0074] 3. In Recovery mode, perform memory repair sequentially until the electronic device boots up successfully.

[0075] That is, until the internal memory enables the electronic device to boot successfully.

[0076] In step 3, the memory repair process is performed sequentially. Each memory repair process may include:

[0077] (1) Control the internal memory to enter test mode.

[0078] (2) Adjust the memory timing parameters of the internal memory.

[0079] In the above solution, the electronic device can control its internal memory to enter a test mode within Recovery mode. While the internal memory is in test mode, memory repair is performed by adjusting the memory timing parameters, allowing the electronic device to boot normally again. This solves the problem of electronic devices failing to boot and operate normally due to system anomalies. Furthermore, the electronic device can resume normal operation without deleting user data, improving user data security.

[0080] For example, the aforementioned electronic devices may be mobile phones, tablets, desktops, laptops, handheld computers, notebook computers, ultra-mobile personal computers (UMPCs), netbooks, as well as cellular phones, personal digital assistants (PDAs), augmented reality (AR) / virtual reality (VR) devices, etc. This application does not impose special limitations on the specific form of the electronic devices. The following mainly uses a mobile phone as an example to illustrate the solution of this application. It should be understood that the principle of implementing the solution of this application in other electronic devices is the same as that in mobile phones, therefore, it will not be described in detail for different types of electronic devices.

[0081] See Figure 1B The mobile phone may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, a headphone jack 170D, a sensor 180, buttons 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc.

[0082] It is understood that the structures illustrated in the embodiments of the present invention do not constitute a specific limitation on the mobile phone. In other embodiments of this application, the mobile phone may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0083] Processor 110 may include one or more processing units, such as: application processor (AP), modem processor, graphics processing unit (GPU), image signal processor (ISP), controller, memory, video codec, digital signal processor (DSP), baseband processor, and / or neural network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.

[0084] In some embodiments, the mobile phone can perform the device control method of the present application embodiment through the processor 110.

[0085] The wireless communication function of a mobile phone can be implemented through antenna 1, antenna 2, mobile communication module 150, wireless communication module 160, modem processor, and baseband processor.

[0086] The mobile phone implements its display function through a GPU, a display screen 194, and an application processor. The GPU is a microprocessor for image processing, connected to the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations and for graphics rendering. The processor 110 may include one or more GPUs, which execute program instructions to generate or modify display information.

[0087] The display screen 194 is used to display images, videos, etc. In some embodiments, the mobile phone can display a memory timing repair menu (i.e., the first control) or prompts related to memory repair through the display screen 194.

[0088] Mobile phones can achieve shooting functions through ISP, camera 193, video codec, GPU, display 194 and application processor.

[0089] Mobile phones can perform audio functions, such as music playback and recording, through components like the audio module 170, speaker 170A, receiver 170B, microphone 170C, headphone jack 170D, and application processor.

[0090] Button 190 may include a power button, volume buttons, etc. Button 190 may be a mechanical button or a touch button. The mobile phone can receive button input and generate key signal inputs related to the phone's user settings and function control. Motor 191 can generate vibration alerts. Motor 191 can be used for incoming call vibration alerts or for touch vibration feedback. Indicator 192 may be an indicator light, used to indicate charging status, battery level changes, or messages, missed calls, notifications, etc. SIM card interface 195 is used to connect a SIM card. The SIM card can be inserted into or removed from the SIM card interface 195 to achieve contact and separation with the mobile phone.

[0091] The software system of a mobile phone can adopt a layered architecture, event-driven architecture, microkernel architecture, microservice architecture, or cloud architecture. This application does not specifically limit this approach.

[0092] In the following text, taking a mobile phone as an example and referring to the accompanying drawings, the device control method in the embodiments of this application will be described in more detail.

[0093] First, we will introduce how a phone begins sequential memory repair in Recovery mode. For example, the method for initiating sequential memory repair may include method 1 or method 2.

[0094] Method 1: Automatically begin sequential memory repair processing.

[0095] Specifically, after the phone enters Recovery mode, it can automatically begin sequential memory repair. That is, after the phone enters Recovery mode, it can automatically activate the memory timing repair mechanism and perform memory repair sequentially.

[0096] In some examples, after entering Recovery mode for a preset duration of 1 second, the phone can automatically begin sequential memory repair processing. For instance, after 10 seconds in Recovery mode, the phone can automatically begin sequential memory repair processing. That is, after 10 seconds in Recovery mode, the phone controls the internal memory to enter test mode. In the internal memory test mode, the parameter values ​​of the internal memory timing parameters are adjusted to perform the first memory repair process.

[0097] In other examples, memory repair processing can be automatically triggered upon detecting entry into Recovery mode. This application does not limit the method by which the phone automatically initiates memory repair processing.

[0098] Method 2: Respond to user input and begin sequential memory repair processing.

[0099] Specifically, after the phone enters Recovery mode, it can also respond to user input and begin sequential memory repair. That is, when the user inputs an interactive operation, the phone's memory timing repair mechanism can be triggered to begin sequential memory repair.

[0100] For example, after the phone enters Recovery mode, a first control can be displayed. Triggering this first control can initiate a memory timing repair mechanism. See details... Figure 2 After entering Recovery mode, interface 200 is displayed, which shows the memory timing repair menu (i.e., the first control). The "Memory Timing Repair" option marked 201 is a menu option, equivalent to a memory timing repair menu. In response to the user's input on 201 (i.e., the first operation), memory repair processing begins sequentially.

[0101] It should be understood that in traditional methods, the interface after entering Recovery mode will not have a primary control (i.e., the control used to initiate the memory timing repair mechanism), such as... Figure 2 In section 201, the first control is a newly added functional control in this embodiment. In this embodiment, by adding this first control to the interface after entering Recovery mode, the user can select or decide whether to initiate memory repair processing. This effectively allows the user to decide whether memory repair processing is needed, improving the flexibility of memory repair.

[0102] It should be noted that, in addition to being displayed as an option on the same screen as other function options in Recovery mode (such as...), Figure 2 In addition to the interface shown in 200, the first control can also be displayed separately. This application embodiment does not limit the display method of the first control.

[0103] In the following text, taking the triggering of the first control to start the memory timing repair mechanism as an example, combined with... Figure 3 The device control method in the embodiments of this application is illustrated.

[0104] Please see Figure 3 The device control method in this application embodiment may include the following steps:

[0105] 1. The system is experiencing an abnormal situation.

[0106] 2. The software triggers the entire device to enter Recovery mode.

[0107] 3. In Recovery mode, the memory timing repair menu is displayed.

[0108] The memory timing repair menu is the first control mentioned above.

[0109] 4. Respond to the operation of clicking the memory timing repair menu, start the memory timing repair mechanism until the phone can boot normally again.

[0110] In some embodiments, the phone's display screen may be in a blackout state during the successive memory repair process.

[0111] In some embodiments, in response to a first operation input to a first control, the phone may display a prompt message. Upon confirmation of the prompt message by the user, the phone may begin sequential memory repair processing.

[0112] The aforementioned prompts are system prompts related to memory repair. For example, the prompts may include at least one of the following: the estimated duration of the memory repair, or device status prompts during the memory repair process.

[0113] In other embodiments, the phone may display a prompt message during the successive memory repair process.

[0114] In some examples, in response to the first action of the first control input, the phone can begin sequential memory repair processing. During this sequential memory repair process, the phone can display a prompt message. For example, the phone can display this prompt message while the screen is off during the sequential memory repair process.

[0115] For example, the mobile phone can display the aforementioned prompt message during a preset time period before each memory repair process. If the display duration of the prompt message meets a preset duration of 2, the prompt message will be canceled. Alternatively, the mobile phone can continuously display the prompt message throughout the entire memory repair process. The mobile phone can also add an entry point for canceling the display of the prompt message to the display window; in response to the user's triggering of this entry point, the display of the prompt message can be canceled.

[0116] In other examples, after the phone enters Recovery mode, it can automatically begin sequential memory repair. During this sequential memory repair process, the phone can display prompts.

[0117] To facilitate understanding of the prompts, the following is combined with Figure 2 and Figure 4 Provide a illustrative explanation.

[0118] Please see Figure 2 After the user clicks on 201 in interface 200 (equivalent to the first control or memory timing repair menu), the phone can display... Figure 4The displayed message is 401. The phrase "Memory repair time estimated at 10-15 minutes" describes the estimated duration of the memory repair process, while "The phone will be in a black screen state during the repair" indicates the device status during the memory repair process.

[0119] The following section will describe in more detail how to perform memory repair sequentially.

[0120] In some embodiments, during the successive memory repair process, after each memory repair operation (i.e., each memory repair operation), the phone can verify whether the current memory repair operation was successful, that is, whether it can effectively repair the internal memory. If the current memory repair operation is unsuccessful, the next memory repair operation is performed until the internal memory supports the phone's successful boot.

[0121] For example, after each memory repair process, the phone can control the internal memory to exit test mode and restart the phone. During the restart process, the phone can train the internal memory. If the training succeeds, the phone boots up successfully. If the training fails, the next memory repair process is performed.

[0122] As mentioned above, during each memory repair process, the phone adjusts the memory timing parameters of its internal memory, essentially changing the parameters of the internal circuitry. Therefore, if the adjusted internal memory is not trained after each adjustment, the CPU will be unable to communicate with it. Thus, after each memory repair process, the phone can reboot, and during the reboot process, the adjusted internal memory is trained—this is known as memory training. The purpose of memory training is to enable the adjusted internal memory to communicate normally with the CPU, essentially finding a set of timing parameters (which can be called training parameters) that allow the internal memory to communicate correctly with the CPU's memory controller. It should be understood that the training parameters found during the memory training phase are different from the memory timing parameters of the internal memory in this embodiment (i.e., the relevant parameters of the internal circuitry of the internal memory itself).

[0123] The training results for training internal memory can include training success or training failure.

[0124] Training successful: This indicates that after adjusting the memory timing parameters, the internal memory was able to repair itself, enabling normal communication between the adjusted internal memory and the CPU. Therefore, after successful training, the phone successfully booted up.

[0125] Training failed: This indicates that after adjusting the memory timing parameters, the internal memory is unable to communicate normally with the CPU, thus failing to repair the memory. Therefore, in the event of training failure, the phone can perform another memory repair attempt. For example, the phone can control the internal memory to re-enter test mode and continue adjusting the memory timing parameters while the internal memory is in test mode.

[0126] In other words, each time the internal memory enters test mode, the memory timing parameters can be adjusted. Furthermore, each parameter adjustment triggers an exit from test mode and a phone restart, during which the adjusted internal memory is trained. The effectiveness of the adjustment or memory repair is determined based on the training results. If training fails, the phone can re-enter test mode to readjust the memory timing parameters. This cycle repeats until the memory repair is successful and the internal memory allows the phone to boot successfully.

[0127] To facilitate understanding, we will now combine Figure 5 Provide a illustrative explanation.

[0128] 1. Control the internal memory to enter test mode.

[0129] In some embodiments, after the phone enters Recovery mode, the phone can also display a memory timing repair menu (i.e., the first control), respond to the user's click on the memory timing repair menu, and control the internal memory to enter test mode.

[0130] 2. Adjust the memory timing parameters of the internal memory.

[0131] 3. After adjusting the parameter values, control the internal memory to exit the test mode and restart the phone.

[0132] 4. During the phone restart process, the internal memory is trained.

[0133] After the training is successful, the phone will power on successfully. That is, the phone's system will start normally, and the phone will power on normally.

[0134] If training fails, return to step 1 and regain control of the internal memory to enter test mode. After the internal memory re-enters test mode, steps 2 through 4 can be executed. Repeat this process multiple times until training succeeds.

[0135] In some embodiments, if a second operation is received during the successive memory repair process, the mobile phone can stop the memory repair process and restore the parameter values ​​of the memory timing parameters of the internal memory to the corresponding default parameter values.

[0136] It should be understood that if the user interrupts the memory repair process by entering a second operation during the successive memory repair steps (i.e., before the memory repair is successful), the phone can stop the memory repair process and continue to use the default parameter values ​​for the internal memory timing parameters. This avoids problems caused by changing the memory timing parameter values ​​due to unsuccessful repair processes, maintains the phone's original state, and facilitates subsequent phone repairs. Next, we will introduce the specific procedures for controlling the internal memory to enter or exit test mode.

[0137] In some embodiments, when the phone wants to control the internal memory to enter test mode, the phone can send a first message to the internal memory to instruct the internal memory to enter test mode. When the phone wants to control the internal memory to exit test mode, the phone can send a fifth message to the internal memory to instruct the internal memory to exit test mode.

[0138] For example, the internal memory has a first register interface. This first register interface is used to receive information instructing the internal memory to enter test mode (i.e., first information) or information instructing the internal memory to exit test mode (i.e., fifth information). Specifically, the mobile phone can write the first information or the fifth information to the first register interface. After receiving the first information based on the first register interface, the internal memory can enter test mode. After receiving the fifth information based on the first register interface, the internal memory can exit test mode.

[0139] In some embodiments, the mobile phone includes a memory controller. After the mobile phone enters Recovery mode, the memory controller can control the internal memory to enter or exit test mode. Specifically, the memory controller can send information (i.e., first information) to the internal memory to instruct the internal memory to enter or exit test mode.

[0140] For example, please see Figure 6 The memory controller can write first information to the first register interface 601 of the internal memory, and the internal memory can enter the test mode based on the first information. For example, the memory controller can write fifth information to the first register interface 601 of the internal memory, and the internal memory can exit the test mode based on the fifth information.

[0141] As mentioned above, the phone has a reserved interface for entering test mode. For example, after receiving the first information, the internal memory can enter test mode based on this interface.

[0142] Next, we will introduce the specific process of adjusting the memory timing parameters of the internal memory after the internal memory enters test mode.

[0143] As mentioned above, after the phone enters Recovery mode, it can perform memory repair processes sequentially. During each memory repair process, the internal storage is controlled to enter test mode, and in this test mode, the values ​​of one or more memory timing parameters are adjusted. Each memory timing parameter is adjusted once.

[0144] Specifically, the memory timing parameters were adjusted so that their values ​​before adjustment were lower than their values ​​after adjustment. In other words, the memory timing parameters were adjusted to increase their values.

[0145] The following example illustrates how to adjust a memory timing parameter once after the internal memory enters test mode. For instance, after the internal memory enters test mode, the memory timing parameter tRAS can be increased from the default value of 42 (ns) to 80 (ns).

[0146] In some embodiments, the mobile phone can randomly increase the value of the memory timing parameter in the direction of increasing the parameter value.

[0147] In other embodiments, the mobile phone may also adjust the value of the memory timing parameter to a preset value, wherein the preset value is greater than the value of the memory timing parameter before adjustment.

[0148] In some embodiments, the memory timing parameters correspond to multiple preset parameter values. During each memory repair process, the mobile phone can adjust the parameter value of the memory timing parameters in the internal memory to one of the multiple preset parameter values. Specifically, the first preset parameter value corresponding to the previous memory repair process is less than the second preset parameter value corresponding to the next memory repair process. The first preset parameter value is the value to which the memory timing parameter in the internal memory was adjusted during the previous memory repair process. The second preset parameter value is the value to which the memory timing parameter in the internal memory will be adjusted during the next memory repair process.

[0149] In other words, for a memory timing parameter to be adjusted, if multiple preset parameter values ​​are set for that parameter, then the internal memory can be adjusted by successively selecting one preset parameter value from the multiple preset parameter values ​​in ascending order. That is, in each memory repair process, only one preset parameter value is selected, and the parameter value of that memory timing parameter in the internal memory is adjusted to that preset parameter value. The preset parameter value selected in the previous memory repair process (i.e., the first preset parameter value) is less than the preset parameter value selected in the next memory repair process (i.e., the second preset parameter value).

[0150] For example, the memory timing parameter to be adjusted is tRAS. tRAS has six preset parameter values: 20, 80, 120, 160, 200, and 240. These six preset parameter values ​​are equivalent to six speed settings. The default parameter value of tRAS (i.e., the parameter value fixed at the factory) is 42.

[0151] Since the default tRAS value is 42, the phone can adjust the tRAS value of the internal memory to 80 in the first memory repair process, starting from a smaller value and gradually increasing it (i.e., increasing the value in the direction of the larger value). If the internal memory still cannot boot normally after adjusting the tRAS value to 80, the first memory repair process is ineffective. Then, the phone can perform a second memory repair process, controlling the internal memory to re-enter test mode and further increasing the tRAS value to 120. If the second memory repair process is still ineffective, the phone can perform a third memory repair process, controlling the internal memory to re-enter test mode and further increasing the tRAS value to 160. This process continues, continuously adjusting the tRAS value to larger preset values.

[0152] In some embodiments, there are multiple memory timing parameters whose values ​​are adjusted, and these multiple memory timing parameters have a priority relationship. During each memory repair process, the value of one of the multiple memory timing parameters is adjusted to a corresponding preset parameter value. If booting fails despite adjusting multiple preset parameter values ​​of the first-priority memory timing parameter, the value of the second-priority memory timing parameter is then adjusted, where the first priority is greater than the second priority.

[0153] In other words, there are multiple memory timing parameters whose values ​​can be adjusted. Each memory timing parameter corresponds to multiple preset parameter values. The mobile phone can adjust multiple memory timing parameters one by one according to the priority relationship between them, in descending order of priority.

[0154] The priority of each memory timing parameter is positively correlated with the probability that it will cause internal memory failure or anomalies. That is, the higher the probability of an inappropriate memory timing parameter value causing an internal memory failure or anomaly, the higher the priority of that memory timing parameter. Conversely, the lower the probability of an inappropriate memory timing parameter value causing an internal memory failure or anomaly, the lower the priority of that memory timing parameter.

[0155] Specifically, the phone can first adjust the parameter value of the highest priority (i.e., first priority) memory timing parameter (which can be referred to as "memory timing parameter 1" for easy distinction). That is, based on the multiple preset parameter values ​​corresponding to the highest priority memory timing parameter 1, multiple memory repair processes are performed. In each memory repair process for memory timing parameter 1, the phone can adjust the parameter value of memory timing parameter 1 in the internal memory to one of the multiple preset parameter values. If adjusting the multiple preset parameter values ​​of the highest priority memory timing parameter 1 fails to boot successfully, the phone continues to adjust the parameter value of the next highest priority (i.e., second priority) memory timing parameter (which can be referred to as "memory timing parameter 2"). This process is repeated until the phone successfully boots up.

[0156] In the above scheme, memory timing parameters are adjusted sequentially from highest to lowest priority. This is equivalent to prioritizing the adjustment of timing parameters most likely to cause internal memory failures or anomalies, thus enabling more efficient memory repair and improving repair efficiency. Furthermore, it also minimizes unnecessary adjustments, saving system resources.

[0157] For example, if adjusting the preset values ​​of the memory timing parameters with higher priority (i.e., first priority) still fails to boot the phone, the phone can first restore the value of the memory timing parameter with higher priority to the default value, and then continue to adjust the value of the memory timing parameter with lower priority (i.e., second priority).

[0158] Please refer to Table 1, which records multiple memory timing parameters (e.g., tRAS, tRCD, tRFCpb). These parameters are arranged in descending order of priority. tRAS has the highest priority, followed by tRCD, and then tRFCpb. Each memory timing parameter corresponds to multiple preset values. These preset values ​​represent the adjustable values ​​of the memory timing parameter. For example, tRAS (in nanoseconds) has six preset values: 20, 80, 120, 160, 200, and 240. The default value for tRAS is 42. Similarly, tDQSCK has five preset values: 0.5, 2, 4, 6, and 8. The default value for tDQSCK is 1.5.

[0159] Memory timing parameters Default parameter value (ns) gear tRAS(ns) 42 20 / 80 / 120 / 160 / 200 / 240 tRCD(ns) 18 10 / 40 / 60 / 80 / 100 / 120 tWR(ns) 18 10 / 40 / 60 / 80 / 100 / 120 tDQSCK(ns) 1.5 0.5 / 2 / 4 / 6 / 8 tREFlab(us, microseconds) 3.9 1 / 10 / 20 / 30 / 40 / 50 / 60 tRFCab(ns) 280 100 / 500 / 750 / 1000 tRFCpb(ns) 90 14 / 200 / 400 / 600 / 800 / 1000

[0160] Table 1

[0161] During the successive memory repair process, these memory timing parameters can be adjusted sequentially in descending order of priority. For ease of understanding, examples of the specific memory timing parameters in Table 1 are provided below.

[0162] As shown in Table 1, tRAS has the highest priority; therefore, tRAS is the first memory timing parameter used for memory repair. That is, the tRAS parameter value is adjusted first to attempt memory repair. For details on the process of adjusting the tRAS parameter value sequentially, please refer to the above text; it will not be repeated here.

[0163] If, after five memory repair attempts, successively adjusting the tRAS parameter value to 80, 120, 160, 200, and 240, the phone still fails to boot, it indicates that adjusting tRAS is ineffective for memory repair. The phone can be restored to the default tRAS parameter value of 42. Then, the next priority tRCD parameter can be used as the second memory timing parameter for memory repair, and its value adjusted accordingly to attempt memory repair.

[0164] Similarly, since the default value of tRCD is 18, the phone can first adjust the tRCD value from 18 to 40 to perform a memory repair process. If this memory repair process fails (i.e., the phone cannot boot successfully), the tRCD value will be adjusted from 40 to 60 in the next memory repair process. This process is repeated. If, after five memory repair processes, adjusting the tRCD value to 40, 60, 80, 100, and 120 respectively, the phone still cannot boot successfully, it indicates that adjusting tRCD cannot achieve successful memory repair. The phone can then restore the tRCD value to the default value of 18. Then, the next priority tWR is used as the third memory timing parameter for memory repair, and its value is adjusted to attempt memory repair. In this way, memory timing parameters are selected and adjusted in descending order of priority until the phone successfully boots up.

[0165] In some embodiments, if multiple memory timing parameters are adjusted one by one but the system still fails to boot normally, in each subsequent memory repair process, the memory timing parameters of the internal memory are adjusted according to the parameter combination.

[0166] The parameter combination includes at least two memory timing parameters and a corresponding preset parameter value, that is, each memory timing parameter in the parameter combination has a corresponding preset parameter value.

[0167] To facilitate understanding, Table 1 is used to illustrate the situation where multiple memory timing parameters are adjusted one by one, but the system still fails to boot normally.

[0168] As mentioned above, the memory timing parameters in Table 1 can be adjusted one by one. Specifically, the phone can first adjust the tRAS parameter value. If the phone still fails to boot after multiple adjustments to the tRAS parameter value, such as gradually increasing it from 80 to 240, the phone can restore the tRAS parameter value to the default value of 42, and then continue adjusting the tRCD parameter value. In other words, each time the phone performs memory repair or parameter tuning, it adjusts one memory timing parameter at a time, i.e., adjusting the memory timing parameter values ​​one by one.

[0169] If the phone still fails to boot after adjusting the last memory timing parameter tRFCpb to 1000, this process is repeated. This indicates that multiple memory timing parameters have been adjusted one by one, but the phone still fails to boot.

[0170] If the phone fails to boot normally even after adjusting multiple memory timing parameters individually, it can generate or randomly generate a combination of parameters based on these parameters and their corresponding preset values, according to preset rules. The phone can then continue performing memory repair processes sequentially based on the randomly generated parameter combinations. In each memory repair process, a different parameter combination is used to adjust the internal memory timing parameters. The parameter combinations used in different memory repair processes will vary.

[0171] Different parameter combinations can include different adjusted memory timing parameters and / or different preset parameter values. For example, different adjusted memory timing parameters mean that multiple memory timing parameters in the two parameter combinations are not completely consistent, including two situations: multiple memory timing parameters are completely different or multiple memory timing parameters are only partially the same.

[0172] To facilitate understanding, examples of different parameter combinations are provided. Assume there are four parameter combinations: Parameter Combination 1 (tRAS: 80, tRCD: 40), Parameter Combination 2 (tRAS: 120, tRCD: 40), Parameter Combination 3 (tRAS: 80, tWR: 40), and Parameter Combination 4 (tWR: 40, tDQSCK: 2). It should be noted that in this embodiment, it is not limited to a parameter combination having only two memory timing parameters; a parameter combination can also have three or more memory timing parameters. Here, only two memory timing parameters are used as an example.

[0173] In parameter combination 1 and parameter combination 2, the memory timing parameters that are adjusted are the same, namely tRAS and tRCD, but the corresponding parameter values ​​of tRAS and tRCD are different in parameter combination 1 and parameter combination 2.

[0174] The memory timing parameters in parameter combination 1 and parameter combination 3 are only partially the same. That is, only tRAS is the same in parameter combination 1 and parameter combination 3, but parameter combination 1 has tRCD, while parameter combination 3 does not have tRCD, but has tWR.

[0175] The memory timing parameters in parameter combination 1 and parameter combination 4 are completely different. Specifically, the memory timing parameters in parameter combination 1 are tRAS and tRCD, while the memory timing parameters in parameter combination 4 are tWR and tDQSCK.

[0176] The preceding text primarily described how to determine the memory timing parameters that need to be adjusted for each memory repair process, and how to determine the parameter values ​​to which the memory timing parameters need to be adjusted. The following text will describe in more detail how, after determining the parameter values ​​to be adjusted, the internal memory is controlled to adjust the memory timing parameters to the determined or indicated parameter values.

[0177] Specifically, the mobile phone can send an instruction message to the internal memory, which instructs the internal memory to adjust the parameter values ​​of the memory timing parameters.

[0178] In some embodiments, the mobile phone can send second information to the internal memory. This second information indicates the memory timing parameter that needs adjustment (referred to as "memory timing parameter A" for ease of description) and the preset parameter value 1 to which it needs to be adjusted. Upon receiving the second information, the internal memory can adjust the parameter values ​​of the circuits related to the memory timing parameter A within the internal memory, effectively adjusting the parameter value of memory timing parameter A to the preset parameter value 1 indicated by the second information within the internal memory. For example, the second information can be a signal sequence, conveying the memory timing parameter that needs adjustment and the preset parameter value 1 to which it needs to be adjusted.

[0179] For example, the internal memory has a second register interface, and the mobile phone can write the second information mentioned above to the second register interface, thereby instructing the internal memory to adjust the parameter value of the memory timing parameter to the corresponding preset parameter value based on the second information.

[0180] In other embodiments, the mobile phone can send a third message and a fourth message to the internal memory, respectively. The third message indicates the memory timing parameter A that needs to be adjusted in the internal memory. The fourth message indicates the preset parameter value 1 that needs to be adjusted. That is, the mobile phone can convey the memory timing parameter that needs to be adjusted and the preset parameter value to be adjusted to to the internal memory through two messages or two signal sequences, respectively. This allows for more accurate transmission of the instruction information.

[0181] Specifically, after receiving the third information, the internal memory can determine that the memory timing parameter A needs to be adjusted. The internal memory can then receive the fourth information, determining that the memory timing parameter A needs to be adjusted to a preset value of 1. Therefore, the internal memory can internally adjust the value of memory timing parameter A to the preset value of 1.

[0182] For example, the internal memory has a third register interface and a fourth register interface, which are used to receive information (i.e., third information) indicating the adjustment of memory timing parameters, and information (i.e., fourth information) indicating the adjustment parameter values, respectively. The mobile phone can write the third information to the third register interface and the fourth information to the fourth register interface.

[0183] In some embodiments, the mobile phone includes a memory controller. Taking a mobile phone as an example, the phone includes a central processing unit (CPU) and internal memory, with the CPU housing the memory controller. The mobile phone can repair the internal memory through interaction between the memory controller and the internal memory.

[0184] For example, the interaction between the memory controller and the internal memory may specifically include the following steps:

[0185] 1. The memory controller controls the internal memory to enter test mode.

[0186] In Recovery mode, the memory controller can instruct the internal memory to enter test mode. Specifically, the memory controller can send information (i.e., first information) to the internal memory to instruct it to enter test mode.

[0187] Specifically, the memory controller can write first information to the first register interface of the internal memory to instruct the internal memory to enter test mode. Upon receiving the first information, the internal memory can enter test mode based on the interface used to enter test mode. For example... Figure 7 As shown, the memory controller can write first information to the first register interface 701 of the internal memory, so that the internal memory can enter the test mode based on the first information.

[0188] 2. The memory controller controls and adjusts the memory timing parameters of the internal memory.

[0189] After the internal memory enters test mode, the memory controller can adjust the parameter values ​​of the internal memory timing parameters.

[0190] Please see Figure 7 The internal memory also has a third register interface 702 and a fourth register interface 703. When the memory controller writes first information to the first register interface 701 of the internal memory, the internal memory can enter test mode based on the first information and notify the memory controller that it has entered test mode. Then, the memory controller can write third information to the third register interface 702, and the internal memory can determine the memory timing parameters to be adjusted as indicated by the third information. The memory controller can write fourth information to the fourth register interface 703. The internal memory can then adjust the value of the memory timing parameters to the preset value indicated by the fourth information.

[0191] 3. The memory controller controls the internal memory to exit the test mode.

[0192] Specifically, after adjusting the parameter values, the memory controller controls the internal memory to exit test mode. It should be understood that the memory controller can write the fifth piece of information to the first register interface 701. Figure 7 This interactive process is not shown in the image; please refer to [link / reference]. Figure 6 The internal memory can exit the test mode based on the fifth piece of information.

[0193] 4. The memory controller triggers a phone restart.

[0194] 5. During the phone restart process, the memory controller trains the internal memory.

[0195] Specifically, during the phone restart process, the memory controller can train the adjusted internal memory.

[0196] After successful training, the phone powers on successfully. That is, the phone's system boots up normally, and the entire device powers on normally. In the event of training failure, the memory controller continues to control the internal memory to enter test mode and perform subsequent processing, which will not be detailed here.

[0197] In some embodiments, a first target parameter value corresponding to the memory timing parameters is stored in non-volatile memory; the first target parameter value is a parameter value that supports successful power-on of the mobile phone. The stored first target parameter value is used to configure the internal memory during the power-on process of the mobile phone.

[0198] Specifically, by successively repairing and adjusting the parameters of the internal memory, a set of memory timing parameters capable of supporting successful phone boot is obtained. These parameters can be denoted as the first target parameter values. The phone can store the first target parameter values ​​corresponding to each memory timing parameter that supports successful phone boot in non-volatile memory (e.g., flash memory). During the phone's boot process, the first target parameter values ​​corresponding to the memory timing parameters stored in the non-volatile memory can be used to configure the internal memory, ensuring its normal operation and preventing internal memory malfunctions from affecting the phone's normal boot process.

[0199] For example, before memory repair, when the phone's system malfunctions, the internal memory timing parameters are tRAS: 42, tRCD: 18, tWR: 18, tDQSCK: 1.5, tREFlab: 3.9, tRFCab: 280, and tRFCpb: 90. Assume that after successive memory repair processes, adjusting the tRAS value to 160 allows the internal memory to support successful phone boot. Then, the memory timing parameters supporting normal phone boot (i.e., the first target parameter values) are tRAS: 160, tRCD: 18, tWR: 18, tDQSCK: 1.5, tREFlab: 3.9, tRFCab: 280, and tRFCpb: 90. The phone can then store this set of parameter values ​​in its flash memory. Except for the reboot triggered after the last memory repair process, which can use this set of parameter values ​​to achieve a successful boot, in subsequent boot processes, the phone can configure the internal memory based on the parameter values ​​of this set of memory timing parameters in the flash memory to achieve a successful boot.

[0200] In the above solution, the first target parameter value of the memory timing parameters that support the successful boot of the mobile phone is stored in non-volatile memory. This first target parameter value can be used to configure the internal memory every time the phone is booted up, instead of using the default parameter value of the internal memory, thus improving the boot success rate.

[0201] In some embodiments, as described above, after each memory repair process, the phone can restart and train the internal memory during the restart process. If the training is successful, the phone successfully boots up. Therefore, after successful training, the phone can save the first target parameter value corresponding to the memory timing parameters in non-volatile memory.

[0202] Figure 8 This is a system framework diagram used to illustrate some embodiments of this application. Figure 8 It is understood that the memory controller communicates with both the non-volatile memory and the internal memory. For example, the memory controller can store the first target parameter value corresponding to the memory timing parameters when training is successful in the non-volatile memory. In some examples, information indicating that the internal memory should enter test mode, as well as the memory timing parameters that need to be adjusted and their corresponding preset parameter values, are stored in the non-volatile memory in the form of software code. By loading this software code, the memory controller can obtain specific information or instructions, thereby controlling the internal memory accordingly to achieve the purpose of memory repair.

[0203] In some embodiments, after successful training, the mobile phone can report key information. Specifically, the mobile phone can report target memory timing parameters to the cloud. These target memory timing parameters are the memory timing parameters adjusted during successful training, i.e., the memory timing parameters adjusted during the last memory repair process. For example, the reported target memory timing parameters can be used to generate subsequent maintenance recommendation information. For instance, if the target memory timing parameter is tRAS, the cloud can generate maintenance recommendation information for the mobile phone based on tRAS.

[0204] In some embodiments, when the phone re-enters Recovery mode, the target memory timing parameter is used as the starting memory timing parameter to be adjusted during the first memory repair process, and the second target parameter value corresponding to the target memory timing parameter is used as the starting parameter value to be adjusted during the first memory repair process, and memory repair processes are performed sequentially; wherein, the target memory timing parameter is the memory timing parameter adjusted when the phone last entered Recovery mode for the last memory repair process; the second target parameter value is the parameter value to which the target memory timing parameter was adjusted during the last memory repair process.

[0205] Specifically, when a phone's system experiences an anomaly and enters Recovery mode, the phone performs memory repair sequentially according to the method described in this embodiment. After adjusting the value of a certain memory timing parameter in the internal memory, the phone's memory repair is successful, and the phone can boot successfully; therefore, no further memory repair is needed. The memory repair process that enables the phone to boot successfully is the last memory repair process. The memory timing parameter adjusted in the last memory repair process is the target memory timing parameter. The value to which the target memory timing parameter is adjusted in the last memory repair process is the second target parameter value.

[0206] If the phone's system malfunctions and enters Recovery mode again, the phone will still need to perform memory repair sequentially. Specifically, the phone can use the target memory timing parameter as the starting memory timing parameter to be adjusted during the first memory repair, and use the second target parameter value corresponding to the target memory timing parameter as the starting parameter value to be adjusted during the first memory repair, thus starting the sequential memory repair process. This reduces unnecessary and repetitive adjustments, improves the efficiency of memory repair, and avoids or reduces unnecessary resource consumption.

[0207] In some embodiments, combined with Figure 9 The equipment control method is illustrated.

[0208] Please see Figure 9 In response to the first system anomaly, after entering Recovery mode, the phone displays a memory timing repair menu. Clicking this menu initiates a test mode for the internal memory. The phone adjusts the memory timing parameters in the internal memory sequentially, from smallest to largest. After each adjustment, the phone exits test mode, triggering a reboot to train the internal memory. Furthermore, the phone outputs the training results via serial port logs.

[0209] If training fails, it checks if there are any untraversed timing parameters. If there are untraversed preset timing parameters (i.e., if so), it continues to return to the previous state and adjusts the memory timing parameters in the internal memory in ascending order, followed by subsequent processing. If there are no untraversed preset timing parameters (i.e., if not), the repair is considered to have failed. Then, the phone can proceed with the boot process according to the initial default parameter values ​​of each memory timing parameter in the internal memory.

[0210] If the training passes, the memory repair is considered successful, and the phone boots up successfully. Furthermore, the phone can record the memory timing parameters and corresponding settings adjusted during successful training.

[0211] If the phone malfunctions again (i.e., the system experiences a second abnormal situation), the memory timing repair menu will reappear after the phone enters Recovery mode. Clicking this menu will control the internal memory to enter test mode.

[0212] Starting from the memory timing parameters and corresponding levels adjusted during the last successful training, the phone adjusts the memory timing parameters level by level in ascending order (i.e., continues traversing backwards). Similarly, after each adjustment, the internal memory exits test mode, triggering a phone restart. During the restart process, the internal memory is trained. The phone can then handle specific issues based on the training results; for details, please refer to the description of the phone's first system anomaly, which will not be repeated here.

[0213] This application also provides a chip system applied to an electronic device. The chip system includes one or more processors, which are used to invoke computer instructions to cause the electronic device to perform the functions or steps described in the above method embodiments.

[0214] This application also provides a computer-readable storage medium including computer instructions that, when executed on the electronic device, cause the electronic device to perform the various functions or steps described in the method embodiments.

[0215] This application also provides a computer program product that, when run on a computer, causes the computer to perform the functions or steps described in the above method embodiments.

[0216] Through the above description of the embodiments, those skilled in the art can clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0217] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another apparatus, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0218] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0219] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0220] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, in essence, or the parts that contribute to the prior art, or all or part of the technical solutions, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0221] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A device control method, characterized in that, Applied to electronic devices, the electronic devices including internal memory; The method includes: After the electronic device enters Recovery mode, memory repair processes are performed sequentially until the internal memory supports the successful boot of the electronic device. Each memory repair process includes: Control the internal memory to enter test mode; In the test mode of the internal memory, adjust the parameter values ​​of the memory timing parameters of the internal memory.

2. The method according to claim 1, characterized in that, After each memory repair process, the method further includes: Control the internal memory to exit the test mode and control the electronic device to restart, and train the internal memory during the restart process; If the training is successful, the electronic device will be powered on. If training fails, perform the next memory repair process.

3. The method according to claim 1 or 2, characterized in that, The memory timing parameters correspond to multiple preset parameter values; During each memory repair process, the memory timing parameters of the internal memory are adjusted to one of the multiple preset parameter values. The first preset parameter value corresponding to the previous memory repair process is less than the second preset parameter value corresponding to the next memory repair process.

4. The method according to any one of claims 1-3, characterized in that, There are multiple memory timing parameters whose parameter values ​​are adjusted, and these multiple memory timing parameters have a priority relationship; in each memory repair process, the parameter value of one of the multiple memory timing parameters is adjusted to a corresponding preset parameter value; If booting fails after adjusting multiple preset values ​​of the first-priority memory timing parameters, the second-priority memory timing parameters are then adjusted, where the first priority is greater than the second priority.

5. The method according to claim 4, characterized in that, If the system still fails to boot normally after adjusting the values ​​of multiple memory timing parameters one by one, in each subsequent memory repair process, the values ​​of the memory timing parameters of the internal memory are adjusted according to the parameter combination, which includes at least two memory timing parameters and a corresponding preset parameter value. Different combinations of parameters are used in different memory repair processes.

6. The method according to any one of claims 1-5, characterized in that, The process of sequentially repairing memory after the electronic device enters Recovery mode includes: After the electronic device enters Recovery mode, the first control is displayed; In response to the first operation input to the first control, memory repair processing is performed sequentially.

7. The method according to any one of claims 1-6, characterized in that, During the successive memory repair process, the display screen of the electronic device remains black.

8. The method according to any one of claims 1-7, characterized in that, The internal memory has a first register interface; controlling the internal memory to enter test mode includes: Write first information to the first register interface; the first information is used to instruct the internal memory to enter the test mode.

9. The method according to any one of claims 1-8, characterized in that, The internal memory has a second register interface; The parameter values ​​for adjusting the memory timing parameters of the internal memory include: Write second information to the second register interface; the second information is used to instruct the internal memory to adjust the parameter value of the memory timing parameter to the corresponding preset parameter value.

10. The method according to any one of claims 1-8, characterized in that, The internal memory has a third register interface and a fourth register interface; The parameter values ​​for adjusting the memory timing parameters of the internal memory include: Write third information to the third register interface and write fourth information to the fourth register interface; wherein, the third information is used to indicate the memory timing parameters that need to be adjusted in the internal memory; and the fourth information is used to indicate the preset parameter values ​​that need to be adjusted.

11. The method according to any one of claims 1-10, characterized in that, The method further includes: If a second operation is received during the successive memory repair process, the memory repair process is stopped, and the memory timing parameters of the internal memory are restored to their corresponding default values.

12. The method according to any one of claims 1-11, characterized in that, The method further includes: In the non-volatile memory, the first target parameter value corresponding to the memory timing parameters is stored; the first target parameter value is a parameter value that supports the successful power-on of the electronic device; The saved first target parameter value is used to configure the internal memory during the power-on process of the electronic device.

13. The method according to any one of claims 1-12, characterized in that, The method further includes: When the electronic device re-enters Recovery mode, the target memory timing parameter is used as the starting memory timing parameter to be adjusted during the first memory repair process, and the second target parameter value corresponding to the target memory timing parameter is used as the starting parameter value to be adjusted during the first memory repair process, and memory repair processes are performed sequentially. The target memory timing parameter is the memory timing parameter that was adjusted when the electronic device last entered Recovery mode for the last memory repair process; the second target parameter value is the parameter value to which the target memory timing parameter was adjusted during the last memory repair process.

14. An electronic device, characterized in that, The electronic device includes at least a memory and one or more processors; the memory is used to store computer instructions, which, when executed by the one or more processors, cause the electronic device to perform the method as described in any one of claims 1-13.

15. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes computer instructions that, when executed on a terminal, cause the electronic device to perform the method as described in any one of claims 1-13.

16. A computer program product, characterized in that, When the computer program product is run on a computer, it causes the computer to perform the method as described in any one of claims 1-13.

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