Semiconductor structure and method of forming the same
CN122180145APending Publication Date: 2026-06-09SEMICON MFG INT (SHANGHAI) CORP
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Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SEMICON MFG INT (SHANGHAI) CORP
- Filing Date
- 2024-12-09
- Publication Date
- 2026-06-09
AI Technical Summary
Technical Problem
In existing semiconductor structures, the limited current path during electrostatic discharge results in insufficient heat dissipation, affecting performance.
Method used
In semiconductor structures, gate structures and source/drain doped layers are arranged alternately and interleaved to form gate-grounded transistor structures, thereby increasing discharge paths and improving heat dissipation.
Benefits of technology
Without increasing the additional footprint, it increases the number of discharge current paths, improves the secondary breakdown voltage and current, reduces on-resistance, and enhances the performance of the semiconductor structure.
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Figure CN122180145A_ABST
Abstract
A semiconductor structure and a forming method thereof, the structure comprising: a substrate comprising a plurality of active regions extending along a first direction and arranged in parallel along a second direction, the first direction being perpendicular to the second direction; a plurality of gate structures in each active region, the gate structures being arranged in parallel along the first direction and extending across the active region along the second direction; and source-drain doped layers in the active regions on both sides of the gate structures, the source-drain doped layers being arranged alternately with the gate structures along the first direction, and the source-drain doped layers comprising source regions and drain regions arranged alternately, the source regions being used for grounding and the drain regions being used for external circuit connection, the source regions and the drain regions of the source-drain doped layers of adjacent active regions being arranged alternately along the second direction. The present application is advantageous to improve the working performance of the semiconductor structure.
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