Stepper motor drive apparatus, method and system

Abstract

This application provides a stepper motor driving device, method, and system, relating to the field of equipment control technology. The device includes: a first signal generation module for generating a first SPWM signal and a second SPWM signal; wherein the first SPWM signal and the second SPWM signal have the same waveform but are time-staggered by half a carrier cycle; and a first current control module for applying the first SPWM signal and the second SPWM signal to the upper bridge arm switches on both sides of a first H-bridge driving circuit, respectively, to control the magnitude and direction of the first driving current. This application, by staggering the SPWM control signals on both sides of the same H-bridge by half a cycle, naturally divides the H-bridge behavior into two driving segments and two slow decay modes within a driving cycle, effectively avoiding reverse current during the driving process, reducing operating noise, and improving driving efficiency.

Description

Technical Field

[0001] This application relates to the field of equipment control technology, and more specifically, to a stepper motor drive device, method, and system. Background Technology

[0002] A stepper motor is an electric motor that converts electrical pulse signals into corresponding angular or linear displacement. Its rotation is in fixed-angle "steps". By controlling the number and frequency of pulses, precise positioning and speed regulation can be achieved.

[0003] In stepper motor drive systems, the H-bridge circuit is a commonly used drive control component. The H-bridge circuit consists of four switching transistors. By controlling the on and off states of these transistors, the direction and magnitude of the current flowing through the motor coils can be changed, thereby achieving drive control of the stepper motor. In each drive cycle, the current control process includes a drive phase and a freewheeling phase. The freewheeling phase is mainly divided into slow decay, fast decay, and mixed decay modes according to different control modes. The slow decay mode has advantages such as low current ripple and low operating noise, but the current decreases slowly, which may distort the phase current waveform. The fast decay mode has advantages such as fast current decrease and suitability for motors with large inductances, but it generates larger current ripple and increases switching losses.

[0004] Currently, in order to meet performance requirements, mainstream products on the market generally adopt fast decay or hybrid decay modes to control current. These solutions usually have the following drawbacks: easy to generate reverse current, high operating noise, and low drive efficiency. Summary of the Invention

[0005] The purpose of this application is to provide a stepper motor drive device, method, and system to avoid reverse current in the motor drive, reduce operating noise, and improve drive efficiency.

[0006] In a first aspect, embodiments of this application provide a stepper motor driving device applied to a stepper motor driving system including a first H-bridge driving circuit, wherein the first H-bridge driving circuit is used to provide a first driving current to a first phase coil of the stepper motor, and the device includes: The first signal generation module is used to generate a first SPWM signal and a second SPWM signal; wherein the first SPWM signal and the second SPWM signal have the same waveform and are staggered in timing by half a carrier cycle, and the carrier cycle is the repetition period of the carrier signal corresponding to the SPWM signal; The first current control module is used to apply the first SPWM signal and the second SPWM signal to the first upper bridge arm switch and the second upper bridge arm switch of the first H-bridge drive circuit, respectively, to control the magnitude and direction of the first drive current.

[0007] In this embodiment, by staggering the SPWM control signals on both sides of the same H-bridge by half a carrier cycle, the behavior of the H-bridge is naturally divided into two driving segments and two slow decaying segments in one driving cycle, and the fast decaying stage is always avoided. This effectively avoids reverse current in the driving process, reduces operating noise, and improves driving efficiency.

[0008] In some embodiments, the stepper motor drive system further includes a second H-bridge drive circuit, the second H-bridge drive circuit being used to provide a second drive current to the second phase coil of the stepper motor, and the device further includes: The second signal generation module is used to generate a third SPWM signal and a fourth SPWM signal; wherein the waveforms of the third SPWM signal and the fourth SPWM signal are the same and their timing is staggered by half a carrier cycle. The second current control module is used to apply the third SPWM signal and the fourth SPWM signal to the first upper bridge arm switch and the second upper bridge arm switch of the second H-bridge drive circuit, respectively, to control the magnitude and direction of the second drive current; wherein the waveform of the first drive current is orthogonal to the waveform of the second drive current.

[0009] In this embodiment, by using the same control method as the first H-bridge drive circuit for the second H-bridge drive circuit corresponding to another phase, reverse current is effectively avoided during the overall motor drive process, further reducing operating noise and improving drive efficiency.

[0010] In some embodiments, the first upper bridge arm switch and the second upper bridge arm switch of the first H-bridge drive circuit are both P-type switches, and the first lower bridge arm switch on the same side as the first upper bridge arm switch and the second lower bridge arm switch on the same side as the second upper bridge arm switch are both N-type switches. Both the first lower bridge arm switch and the first upper bridge arm switch are controlled by the first SPWM signal, and both the second lower bridge arm switch and the second upper bridge arm switch are controlled by the second SPWM signal.

[0011] In this embodiment, by adopting a full-bridge topology with an upper P-channel transistor and a lower N-channel transistor, and using the same on-signal control method for the upper and lower switching transistors on the same side, the drive circuit structure is effectively simplified.

[0012] In some embodiments, limiting measures for preventing simultaneous conduction are respectively provided between the first lower bridge arm switch and the first upper bridge arm switch, and between the second lower bridge arm switch and the second upper bridge arm switch.

[0013] In this embodiment of the application, by setting a limit to prevent simultaneous conduction between the upper and lower bridge arm switches on the same side, the reliability of the drive control is further improved.

[0014] In some embodiments, the first SPWM signal is generated in the following ways: Based on the preset duty cycle list, the corresponding duty cycle value is obtained by looking up the table according to the current microstep index; In each carrier cycle, the counter value is compared with the duty cycle value, and a square wave signal is output according to the comparison result to obtain the first SPWM signal.

[0015] In this embodiment, the SPWM signal is generated by looking up a table, which effectively simplifies the control logic of the motor drive and improves the control reliability.

[0016] In some embodiments, the method for obtaining the duty cycle list includes: The number of microsteps is determined based on the microstep division mode of the stepper motor; Based on the number of microsteps, a corresponding electrical angle is assigned to each microstep index; Calculate the duty cycle value corresponding to each electrical angle based on a preset sine or cosine function; Establish a mapping relationship between each microstep index and its corresponding duty cycle value to form the conduction duty cycle list.

[0017] In this embodiment of the application, by pre-calculating and generating a duty cycle list, the computational pressure caused by real-time function calculation is avoided, the performance requirements of drive control are reduced, and at the same time, the duty cycle values ​​of each microstep are accurately correlated with the electrical angle, thereby improving the accuracy of microstep control.

[0018] In some embodiments, the duty cycle list only stores the duty cycle value corresponding to a target electrical angle interval. For electrical angles outside the target electrical angle interval, a lookup table method using microstep index symmetric transformation is used to determine the corresponding duty cycle value. The target electrical angle interval corresponds to a continuous electrical angle interval, and the range of the continuous electrical angle interval is less than or equal to 180° electrical angle.

[0019] In this embodiment of the application, by extracting and storing the values ​​of a specific electrical angle range as a duty cycle list, the storage space occupied by the data on which the lookup method depends is effectively reduced.

[0020] In some embodiments, the stepper motor drive system further includes a second H-bridge drive circuit, which is controlled by a third SPWM signal and a fourth SPWM signal to provide a second drive current to the second phase coil of the stepper motor. The first SPWM signal, the second SPWM signal, the third SPWM signal, and the fourth SPWM signal are all generated by looking up the same duty cycle list; wherein, the duty cycle value sequence on which the SPWM signals of different channels depend is obtained by looking up the table using index offset and / or symmetric transformation.

[0021] In this embodiment, by retaining only the duty cycle list of one signal and deriving the lookup data of other channels through index offset and / or symmetrical transformation, the storage space occupied by the data on which the lookup method depends is further compressed.

[0022] Secondly, embodiments of this application provide a stepper motor driving method applied to a stepper motor driving system including a first H-bridge driving circuit, wherein the first H-bridge driving circuit is used to provide a first driving current to the first phase coil of the stepper motor, and the method includes: Generate a first SPWM signal and a second SPWM signal; wherein the first SPWM signal and the second SPWM signal have the same waveform and are staggered in timing by half a carrier cycle, and the carrier cycle is the repetition period of the carrier signal corresponding to the SPWM signal; The first SPWM signal and the second SPWM signal are respectively applied to the first upper bridge arm switch and the second upper bridge arm switch of the first H-bridge drive circuit to control the magnitude and direction of the first drive current.

[0023] Thirdly, embodiments of this application provide a stepper motor drive system, including: At least two H-bridge drive circuits, each of which is used to provide drive current to the corresponding phase coil of the stepper motor; The control device is configured to perform any of the stepper motor driving methods described above to control the magnitude and direction of the drive current output by each of the H-bridge drive circuits.

[0024] Fourthly, embodiments of this application provide an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the program, can implement the method described in any embodiment of the first aspect.

[0025] Fifthly, embodiments of this application provide a computer-readable storage medium storing a computer program, which, when executed by a processor, can implement the method described in any embodiment of the first aspect.

[0026] In a sixth aspect, embodiments of this application provide a computer program product, the computer program product including a computer program, wherein the computer program, when executed by a processor, can implement the method described in any embodiment of the first aspect. Attached Figure Description

[0027] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 A flowchart illustrating a stepper motor driving method provided in an embodiment of this application; Figure 2 A control schematic diagram of a four-wire two-phase bipolar stepper motor provided in an embodiment of this application; Figure 3 This is a schematic diagram of the motor rotation direction in step mode provided in an embodiment of this application; Figure 4 This is a schematic diagram of the motor rotation direction in half-step mode provided in an embodiment of this application; Figure 5 This is a schematic diagram of the motor rotation direction in microstepping mode provided in the embodiments of this application; Figure 6 A schematic diagram of the A-phase and B-phase current waveforms of a two-phase motor provided in an embodiment of this application; Figure 7 This is a schematic diagram of the H-bridge driving and freewheeling modes provided in the embodiments of this application; Figure 8 These are schematic diagrams of current waveforms under different attenuation modes provided in the embodiments of this application; Figure 9 A comparative schematic diagram of a triangular wave, a low-frequency sinusoidal modulated wave, and a sinusoidal pulse width modulated waveform provided in the embodiments of this application; Figure 10 A schematic diagram of the inductor current waveform without slow decay provided in an embodiment of this application; Figure 11 A schematic diagram showing that each cycle of this application is driven by two waveforms with the same duty cycle, as provided in the embodiments of this application; Figure 12 A schematic diagram illustrating waveform driving with only a single duty cycle for each cycle, provided for embodiments of this application; Figure 13 A waveform comparison diagram of mixed attenuation and fast attenuation only provided for embodiments of this application; Figure 14A schematic diagram comparing local current ripple using slow attenuation and fast attenuation, provided for embodiments of this application; Figure 15 This is a schematic diagram of the SPWM drive waveform in the prior art; Figure 16 This is a schematic diagram of the phase-shifted SPWM drive waveform provided in an embodiment of this application; Figure 17 A schematic diagram comparing the current waveforms before and after phase shift provided in an embodiment of this application; Figure 18 This is a schematic diagram comparing the SPWM drive and current waveforms provided in an embodiment of this application. Figure 19 This is a schematic diagram of the H-bridge drive circuit structure provided in an embodiment of this application; Figure 20 A partial schematic diagram of the duty cycle list provided in an embodiment of this application; Figure 21 A schematic diagram of the equivalent waveform of the driving sequence of a single channel provided in an embodiment of this application; Figure 22 A schematic diagram comparing the equivalent waveforms of the driving sequences of the four channels provided in the embodiments of this application; Figure 23 This is a schematic diagram illustrating the equivalent storage of the driver sequence compression provided in an embodiment of this application. Figure 24 This is a schematic diagram of the structure of a stepper motor drive device provided in an embodiment of this application; Figure 25 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0029] The technical solutions in the embodiments of this application will now be described with reference to the accompanying drawings.

[0030] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this application, terms such as "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0031] The following is a brief introduction to the control method of stepper motors.

[0032] like Figure 2 The diagram shown is a schematic of a four-wire two-phase bipolar stepper motor. The following is a brief introduction to the control method using this stepper motor as an example. Common control methods are divided into full step (four beats), half step (eight beats) and micro step mode.

[0033] 1. Step mode: The power-on timing table for the dual four-phase coil is as follows: Table 1:

[0034] In this context, "A+" = 1 and "A-" = 0 indicates that the current direction in one coil (phase A coil) is positive (the preset first direction), and correspondingly, "A+" = 0 and "A-" = 1 indicates that the current direction in phase A coil is negative (opposite to the first direction). Similarly, "B+" = 1 and "B-" = 0 indicates that the current direction in the other coil (phase B coil) is positive (the preset first direction), and correspondingly, "B+" = 0 and "B-" = 1 indicates that the current direction in phase B coil is negative (opposite to the first direction). The same principle applies below.

[0035] Based on this power-on sequence, the motor rotation direction is as follows: Figure 3 As shown, the rotation follows the sequence (A+B-)---(BA-)---(A-B+)---(B+A+), and repeats in this cycle. Here, "(A+B-)" refers to the position between the A+ phase and the B- phase. Figure 3 As shown by the arrow in the upper left corner, and so on.

[0036] 2. Half-step mode: The power-on timing table for the eight-step coil is as follows: Table 2:

[0037] Based on this power-on sequence, the motor rotation direction is as follows: Figure 4 As shown, the rotation follows the sequence (A+)---(A+B+)---(B+)--(B+A-)---(A-)---(AB-)---(B-)---(B-)---(B-A+), and this cycle repeats.

[0038] 3. Microstep control mode: Microstepping drive principle: Adjusting different current magnitudes causes the magnetic field strength of the coil to vary, resulting in a change in the rotor's balance position.

[0039] like Figure 5 As shown, coil A initially has its maximum current, while coil B has zero current, and the stator points towards coil A. Coil A gradually decreases its current, while coil B gradually increases its current. Due to the change in the magnetic field equilibrium position, the stator slowly rotates towards coil B. From a macroscopic perspective, the current change in coil A approximates a cosine curve, while the current in coil B approximates a sinine curve, until the current in coil A decreases to zero, while the current in coil B reaches its maximum value, and the stator points towards coil B.

[0040] like Figure 6As shown, the magnitude of the change in current at each step determines the magnitude of the microstep motion. Figure 6 This is a schematic diagram of the current waveforms of phase A and phase B in 32 microsteps (8 subdivisions). As can be seen from the diagram, one microstep is a square wave step of current.

[0041] For example, a stepper motor with 200 revolutions (200 steps / revolution) will have a step distance of 1.8° if driven with full current. If driven with half current, its step distance will be 0.9°. If the step distance is further subdivided, the step distance will also be subdivided. The more steps, the smoother the motion, the lower the noise, and the less likely it is to lose steps, but the torque will decrease.

[0042] In each drive cycle, when the drive phase ends, a decay phase begins before the next drive cycle begins.

[0043] The decay mode during the decay phase is described below: There are generally three control modes for freewheeling current: slow decay, fast decay, and mixed decay. The terms "fast" and "slow" refer to the relative rate of current decay during the freewheeling period.

[0044] like Figure 7 As shown, during the forward drive phase, the upper left and lower right transistors are turned on, and the red current direction 1 represents the forward drive current. The current begins to decay after the drive phase ends.

[0045] The first method is fast decay, which includes synchronous fast decay and asynchronous fast decay. Asynchronous decay refers to decay through the body diode of the FET (Field-Effect Transistor); synchronous decay refers to decay through turning on the upper right and lower left switches of the H-bridge. Clearly, asynchronous decay, passing through the FET body diode, has a large voltage drop and therefore high losses; while synchronous decay passes through the impedance of the FET when it is turned on, which is generally lower in internal resistance and therefore has lower losses.

[0046] Since the direction of inductor current cannot change abruptly, after the drive ends, the current follows... Figure 7 The green current continues to flow in direction 3, and the voltage difference across the inductor is V. VM - GND, at this point the forward current value decreases rapidly, and the current in the inductor is as follows: Figure 8 The second curve is shown.

[0047] The second method is slow decay, in which the lower left and lower right transistors are turned on simultaneously (or the upper left and upper right transistors are turned on simultaneously, with the same effect; see the explanation below for details), and the current is according to... Figure 7 The current flows in direction 2. In this case, the current decay is achieved by factors such as the impedance of the FET when it is turned on and the back electromotive force of the motor, which is slower than the decay achieved by the voltage difference. The current in the inductor is as follows... Figure 8As shown in the first curve.

[0048] While slow decay is typically described as both low-side FET switches being on and both high-side FET switches being off, the same phenomenon can be achieved by enabling both high-side FET switches while simultaneously disabling both low-side FET switches. Some devices allow for appropriate configuration via corresponding mode input signals to employ one of these techniques.

[0049] The third method is hybrid decay, where fast decay and slow decay alternate at the end of the drive current. For example... Figure 8 As shown in the third curve, after the drive current ends, there is a fast decay followed by a slow decay.

[0050] The advantages and disadvantages of the three attenuation methods mentioned above are shown in the table below: Table 3:

[0051] It should be noted that, in order to meet performance requirements, existing stepper motor drive solutions mainly use synchronous control, fast decay, and table lookup to generate SPWM (Sine Pulse Width Modulation) signals. This drive solution has the following main drawbacks: 1. Reverse current is prone to occur, generating voltage ripple on the main line voltage; the occurrence of reverse current also causes noise on the main line voltage. 2. When a higher drive frequency is required, the OSC (Oscillator) frequency of the master clock is required to be higher. 3. Under the same microsteps, this driving method produces more noise; 4. The power consumption of this driving method is relatively high due to the presence of reverse current.

[0052] In view of the problems existing in the prior art, the embodiments of this application aim to achieve the following objectives: 1. Solve the problem of reverse current during motor drive; 2. Improve the utilization rate of the main frequency, and achieve better driving effect without changing the main frequency (the higher the frequency inside the chip, the higher the cost of its crystal oscillator module). 3. Since existing technologies generally use lookup tables to achieve SPWM wave output, this reduces the storage space occupied by the data table while maintaining the same driving effect. 4. In addition to achieving better driving performance mentioned in point 2, further improvements are made to: reduce audible noise and vibration of the motor at the same number of microsteps; achieve complete slow decay, improve overall driving efficiency and reduce driving power consumption; and reduce EMI (Electromagnetic Interference) impact on the front-end power supply.

[0053] The design concept of the control method in this application is described below: The ultimate goal of motor drive is to synthesize a sine (or cosine) current wave, where the motor load can be simplified to an RL load.

[0054] Based on the principle that voltage is obtained by integrating current through a capacitor and current is obtained by integrating voltage through an inductor, the characteristic of integrating voltage through an inductor can be utilized to synthesize sinusoidal (or cosine) current waveforms using SPWM voltage drive technology.

[0055] SPWM stands for Sinusoidal Pulse Width Modulation (also often abbreviated as Sine PWM). Its basic principle is the area equivalence principle, which uses PWM with a pulse width that changes in a sinusoidal pattern to represent a sine wave.

[0056] like Figure 9 As shown, there are three waveform segments: the top segment represents the SPWM signal; the middle segment represents the low-frequency sinusoidal modulation waveform (the duty cycle value is updated once per cycle, i.e., each step in the diagram corresponds to one cycle of duty cycle); and the bottom segment represents the high-frequency triangular carrier waveform (each cycle counts from 0 to the maximum value and then back to 0, or each cycle counts from the maximum value in reverse order to 0 and then back to the maximum value; this maximum value can be set according to the required driving frequency, such as 1024; in this diagram, "one down and one up" represents one carrier cycle). Figure 9 As can be seen, SPWM is a technique that generates a pulse sequence with a pulse width that varies sinusoidally by comparing a high-frequency triangular carrier wave with a low-frequency sinusoidal modulated wave. As shown in the figure, one carrier cycle equals the numerical update cycle of the sinusoidal modulated wave, which in turn equals one drive cycle of the SPWM signal.

[0057] Based on the above principles, the general design idea for the control method is as follows: 1. First, design the actual conduction time of the two upper transistors. The difference between the actual conduction times of the two upper transistors plays a key role in the current waveform (it can be regarded as the current magnitude of each cycle = the difference between the actual conduction times of the two upper transistors).

[0058] 2. After determining the difference in actual conduction time between the two upper tubes, add a slow decay time as needed.

[0059] There are three constraints on the drive during waveform synthesis: 1. The duty cycle of the drive must be a non-negative number (0-100%). 2. The sum of the duty cycles of the upper and lower tubes on the same side of the H-bridge shall not exceed 100%; 3. The sum of the duty cycles of the two high-side tubes of the H-bridge shall not exceed 100%.

[0060] Based on the above constraints, we can consider using the two sub-terms of the double-angle formula as the duty cycle reference waveform:

[0061] Based on this, the following is... As the driver for the upper left tube, As the driver for the upper right transistor, the calculation formulas in Table 1 below can be obtained: Table 4:

[0062] Based on the above control method, in order to maintain the advantage over existing products, a slow decay can be further added while keeping the sinusoidal current waveform undistorted.

[0063] Before explaining how slow decay is incorporated into the scheme of this application, we will first further introduce the factors that affect the magnitude of current ripple.

[0064] Specifically, one factor affecting current ripple is the driving frequency. Due to the integral effect of inductance on voltage, a higher driving frequency results in a greater oscillation rate and a smaller oscillation amplitude. Figure 10 The figure shown is a waveform of the inductor current without slow decay in the prior art.

[0065] Figure 10 The diagram shows the current waveform changes on the motor windings at low speeds using existing technology. It can be seen that the current in the inductor exhibits an oscillating upward trend under both forward and reverse driving.

[0066] If the rotational speed remains constant, Figure 10 Each oscillation cycle is driven by two waveforms with the same duty cycle, but the driving time is halved. This allows the ripple amplitude to be reduced by half while maintaining the waveform trend (still a sine wave), such as... Figure 11 and Figure 12 As shown, where Figure 11 This diagram illustrates the driving process for each cycle using two waveforms with the same duty cycle (but with the drive time halved). The upper part shows the current waveform, and the lower part shows the PWM signal waveform. Figure 12 A schematic diagram of waveform driven by a single duty cycle for each cycle (the upper half is the current waveform, and the lower half is the PWM signal waveform).

[0067] In existing control methods, although slow decay is used, the overall approach actually employs mixed decay. The waveforms of mixed decay and fast decay currents are as follows: Figure 13 As shown, where, Figure 13 The left side corresponds to the mode with added slow decay. Figure 13 The right side corresponds to the mode using only fast decay. It can be seen that if slow decay is not used, in... Figure 13 On the left side of the slowly decaying area (marked "slow" in the image), an additional peak will appear on the horizontal line, becoming... Figure 13 The waveform on the right results in increased overall ripple. Using slow decay at appropriate locations helps minimize waveform distortion, such as at the maxima and minima of a sine wave. Figure 14 As shown, the left side is the current waveform with slow decay, and the right side is the current waveform without slow decay.

[0068] like Figure 1 As shown, this application provides a stepper motor driving method applied to a stepper motor driving system including a first H-bridge driving circuit. The first H-bridge driving circuit is used to provide a first driving current to the first phase coil of the stepper motor, and may include the following steps: S1. Generate a first SPWM signal and a second SPWM signal; wherein the first SPWM signal and the second SPWM signal have the same waveform and are staggered in timing by half a carrier cycle, and the carrier cycle is the repetition period of the carrier signal corresponding to the SPWM signal; S2. The first SPWM signal and the second SPWM signal are applied to the first upper bridge arm switch and the second upper bridge arm switch of the first H-bridge drive circuit, respectively, to control the magnitude and direction of the first drive current.

[0069] In the implementation of this application, the stepper motor can be a two-phase stepper motor, a three-phase stepper motor, or a four-phase stepper motor, wherein typically each phase coil needs to correspond to an H-bridge drive circuit. The following is an example of a typical four-wire two-phase bipolar stepper motor.

[0070] For example, the first phase coil refers to one of the two phases (e.g., phase A) in the stepper motor. The two ends of the first phase coil are connected to the inductors of the first H-bridge drive circuit. The first H-bridge drive circuit can be configured as follows: Figure 7 In the topology shown, xOUT1 and xOUT2 are connected to the two ends of the first phase coil (phase A coil), respectively. Similarly, the other phase coil (the second phase coil, i.e., phase B coil) can be connected to another H-bridge drive circuit (the second H-bridge drive circuit) in the same way. The specific implementation will be described below.

[0071] In the first H-bridge drive circuit, two SPWM signals (first SPWM signal and second SPWM signal) are generated and applied to the first upper bridge arm switch and the second upper bridge arm switch of the H-bridge drive circuit respectively. In each cycle, the first upper bridge arm switch is turned on / off with a specific duty cycle, so that the magnitude and direction of the current (i.e. the first drive current) at both ends of the inductor (i.e. the two ends of the first phase coil) in the H-bridge drive circuit change with time, thereby generating a time-varying magnetic field on the rotor of the stepper motor, and thus driving the stepper motor to rotate.

[0072] It should be noted that the existing control methods mainly adopt synchronous control and fast decay freewheeling control modes, and their SPWM control waveforms are as follows: Figure 15 As shown, the upper half is the SPWM drive waveform of the right-side switch above the H-bridge, and the lower half is the SPWM drive waveform of the left-side switch above the H-bridge.

[0073] The key to this application lies in shifting the phase of one driving signal by 180° relative to the other driving signal (phase shift 180°), that is, making the waveforms of the first SPWM signal and the second SPWM signal identical but staggered in timing by half a carrier cycle (i.e., the repetition period of the carrier signal, the carrier period corresponding to the driving period of the SPWM signal), resulting in the SPWM control waveform as follows: Figure 16 As shown, the upper half is the SPWM drive waveform of the right-side switch above the H-bridge (e.g., the switch corresponding to the first upper arm), and the lower half is the SPWM drive waveform of the left-side switch above the H-bridge (e.g., the switch corresponding to the second upper arm). It can be seen that the waveforms of the SPWM drive signals on both sides are the same in shape, but are staggered by half a carrier cycle in timing.

[0074] Based on this, the equivalent driving frequency naturally doubles without changing the fundamental frequency (i.e., the counter frequency), and has two slow decay intervals, such as... Figure 17 As shown (where the dashed line is the current waveform before phase shifting and the solid line is the current waveform after phase shifting), it can be seen that the ripple of the current waveform is effectively reduced. Since the utilization rate of the entire bridge arm (equivalent forward conduction duty cycle - equivalent reverse conduction duty cycle) is still 100%, the slow decay range added by the phase shifting method of this application will not affect the maximum current value.

[0075] The behavior of the H-bridge before and after phase shift is as follows Figure 18 As shown, the top part represents the drive waveform of the right-side switch on the H-bridge, the middle part represents the drive waveform of the left-side switch on the H-bridge, and the bottom part represents the corresponding current waveform. Figure 18It can be seen that the behavior of the H-bridge before phase shift is a combination of [forward drive + reverse drive] in each driving cycle (one up and one down in the dashed current waveform is one driving cycle) (the rising part of the dashed line is the driving stage, and the falling part of the dashed line is the reverse driving stage, i.e. the fast decay stage). After phase shift, the behavior of the H-bridge after phase shift is naturally divided into a combination of [forward drive + low-side slow decay + forward drive + high-side slow decay] in each driving cycle (corresponding to the "one up and one down" in the dashed current waveform, and "one up and one down and one up and one down" in the solid current waveform is one driving cycle).

[0076] In other words, by shifting the phase of one of the drive signals by 180°, this application changes the H-bridge behavior in each drive cycle from the original "forward drive + fast decay" to a "two-stage forward drive + two-stage slow decay" mode. Since there is no reverse drive (no fast decay stage), the impact of motor ripple on the power supply can be reduced to a relatively low level, and lower power consumption can be maintained. In addition, when the motor suddenly stops at a certain moment, the probability of current surge to the power supply is reduced.

[0077] If a current probe is added to the power supply, it can be seen from the obtained current waveform that the power supply current corresponding to the control method of this application is almost always positive, while the power supply current corresponding to the control method of the prior art will have a reverse flow phenomenon, which may lead to the burning out of related devices due to the instantaneous rise in power supply voltage.

[0078] Furthermore, the reverse current generated by the control methods used in existing technologies can also cause EMI effects on the power supply voltage. Based on experimental tests, the reverse current of the power supply is within V... VM The voltage generated is greater than V VM The ripple, that is, the reverse current of the power supply introduces a higher voltage than V into the power supply system. VM ripples.

[0079] Continue to refer to Figure 7 As shown above, the drive control of the two upper switching transistors in the H-bridge is mainly introduced. For the control of the lower switching transistors in the H-bridge, it is only necessary to control them according to the existing "complementary conduction" principle. Specifically, when the upper bridge arm switching transistor on the same side is turned on, the lower bridge arm switching transistor on the same side is turned off.

[0080] The following section continues to explain the working principle of the H-bridge under the control of the drive signal: 1. During the driving phase, the upper left and lower right switches are simultaneously turned on. However, since the on / off states of the upper and lower switches on the same side are always opposite (i.e., the "complementary conduction" principle), the upper right and lower left switches will be simultaneously turned off during this period. The current direction during this period is as follows: Figure 7 Shown in direction 1; 2. When the upper left and upper right switches are simultaneously turned on (due to the aforementioned "complementary conduction" principle, the lower left and lower right switches will be simultaneously turned off), a slow decay will occur on the high side (i.e., current continues to flow in the high-side loop of the H-bridge). When the upper left and upper right switches are simultaneously turned off (due to the aforementioned "complementary conduction" principle, the lower left and lower right switches will be simultaneously turned on), a slow decay will occur on the low side (i.e., current continues to flow in the low-side loop of the H-bridge). Figure 7 direction 2).

[0081] like Figure 18 As shown, due to the phase shifting of the driving waveforms on both sides within one driving cycle (corresponding to one carrier cycle of the carrier signal), a "simultaneously low level" interval and a "simultaneously high level" interval are naturally generated. Based on the principle in point 2 above, in the "simultaneously low level" interval, the upper left and upper right switches of the H-bridge are simultaneously turned off, thus producing the slow decay H-bridge behavior on the low side; while in the "simultaneously high level" interval, the upper left and upper right switches of the H-bridge are simultaneously turned on, thus producing the slow decay H-bridge behavior on the high side.

[0082] Based on this, it is explained why the proposed solution adopts a driving method in which the signals on both sides are phase-shifted by 180°, which naturally causes the H-bridge behavior to have two slow decay intervals in one driving cycle.

[0083] In summary, the embodiments of this application stagger the SPWM control signals on both sides of the same H-bridge by half a cycle, so that the behavior of the H-bridge is naturally divided into two driving modes and two slow decay modes in one driving cycle, and the fast decay stage is always avoided. This effectively avoids reverse current in the driving process, reduces operating noise and improves driving efficiency.

[0084] In some embodiments, the stepper motor drive system further includes a second H-bridge drive circuit, the second H-bridge drive circuit being used to provide a second drive current to the second phase coil of the stepper motor, and the method further includes: Generate a third SPWM signal and a fourth SPWM signal; wherein the waveforms of the third SPWM signal and the fourth SPWM signal are the same and their timing is staggered by half a carrier cycle; The third SPWM signal and the fourth SPWM signal are respectively applied to the first upper bridge arm switch and the second upper bridge arm switch of the second H-bridge drive circuit to control the magnitude and direction of the second drive current; wherein the waveform of the first drive current is orthogonal to the waveform of the second drive current.

[0085] It should be noted that for a two-phase stepper motor, the motor windings include an A-phase coil and a B-phase coil. The first phase coil mentioned above can correspond to either the A-phase coil or the B-phase coil, and correspondingly, the second phase coil corresponds to either the B-phase coil or the A-phase coil.

[0086] Each phase coil corresponds to an H-bridge drive circuit. Similar to the control method of the first H-bridge drive circuit, in the second H-bridge drive circuit, two SPWM signals (the third SPWM signal and the fourth SPWM signal) are generated and applied to the first upper bridge arm switch and the second upper bridge arm switch of the H-bridge drive circuit, respectively. In each cycle, the first upper bridge arm switch is turned on / off with a specific duty cycle, so that the magnitude and direction of the current (i.e., the second drive current) at both ends of the inductor (i.e., both ends of the second phase coil) in the H-bridge drive circuit change with time, thereby generating a time-varying magnetic field on the rotor of the stepper motor, and thus driving the stepper motor to rotate.

[0087] It should be noted that the control methods of the first H-bridge drive circuit and the second H-bridge drive circuit are the same, but the first drive current generated by the first H-bridge drive circuit and the second drive current generated by the second H-bridge drive circuit must satisfy the constraint condition of orthogonal current waveforms. See [link to relevant documentation]. Figure 6 As shown, this "orthogonal condition" is a fundamental principle of stepper motor control in existing technologies, and will not be elaborated further here.

[0088] It should be noted that, based on the above "orthogonality condition", the third SPWM signal and the fourth SPWM signal can be generated separately, or the fourth SPWM signal can be obtained by shifting the third SPWM signal by 180°.

[0089] In addition, it is not difficult to understand that since the control methods of the first H-bridge drive circuit and the second H-bridge drive circuit are the same, the difference is that the drive current generated by the two circuits needs to meet the "waveform orthogonality" condition. Therefore, the third SPWM signal and the fourth SPWM signal can also be regarded as the first SPWM signal and the second SPWM signal obtained by phase shifting. For example, the first SPWM signal is phase-shifted by 90° to obtain the third SPWM signal.

[0090] Based on this, by adopting the same control method as the first H-bridge drive circuit for the second H-bridge drive circuit corresponding to the other phase, reverse current is effectively avoided during the overall motor drive process, further reducing operating noise and improving drive efficiency.

[0091] In some embodiments, the first upper bridge arm switch and the second upper bridge arm switch of the first H-bridge drive circuit are both P-type switches, and the first lower bridge arm switch on the same side as the first upper bridge arm switch and the second lower bridge arm switch on the same side as the second upper bridge arm switch are both N-type switches. Both the first lower bridge arm switch and the first upper bridge arm switch are controlled by the first SPWM signal, and both the second lower bridge arm switch and the second upper bridge arm switch are controlled by the second SPWM signal.

[0092] like Figure 19 As shown, the H-bridge in this embodiment adopts a full-bridge topology of "upper P-type transistor and lower N-type transistor". That is, the first upper bridge arm switch and the second upper bridge arm switch are both P-type switches, and the first lower bridge arm switch and the second lower bridge arm switch are both N-type switches.

[0093] As can be seen from the inherent characteristics of PN transistors, N-type switching transistors conduct at a high level, i.e., when the gate-source voltage VN is high. GS The transistor conducts when the voltage is greater than 0 and exceeds the threshold voltage (e.g., 5V), while a P-type switch conducts when the voltage is low, i.e., when the gate-source voltage V0 is greater than 0. GS It conducts when the voltage is <0 and below the threshold voltage (e.g., -5V).

[0094] Based on this, the MOSFETs on the same side (the first lower bridge arm switch Q1 and the first upper bridge arm switch Q3, the second lower bridge arm switch Q2 and the second upper bridge arm switch Q4) can use the same turn-on signal (the same SPWM signal, such as the first SPWM signal or the second SPWM signal).

[0095] It is understandable that when the drive signal (such as the first SPWM signal) outputs the same level on one side, the upper and lower MOSFETs on that side (such as the first lower bridge arm switch and the first upper bridge arm switch) will naturally be in opposite on / off states. For example, Figure 19 In the diagram, "L" represents the signal source on the left, which outputs the first SPWM signal. When the output is high, the upper bridge arm switch (first upper bridge arm switch) on the L side will be in the off state, while the lower bridge arm switch (first lower bridge arm switch) on the L side will be in the on state.

[0096] Based on this, by adopting a full-bridge topology with an upper P-type transistor and a lower N-type transistor, and using the same on-signal control method for the upper and lower switches on the same side, the drive circuit structure is effectively simplified.

[0097] In some embodiments, limiting measures for preventing simultaneous conduction are respectively provided between the first lower bridge arm switch and the first upper bridge arm switch, and between the second lower bridge arm switch and the second upper bridge arm switch.

[0098] Understandably, during H-bridge control, the upper and lower MOSFETs of the same bridge arm cannot be turned on simultaneously. If they are turned on simultaneously, an extremely low impedance path will be formed between the power supply and ground, resulting in a huge current in the path, which will cause the relevant devices to burn out.

[0099] However, based on the above embodiments, since the upper and lower MOSFETs on the same side use the same turn-on signal (the same SPWM signal), and the switching speed of the MOSFETs is limited (they cannot turn on or off in time when the signal is switched), when the SPWM signal switches between high and low levels, the upper and lower MOSFETs on the same bridge arm are prone to a brief simultaneous turn-on situation.

[0100] To avoid this situation, a design to prevent simultaneous conduction can be added between the upper and lower MOSFETs on the same side. Specifically, such as... Figure 19 As shown, limiting measures to prevent simultaneous conduction are respectively provided between the first lower bridge arm switch and the first upper bridge arm switch, and between the second lower bridge arm switch and the second upper bridge arm switch.

[0101] For example, digital logic can be used to delay the switching process. That is, by setting a dead time, after one switch is turned off, a certain period of time is delayed before another switch is allowed to turn on. For example, a dead time can be set between when the upper switch stops conducting and when the lower switch starts conducting, during which both the upper and lower switches are turned off.

[0102] For example, interlocking logic can also be used for restriction, that is, the upper and lower transistors of the same bridge arm can be directly prohibited from receiving a conduction level at the hardware level. For example, logic gates can be added to ensure that the upper and lower transistors on the same side do not receive a conduction level at the same time.

[0103] Based on this, by setting a limit to prevent simultaneous conduction between the upper and lower bridge arm switches on the same side, the reliability of drive control is further improved.

[0104] In some embodiments, the first SPWM signal is generated in the following ways: Based on the preset duty cycle list, the corresponding duty cycle value is obtained by looking up the table according to the current microstep index; In each carrier cycle, the counter value is compared with the duty cycle value, and a square wave signal is output according to the comparison result to obtain the first SPWM signal.

[0105] like Figure 20 As shown, the duty cycle list records the duty cycle values ​​corresponding to different microstep indices, where the first SPWM signal can correspond to the duty cycle value in the AL (representing the left side of phase A) column.

[0106] refer to Figure 9The counter counts at a specific frequency (e.g., 1 / 1024 of a second). Within each carrier cycle, this count value is calculated from 0 to 1024 (the preset maximum value), and then counted back to 0. For example... Figure 9 In the middle section of the waveform, each step represents one driving cycle (i.e., one microstep, corresponding to one carrier cycle). Each microstep determines a duty cycle value by looking up a table. When the duty cycle value is greater than the proportion corresponding to the count value, the output is high; when the duty cycle value is less than the proportion corresponding to the count value, the output is low.

[0107] For example, if the duty cycle value obtained from the table in a microstep is 50%, during the period from 0 (0%) to 512 (50%), the output level is high because the duty cycle value is greater than the proportion corresponding to the count value. During the period from 512 (50%) to 1024 (100%) and then counting back to 512 (50%), the output level is low because the duty cycle value is less than the proportion corresponding to the count value. During the period from 512 (50%) back to 0 (0%), the output level is high because the duty cycle value is greater than the proportion corresponding to the count value, and so on.

[0108] Based on this, a square wave signal whose "high and low levels" change over time can be used as the corresponding SPWM signal.

[0109] Similarly, the second, third, and fourth SPWM signals can all be generated using the same lookup table method. Based on this, a duty cycle list can be stored for each SPWM signal, or a single duty cycle list can be used to store the data corresponding to all four SPWM signals, for example... Figure 20 In the diagram, the second SPWM signal, the third SPWM signal, and the fourth SPWM signal correspond to the data in columns AL (representing the left side of phase A), AR (representing the right side of phase A), BL (representing the left side of phase B), and BR (representing the right side of phase B), respectively.

[0110] Based on this, SPWM signals are generated by looking up tables, which effectively simplifies the control logic of the motor drive and improves control reliability.

[0111] In some embodiments, the method for obtaining the duty cycle list includes: The number of microsteps is determined based on the microstep division mode of the stepper motor; Based on the number of microsteps, a corresponding electrical angle is assigned to each microstep index; Calculate the duty cycle value corresponding to each electrical angle based on a preset sine or cosine function; Establish a mapping relationship between each microstep index and its corresponding duty cycle value to form the conduction duty cycle list.

[0112] It should be noted that the stepper motor microstep division mode can be set based on the motor torque or smooth performance requirements, which is the number of microsteps contained per revolution.

[0113] Based on the number of microsteps, the corresponding electrical angle can be assigned to each microstep index. For example, in the case of 256 microsteps, the step size is 360° / 256≈1.41°. Therefore, the electrical angle corresponding to microstep index "0" is 0°, the electrical angle corresponding to microstep index "1" is 1.41°, and so on. The electrical angle corresponding to microstep index "256" is 360°.

[0114] Based on this, by substituting the electrical angle corresponding to each microstep index into the calculation formula in Table 4 above, and by using a preset sine or cosine function, the duty cycle value corresponding to each electrical angle can be obtained.

[0115] Finally, each microstep index is associated with its corresponding duty cycle value as a mapping relationship to form a corresponding conduction duty cycle list.

[0116] The above is the calculation method for the duty cycle list of one channel (e.g., AL). Other channels (including AR, BL, and BR channels) can be calculated in the same way. The only difference is the preset sine or cosine function, which can be set according to actual needs. It will not be elaborated here.

[0117] Based on this, by pre-calculating and generating a duty cycle list, the computational pressure caused by real-time function calculation is avoided, the performance requirements of drive control are reduced, and at the same time, the duty cycle values ​​of each microstep are accurately correlated with the electrical angle, thereby improving the accuracy of microstep control.

[0118] In some embodiments, the duty cycle list only stores the duty cycle value corresponding to a target electrical angle interval. For electrical angles outside the target electrical angle interval, a lookup table method using microstep index symmetric transformation is used to determine the corresponding duty cycle value. The target electrical angle interval corresponds to a continuous electrical angle interval, and the range of the continuous electrical angle interval is less than or equal to 180° electrical angle.

[0119] It should be noted that, taking the data from a specific channel as an example, by plotting the data based on the duty cycle values ​​of each microstep index, the following can be obtained: Figure 21 The waveform shown is a change in waveform.

[0120] To reduce the amount of data in the duty cycle list and decrease storage space, for the duty cycle list on which the SPWM signal of the same channel depends, only the duty cycle value corresponding to a specific target electrical angle range can be stored. For example, only the data of a continuous 180° range (e.g., 0-180° or 180°-360°) can be stored, or only the data of a continuous 90° range (e.g., 0-90° or 90°-180°) can be stored. For electrical angles outside the target electrical angle range, the corresponding duty cycle value can be determined by a lookup table method using microstep index symmetric transformation.

[0121] Based on this, by extracting and storing the values ​​of a specific electrical angle range as a duty cycle list, the storage space occupied by the data that the lookup method relies on is effectively reduced.

[0122] In some embodiments, the stepper motor drive system further includes a second H-bridge drive circuit, which is controlled by a third SPWM signal and a fourth SPWM signal to provide a second drive current to the second phase coil of the stepper motor. The first SPWM signal, the second SPWM signal, the third SPWM signal, and the fourth SPWM signal are all generated by looking up the same duty cycle list; wherein, the duty cycle value sequence on which the SPWM signals of different channels depend is obtained by looking up the table using index offset and / or symmetric transformation.

[0123] like Figure 20 The duty cycle list shows the duty cycle values ​​for channels AL, AR, BL, and BR. By plotting the duty cycle sequence for each channel, four sinusoidal waveforms with different phases can be obtained, as shown below. Figure 22 As shown.

[0124] Based on this, a list of duty cycles for only one channel can be stored. The duty cycle values ​​that different channel signals depend on can be determined by looking up a table using index offset and / or symmetrical transformation.

[0125] For example, taking the 256-step control method as an example, only one column of data (the duty cycle data of one channel) can be stored in a 256-bit array: Storage array: REG[0:255]

[0126] refer to Figure 23As shown, by using index offset, that is, making the starting indexes of the four drive signals different (e.g., AL=REG[0], AR=REG

[128] , BL=REG

[192] , BR=REG

[64] ), four sine waveforms with different phases can be obtained by looking up the table based on this. Each index needs to be automatically returned to zero after reaching 255.

[0127] Furthermore, by utilizing the principle of axial symmetry, only half of the column data can be stored (e.g., data with indices 0-128). In this case, the total amount of data will be compressed to about 1 / 8 of the original data, and the index will be reversed (instead of returning to zero) when the array reaches the end.

[0128] Among them, "index reversal" refers to changing from "index increment" to "index decrement", for example: REG[0]……REG

[127] →REG

[128] (reaching the end)→REG

[127] →REG

[126] →REG

[125] ……REG[0].

[0129] Furthermore, by utilizing the principles of axial symmetry and central symmetry, only a quarter of the column data can be stored (e.g., data with indices 0-64), at which point the total data volume is compressed to approximately 1 / 16 of the original data. In this case, when the 50% duty cycle boundary is reached (i.e., the array reaches the end), the array index is reversed, and the driving expression needs to be transformed to AL=1-REG[n].

[0130] Based on this, by retaining only the duty cycle list of one signal and deriving the lookup data of other channels through index offset and / or symmetrical transformation, the storage space occupied by the data on which the lookup method depends is further compressed.

[0131] Please refer to Figure 24 , Figure 24 A block diagram illustrating the composition of a stepper motor drive device provided in some embodiments of this application is shown. It should be understood that this stepper motor drive device is similar to the one described above. Figure 1 Corresponding to the method embodiments, it is able to execute the various steps involved in the above method embodiments. The specific functions of the stepper motor drive device can be found in the description above. To avoid repetition, detailed descriptions are appropriately omitted here.

[0132] Figure 24 The stepper motor drive device includes at least one software function module that can be stored in a memory or embedded in the stepper motor drive device in the form of software or firmware. The stepper motor drive device is applied to a stepper motor drive system including a first H-bridge drive circuit, the first H-bridge drive circuit being used to provide a first drive current to the first phase coil of the stepper motor. The device includes: The first signal generation module 241 is used to generate a first SPWM signal and a second SPWM signal; wherein the first SPWM signal and the second SPWM signal have the same waveform and are staggered in timing by half a carrier cycle, and the carrier cycle is the repetition period of the carrier signal corresponding to the SPWM signal; The first current control module 242 is used to apply the first SPWM signal and the second SPWM signal to the first upper bridge arm switch and the second upper bridge arm switch of the first H-bridge drive circuit, respectively, to control the magnitude and direction of the first drive current.

[0133] It is understood that the above-described device embodiments correspond to the method embodiments of the present invention. The stepper motor driving device provided by the embodiments of the present invention can implement the stepper motor driving method provided by any one of the method embodiments of the present invention.

[0134] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working process of the device described above can be referred to the corresponding process in the aforementioned method, and will not be elaborated further here.

[0135] Some embodiments of this application also provide a stepper motor drive system, including: At least two H-bridge drive circuits, each of which is used to provide drive current to the corresponding phase coil of the stepper motor; The control device is configured to perform any of the stepper motor driving methods described above to control the magnitude and direction of the drive current output by each of the H-bridge drive circuits.

[0136] It should be noted that the control device can be implemented using a general-purpose processor to execute programs (such as the stepper motor drive method described in any of the above).

[0137] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working process of the system described above can be referred to the corresponding process in the aforementioned method, and will not be elaborated further here.

[0138] like Figure 25 As shown, some embodiments of this application provide an electronic device 250, which includes: a memory 251, a processor 252, and a computer program stored on the memory 251 and executable on the processor 252. When the processor 252 reads the program from the memory 251 via a bus 253 and executes the program, it can implement any of the methods included in the above-described stepper motor driving method.

[0139] Processor 252 can process digital signals and can include various computing architectures. For example, it can be a complex instruction set computer architecture, a reduced instruction set computer architecture, or an architecture that implements multiple instruction set combinations. In some examples, processor 252 can be a microprocessor.

[0140] Memory 251 can be used to store instructions executed by processor 252 or data related to the execution of instructions. These instructions and / or data may include code for implementing some or all of the functions of one or more modules described in the embodiments of this application. The processor 252 of this disclosure embodiment can be used to execute instructions in memory 251 to implement the methods shown above. Memory 251 includes dynamic random access memory, static random access memory, flash memory, optical memory, or other memories well known to those skilled in the art.

[0141] Some embodiments of this application also provide a computer-readable storage medium storing a computer program that, when executed by a processor, describes the method described in the method embodiments.

[0142] Some embodiments of this application also provide a computer program product that, when run on a computer, causes the computer to perform the methods described in the method embodiments.

[0143] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For apparatus embodiments, since they are basically similar to method embodiments, the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0144] It should be understood, in the several embodiments provided in this application, that the disclosed apparatus and methods can also be implemented in other ways. The apparatus embodiments described above are merely illustrative; for example, the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0145] In addition, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0146] If the aforementioned functions are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0147] The above description is merely an embodiment of this application and is not intended to limit the scope of protection of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application. It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0148] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0149] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A stepper motor drive device, characterized in that, An apparatus for use in a stepper motor drive system including a first H-bridge drive circuit, the first H-bridge drive circuit being used to provide a first drive current to a first phase coil of the stepper motor, the apparatus comprising: The first signal generation module is used to generate a first SPWM signal and a second SPWM signal; wherein the first SPWM signal and the second SPWM signal have the same waveform and are staggered in timing by half a carrier cycle, and the carrier cycle is the repetition period of the carrier signal corresponding to the SPWM signal; The first current control module is used to apply the first SPWM signal and the second SPWM signal to the first upper bridge arm switch and the second upper bridge arm switch of the first H-bridge drive circuit, respectively, to control the magnitude and direction of the first drive current.

2. The stepper motor drive device according to claim 1, characterized in that, The stepper motor drive system further includes a second H-bridge drive circuit, which provides a second drive current to the second phase coil of the stepper motor. The device also includes: The second signal generation module is used to generate a third SPWM signal and a fourth SPWM signal; wherein the waveforms of the third SPWM signal and the fourth SPWM signal are the same and their timing is staggered by half a carrier cycle. The second current control module is used to apply the third SPWM signal and the fourth SPWM signal to the first upper bridge arm switch and the second upper bridge arm switch of the second H-bridge drive circuit, respectively, to control the magnitude and direction of the second drive current; wherein the waveform of the first drive current is orthogonal to the waveform of the second drive current.

3. The stepper motor drive device according to claim 1, characterized in that, The first upper bridge arm switch and the second upper bridge arm switch of the first H-bridge drive circuit are both P-type switches, and the first lower bridge arm switch on the same side as the first upper bridge arm switch and the second lower bridge arm switch on the same side as the second upper bridge arm switch are both N-type switches. Both the first lower bridge arm switch and the first upper bridge arm switch are controlled by the first SPWM signal, and both the second lower bridge arm switch and the second upper bridge arm switch are controlled by the second SPWM signal.

4. The stepper motor drive device according to claim 3, characterized in that, Restriction measures to prevent simultaneous conduction are respectively provided between the first lower bridge arm switch and the first upper bridge arm switch, and between the second lower bridge arm switch and the second upper bridge arm switch.

5. The stepper motor drive device according to claim 1, characterized in that, The first SPWM signal is generated in the following ways: Based on the preset duty cycle list, the corresponding duty cycle value is obtained by looking up the table according to the current microstep index; In each carrier cycle, the counter value is compared with the duty cycle value, and a square wave signal is output according to the comparison result to obtain the first SPWM signal.

6. The stepper motor drive device according to claim 5, characterized in that, The methods for obtaining the duty cycle list include: The number of microsteps is determined based on the microstep division mode of the stepper motor; Based on the number of microsteps, a corresponding electrical angle is assigned to each microstep index; Calculate the duty cycle value corresponding to each electrical angle based on a preset sine or cosine function; Establish a mapping relationship between each microstep index and its corresponding duty cycle value to form the conduction duty cycle list.

7. The stepper motor drive device according to claim 5, characterized in that, The duty cycle list only stores the duty cycle value corresponding to a target electrical angle interval. For electrical angles outside the target electrical angle interval, the corresponding duty cycle value is determined by a lookup table method using microstep index symmetric transformation. The target electrical angle interval corresponds to a continuous electrical angle interval, and the range of the continuous electrical angle interval is less than or equal to 180° electrical angle.

8. The stepper motor drive device according to claim 7, characterized in that, The stepper motor drive system further includes a second H-bridge drive circuit, which is controlled by a third SPWM signal and a fourth SPWM signal to provide a second drive current to the second phase coil of the stepper motor. The first SPWM signal, the second SPWM signal, the third SPWM signal, and the fourth SPWM signal are all generated by looking up the same duty cycle list; wherein, the duty cycle value sequence on which the SPWM signals of different channels depend is obtained by looking up the table using index offset and / or symmetric transformation.

9. A stepper motor driving method, characterized in that, A method applied to a stepper motor drive system including a first H-bridge drive circuit, the first H-bridge drive circuit being used to provide a first drive current to a first phase coil of the stepper motor, the method comprising: Generate a first SPWM signal and a second SPWM signal; wherein the first SPWM signal and the second SPWM signal have the same waveform and are staggered in timing by half a carrier cycle, and the carrier cycle is the repetition period of the carrier signal corresponding to the SPWM signal; The first SPWM signal and the second SPWM signal are respectively applied to the first upper bridge arm switch and the second upper bridge arm switch of the first H-bridge drive circuit to control the magnitude and direction of the first drive current.

10. A stepper motor drive system, characterized in that, include: At least two H-bridge drive circuits, each of which is used to provide drive current to the corresponding phase coil of the stepper motor; The control device is configured to perform the stepper motor driving method as described in claim 9 to control the magnitude and direction of the drive current output by each of the H-bridge drive circuits.

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