Method for determining channel delay, delay calibration system and test equipment

Abstract

This disclosure provides a method for determining channel delay, a delay calibration system, and a testing device. The method includes: in response to the transmission of a measurement signal, starting to time the transmission delay of a transmission channel using a first timing granularity; determining a first timing result based on the first timing granularity upon receiving a measurement feedback signal through the transmission channel; determining a second timing result based on a delay of a second timing granularity within the timing period of the first timing granularity at which the measurement feedback signal is received, based on the difference between the measurement feedback signal and the expected feedback signal; increasing the transmission delay of the transmission signal using a third timing granularity until the received measurement feedback signal meets a preset condition, and determining a third timing result based on the third timing granularity; wherein the third timing granularity is smaller than the second timing granularity and smaller than the first timing granularity; and determining the transmission channel delay based on the first timing result, the second timing result, and the third timing result. This method for determining channel delay is simple in design and cost-effective.

Description

Technical Field

[0001] This disclosure relates to the field of chip testing technology, and in particular to a method for determining channel delay, a delay calibration system, and testing equipment. Background Technology

[0002] Chip testing is an indispensable and crucial link in the semiconductor industry chain. Its core purpose is to screen out defective products, verify design and performance, ensure product reliability, control production costs, and ultimately ensure that chips can work stably in practical applications. Semiconductor testing machines (such as Automatic Test Equipment (ATE)) can perform tests on chips, such as signal transmission delay, setup / hold time, and clock jitter. Their core functions are accurate measurement and pass / fail determination. If the semiconductor testing machine itself has deviations, it will directly cause the measured values ​​of the chip to deviate from the true values, thus misclassifying good products as defective products, reducing production yield, and increasing enterprise costs; or misclassifying defective products as good products, allowing defective chips to enter the market, causing end-product failures or even safety incidents.

[0003] Therefore, before testing a chip, it is necessary to ensure that the testing error of the semiconductor testing equipment is within a controllable range. When semiconductor testing equipment sends test signals to a chip, it inevitably passes through a transmission channel. Each test channel of the semiconductor testing equipment (digital input / output channel, analog signal channel, etc.) has an inherent transmission delay, and there are natural differences in delay between different channels (channel delay deviation). It is evident that the transmission performance of the transmission channel is a crucial performance indicator of semiconductor testing equipment.

[0004] In related technologies, time-to-digital converter (TDC) chips are typically used to determine channel delay. This requires supporting peripheral circuits (such as clock sources, calibration circuits, and data interfaces) to work, which is complex to design and costly. Summary of the Invention

[0005] This disclosure provides a method for determining channel delay, a delay calibration system, and testing equipment to address the problems of complex design and high cost associated with existing channel delay testing using TDC chips. Based on the above problems, a first aspect provides a method for determining channel delay, comprising: In response to the transmission of the measurement signal, the transmission delay of the transmission channel is started using the first timing granularity; Upon receiving a measurement feedback signal through the transmission channel, a first timing result based on a first timing granularity is determined; and Based on the difference between the measured feedback signal and the expected feedback signal, a second timing result is obtained within the timing period of the first timing granularity at which the measured feedback signal is received, based on the delay of the second timing granularity; the second timing granularity is smaller than the first timing granularity. A third timing granularity is used to increase the transmission delay of the transmitted signal until the received measurement feedback signal meets the preset conditions, and a third timing result based on the third timing granularity is determined; the third timing granularity is smaller than the second timing granularity; the transmitted signal includes: a measurement signal or a measurement feedback signal; The delay of the transmission channel is determined based on the first timing result, the second timing result, and the third timing result.

[0006] In conjunction with the first aspect, in one possible implementation, in response to the transmission of a measurement signal, timing the transmission delay of the transmission channel is initiated using a first timing granularity, including: in response to the transmission of the measurement signal, starting to count the number of first clock cycles of the transmission channel; the first clock cycle has a first timing granularity; When a measurement feedback signal is received through the transmission channel, determining a first timing result based on a first timing granularity includes: when a measurement feedback signal is received through the transmission channel, determining the counting result from the start of counting after the current measurement signal is sent to the first clock cycle preceding the first clock cycle corresponding to the received measurement feedback signal, and obtaining a first timing result based on the first timing granularity.

[0007] In conjunction with the first aspect, in one possible implementation, the timing period of the first timing granularity includes a first clock cycle; the timing period of the second timing granularity includes a second clock cycle; and the first clock cycle includes a plurality of second clock cycles. Based on the difference between the measured feedback signal and the expected feedback signal, a second timing result is obtained within the timing period of the first timing granularity of the received measured feedback signal, based on the delay of the second timing granularity. This includes: determining the first sub-signals detected in each of the second clock cycles contained in the target first clock cycle of the received measured feedback signal; comparing each first sub-signal with each second sub-signal contained in the expected feedback signal according to their corresponding timing sequence; determining the number of second clock cycles that the measured feedback signal is delayed compared to the expected feedback signal based on the comparison result; and determining the second timing result based on the number of second clock cycles.

[0008] In conjunction with the first aspect, in one possible implementation, each second clock cycle corresponds to the acquisition of one bit of data; each first clock cycle corresponds to the acquisition of a preset number of bits of data; and the expected feedback signal has the preset number of bits. Based on the comparison results, the number of second clock cycles that the measured feedback signal is delayed compared to the expected feedback signal is determined, including: determining the number of second clock cycles that are delayed based on the number of bits that the measured feedback signal is delayed compared to the expected feedback signal; including establishing a correspondence between the measured feedback signal and the number of second clock cycles that are delayed in advance based on the expected feedback signal; and determining the number of second clock cycles that are delayed based on the received measured feedback signal and the correspondence.

[0009] In conjunction with the first aspect, in one possible implementation, a third timing result is determined by increasing the transmission delay of the transmitted signal using a third timing granularity until the received measurement feedback signal meets a preset condition. This includes: gradually increasing the transmission delay of the transmitted signal based on the third timing granularity, and detecting the received measurement feedback signal after each increase in transmission delay until the received measurement feedback signal meets the preset condition; and determining the third timing result based on the increased transmission delay of the third timing granularity when the preset condition is met.

[0010] In conjunction with the first aspect, in one possible implementation, the received measurement feedback signal satisfies preset conditions, including: The received measurement feedback signal meets the expected delayed feedback signal; Determining the delay of the transmission channel based on the first timing result, the second timing result, and the third timing result includes: The delay of the transmission channel is determined using one of the following formulas. : ; ； ； in, Characterizes the first clock cycle; Characterizes the counting result for the first clock cycle; Characterizes the second clock cycle; The number of second clock cycles that characterizes the delay of the measured feedback signal compared to the expected feedback measurement signal; Characterizes the third timing granularity; The number of timing units representing the addition of a third timing granularity; Characterizes the width of the first sub-signal.

[0011] In conjunction with the first aspect, in one possible implementation, the received measurement feedback signal satisfies preset conditions, including: The preset first sub-signal of the received measurement feedback signal undergoes an expected jump; Determining the delay of the transmission channel based on the first timing result, the second timing result, and the third timing result includes: The delay of the transmission channel is determined using the following formula. : ; in, Characterizes the first clock cycle; Characterizes the counting result for the first clock cycle; Characterizes the second clock cycle; The number of second clock cycles that characterizes the delay of the measured feedback signal compared to the expected feedback signal; Characterizes the third timing granularity; The number of timing units representing the addition of a third timing granularity.

[0012] Secondly, a delay calibration system is provided, comprising: a processing unit, at least one core control module, at least one signal driving unit, and external testing equipment; each core control module is connected to the corresponding signal driving unit through multiple transmission channels; The processing unit is used to configure the core control module and the signal driving unit, and to send a synchronization trigger signal to the core control module. The core control module is configured to, upon triggering by the synchronization trigger signal, send measurement signals to the corresponding signal driving units through the multiple transmission channels, so that the measurement signals are sent to the external test equipment through the signal driving units; and receive measurement feedback signals from the external test equipment through the signal driving units; during the transmission of measurement signals and the reception of measurement feedback signals, the channel delay determination method described in the first aspect or any possible implementation of the first aspect is used to determine the channel delay of the multiple transmission channels, and transmit it to the processing unit; The processing unit is also used to calibrate the corresponding transmission channel based on the channel delay of the transmission channel.

[0013] In conjunction with the second aspect, in one possible implementation, the core control module includes: a synchronization control unit, an information interaction unit, an algorithm processing unit, a delay control unit, and a transceiver control unit; The synchronization control unit is used to receive the synchronization trigger signal sent by the processing unit and send the synchronization trigger signal to the transceiver control unit; The information interaction unit is used to transmit first interaction data between the processing unit and the core control module, and second interaction data between the algorithm processing unit and the delay control unit; the first interaction data includes: measurement signals and channel delay data of the multiple transmission channels; the second interaction data includes: transmission delay timing data at the third timing granularity and transmission delay timing end flag status data at the third timing granularity. The algorithm processing unit is used to determine the channel delay of the plurality of transmission channels respectively by means of the channel delay determination method as described in the first aspect or any possible implementation of the first aspect during the transmission of the measurement signal and the reception of the measurement feedback signal, and transmit the channel delay to the processing unit. The delay control unit is used to provide a transmission delay with a third timing granularity during the process of the algorithm processing unit determining the channel delay of the plurality of transmission channels; The transceiver control unit is configured to send a measurement signal to a corresponding signal driving unit in response to a synchronization trigger signal; receive a measurement feedback signal from the external test equipment sent by the corresponding signal driving unit; and transmit the received measurement feedback signal to the algorithm processing unit.

[0014] In conjunction with the second aspect, in one possible implementation, the transceiver control unit is further configured to convert the parallel data form measurement signal sent by the processing unit into a parallel-to-serial conversion and provide it to the signal driving unit for transmission; and to convert the received serial data form measurement feedback signal into a serial-to-parallel conversion for processing by the algorithm processing unit.

[0015] In conjunction with the second aspect, in one possible implementation, the processing unit is configured to configure a first preset transmission channel in the transmission channel to be measured as a first receiving channel; configure other transmission channels besides the first preset transmission channel as first transmitting channels; the first receiving channel and the first transmitting channel correspond to the same core control module or different core control modules; and send a synchronization trigger signal to the core control modules corresponding to the first receiving channel and the first transmitting channel. The system is connected to the core control module of the first transmission channel, which is used to transmit measurement signals through multiple first transmission channels under the triggering of the synchronization trigger signal; A core control module connected to the first receiving channel is used to sequentially receive measurement feedback signals corresponding to the measurement signals transmitted by the plurality of first transmitting channels through the first receiving channel; determine the first channel delay corresponding to each of the plurality of first transmitting channels using the channel delay determination method as described in the first aspect or any possible implementation of the first aspect; and transmit the first channel delay to the processing unit. The processing unit is configured to determine the first channel delay corresponding to the other first transmission channels among the plurality of first transmission channels besides the target first transmission channel, and the first relative delay relative to the first channel delay corresponding to the target first transmission channel; and to calibrate the plurality of other first transmission channels based on the first relative delay.

[0016] In conjunction with the second aspect, in one possible implementation, the processing unit is further configured to configure the first preset transmission channel as the second transmission channel, configure a designated transmission channel in the first transmission channel as the second receiving channel, and send synchronization trigger signals to at least the core control modules corresponding to the second transmission channel, the second receiving channel, and the preset first transmission channel in the first transmission channel, respectively. The core control module connected to the second transmission channel is used to transmit measurement signals through the second transmission channel when triggered by the synchronization trigger signal; The core control module, which is connected to the preset first transmission channel, is used to transmit a measurement signal through the preset first transmission channel when triggered by the synchronization trigger signal. A core control module connected to the second receiving channel is used to sequentially receive measurement feedback signals corresponding to the measurement signals transmitted by the second transmitting channel and the preset first transmitting channel through the second receiving channel; determine the second channel delay corresponding to the second transmitting channel and the preset first transmitting channel respectively by adopting the channel delay determination method as described in the first aspect or in any possible implementation of the first aspect; and transmit the second channel delay to the processing unit. The processing unit is further configured to determine a second relative delay of the second channel delay corresponding to the second transmission channel relative to the second channel delay corresponding to the preset first transmission channel; determine the relative delay of the second transmission channel relative to the target first transmission channel based on the second relative delay and the first relative delay of the preset first transmission channel relative to the target first transmission channel; and calibrate the second transmission channel based on the relative delay.

[0017] In conjunction with the second aspect, in one possible implementation, the processing unit is configured to configure a second preset transmission channel in the transmission channel to be measured as a third transmitting channel; configure other transmission channels besides the second preset transmission channel as third receiving channels; the third receiving channel and the third transmitting channel correspond to the same core control module or different core control modules; and send a synchronization trigger signal to the core control modules corresponding to the third receiving channel and the third transmitting channel. The core control module connected to the third transmission channel is used to sequentially transmit measurement signals through the third transmission channel under the triggering of the synchronization trigger signal; The core control module connected to the third receiving channel is used to receive the measurement feedback signal corresponding to the measurement signal sent by the third transmitting channel through the corresponding third receiving channel; determine the third channel delay corresponding to the third receiving channel by adopting the channel delay determination method as described in the first aspect or any possible implementation of the first aspect; and transmit the third channel delay to the processing unit. The processing unit is configured to determine the third channel delay corresponding to the other third receiving channels besides the target third receiving channel among the plurality of third receiving channels, and the third relative delay relative to the third channel delay corresponding to the target third receiving channel; and to calibrate the plurality of other third receiving channels based on the third relative delay.

[0018] In conjunction with the second aspect, in one possible implementation, the processing unit is further configured to configure the second preset transmission channel as the fourth receiving channel, configure the designated transmission channel in the third receiving channel as the fourth transmitting channel, and send synchronization trigger signals to at least the core control modules corresponding to the fourth receiving channel, the fourth transmitting channel, and the preset third receiving channel in the third receiving channel, respectively. The core control module connected to the fourth transmission channel is used to transmit measurement signals through the fourth transmission channel when triggered by the synchronization trigger signal. A core control module connected to a fourth receiving channel is used to receive a measurement feedback signal corresponding to the measurement signal sent by the fourth transmitting channel through the connected fourth receiving channel; and to determine the fourth channel delay corresponding to the fourth receiving channel using the channel delay determination method as described in the first aspect or any possible implementation of the first aspect, and transmit it to the processing unit. A core control module connected to a preset third receiving channel is used to receive a measurement feedback signal corresponding to the measurement signal sent by the fourth transmitting channel through the connected preset third receiving channel; and to determine the fourth channel delay corresponding to the preset third receiving channel using the channel delay determination method as described in the first aspect or any possible implementation of the first aspect, and transmit it to the processing unit. The processing unit is further configured to determine a fourth relative delay of the fourth channel delay corresponding to the fourth receiving channel relative to the fourth channel delay corresponding to the preset third receiving channel; determine the relative delay of the fourth receiving channel relative to the target third receiving channel based on the fourth relative delay and the third relative delay of the preset third receiving channel relative to the target third receiving channel; and calibrate the fourth receiving channel based on the relative delay.

[0019] Thirdly, a test device is provided, comprising at least a processing unit, at least one core control module, and at least one signal driving unit in a delay calibration system as described in the second aspect or any possible implementation of the second aspect.

[0020] The beneficial effects of the embodiments disclosed herein include: This disclosure provides a method for determining channel delay, a delay calibration system, and a testing device. The method includes: responding to the transmission of a measurement signal, starting to time the transmission delay of a transmission channel using a first timing granularity; upon receiving a measurement feedback signal through the transmission channel, determining a first timing result based on the first timing granularity; and, based on the difference between the measurement feedback signal and the expected feedback signal, determining a second timing result within the timing period of the first timing granularity at which the measurement feedback signal is received, based on a delay of a second timing granularity; the second timing granularity being smaller than the first timing granularity; increasing the transmission delay of the transmission signal using a third timing granularity until the received measurement feedback signal meets a preset condition, and determining a third timing result based on the third timing granularity; the third timing granularity being smaller than the second timing granularity; the transmission signal including a measurement signal or a measurement feedback signal; and determining the delay of the transmission channel based on the first timing result, the second timing result, and the third timing result. This disclosure employs a hierarchical timing method to calculate the delay of the transmission channel. The first timing granularity covers a larger measurement range with a larger timing unit. Then, within the first timing granularity, a second timing granularity further reduces the measurement range, focusing on the critical moments that cause the delay. Finally, minute time differences that the second timing granularity cannot measure can be measured by increasing the transmission delay with a third timing granularity. This disclosure achieves comprehensive measurement range coverage from coarse to fine to micro by setting a three-level timing granularity, and improves measurement accuracy through smaller timing granularity. It eliminates the need for additional TDC chips and their peripheral circuitry, resulting in a simple design and cost savings. The delay calibration system based on this channel delay determination method calibrates multiple transmission channels, leading to more accurate calibration results. It particularly addresses engineering challenges in high-speed chip testing, such as timing bottlenecks, cost control, and multi-channel synchronization. Attached Figure Description

[0021] Figure 1 A flowchart illustrating a method for determining channel delay provided in an embodiment of this disclosure; Figure 2 This is a schematic diagram illustrating the received measurement feedback signals with and without delay, provided in an embodiment of this disclosure. Figures 3a-3c A schematic diagram illustrating the process of receiving a measurement feedback signal and gradually increasing the delay at the third timing granularity until the transmission channel delay is determined, as provided in this embodiment of the disclosure. Figure 4 This is a schematic diagram of the channel delay calculation mechanism provided in an embodiment of the present disclosure; Figures 5a-5b This is a schematic diagram of the structure of a delay calibration system provided in an embodiment of the present disclosure; Figures 6a-6b This is a flowchart of the AC calibration algorithm processing unit in an FPGA provided in an embodiment of the present disclosure; Figures 7a-7b This is a schematic diagram of the relative phase of each channel before and after delay calibration, provided in an embodiment of this disclosure. Detailed Implementation

[0022] This disclosure provides a method for determining channel delay, a delay calibration system, and testing equipment. Preferred embodiments of this disclosure are described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustrative and explanatory purposes only and are not intended to limit the scope of this disclosure. Furthermore, the embodiments and features described herein can be combined with each other unless otherwise specified.

[0023] This disclosure provides a method for determining channel delay, such as... Figure 1 As shown, it includes: S101. In response to the transmission of the measurement signal, the transmission delay of the transmission channel is started using the first timing granularity; S102. Upon receiving a measurement feedback signal through the transmission channel, determine a first timing result based on the first timing granularity; and S103. Based on the difference between the measured feedback signal and the expected feedback signal, determine the timing period of the first timing granularity in which the measured feedback signal is received, and obtain the second timing result based on the delay of the second timing granularity; the second timing granularity is smaller than the first timing granularity. S104. The transmission delay of the transmitted signal is increased by adopting a third timing granularity until the received measurement feedback signal meets the preset conditions, and the third timing result based on the third timing granularity is determined; the third timing granularity is smaller than the second timing granularity; the transmitted signal includes: measurement signal or measurement feedback signal; S105. Determine the delay of the transmission channel based on the first timing result, the second timing result, and the third timing result.

[0024] The method for determining channel delay provided in this disclosure can be applied to semiconductor testing equipment. The semiconductor testing equipment can use this method to measure the delay of the transmission channel. The transmission channel may include, but is not limited to, the transmission channel used for data transmission within the semiconductor testing equipment, as well as the transmission channel used for data transmission between the semiconductor testing equipment and external devices (e.g., devices related to the chip under test).

[0025] Furthermore, in this embodiment of the present disclosure, the transmission channel may include a transmitting channel and a receiving channel. The transmitting channel transmits the measurement signal to the target device (e.g., an external testing device), and the receiving channel receives the measurement feedback signal from the target device. The channel delay measurement provided in this embodiment of the present disclosure can be the delay time from when the measurement signal is transmitted through the transmitting channel to when the measurement feedback signal is received through the receiving channel. When the transmitting channel and the receiving channel are different channels, the delay of the transmitting channel can be measured using the channel delay measurement method provided in this disclosure (e.g., fixing the receiving channel), or the delay of the receiving channel can be measured (e.g., fixing the transmitting channel). The implementation can be flexibly set according to the actual situation, and there is no limitation here.

[0026] In implementation, a measurement signal is sent to the target device via a transmission channel. Timing begins immediately after the measurement signal is sent. Since the measurement signal reaches the target device via the transmission channel, and the target device processes the measurement signal to obtain a measurement feedback signal, which is then fed back via a receiving channel, the time required before detecting the measurement feedback signal is relatively long. After the measurement signal is sent, timing can begin at a first timing granularity with a larger granularity, such as a clock cycle, until the measurement feedback signal is received via the receiving channel. At this point, timing at the first timing granularity ends, and a first timing result based on the first timing granularity is determined. Next, the timing cycle of the first timing granularity at which the measurement feedback signal is received can be focused on. A second timing granularity is used to further locate the time range to which the moment the measurement feedback signal is received belongs, measured by the second timing granularity. The second timing granularity can be set according to the content and / or form of the measurement signal. Assuming the measurement feedback signal is a digital signal with 8 bits, the sub-clock cycle for detecting each bit can be determined as the second timing granularity. The second timing result is determined by the difference between the received measurement feedback signal and the expected feedback signal (e.g., the number of delayed bits). After focusing the moment of receiving the measurement feedback signal into a smaller time range corresponding to the second timing granularity, a more precise measurement of the reception time of the measurement feedback signal can be performed using an even smaller time granularity, i.e., the third time granularity. During multiple transmissions of the measurement signal, the transmission delay of the measurement signal or the measurement feedback signal is gradually increased until a received measurement feedback signal meets a preset condition. The third timing result is determined based on the number of timing units in the currently increased third time granularity. Ultimately, the transmission channel delay is determined through these three levels of timing granularity, resulting in a more accurate and precise measurement of the channel delay.

[0027] In this embodiment, the measurement signal can be either an analog signal or a digital signal. The content of the measurement signal (including the number of bits, the value of each bit, etc.) can be set according to actual needs and is not limited here. In addition, since the processing method of the measurement signal by the target device is predictable, the content of the expected feedback signal corresponding to the measurement signal can be known in advance without delay. However, since there may be delay in the transmission channel, the received measurement feedback signal may be different from the expected feedback signal.

[0028] In another embodiment provided in this disclosure, the above step "S101, in response to the transmission of the measurement signal, start timing the transmission delay of the transmission channel using the first timing granularity" can be implemented as follows: Step 1: In response to the transmission of the measurement signal, start counting the number of the first clock cycles of the transmission channel; the first clock cycle has a first timing granularity; The above step "S102, upon receiving a measurement feedback signal through the transmission channel, determining the first timing result based on the first timing granularity" can be implemented as follows: Step 2: Upon receiving the measurement feedback signal through the transmission channel, determine the counting result from the start of counting after the current measurement signal is sent to the first clock cycle preceding the first clock cycle corresponding to the received measurement feedback signal, and obtain the first timing result based on the first timing granularity.

[0029] In this embodiment, the first clock cycle can be used as the first timing granularity. The first clock cycle can be the sampling period of the clock signal that triggers sampling, that is, each arrival of the first clock cycle will trigger the sampling of the transmitted data of the transmission channel. After the measurement signal is sent, the counting of the number of first clock cycles can be started. Taking the transmission of digital signals as an example, in one possible implementation, in order to reduce the complexity of implementation, the data of a preset number of bits of the transmission channel can be sampled when each first clock cycle arrives, for example: 1 byte is sampled each time, and the sampling result of each time is detected. If no measurement feedback signal is sampled, the first clock cycle can be accumulated and counted. If a measurement feedback signal is detected, the timing of the first clock cycle can be determined to be over, and the timing result of the first clock cycle can be determined, that is, the counting result from the start of counting after the current measurement signal is sent (in some implementations, the measurement signal may be sent multiple times in a loop, and timing measurement can be performed each time) to the previous clock cycle before the first clock cycle when the measurement feedback signal is received, that is, the number of all first clock cycles in which no measurement feedback signal has been detected since the start of counting.

[0030] This approach uses a coarser first timing granularity to time the measurement before the feedback signal arrives, covering a larger measurement range (e.g., ns to μs) with a coarse clock cycle as the unit. Subsequently, the measurement accuracy is increased by finer second and third timing granularities, achieving a balance between measurement range and measurement accuracy, and meeting the delay measurement requirements of different transmission channels.

[0031] In another embodiment provided in this disclosure, the timing period of the first timing granularity includes a first clock cycle; the timing period of the second timing granularity includes a second clock cycle; and the first clock cycle includes a plurality of second clock cycles. The above step "S103, based on the difference between the measured feedback signal and the expected feedback signal, determine the second timing result within the timing period of the first timing granularity of the received measured feedback signal, based on the delay of the second timing granularity" can be implemented as follows: Step 1: Determine the first sub-signal detected in each of the second clock cycles within the first clock cycle of the target receiving the measurement feedback signal; and Step 2: Compare each first sub-signal with each second sub-signal contained in the expected feedback signal according to their corresponding time sequence; Step 3: Based on the comparison results, determine the number of second clock cycles that the measured feedback signal is delayed compared to the expected feedback signal; Step 4: Determine the second timing result based on the number of second clock cycles.

[0032] In this embodiment of the disclosure, after detecting the measurement feedback signal, the focus is on the target first clock cycle in which the measurement feedback signal is received. Since the measurement feedback signal can be composed of multiple first sub-signals (for example, assuming the measurement feedback signal includes one byte of data, each bit in one byte can be considered a sub-signal), the timing granularity can be reduced to the second clock cycle that triggers the detection of the sub-signals. That is, each sub-signal received in the first clock cycle can be detected in the second clock cycle within the first clock cycle. The first clock cycle and the second clock cycle can be uniformly controlled by the same source clock. The first clock cycle contains multiple second clock cycles, and the second clock cycles can be implemented by frequency division of the first clock cycle, etc.

[0033] Furthermore, the expected feedback signal has an expected second sub-signal in each second clock cycle of the corresponding first clock cycle. Assuming the expected feedback signal is 01010101, then in the absence of delay, the second sub-signal detected in each of the eight second clock cycles contained in the target first clock cycle of the received measurement feedback signal should correspond one-to-one with 01010101. However, if there is a delay in the transmission channel, the sub-signals in the received measurement feedback signal may be misaligned, that is, the received first sub-signals and second sub-signals may be inconsistent. Assuming a delay of 1 bit, the received first sub-signal sequence (i.e., the byte detected in the target first clock cycle) may be 00101010. By comparing each first sub-signal with each second sub-signal according to the corresponding timing sequence, the number of bits that the measurement feedback signal is delayed compared to the expected feedback signal, i.e., the number of second clock cycles, can be determined.

[0034] It should be noted that, due to different transmission methods for serial data, such as the least significant bit (LSB) and the most significant bit (MSB), the bit order of the sub-signals received by the receiver will be different depending on the transmission method used. For example, using LSB transmission, if the measurement feedback signal sent by the receiving end is 00000001, then the received signal is 10000000 (delay issues are not considered in this example). When determining the sub-signals, the bits 1, 0, 0, 0, 0, 0, 0, 0 of the received signal (10000000) can be directly determined as the 8 first sub-signals, or the bits 0, 0, 0, 0, 0, 0, 0, 1 of the bit-order restored signal (00000001) can be determined as the 8 first sub-signals. Regardless of the method used, when comparing each first sub-signal with each second sub-signal contained in the expected feedback signal, the corresponding timing sequence must be followed. For example, if the bit-order restored sub-signal (00000001) is compared with the expected feedback signal, then the expected feedback signal should also be in the bit-order restored timing sequence.

[0035] In this way, after the measurement feedback signal arrives, a finer second timing granularity is used to further lock the time period of the measurement feedback signal reception, instead of directly using the finest third timing granularity. This ensures the accuracy of the delay time determination while improving the delay timing efficiency, and provides a solid foundation for subsequently using the finest third timing granularity.

[0036] In another embodiment provided in this disclosure, each second clock cycle corresponds to the acquisition of one bit of data; each first clock cycle corresponds to the acquisition of a preset number of bits of data; the expected feedback signal has the preset number of bits; The above "Step 3, Determine the number of second clock cycles that the measured feedback signal is delayed by compared to the expected feedback signal based on the comparison results" can be implemented as follows: The number of second clock cycles of delay is determined based on the number of bits that the measured feedback signal is delayed compared to the expected feedback signal. In this embodiment of the disclosure, when 1 bit of data is collected for each second clock cycle, a preset number of bits of data can be collected for each first clock cycle. In the process of comparing each first sub-signal with each second sub-signal according to the corresponding timing sequence, each delay of one bit can be considered as a delay of one second clock cycle. Therefore, the number of bits delayed can be determined as the number of delayed second clock cycles.

[0037] Furthermore, the step of "determining the number of second clock cycles of delay based on the number of bits of delay between the measured feedback signal and the expected feedback signal" can be implemented as follows: Step 1: Based on the expected feedback signal, pre-establish the correspondence between the measured feedback signal and the number of second clock cycles of delay; Step 2: Determine the number of second clock cycles of delay based on the received measurement feedback signal and the corresponding relationship.

[0038] Since the expected feedback signal is known, the number of bits of delay, i.e. the number of second clock cycles of delay, can be obtained by comparing the value of the expected feedback signal with the value of the measured feedback signal. In other words, there is a definite correspondence between the value of the measured feedback signal and the number of bits of delay (i.e. the number of second clock cycles of delay). In order to improve the processing speed, the correspondence between the value of the measured feedback signal and the number of second clock cycles of delay can be stored in advance. After receiving the measured feedback signal, the number of second clock cycles can be determined directly based on the value of the measured feedback signal.

[0039] In one possible embodiment, such as Figure 2 As shown, CLK is the clock signal. The expected feedback signal can be set to 00000001. Assuming LSB timing is used for serial signal transmission, under the condition of no delay, the received signal is 10000000, the sampled measurement feedback signal is 00000001, and the number of the second clock cycles is 0. If a one-bit delay occurs, the received signal is 01000000, the sampled measurement feedback signal is 00000010, and the number of the second clock cycles is 1. And so on. If the sampled measurement feedback signal is 00000100, the number of the second clock cycles is 2. Therefore, a direct correspondence can be established between 00000010 and 1, 00000100 and 2, etc., so that the number of the second clock cycles can be directly determined based on the sampled measurement feedback signal, further improving measurement efficiency.

[0040] In another embodiment provided in this disclosure, the above step "S104, increasing the transmission delay of the transmitted signal using a third timing granularity until the received measurement feedback signal meets the preset conditions, and determining the third timing result based on the third timing granularity" can be implemented as follows: Step 1: Based on the third timing granularity, gradually increase the transmission delay of the transmission signal, and detect the received measurement feedback signal after each increase in transmission delay, until the received measurement feedback signal meets the preset conditions. Step 2: Determine the third timing result based on the transmission delay of the third timing granularity added under the premise of meeting the preset conditions.

[0041] In this embodiment of the disclosure, although the timing accuracy has been reduced to one bit clock cycle by setting two levels of timing granularity, when sampling the corresponding bit during the second clock cycle, the data signal (e.g., a pulse-type data signal) has a certain width, making it impossible to determine the location of the sampling point in the data signal: near the rising edge, the middle position, or near the falling edge. Furthermore, if the sampling point is at the rising or falling edge of the data signal, it may lead to instability in the sampling signal. Therefore, a more precise third timing granularity can be set to focus on the delayed bit and measure the phase shift between the data signal of that bit and the corresponding second clock signal, thereby determining a more precise delay time (which can be accurate to the picosecond / ps level).

[0042] Since the measurement signal can be transmitted continuously multiple times, a third timing granularity can be used as the timing unit. The number of timing units at the third timing granularity can be gradually increased during the transmission of multiple measurement signals. The received measurement feedback signal after each increase in transmission delay is then detected until the received measurement feedback signal meets a preset condition (e.g., meets a preset value). The transmission delay corresponding to the increased number of timing units at the third timing granularity at this point can then be determined as the third timing result. Here, the determination of the third timing granularity can be set according to the test requirements and the processing capacity of the test equipment.

[0043] In another embodiment provided in this disclosure, in step one above, the received measurement feedback signal meets preset conditions, which can be implemented as follows: The received measurement feedback signal meets the expected delayed feedback signal; Therefore, the above step "S105, determine the transmission channel delay based on the first timing result, the second timing result, and the third timing result" can be implemented as follows: The delay of the transmission channel is determined using one of the following formulas. : ; ; ; in, Characterizes the first clock cycle; Characterizes the counting result for the first clock cycle; Characterizes the second clock cycle; The number of second clock cycles representing the delay; Characterizes the third timing granularity; The number of timing units representing the addition of a third timing granularity; Characterizes the width of the first sub-signal.

[0044] In this embodiment of the disclosure, as the transmission delay is continuously increased with the third timing granularity as the timing unit, and the received measurement feedback signal is continuously measured, the signal value of the received measurement feedback signal will jump as the preset first sub-signal is continuously shifted backward. The target signal of the jump is predictable, i.e., the expected delayed feedback signal. The correspondence between the time of the jump (usually the detection trigger time of a certain clock signal) and the expected delayed feedback signal is also predictable. At the time of the jump, the timing of the third timing granularity can be determined. Based on the clock signal corresponding to the jump time and the timing result of the third timing granularity, the phase shift between the first sub-signal and the corresponding second clock signal is determined.

[0045] The following example illustrates this. (Continued) Figure 2 For example, to simplify the description, assume the measurement signal is 00000001. After the measurement signal is sent to the receiving end, the receiving end directly returns the original signal. Therefore, the expected feedback signal is also 00000001. Figures 3a-3c This is a schematic diagram illustrating the process of receiving a measurement feedback signal and gradually increasing the delay of the third timing granularity until the transmission channel delay is determined, as provided in this embodiment of the disclosure. In this example, LSB timing is used for serial signal transmission. One byte of data is detected at the arrival of each first clock cycle. Each first clock cycle may include eight second clock cycles. At the arrival of each second clock cycle (rising edge), each bit of data in one byte is detected.

[0046] like Figure 3a As shown, CLK represents the second clock signal. In this example, it is assumed that signal detection is performed on the rising edge of the clock. Characterizing the first clock cycle (shown in the figure) (for the first clock cycle of the target). D1 represents the second clock cycle, and D1 represents the measurement feedback signal received in the first clock cycle of the target. Assuming a 1-bit delay occurs in the transmission channel, the signal received in the first clock cycle of the target is 01000000 (the measurement feedback signal after timing and bit sequence recovery using LSB is 00000010). For ease of comparison, D0 represents the expected feedback signal that should be received, 10000000 (the expected feedback signal after bit sequence recovery using LSB is 00000001). The delay time of the transmission channel can be determined by the position of the rising edge of the pulse corresponding to the first bit (bit "1" in this example) in the first clock cycle of the target from the time the measurement signal is sent to the time the measurement feedback signal is received. Based on D1, the first and second timing results can be determined: The first timing result is determined by the timing of the n first clock cycles preceding the first clock cycle of the received measurement feedback signal, starting from the moment the measurement signal is sent. Furthermore, by comparing the first sub-signals 01000000 contained in the target first clock cycle of the received measurement feedback signal with the second sub-signals 10000000 contained in the expected feedback signal according to the timing sequence, and determining that the number m of the delayed second clock cycles is 1, then the second timing result m× can be determined. .

[0047] Furthermore, the transmission delay of the transmitted signal is gradually increased based on the third timing granularity until the received measurement feedback signal meets the expected delayed feedback signal. In this example, due to the delay of the communication channel, the normally received measurement feedback signal is 01000000. During the process of increasing the third timing granularity, the measurement feedback signal will gradually shift backward until the target's second clock cycle detects the first sub-signal "1". The target's second clock cycle is the next second clock cycle after the second clock cycle in which the first sub-signal "1" is detected without increasing the third timing granularity. That is, at this time, the measurement feedback signal detected by the target in the first clock cycle is 00100000 (if using LSB timing, the measurement feedback signal after bit sequence recovery is 00000100). Since this result is predictable, 00100000 (the measurement feedback signal after bit sequence recovery using LSB timing is 00000100) can be set in advance as the expected delayed feedback signal. When the detected measurement feedback signal is the expected delayed feedback signal, the timing of increasing the third timing granularity can be stopped. Figure 3a As shown in D2, assuming the first sub-signal "1" has just shifted back to be detected by the target in the second clock cycle, k third timing granularities have been added. If the time unit is k, then the third time result is k× .

[0048] The delay of the transmission channel can be obtained from this. It can be determined by the following formula: . The signal width of the first sub-signal in the measurement feedback signal is characterized. It should be noted that since the third timing granularity is typically at the picosecond level, if the signal width is less than a preset threshold, it can be ignored. It can be determined by the following formula: .

[0049] Figure 3aWhen measuring the timing unit of the third timing granularity, the timing measurement can be based on the start of the first sub-signal (i.e., the rising edge), or it can be based on the end of the first sub-signal (i.e., the falling edge). The resulting third timing result is k× It is possible Figure 3b As shown. The phase difference between the first sub-signal "1" and the second clock cycle in which the first sub-signal "1" is detected is denoted as... ,but ,but It can be determined by the following formula: .

[0050] Furthermore, when adding transmission delay to the transmission signal based on the third timing granularity, the transmission signal can be a measurement signal, i.e., the transmission delay is gradually increased when sending measurement signals multiple times, or it can be a measurement feedback signal, i.e., the reception delay is gradually increased when receiving measurement feedback signals multiple times. It can be set according to actual needs during implementation, and there are no restrictions here.

[0051] In another embodiment provided in this disclosure, in step one above, the received measurement feedback signal meets preset conditions, which can be implemented as follows: The preset first sub-signal of the received measurement feedback signal undergoes an expected jump; Therefore, the above step "S105, determine the transmission channel delay based on the first timing result, the second timing result, and the third timing result" can be implemented as follows: The delay of the transmission channel is determined using the following formula. : ; in, Characterizes the first clock cycle; Characterizes the counting result for the first clock cycle; Characterizes the second clock cycle; The number of second clock cycles that characterizes the delay of the measured feedback signal compared to the expected feedback signal; Characterizes the third timing granularity; The number of timing units representing the addition of a third timing granularity.

[0052] In this embodiment of the disclosure, since the first sub-signal in the measurement feedback signal has a certain width, the position of the detected first sub-signal in the corresponding second clock cycle cannot be known. Taking the detected position as close to the middle as an example, as the third timing granularity increases, the received preset first sub-signal will gradually shift to the right until the second clock cycle that could previously detect the preset first sub-signal can no longer detect it, that is, the moment when the preset first sub-signal jumps (e.g., from 1 to 0). At this time, it can be considered that the timing result of the third timing granularity can characterize the phase shift of the preset first sub-signal relative to the corresponding second clock cycle, and the further increase of the third timing granularity can be stopped. The third timing result can be determined according to the number of timing units of the currently increased third timing granularity. Figure 3c As shown, .and Figure 3a and Figure 3b Compared to the corresponding delay determination method, Figure 3c The provided delay determination method does not rely on changes in the received measurement feedback signal value, but rather detects bit transitions, making the setting of the measurement feedback signal value more flexible. The selection of the preset first sub-signal can be based on actual conditions, such as a bit that is easier to detect and judge, like 1.

[0053] Figure 4 This is a schematic diagram of the channel delay calculation mechanism provided in an embodiment of this disclosure. Figure 4 As shown, timing begins from the transmission of the measurement signal Tx and continues for the first clock cycle until the target first clock cycle of the measurement feedback signal Rx is detected. The preceding n first clock cycles are then determined as the first timing result. Focusing on the target first clock cycle, based on the comparison between the measurement feedback signal and the expected feedback signal, it is determined that the measurement feedback signal is delayed by m second clock cycles, thus determining the second timing result. Next, focusing on the second clock cycle in which the preset first sub-signal is detected, the third timing result is determined by progressively increasing the transmission delay of the third timing granularity.

[0054] When adding transmission delay to the transmission signal based on the third timing granularity, the transmission signal can be a measurement signal, i.e., the transmission delay is gradually increased when sending measurement signals multiple times, or it can be a measurement feedback signal, i.e., the reception delay is gradually increased when receiving measurement feedback signals multiple times. The setting can be made according to actual needs during implementation.

[0055] In this embodiment, channel delay determination can be achieved using existing chips. Taking a Field-Programmable Gate Array (FPGA) as an example, the FPGA internally provides output delay (odelay) and input delay (idelay) control. For instance, when adding a third timing granularity to the transmission delay of the measurement signal, odelay can be used; when adding a third timing granularity to the reception delay of the measurement feedback signal, idelay can be used. The basic step unit (tap, each tap providing a fixed delay) in the delay chain is used as the third timing granularity. The number of taps and the delay time of each tap can be set. Each tap can be set to 5ps precision. The first clock cycle is a timing clock (e.g., 400MHz, 2.5ns cycle), then the second clock cycle is 2.5ns / 8 = 312.5ps. Therefore, the channel delay determination method provided in this embodiment can be accurate to ps, without requiring additional TDC chips and their peripheral circuitry. It is simple to design, cost-effective, and provides more accurate channel measurements.

[0056] This disclosure provides a delay calibration system, such as Figure 5a As shown, it includes: a processing unit 501, at least one core control module 502, at least one signal driving unit 503, and an external test device 504; each core control module 502 is connected to the corresponding signal driving unit 503 through at least one transmission channel; The processing unit 501 is used to configure the core control module 502 and the signal driving unit 503, and to send a synchronous trigger signal to the core control module 502. The core control module 502 is used to send a measurement signal to the corresponding signal driving unit 503 through the transmission channel under the triggering of the synchronous trigger signal, so that the measurement signal is sent to the external test equipment 504 through the signal driving unit 503; and to receive the measurement feedback signal fed back by the external test equipment 504 through the signal driving unit 503; during the transmission of the measurement signal and the reception of the measurement feedback signal, the channel delay of the transmission channel is determined by the channel delay determination method as described in any of the above embodiments, and transmitted to the processing unit 501; The processing unit 501 is also used to calibrate the corresponding transmission channel based on the channel delay of the transmission channel.

[0057] The delay calibration system provided in this disclosure can be applied to chip testing equipment, such as Automatic Test Equipment (ATE). The chip testing equipment may include at least a processing unit 501, at least one core control module 502, and at least one signal driving unit 503. Before testing a chip, it is necessary to ensure that the testing error of the semiconductor testing equipment is within a controllable range. When the semiconductor testing equipment sends test signals to the chip, it inevitably passes through transmission channels, including transmission channels between internal modules of the testing equipment. To ensure the accuracy of testing the chip under test, the delay of the internal transmission channels of the testing equipment needs to be calibrated. Therefore, in this disclosure, the communication delay of the transmission channels between the core control module and the signal driving unit can be determined, and these transmission channels can be calibrated when using the chip testing equipment to test the chip under test to ensure the accuracy of the chip test.

[0058] In this embodiment of the disclosure, the processing unit 501 can configure the core control module 502 and the signal driving unit 503 (e.g., enable the transmitting channel, the receiving channel, and bind the transmitting channel and the receiving channel, etc.), and send a synchronization trigger signal to the core control module 502 to control the synchronization of each unit inside the core control module 502 and multiple core control modules 502.

[0059] The core control module 502 serves as the control core for delay calibration. It can coordinate multiple units within itself to work together, transmitting the measurement signal through a transmission channel to the corresponding connected signal drive unit 503. (In the case of multiple core control modules 502, each core control module 502 can be connected to its corresponding signal drive unit 503 through at least one communication channel.) The signal drive unit 503 translates the digital logic of the measurement signal generated by the corresponding core control module 502 into control signals that can be executed by hardware, and performs electrical adaptation processing on the signal (e.g., adjusting voltage amplitude, drive capability, and matching the level standard of external devices). Finally, it sends the measurement signal to the external test equipment through a physical input / output (I / O) interface. The external test equipment generates a measurement feedback signal based on the measurement signal using a pre-designed method and feeds it back to the corresponding core control module 503 through the signal drive unit 503. During the transmission of measurement signals and the reception of measurement feedback signals, the core control module 502 may use any of the above-mentioned channel delay determination methods to determine the delay of each connected transmission channel. Finally, the processing unit 501 calibrates each transmission channel according to the delay of each transmission channel determined by the core control module 502.

[0060] In yet another embodiment provided in this disclosure, such as Figure 5bAs shown, the core control module 502 includes: a synchronization control unit 5021, an information interaction unit 5022, an algorithm processing unit 5023, a delay control unit 5024, and a transceiver control unit 5025; The synchronization control unit 5021 is used to receive the synchronization trigger signal sent by the processing unit 501 and send the synchronization trigger signal to the transceiver control unit 5025; The information interaction unit 5022 is used to transmit the first interaction data between the processing unit 501 and the core control module 502, and the second interaction data between the algorithm processing unit 5023 and the delay control unit 5024; the first interaction data includes: measurement signals and channel delay data of the transmission channel; the second interaction data includes: transmission delay timing data at the third timing granularity and transmission delay timing end flag status data at the third timing granularity. The algorithm processing unit 5023 is used to determine the channel delay of the transmission channel using the channel delay determination method described in any of the above embodiments during the transmission of the measurement signal and the reception of the measurement feedback signal, and transmit it to the processing unit 501. The delay control unit 5024 is used to provide a transmission delay with a third timing granularity during the process of the algorithm processing unit 5023 determining the channel delay of the transmission channel; The transceiver control unit 5025 is used to send the measurement signal to the corresponding signal drive unit 503 in response to the synchronization trigger signal; receive the measurement feedback signal sent by the corresponding signal drive unit 503 from the external test device 504; and transmit the received measurement feedback signal to the algorithm processing unit 5023.

[0061] In this embodiment, the core control module 502 can be electrically connected to the processing unit 501 via a synchronization control unit 5021. The core control module 502 receives the synchronization trigger signal sent by the processing unit 501 and sends the synchronization trigger signal to the transceiver control unit 5025, which then sends it to the signal drive unit 503. Since the measurement process may involve the transmission and reception between multiple core control modules 502, strict synchronization control is required within the core control module 502 and between core control modules 502 that need to cooperate. This means ensuring that the input clock excitation signals of the processing unit 501 and each core control module 502 are generated from the same source clock. In one possible implementation, a single input clock chip can be used to configure the processing unit 501 and each core control module 502 as having the same source clock, maintaining a fixed phase, thereby ensuring the synchronization of each core control module 502 when acquiring the SYNC signal, thus achieving synchronization.

[0062] Furthermore, the transceiver control module 5025 can be electrically connected to the corresponding signal driving unit 503, receive the measurement feedback signal fed back by the corresponding signal driving unit 503, and transmit the measurement feedback signal to the algorithm processing unit 5023. The algorithm processing unit 5023 can determine the transmission of the measurement signal according to the synchronization clock signal, and during the transmission of the measurement signal and the reception of the measurement feedback signal, it uses the channel delay determination method described in any of the above embodiments to determine the channel delay of at least one transmission channel corresponding to the core control module 502. Here, the measurement signal and the measurement feedback signal can be transmitted and received through the same core control module 502, or they can be transmitted through one core control module 502 and received through another core control module 502.

[0063] Furthermore, the core control module 502 is also provided with a delay control module 5024. In the process of determining the channel delay of the transmission channel through the channel delay determination method, the timing period of the first timing granularity (e.g., the first clock cycle) and the timing period of the second timing granularity (e.g., the second clock cycle) can be provided by the same source clock, and the transmission delay based on the third timing granularity can be provided by the delay control module 5024.

[0064] Furthermore, the information interaction unit 5022 is used to realize data interaction between the processing unit 501 and the core control module 502, and between the algorithm processing unit 5023 and the delay control unit 5024. For the first interaction data between the processing unit 501 and the core control module 502, the information interaction unit 5022 can obtain measurement signals from the processing unit 501 and send them to the core control module 502, and transmit the channel delay data of the transmission channel determined by the core control module 502 to the processing unit 501. For the second interaction data between the algorithm processing unit 5023 and the delay control unit 5024, the information interaction unit 5022 can obtain transmission delay timing data at the third timing granularity and transmission delay timing end flag status data at the third timing granularity from the delay control unit 5024 and transmit them to the algorithm processing unit 5023, so that the algorithm processing unit 5023 can calculate the delay time of each transmission channel.

[0065] It should be noted that the core control module 502 may include multiple units. These multiple units of the core control module 502 may be integrated into the same control chip. This disclosure does not discuss the transmission channel delay between the units within the control chip.

[0066] In yet another embodiment provided in this disclosure, such as Figure 5bAs shown, the transceiver control unit 5025 is also used to configure the delay control unit 5024, and / or to perform parallel-to-serial conversion on the measurement signal in parallel data form sent by the processing unit 501, and provide it to the signal driving unit 503 for transmission; and to perform serial-to-parallel conversion on the received measurement feedback signal in serial data form for processing by the algorithm processing unit 5023.

[0067] In this embodiment, the transceiver control unit 5025 can also be used to perform parallel-to-serial conversion of measurement signals and serial-to-parallel conversion of measurement feedback signals. When transmitting measurement data, parallel-to-serial conversion is performed to transmit serial data. This conversion involves increasing the frequency of the 8 / 1 bus during measurement data transmission; for example, if the 8-bit parallel clock frequency is 400MHz, the single-bit serial clock frequency is 3200MHz. When receiving measurement feedback data, serial-to-parallel conversion is performed for subsequent comparison and other operations. This conversion involves converting the 8 single-bit serial clock frequencies of 3200MHz received into a single parallel clock frequency of 400MHz and 8-bit data. Although the aforementioned example uses a digital signal channel for measurement, the high frequency of the signal corresponds to a high-frequency alternating current (AC) signal. Therefore, the calibration in this embodiment can be considered as calibration of an AC signal, and can also support calibration of AC signals.

[0068] Furthermore, the information interaction unit 5022 can also configure the delay control unit 5024, for example, by setting delay-related settings. Assuming signal transmission is implemented through the programmable input / output interface of the FPGA, the delay values ​​and flags of idelay and / or odelay can be set. In one possible implementation, the processing unit 501 can provide the information interaction unit 5022 with configuration data for configuring the delay control unit 5024.

[0069] In one possible implementation, the core control module 502 can be implemented using a pre-defined chip (e.g., an FPGA), and the signal driving unit 503 (IO Driver control) can be implemented using pin electronics (PE). The system mainly includes: a processing unit 501, a synchronization control unit 5021, an information interaction unit 5022, an algorithm processing unit 5023, a delay control unit 5024, a transceiver control unit 5025, an IO Driver control unit (i.e., the signal driving unit 503), and a loopback board (i.e., an external test device 504). Processing unit 501 is mainly used to configure data in the FPGA register and obtain the final calibration time data of each transmission channel, and to send a synchronization trigger signal to synchronization control unit 5021; synchronization control unit 5021 is used to send a start signal to signal driving unit 503; information interaction unit 5022 is used to configure the delay control unit 5024 for delay, and to perform data interaction between delay control unit 5024 and algorithm processing unit 5023; algorithm processing unit 5023 is used for algorithm processing of calibration time for each transmission channel; delay control unit 5024 is used for precise time control of transmit and receive control; transmit and receive control unit 5025 is used for data interaction with signal driving unit 503; signal driving unit 503 is used for driving the processing of transmit and receive waveforms; loopback board is used for switching and adapting calibration channels.

[0070] In another embodiment provided in this disclosure, the processing unit 501 is configured to configure a first preset transmission channel in the transmission channel to be measured as a first receiving channel; configure other transmission channels other than the first preset transmission channel as first transmitting channels; the first receiving channel and the first transmitting channel correspond to the same core control module 502 or different core control modules 502; and send a synchronization trigger signal to the core control module 502 corresponding to the first receiving channel and the first transmitting channel. The system is connected to a core control module 502 for transmitting measurement signals through the corresponding first transmission channel when triggered by a synchronous trigger signal. The core control module 502, connected to the first receiving channel, is used to sequentially receive measurement feedback signals corresponding to measurement signals transmitted by multiple first transmitting channels through the first receiving channel; determine the first channel delay corresponding to each of the multiple first transmitting channels using the channel delay determination method described in any of the above embodiments; and transmit the first channel delay to the processing unit 501. The processing unit 501 is used to determine the first channel delay corresponding to the first transmission channel other than the target first transmission channel among a plurality of first transmission channels, and the first relative delay relative to the first channel delay corresponding to the target first transmission channel; and to calibrate the plurality of other first transmission channels based on the first relative delay.

[0071] In this embodiment, the transmission channel can serve as both a sending channel and a receiving channel. This embodiment can measure the channel delay of multiple sending channels connected to at least one core control module 502. In practice, the processing unit 501 can configure at least one first preset transmission channel as a receiving channel (i.e., the first receiving channel), and the remaining transmission channels as sending channels (i.e., the first sending channels). A synchronization signal triggers multiple first sending channels to sequentially send measurement signals to the first receiving channel. This is equivalent to fixing the receiving channel (i.e., the first receiving channel) and having multiple sending channels (i.e., the first sending channels) send measurement signals to the fixed receiving channel. After receiving the measurement feedback signals from each first sending channel, the core control module 502, connected to the first receiving channel, uses the channel delay determination method described in any of the above embodiments to determine the first channel delay corresponding to each of the multiple first sending channels. This embodiment of the disclosure can perform delay measurement on multiple transmission channels connected to the same core control module 502. Specifically, it sets a first receiving channel and a first transmitting channel for each transmission channel connected to the same core control module 502. Alternatively, it can perform delay measurement on multiple transmission channels connected to different core control modules 502. Specifically, it sets a first preset transmission channel connected to a preset core control module 502 as the first receiving channel, and sets the remaining transmission channels of the preset core control module 502, as well as transmission channels connected to other core control modules 502, as the first transmitting channels. For a core control module 502 that is only connected to the first receiving channel but not the first transmitting channel, the timing of the first transmitting channel sending the measurement signal can be obtained through a synchronization signal, thereby determining the channel delay for the corresponding first transmitting channel based on the received measurement feedback signal.

[0072] Further, the processing unit 501 can determine the target first transmission channel from multiple first transmission channels, thereby determining the first relative delay between the channel delay of the remaining first transmission channels and the channel delay of the target first transmission channel, and calibrating the multiple remaining first transmission channels based on the first relative delay. In implementation, the first relative delay can be determined by the relative phase between the remaining first transmission channels and the target first transmission channel. Although the channel delay determined by the core control module 502 according to the channel delay method provided in the above embodiment includes the cumulative delay of the transmission channel and the receiving channel, the processing unit 501 can remove the delay effect of the receiving channel (because the receiving channel is fixed) by determining the target first transmission channel and determining the first relative delay between the channel delay of the remaining first transmission channels and the target first transmission channel, thus obtaining the relative delay of the transmission channel.

[0073] Assuming the FPGA's corresponding transmission channels include: IO0TX, IO0RX, IO1TX, IO1RX, IO2TX, IO2RX, IO3TX, and IO3RX, during the testing of the transmitting channels, IO3RX can be initially fixed as the receiving channel (i.e., the first receiving channel). Each transmitting channel (IO0TX, IO1TX, and IO2TX, i.e., the first transmitting channel) synchronously transmits measurement signals, and the corresponding measurement feedback signals are fed back to IO3RX. Then, IO3RX can determine the channel delay measurement value T for transmission via IO0TX and reception via IO3RX. TX0 The channel delay measured via IO1TX for sending and IO3RX for receiving is T. TX1 The channel delay measurement value via IO2TX for sending and IO3RX for receiving is T. TX2 Therefore, we know that: T TX0 = t TX0 + t L + t RX3 T TX1 = t TX1 + t L + t RX3 T TX2 = t TX2 + t L + t RX3 , with T TX0 For example, t TX0 The transmission time t represents the transmission time from the FPGA to the signal driving unit. L The transmission time t represents the time it takes for the signal driven unit to transmit signals to the external test equipment and for the external equipment to feed back signals to the signal driven unit. RX3 The transmission time from the signal driving unit to IO3RX is characterized. It can be seen that for different transmission channels, by setting a target first transmission channel (e.g., IO0TX), the difference between the channel delay measurement value corresponding to each first transmission channel and the delay measurement value of the target first transmission channel (e.g., T) is determined. TX1 -T TX0 This allows us to determine the TX relative phase (i.e., the first relative delay) between each first transmission channel and the target first transmission channel, so that the first transmission channel can be calibrated subsequently.

[0074] In another embodiment provided in this disclosure, the processing unit 501 is further configured to configure the first preset transmission channel as the second transmission channel, configure a designated transmission channel in the first transmission channel as the second receiving channel, and send synchronization trigger signals to at least the core control modules 502 corresponding to the second transmission channel, the second receiving channel, and the preset first transmission channel in the first transmission channel. The core control module 502, which is connected to the second transmission channel, is used to send measurement signals through the second transmission channel when triggered by the synchronous trigger signal. The core control module 502, which is connected to a preset first transmission channel, is used to transmit measurement signals through the preset first transmission channel when triggered by a synchronous trigger signal. The core control module 502, connected to the second receiving channel, is used to sequentially receive measurement feedback signals corresponding to measurement signals transmitted by the second transmitting channel and the preset first transmitting channel through the second receiving channel; determine the second channel delay corresponding to the second transmitting channel and the preset first transmitting channel respectively using the channel delay determination method described in any of the above embodiments; and transmit the second channel delay to the processing unit 501. The processing unit 501 is further configured to determine a second relative delay of the second channel delay corresponding to the second transmission channel relative to the second channel delay corresponding to the preset first transmission channel; determine the relative delay of the second transmission channel relative to the target first transmission channel based on the second relative delay and the first relative delay of the preset first transmission channel relative to the target first transmission channel; and calibrate the second transmission channel based on the relative delay.

[0075] In the previous embodiment, the first preset transmission channel serves as the first receiving channel to receive the measurement feedback signals corresponding to each first transmitting channel. If the first preset transmission channel also has a transmitting channel, the transmitting channel of the first preset transmission channel can be further measured for delay. In practice, the first preset transmission channel can be set as the second transmitting channel, and the receiving channel can be re-fixed. That is, one receiving transmission channel from among the multiple first transmitting channels can be designated as the receiving channel for this instance (i.e., the second receiving channel). To facilitate determining the relative delay between the second transmitting channel and the target first transmitting channel, a preset first transmitting channel can be determined from among the multiple first transmitting channels, and the measurement signal for this instance can be transmitted synchronously with the second transmitting channel. Thus, based on the relative delays between the preset first transmitting channel and the second transmitting channel and the target first transmitting channel, respectively, the relative delay between the second transmitting channel and the target first transmitting channel can be determined.

[0076] Continuing the previous example, we can fix IO1 RX as the receiving channel (i.e., the second receiving channel), and IO2 TX (i.e., the preset first transmitting channel) and IO3 TX (i.e., the second transmitting channel) transmit measurement signals respectively. We can calculate the relative phase of TX between IO3 and IO2, and thus obtain the relative phase of TX between IO3 and IO0 based on the relative phase of TX between IO2 and IO0.

[0077] In another embodiment provided in this disclosure, the processing unit 501 is configured to configure the second preset transmission channel in the transmission channel to be measured as the third transmission channel; configure other transmission channels other than the second preset transmission channel as the third receiving channel; the third receiving channel and the third transmission channel correspond to the same core control module 502 or different core control modules 502; and send a synchronization trigger signal to the core control module 502 corresponding to the third receiving channel and the third transmission channel. The core control module 502, which is connected to a third transmission channel, is used to sequentially transmit measurement signals through the third transmission channel under the triggering of a synchronous trigger signal. The core control module 502, which is connected to the third receiving channel, is used to receive the measurement feedback signal corresponding to the measurement signal sent by the third transmitting channel through the corresponding third receiving channel; determine the third channel delay corresponding to the third receiving channel using the channel delay determination method described in any of the above embodiments; and transmit the third channel delay to the processing unit 501. The processing unit 501 is used to determine the third channel delay corresponding to the other third receiving channels besides the target third receiving channel among a plurality of third receiving channels, and the third relative delay relative to the third channel delay corresponding to the target third receiving channel; and to calibrate the plurality of other third receiving channels based on the third relative delay.

[0078] In this embodiment, the channel delay is measured when the transmission channel is used as a receiving channel. In practice, at least one second preset transmission channel can be configured as a transmitting channel (i.e., a third transmitting channel) by the processing unit 501, and the remaining transmission channels can be used as receiving channels (i.e., third receiving channels). A synchronization signal triggers the third transmitting channel to sequentially send measurement signals to the multiple third receiving channels. After receiving the measurement feedback signal from the third receiving channel, the core control module 502, connected to the third receiving channel, uses the channel delay determination method described in any of the above embodiments to determine the third channel delay corresponding to each third receiving channel. This is equivalent to fixing the transmitting channel (i.e., the third transmitting channel), and having multiple receiving channels (i.e., the third receiving channels) all receive the measurement signals sent by the fixed transmitting channel. This embodiment of the disclosure can perform delay measurement on multiple transmission channels connected to the same core control module 502, that is, set a third receiving channel and a third transmitting channel for multiple transmission channels connected to the same core control module 502. It can also perform delay measurement on multiple transmission channels connected to different core control modules 502, that is, set a second preset transmission channel connected to a preset core control module 502 as the third transmitting channel, and set the remaining transmission channels of the preset core control module 502, as well as the transmission channels connected to other core control modules 502, as the third receiving channel. For a core control module 502 that is only connected to the third receiving channel but not the third transmitting channel, the timing of the third transmitting channel sending the measurement signal can be obtained through a synchronization signal, thereby determining the channel delay for the corresponding third receiving channel based on the received measurement feedback signal.

[0079] Further, the processing unit 501 can determine the target third receiving channel from multiple third receiving channels, thereby determining the third relative delay between the channel delay of the remaining third receiving channels and the channel delay of the target third receiving channel, and calibrating the multiple remaining third receiving channels based on the third relative delay. In practice, the third relative delay can be determined by the relative phase between the remaining third receiving channels and the target third receiving channel. Although the channel delay determined by the core control module 502 according to the channel delay method provided in the above embodiment includes the cumulative delay of the transmitting channel and the receiving channel, the processing unit 501 can remove the delay effect of the transmitting channel (because the transmitting channel is fixed) by determining the target third receiving channel and determining the third relative delay between the channel delay of the remaining third receiving channels and the target third receiving channel, thus obtaining the relative delay of the receiving channel.

[0080] Continuing with the previous example, during the testing of the receiving channel, we can first fix IO3TX as the transmitting channel (i.e., the third transmitting channel) and send measurement signals to each receiving channel. The corresponding measurement feedback signals are fed back to each receiving channel IO0RX, IO1RX, and IO2RX (i.e., the third receiving channel), respectively. Then, we can determine the channel delay measurement value T through IO3TX transmitting and IO0RX receiving. RX0 The channel delay measured via IO3TX for sending and IO1RX for receiving is T. RX1 The channel delay measured via IO3TX for sending and IO2RX for receiving is T. RX2 Therefore, we know that: T RX0 = t RX0 + t L + t TX3 T RX1 = t RX1 + t L + t TX3 T RX2 = t RX2 + t L + t TX3 , with T RX0 For example, t TX3 The transmission time t represents the transmission time from the FPGA to the signal driving unit. L The transmission time t represents the time it takes for the signal driven unit to transmit signals to the external test equipment and for the external equipment to feed back signals to the signal driven unit. RX0 The transmission time from the signal driving unit to IO0RX is characterized. It can be seen that for different receiving channels, by setting the target third receiving channel (e.g., IO0RX), the difference between the channel delay measurement value corresponding to each third receiving channel and the delay measurement value of the target third receiving channel (e.g., T) is determined. RX1 - T RX0 This allows us to determine the relative RX phase (i.e., the third relative delay) between each third receiving channel and the target third receiving channel, so that the third receiving channel can be calibrated subsequently.

[0081] In another embodiment provided in this disclosure, the processing unit 501 is further configured to configure the second preset transmission channel as the fourth receiving channel, configure the designated transmission channel in the third receiving channel as the fourth sending channel, and send synchronization trigger signals to at least the core control modules 502 corresponding to the fourth receiving channel, the fourth sending channel, and the preset third receiving channel in the third receiving channel respectively. The core control module 502, which is connected to the fourth transmission channel, is used to transmit measurement signals through the fourth transmission channel when triggered by the synchronous trigger signal. The core control module 502, which is connected to the fourth receiving channel, is used to receive the measurement feedback signal corresponding to the measurement signal sent by the fourth transmitting channel through the fourth receiving channel; and to determine the fourth channel delay corresponding to the fourth receiving channel using the channel delay determination method described in any of the above embodiments, and transmit it to the processing unit 501. The core control module 502, which is connected to a preset third receiving channel, is used to receive the measurement feedback signal corresponding to the measurement signal sent by the fourth transmitting channel through the preset third receiving channel; and to determine the fourth channel delay corresponding to the preset third receiving channel using the channel delay determination method described in any of the above embodiments, and transmit it to the processing unit 501. The processing unit 501 is further configured to determine a fourth relative delay of the fourth channel delay corresponding to the fourth receiving channel relative to the fourth channel delay corresponding to the preset third receiving channel; determine the relative delay of the fourth receiving channel relative to the target third receiving channel based on the fourth relative delay and the third relative delay of the preset third receiving channel relative to the target third receiving channel; and calibrate the fourth receiving channel based on the relative delay.

[0082] In the previous embodiment, the second preset transmission channel serves as the third transmitting channel to send corresponding measurement signals to each of the third receiving channels. If the second preset transmission channel also has a receiving channel, delay measurement can be performed on the receiving channel of the second preset transmission channel. In practice, the second preset transmission channel can be set as the fourth receiving channel, and the transmitting channel can be re-fixed. That is, one transmission channel capable of transmitting can be designated from among the multiple third receiving channels as the transmitting channel for this instance (i.e., the fourth transmitting channel). To facilitate determining the relative delay between the fourth receiving channel and the target third receiving channel, a preset third receiving channel can be determined from among the multiple third receiving channels. This preset third receiving channel receives the measurement feedback signal synchronously with the fourth receiving channel. Therefore, based on the relative delays between the preset third receiving channel and the fourth receiving channel and the target third receiving channel, the relative delay between the fourth receiving channel and the target third receiving channel can be determined.

[0083] Continuing with the previous example, we can fix IO1 TX as the transmitting channel (i.e., the fourth transmitting channel) to send the measurement signal, and IO2 RX (i.e., the preset third receiving channel) and IO3 RX (i.e., the fourth receiving channel) to receive the measurement feedback signal respectively. We can calculate the relative phase of RX between IO3 and IO2, and thus obtain the relative phase of RX between IO3 and IO0 based on the relative phase of RX between IO2 and IO0.

[0084] In one possible implementation, the AC calibration algorithm processing flow in the FPGA is as follows: Figures 6a-6bAs shown, first configure the transmit and receive channels (e.g., some IO channels are configured to both receive and transmit, while some ch channels are configured to transmit only). Then configure the delay control unit to fine-tune the timing (e.g., the delay can be controlled by adjusting the delay control within the FPGA to achieve a 5ps accuracy, i.e., the configuration of the third timing granularity). Next, configure the parallel-to-serial conversion transmission sequence (e.g., the 00000001 sequence in the previous example), and then perform SYNC synchronization triggering. It should be noted that for each IO delay measurement (adding a third timing granularity delay), a baseline value needs to be determined first. Record the stabilized rx_stim as the baseline value. If the requirements are met, continue configuring the delay control unit to fine-tune the timing step by step, and then trigger SYNC synchronization. That is, each time the delay time of the third timing granularity is increased, the measurement signal is transmitted and the measurement feedback signal is received according to the currently configured delay time of the third timing granularity through SYNC synchronization triggering.

[0085] For the situation where "the received measurement feedback signal meets the preset conditions, implemented as: the received measurement feedback signal meets the expected delayed feedback signal;", such as Figure 6a As shown, this can be implemented as follows: determine if the received sequence rx_stim == base <<< 1 (i.e., shift left by 1 bit, according to...) Figure 3a and Figure 3b For example, check whether the received measurement feedback signal changes from 00000010 to 00000100. If it does, record the data. For the situation where "the received measurement feedback signal meets the preset conditions, implemented as follows: the preset first sub-signal of the received measurement feedback signal undergoes a expected transition;", such as Figure 6b As shown, this can be implemented as follows: determine if the baseline value stably jumps from 1 to 0 (according to...). Figure 3c In the example, the received measurement feedback signal is preset to change from 1 to 0. If the condition is met, the data is recorded.

[0086] Table 1 compares the relative phase difference of multiple transmission channels before and after calibration. The units for values ​​in Table 1 are picoseconds (ps). As shown in Table 1, the calculated values ​​are the measured values ​​of the delay of each transmission channel before calibration (i.e., the values ​​determined by the channel delay algorithm provided in this embodiment). The measured values ​​are the comparison results (i.e., phase difference) between the measured values ​​of each transmission channel and the target transmission channel obtained by a high-speed oscilloscope. The measured values ​​after compensation are the relative delay values ​​between each transmission channel and the target transmission channel obtained by compensating with the AC calibration calculation values ​​provided in this disclosure and then testing them with an oscilloscope. Table 1 shows that the relative phase difference before calibration is significant, while the relative phase difference after calibration is 25.26 ps.

[0087] Table 1

[0088] Figures 7a-7b This is a schematic diagram showing the relative phase of each channel before and after delay calibration. (Example:) Figure 7a As shown, the yellow, green, blue, and red curves represent the relative phases of IO0, IO4, IO5, and IO6 before calibration, respectively. Figure 7b As shown, the yellow, green, blue, and red curves represent the relative phases after calibration for IO0, IO4, IO5, and IO6, respectively.

[0089] The delay determination method and channel calibration method provided in the embodiments of this disclosure are as follows: 1. FPGA controls the delay, resulting in high calibration accuracy and eliminating the need for an additional TDC chip; 2. Synchronous SYNC control ensures precise I / O synchronization calibration between multiple FPGAs, and the phase difference at the trigger start point remains stable and unchanged; 3. Parallel-to-serial conversion control is adopted to transmit measurement signals. By detecting changes in bit positions, the signal transmission frequency is greatly improved. FPGA control ensures strong waveform stability. 4. Solved the problems of severe distortion of the drive waveform and inaccurate calibration of signal timing; 5. It reduces reliance on external signal generators, thus saving costs. Based on the same disclosed concept, this disclosure also provides a testing device. Since the principle of the problem solved by these devices is similar to that of the aforementioned delay calibration system, the implementation of the device can refer to the implementation of the aforementioned system, and the repeated parts will not be described again.

[0090] This disclosure provides a test device, which includes at least the processing unit, at least one core control module, and at least one signal driving unit of the delay calibration system described above.

[0091] Through the above description of the embodiments, those skilled in the art can clearly understand that the embodiments of this disclosure can be implemented in hardware or by means of software plus necessary general-purpose hardware platforms. Based on this understanding, the technical solutions of the embodiments of this disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, mobile hard drive, etc.) and includes several instructions to cause a computer device (such as a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments of this disclosure.

[0092] Those skilled in the art will understand that the accompanying drawings are merely schematic diagrams of a preferred embodiment, and the modules or processes in the drawings are not necessarily essential for implementing this disclosure.

[0093] Those skilled in the art will understand that the modules in the apparatus of the embodiments can be distributed in the apparatus of the embodiments as described in the embodiments, or they can be located in one or more devices different from this embodiment with corresponding changes. The modules of the above embodiments can be combined into one module, or they can be further divided into multiple sub-modules.

[0094] The sequence numbers of the embodiments disclosed above are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0095] Obviously, those skilled in the art can make various modifications and variations to this disclosure without departing from its spirit and scope. Therefore, if such modifications and variations fall within the scope of the claims of this disclosure and their equivalents, this disclosure is also intended to include such modifications and variations.

Claims

1. A method for determining channel delay, characterized in that, include: In response to the transmission of the measurement signal, the transmission delay of the transmission channel is started using the first timing granularity; Upon receiving a measurement feedback signal through the transmission channel, a first timing result based on a first timing granularity is determined; and Based on the difference between the measured feedback signal and the expected feedback signal, a second timing result is obtained within the timing period of the first timing granularity at which the measured feedback signal is received, based on the delay of the second timing granularity; the second timing granularity is smaller than the first timing granularity. A third timing granularity is used to increase the transmission delay of the transmitted signal until the received measurement feedback signal meets the preset conditions, and a third timing result based on the third timing granularity is determined. The third timing granularity is smaller than the second timing granularity; the transmitted signal includes: a measurement signal or a measurement feedback signal; The delay of the transmission channel is determined based on the first timing result, the second timing result, and the third timing result.

2. The method as described in claim 1, characterized in that, In response to the transmission of the measurement signal, timing of the transmission delay of the transmission channel is initiated using the first timing granularity, including: In response to the transmission of a measurement signal, counting the number of first clock cycles of the transmission channel is initiated; the first clock cycle has a first timing granularity. Upon receiving a measurement feedback signal through the transmission channel, determining a first timing result based on a first timing granularity includes: When a measurement feedback signal is received through the transmission channel, the counting result from the start of counting after the current measurement signal is sent to the first clock cycle preceding the first clock cycle corresponding to the received measurement feedback signal is determined, and a first timing result based on the first timing granularity is obtained.

3. The method as described in claim 1, characterized in that, The timing period of the first timing granularity includes a first clock cycle; the timing period of the second timing granularity includes a second clock cycle; the first clock cycle includes multiple second clock cycles; Based on the difference between the measured feedback signal and the expected feedback signal, within the timing period of the first timing granularity at which the measured feedback signal is received, a second timing result is obtained based on the delay of the second timing granularity, including: Determine the first sub-signal detected in each of the second clock cycles contained within the first clock cycle of the target receiving the measurement feedback signal; and Each first sub-signal is compared with each second sub-signal contained in the expected feedback signal according to their corresponding time sequence; Based on the comparison results, determine the number of second clock cycles that the measured feedback signal is delayed compared to the expected feedback signal; The second timing result is determined based on the second number of clock cycles.

4. The method as described in claim 3, characterized in that, Each second clock cycle corresponds to the acquisition of one bit of data; each first clock cycle corresponds to the acquisition of a preset number of bits of data; the expected feedback signal has the preset number of bits; Based on the comparison results, determine the number of second clock cycles that the measured feedback signal is delayed compared to the expected feedback signal, including: The number of second clock cycles of delay is determined based on the number of bits that the measured feedback signal is delayed compared to the expected feedback signal; include Based on the expected feedback signal, a correspondence between the measured feedback signal and the number of second clock cycles of delay is established in advance; The number of second clock cycles of delay is determined based on the received measurement feedback signal and the corresponding relationship.

5. The method as described in claim 3, characterized in that, A third timing granularity is used to increase the transmission delay of the transmitted signal until the received measurement feedback signal meets preset conditions. A third timing result based on the third timing granularity is then determined, including: Based on the third timing granularity, the transmission delay of the transmission signal is gradually increased, and the received measurement feedback signal is detected after each increase in transmission delay until the received measurement feedback signal meets the preset conditions. The third timing result is determined based on the transmission delay of the third timing granularity, which is increased under preset conditions.

6. The method as described in claim 5, characterized in that, The received measurement feedback signal meets preset conditions, including: The received measurement feedback signal meets the expected delayed feedback signal; Determining the delay of the transmission channel based on the first timing result, the second timing result, and the third timing result includes: The delay of the transmission channel is determined using one of the following formulas. : ； ； ； in, Characterizes the first clock cycle; Characterizes the counting result for the first clock cycle; Characterizes the second clock cycle; The number of second clock cycles representing the delay; Characterizes the third timing granularity; The number of timing units representing the addition of a third timing granularity; Characterizes the width of the first sub-signal.

7. The method as described in claim 5, characterized in that, The received measurement feedback signal meets preset conditions, including: The preset first sub-signal of the received measurement feedback signal undergoes an expected jump; Determining the delay of the transmission channel based on the first timing result, the second timing result, and the third timing result includes: The delay of the transmission channel is determined using the following formula. : ； in, Characterizes the first clock cycle; Characterizes the counting result for the first clock cycle; Characterizes the second clock cycle; The number of second clock cycles that characterizes the delay of the measured feedback signal compared to the expected feedback signal; Characterizes the third timing granularity; The number of timing units representing the addition of a third timing granularity.

8. A delay calibration system, characterized in that, include: The system includes a processing unit, at least one core control module, at least one signal drive unit, and external testing equipment. Each core control module is connected to the corresponding signal drive unit through at least one transmission channel; The processing unit is used to configure the core control module and the signal driving unit, and to send a synchronization trigger signal to the core control module. The core control module is configured to send a measurement signal to the corresponding signal driving unit through the transmission channel under the triggering of the synchronization trigger signal, so as to send the measurement signal to the external test equipment through the signal driving unit; and to receive the measurement feedback signal fed back by the external test equipment through the signal driving unit; during the transmission of the measurement signal and the reception of the measurement feedback signal, the channel delay of the transmission channel is determined by the channel delay determination method as described in any one of claims 1-7, and transmitted to the processing unit; The processing unit is also used to calibrate the corresponding transmission channel based on the channel delay of the transmission channel.

9. The system as described in claim 8, characterized in that, The core control module includes: a synchronization control unit, an information interaction unit, an algorithm processing unit, a delay control unit, and a transceiver control unit; The synchronization control unit is used to receive the synchronization trigger signal sent by the processing unit and send the synchronization trigger signal to the transceiver control unit; The information interaction unit is used to transmit first interaction data between the processing unit and the core control module, and second interaction data between the algorithm processing unit and the delay control unit; the first interaction data includes: measurement signal and channel delay data of the transmission channel; the second interaction data includes: transmission delay timing data at the third timing granularity and transmission delay timing end flag status data at the third timing granularity. The algorithm processing unit is used to determine the channel delay of the transmission channel using the channel delay determination method as described in any one of claims 1-7 during the transmission of the measurement signal and the reception of the measurement feedback signal, and then transmit the result to the processing unit. The delay control unit is used to provide a transmission delay with a third timing granularity during the process of the algorithm processing unit determining the channel delay of the transmission channel; The transceiver control unit is configured to send a measurement signal to a corresponding signal driving unit in response to a synchronization trigger signal; receive a measurement feedback signal from the external test equipment sent by the corresponding signal driving unit; and transmit the received measurement feedback signal to the algorithm processing unit.

10. The system as described in claim 9, characterized in that, The transceiver control unit is further configured to configure the delay control unit, and / or to perform parallel-to-serial conversion on the measurement signal in parallel data form sent by the processing unit and provide it to the signal driving unit for transmission; and to perform serial-to-parallel conversion on the received measurement feedback signal in serial data form for processing by the algorithm processing unit.

11. The system as described in claim 8, characterized in that, The processing unit is configured to configure a first preset transmission channel in the transmission channel to be measured as a first receiving channel; and to configure other transmission channels besides the first preset transmission channel as first transmitting channels. The first receiving channel and the first transmitting channel correspond to the same core control module or different core control modules; and a synchronization trigger signal is sent to the core control module corresponding to the first receiving channel and the first transmitting channel; The system is connected to the core control module of the first transmission channel, which is used to transmit measurement signals through the corresponding first transmission channel when triggered by the synchronization trigger signal. A core control module connected to the first receiving channel is used to sequentially receive measurement feedback signals corresponding to the measurement signals transmitted by the plurality of first transmitting channels through the first receiving channel; determine the first channel delay corresponding to each of the plurality of first transmitting channels using the channel delay determination method as described in any one of claims 1-7; and transmit the first channel delay to the processing unit. The processing unit is configured to determine the first channel delay corresponding to the other first transmission channels among the plurality of first transmission channels besides the target first transmission channel, and the first relative delay relative to the first channel delay corresponding to the target first transmission channel; and to calibrate the plurality of other first transmission channels based on the first relative delay.

12. The system as claimed in claim 11, characterized in that, The processing unit is further configured to configure the first preset transmission channel as the second transmission channel, and to configure a specified transmission channel in the first transmission channel as the second receiving channel; And at least send synchronization trigger signals to the core control modules corresponding to the second sending channel, the second receiving channel, and the preset first sending channel in the first sending channel; The core control module connected to the second transmission channel is used to transmit measurement signals through the second transmission channel when triggered by the synchronization trigger signal; The core control module, which is connected to the preset first transmission channel, is used to transmit a measurement signal through the preset first transmission channel when triggered by the synchronization trigger signal. A core control module connected to the second receiving channel is used to sequentially receive measurement feedback signals corresponding to the measurement signals transmitted by the second transmitting channel and the preset first transmitting channel through the second receiving channel; determine the second channel delay corresponding to the second transmitting channel and the preset first transmitting channel respectively using the channel delay determination method as described in any one of claims 1-7; and transmit the second channel delay to the processing unit. The processing unit is further configured to determine a second relative delay of the second channel delay corresponding to the second transmission channel relative to the second channel delay corresponding to the preset first transmission channel; determine the relative delay of the second transmission channel relative to the target first transmission channel based on the second relative delay and the first relative delay of the preset first transmission channel relative to the target first transmission channel; and calibrate the second transmission channel based on the relative delay.

13. The system as described in claim 8, characterized in that, The processing unit is configured to configure the second preset transmission channel in the transmission channel to be measured as the third transmitting channel; and to configure other transmission channels besides the second preset transmission channel as the third receiving channel. The third receiving channel and the third transmitting channel correspond to the same core control module or different core control modules; and a synchronization trigger signal is sent to the core control module corresponding to the third receiving channel and the third transmitting channel; The core control module connected to the third transmission channel is used to sequentially transmit measurement signals through the third transmission channel under the triggering of the synchronization trigger signal; The core control module connected to the third receiving channel is used to receive the measurement feedback signal corresponding to the measurement signal sent by the third transmitting channel through the corresponding third receiving channel; determine the third channel delay corresponding to the third receiving channel using the channel delay determination method as described in any one of claims 1-7; and transmit the third channel delay to the processing unit. The processing unit is configured to determine the third channel delay corresponding to the other third receiving channels besides the target third receiving channel among the plurality of third receiving channels, and the third relative delay relative to the third channel delay corresponding to the target third receiving channel; and to calibrate the plurality of other third receiving channels based on the third relative delay.

14. The system as described in claim 13, characterized in that, The processing unit is further configured to configure the second preset transmission channel as the fourth receiving channel and to configure the designated transmission channel in the third receiving channel as the fourth sending channel. And at least send synchronization trigger signals to the core control modules corresponding to the fourth receiving channel, the fourth transmitting channel, and the preset third receiving channel in the third receiving channel; The core control module connected to the fourth transmission channel is used to transmit measurement signals through the fourth transmission channel when triggered by the synchronization trigger signal. A core control module connected to a fourth receiving channel is used to receive a measurement feedback signal corresponding to the measurement signal sent by the fourth transmitting channel through the connected fourth receiving channel; and to determine the fourth channel delay corresponding to the fourth receiving channel using the channel delay determination method as described in any one of claims 1-7, and transmit it to the processing unit. A core control module connected to a preset third receiving channel is used to receive a measurement feedback signal corresponding to the measurement signal sent by the fourth transmitting channel through the connected preset third receiving channel; and to determine the fourth channel delay corresponding to the preset third receiving channel using the channel delay determination method as described in any one of claims 1-7, and transmit it to the processing unit. The processing unit is further configured to determine a fourth relative delay of the fourth channel delay corresponding to the fourth receiving channel relative to the fourth channel delay corresponding to the preset third receiving channel; and to determine the relative delay of the fourth receiving channel relative to the target third receiving channel based on the fourth relative delay and the third relative delay of the preset third receiving channel relative to the target third receiving channel. The fourth receiving channel is then calibrated based on this relative delay.

15. A testing device, characterized in that, It includes at least a processing unit, at least one core control module, and at least one signal driving unit as described in any one of claims 8-14 in the delay calibration system.

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