A low-cost high-reliability anti-single-particle locking protection method and circuit

Abstract

This application relates to a low-cost, high-reliability single-event lock-up protection method and circuit. When a device encounters a single-event lock-up, the method automatically cuts off power supply via hardware and delays restarting, while the FPGA records the event. If the single-event lock-up persists after several consecutive restarts, the FPGA outputs a signal to forcibly cut off power supply, thereby protecting downstream circuitry from single-event effects and preventing system malfunctions. This method utilizes hardware and software collaboration to avoid repeated system restarts that fail to remove the locked device from the lock-up state. It rationally optimizes single-event lock-up protection measures, achieving single-event lock-up protection for devices without single-event data or those sensitive to single-event lock-up. This saves testing time and enables highly reliable on-orbit applications of lock-up-sensitive devices.

Description

Technical Field

[0001] This invention belongs to the field of electronic circuit design technology and relates to a low-cost, high-reliability method and circuit for single-event lockout protection. Background Technology

[0002] Components in space are affected by space radiation particles, resulting in total dose (TID) and single event effects (SEE), which can cause performance degradation or even failure, ultimately leading to satellite malfunctions or loss of connection. Among these, SEE is the biggest culprit for radiation-induced failures in spacecraft products. When high-energy protons or heavy ions in space enter power devices, they transfer their energy to atoms in the material, causing ionization and generating electron-hole pairs. These pairs drift under a bias electric field, triggering the conduction of parasitic thyristors in CMOS devices, leading to a high-current locked state (SEE). This can cause permanent damage to the device and, for satellite systems, malfunctions. If SEE is not addressed promptly, the continuous high current can cause the local temperature of the device to exceed the material's melting point, leading to power device burnout (SEE burnout), which in turn can permanently disable certain functions of the satellite system. Therefore, it is necessary to develop protective designs to address SEE sensitivity.

[0003] Currently, to address single-event lockout (SOL), manufacturing processes such as silicon-on-insulator (SOI), guard ring design, active region isolation, deep trench isolation, and double-well structures can reduce the peak current of heavy ions incident on materials, thus achieving SOL protection. However, this method requires redesigning the chip, increasing chip manufacturing processes, and verifying the hardened design effect through ground-based SOL simulation experiments. This process is time-consuming and extremely costly, unsuitable for the rapid pace of current commercial aerospace development. For SOL, timely power disconnection and restarting can allow the device to escape SOL; therefore, from a system perspective, timely power disconnection is the simplest and most effective method. Summary of the Invention

[0004] To address the problems existing in the above-mentioned traditional methods, this invention proposes a low-cost and high-reliability anti-single-event lock-up protection method and circuit, which can realize single-event lock-up protection for devices without single-event data or single-event lock-up sensitive devices, save test time, and enable high-reliability on-orbit application of lock-up sensitive devices.

[0005] To achieve the above objectives, the embodiments of the present invention adopt the following technical solutions: On the one hand, a low-cost and highly reliable method for resisting single-event locking is provided, the method comprising the following steps: By connecting a sampling resistor in series in the system circuit, a current sampling chip is used to sample the current flowing through the sampling resistor and convert the sampled current into voltage.

[0006] A threshold comparison module is used to compare the voltage output by the current sampling chip with the reference voltage. If the voltage output by the current sampling chip is lower than the reference voltage, the threshold comparison module outputs a high level; if the voltage output by the current sampling chip is higher than the reference voltage, the threshold comparison module outputs a low level.

[0007] When the threshold comparison module outputs a high level, the switch module is turned on, and the system works normally.

[0008] When the threshold comparison module outputs a low level, the switch module is turned off, the system power supply is cut off, the system current decreases, and the components exit the locked state. When the voltage output by the current sampling chip is less than the reference voltage, the threshold comparison module outputs a high level, the switch module is turned back on, and the system restores power to the load or secondary power conversion module after a preset delay through the delay restart module.

[0009] The FPGA information interaction module remotely measures the current value of the current sampling chip. When the current value exceeds the preset threshold N times consecutively, a reset signal is issued to forcibly shut down the switch module, cut off the system power supply, and report the abnormal situation. N is an integer not less than 3.

[0010] In one embodiment, the threshold comparison module is a comparison circuit composed of an operational amplifier.

[0011] The positive input terminal of the operational amplifier receives a reference voltage, and the negative input terminal receives the voltage output by the current sampling chip.

[0012] The input voltage of the operational amplifier and the current sampling chip is sampled by a second supply voltage, which is not the same as the first supply voltage that provides the operating voltage for the system circuit.

[0013] In one embodiment, the switching module employs an NPN transistor, a PMOS transistor, a diode, and three resistors R1 to R3.

[0014] The base of the transistor is connected to the cathode of the diode through resistor R3, the anode of the diode is connected to the output of the threshold comparison module, and the base of the transistor is connected to the emitter of the transistor through resistor R2 and then grounded.

[0015] The collector of the transistor is connected to the gate of the PMOS transistor through the electronic resistor R1. The source of the PMOS transistor is connected to the negative input terminal of the current sampling chip. The drain of the PMOS transistor is connected to the load or the secondary power conversion module.

[0016] In one embodiment, the current value of the current sampling chip is telemetryd via the FPGA information interaction module. If the current value exceeds a preset threshold N times consecutively, a reset signal is issued to forcibly shut down the switching module, cut off the system power supply, and report the abnormal situation, including: Set the preset threshold for the current and set the initial value of the count to 0.

[0017] The FPGA information interaction module periodically telemetry measures the current value of the current sampling chip. After each telemetry, the current value of the current sampling chip is compared with a preset threshold. When the current value of the current sampling chip exceeds the preset threshold, the count value is incremented by 1. If the count value is equal to N, a reset signal is issued to forcibly shut down the switch module, cut off the system power supply, and report the abnormal situation. With manual intervention, the power supply is reissued and the count value is restored to 0. N is an integer not less than 3.

[0018] In one embodiment, the delayed restart module uses an RC circuit to implement the delay.

[0019] On the other hand, a low-cost, high-reliability single-event lock-out circuit is also provided, comprising: The current sampling module is used to sample the current flowing through the sampling resistor by connecting the sampling resistor in series in the system circuit, and then convert the sampled current into voltage.

[0020] The threshold comparison module is used to compare the voltage output by the current sampling chip with the reference voltage. If the voltage output by the current sampling chip is lower than the reference voltage, it outputs a high level to the switching module; if the voltage output by the current sampling chip is higher than the reference voltage, it outputs a low level to the switching module.

[0021] The switching module is used to turn on the system and allow it to operate normally when the threshold comparison module outputs a high level; when the threshold comparison module outputs a low level, the switching module turns off the system power supply, the system current decreases, and the components exit the locked state; when the voltage output by the current sampling chip is less than the reference voltage, the threshold comparison module outputs a high level, the switching module turns on again, and the system restores power to the load or secondary power conversion module after a preset delay through the delay restart module.

[0022] The delayed restart module is used to control the delay time after the circuit is cut off.

[0023] The FPGA information interaction module is used to periodically telemetry the current value of the current sampling chip. After each telemetry, the current value of the current sampling chip is compared with a preset threshold. When the current value of the current sampling chip exceeds the preset threshold, the count value is incremented by 1. If the count value is equal to N, a reset signal is sent to forcibly shut down the switch module, cut off the system power supply, and report the abnormal situation. With manual intervention, a power-on signal is sent again, and the count value is restored to 0. N is an integer not less than 3.

[0024] In one embodiment, the threshold comparison module includes an operational amplifier.

[0025] The positive input terminal of the operational amplifier receives a reference voltage, and the negative input terminal receives the voltage output by the current sampling chip.

[0026] The input voltage of the operational amplifier and the current sampling chip is sampled by a second supply voltage, which is not the same as the first supply voltage that provides the operating voltage for the system circuit.

[0027] In one embodiment, the switching module includes an NPN transistor, a PMOS transistor, a diode, and three resistors R1 to R3.

[0028] The base of the transistor is connected to the cathode of the diode through resistor R3, the anode of the diode is connected to the output of the threshold comparison module, and the base of the transistor is connected to the emitter of the transistor through resistor R2 and then grounded.

[0029] The collector of the transistor is connected to the gate of the PMOS transistor through the electronic resistor R1. The source of the PMOS transistor is connected to the negative input terminal of the current sampling chip. The drain of the PMOS transistor is connected to the load or the secondary power conversion module.

[0030] In one embodiment, the delayed restart module employs an RC delay module; the RC delay module includes a resistor R4 and a capacitor.

[0031] Resistor R4 and capacitor are connected in parallel across the gate and source terminals of the PMOS transistor.

[0032] In one embodiment, the FPGA information interaction module is also used to set a preset threshold for the current and set the initial value of the count value to 0.

[0033] The FPGA information interaction module periodically telemetry measures the current value of the current sampling chip. After each telemetry, the current value of the current sampling chip is compared with a preset threshold. When the current value of the current sampling chip exceeds the preset threshold, the count value is incremented by 1. If the count value is equal to N, a reset signal is issued to forcibly shut down the switch module, cut off the system power supply, and report the abnormal situation. With manual intervention, the power supply is reissued and the count value is restored to 0. N is an integer not less than 3.

[0034] One of the above technical solutions has the following advantages and beneficial effects: The aforementioned low-cost, high-reliability single-event lockout (SET) protection method and circuit, when a device encounters SET, automatically cuts off power supply via hardware and delays restarting, while the FPGA records the event. If the SET phenomenon persists after several consecutive restarts, the FPGA outputs a signal to forcibly cut off power supply, thereby protecting downstream circuits from SET effects and preventing system malfunctions. This method utilizes hardware and software collaboration to avoid repeated system restarts that fail to remove the locked device from the locked state, rationally optimizing SET protection measures. It achieves SET protection for devices without SET data or sensitive to SET, saving testing time and enabling highly reliable on-orbit applications of lock-sensitive devices. Attached Figure Description

[0035] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0036] Figure 1 This is a flowchart illustrating a low-cost, high-reliability anti-single-event lock method in one embodiment. Figure 2 This is a block diagram illustrating the principle of a low-cost, high-reliability single-event lock-out circuit in one embodiment. Detailed Implementation

[0037] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0038] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0039] It should be noted that, in this document, the reference to "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The presentation of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will understand that the embodiments described herein can be combined with other embodiments. The term "and / or" as used herein refers to any combination of one or more of the associated listed items, and all possible combinations, including such combinations.

[0040] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0041] In one embodiment, such as Figure 1 As shown, a low-cost and highly reliable method for resisting single-event locking is provided, which may include the following processing steps 100 to 104: Step 100: By connecting the sampling resistor in series in the system circuit, a current sampling chip is used to sample the current flowing through the sampling resistor and convert the sampled current into voltage.

[0042] Specifically, the current sampling module consists of a sampling resistor and a current sampling chip. The sampling resistor is connected in series in the system circuit. The current sampling chip obtains the current of the system circuit through the sampling resistor and converts the current into voltage through the corresponding relationship, and outputs it to the threshold comparison module.

[0043] Step 101: Use a threshold comparison module to compare the voltage output by the current sampling chip with the reference voltage. If the voltage output by the current sampling chip is lower than the reference voltage, the threshold comparison module outputs a high level; if the voltage output by the current sampling chip is higher than the reference voltage, the threshold comparison module outputs a low level.

[0044] Specifically, the voltage output by the current sampling chip and the reference voltage are input to the threshold comparison module. The output voltage of the current sampling chip is compared with the reference voltage. If the voltage output by the current sampling chip is lower than the reference voltage, the threshold comparison module outputs a high level; if the voltage output by the current sampling chip is higher than the reference voltage, the threshold comparison module outputs a low level.

[0045] Step 102: When the threshold comparison module outputs a high level, the switch module is turned on and the system works normally.

[0046] Step 103: When the threshold comparison module outputs a low level, the switch module is turned off, the system power supply is cut off, the system current decreases, and the components exit the locked state; when the voltage output by the current sampling chip is less than the reference voltage, the threshold comparison module outputs a high level, the switch module is turned on again, and the system restores power to the load or secondary power conversion module after a preset delay through the delay restart module.

[0047] Specifically, through hardware methods, the power supply is automatically cut off after a single-event lock occurs, thus achieving the single-event lock protection effect.

[0048] Step 104: Telemetry of the current value of the current sampling chip is performed through the FPGA information interaction module. When the current value exceeds the preset threshold N times consecutively, a reset signal is sent to forcibly shut down the switch module, cut off the system power supply, and report the abnormal situation. N is an integer not less than 3.

[0049] Specifically, in the FPGA information interaction module, the FPGA remotely senses the current value through the current sampling chip. A threshold is set in the software. If the threshold is exceeded, the system counts once internally. If the number of counts is exceeded, the FPGA sends a reset signal to forcibly cut off the system power supply.

[0050] The aforementioned low-cost, high-reliability single-event lock-out (SETL) protection method involves automatically cutting off power and delaying restart when a device encounters SETL, while the FPGA records the event. If the SETL persists after several restarts, the FPGA outputs a signal to forcibly cut off power, thus protecting downstream circuitry from SETL and preventing system malfunction. This method utilizes hardware and software collaboration to avoid repeated system restarts that fail to remove the locked device, effectively optimizing SETL protection measures. It provides SETL protection for devices without SETL data or sensitive to SETL, saving testing time and enabling highly reliable on-orbit applications for SETL-sensitive devices.

[0051] In one embodiment, the threshold comparison module in step 102 is a comparison circuit composed of an operational amplifier; the positive input terminal of the operational amplifier receives a reference voltage, and the negative input terminal of the operational amplifier receives the voltage output by the current sampling chip; the input voltage of the operational amplifier and the current sampling chip is sampled from the second power supply voltage, and the second power supply voltage is not the same as the first power supply voltage that provides the operating voltage for the system circuit.

[0052] In one embodiment, the switching module in step 103 uses an NPN transistor, a PMOS transistor, a diode, and three resistors R1 to R3. The base of the transistor is connected to the cathode of the diode through resistor R3, the anode of the diode is connected to the output terminal of the threshold comparison module, and the base of the transistor is connected to the emitter of the transistor through resistor R2 and then grounded. The collector of the transistor is connected to the gate of the PMOS transistor through resistor R1, the source of the PMOS transistor is connected to the negative input terminal of the current sampling chip, and the drain of the PMOS transistor is connected to the load or secondary power conversion module.

[0053] Specifically, the transistor and PMOS transistor form a switching module. When the threshold comparison module outputs a high level, the transistor drives the PMOS transistor to turn on, and the system works normally. When the threshold comparison module outputs a low level, the PMOS transistor turns off, and the system power supply is cut off.

[0054] In one embodiment, step 104 includes: setting a preset threshold for the current and setting the initial value of the count value to 0; periodically telemetry measuring the current value of the current sampling chip through the FPGA information interaction module; after each telemetry, comparing the current value of the current sampling chip with the preset threshold; when the current value of the current sampling chip exceeds the preset threshold, the count value is incremented by 1; if the count value is equal to N, a reset signal is issued to forcibly shut down the switch module, cut off the system power supply, and report the abnormal situation; through manual intervention, a power-on signal is reissued and the count value is restored; N is an integer not less than 3.

[0055] In one embodiment, the delayed restart module in step 103 uses an RC circuit.

[0056] Specifically, an RC circuit is used to achieve the delay, utilizing capacitor charging to achieve the effect of delayed power supply. The RC circuit also delays the restart after the circuit is cut off, eliminating the need for system intervention to restore power.

[0057] It should be understood that, although the above Figure 1 The steps are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise explicitly stated in this document, there is no strict order in which these steps are executed; they can be performed in other orders. Furthermore, the above... Figure 1 At least some of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0058] In one embodiment, such as Figure 2As shown, a low-cost, high-reliability single-event lock-out circuit is also provided, comprising: The current sampling module is used to sample the current flowing through the sampling resistor by connecting the sampling resistor in series in the system circuit, and then convert the sampled current into voltage.

[0059] Specifically, the voltage input to the current sampling module includes supply voltage 1 and supply voltage 2. Supply voltage 1 is connected to the sampling resistor. Supply voltage 1 is 5V, which is the supply voltage required by the load or secondary power supply conversion. The normal input current is 100mA. Supply voltage 2 is the input voltage of the current sampling chip and operational amplifier, and it is not on the same path as supply voltage 1.

[0060] The sampling resistor is connected in series in the system circuit. The resistance value should be chosen as small as possible to reduce voltage drop. The IN+ and IN- terminals of the current sampling chip are connected to both sides of the sampling resistor. The output voltage is calculated according to the following formula:

[0061] Where I is the circuit current. G represents the resistance value of the sampling resistor, and G is the fixed gain.

[0062] Here, the sampling resistor is set to 0.5 ohms, and the fixed gain is selected as 20V / V. During normal operation... The voltage is 1V, and the threshold current is 150mA. It is 1.5V.

[0063] The threshold comparison module is used to compare the voltage output by the current sampling chip with the reference voltage. If the voltage output by the current sampling chip is lower than the reference voltage, it outputs a high level to the switching module; if the voltage output by the current sampling chip is higher than the reference voltage, it outputs a low level to the switching module.

[0064] The switching module is used to turn on the system and allow it to operate normally when the threshold comparison module outputs a high level; when the threshold comparison module outputs a low level, the switching module turns off the system power supply, the system current decreases, and the components exit the locked state; when the voltage output by the current sampling chip is less than the reference voltage, the threshold comparison module outputs a high level, the switching module turns on again, and the system restores power to the load or secondary power conversion module after a preset delay through the delay restart module.

[0065] The delayed restart module is used to control the delay time after the circuit is cut off.

[0066] The FPGA information interaction module is used to periodically telemetry the current value of the current sampling chip. After each telemetry, the current value of the current sampling chip is compared with a preset threshold. When the current value of the current sampling chip exceeds the preset threshold, the count value is incremented by 1. If the count value is equal to N, a reset signal is sent to forcibly shut down the switch module, cut off the system power supply, and report the abnormal situation. With manual intervention, a power-on signal is sent again, and the count value is restored to 0. N is an integer not less than 3.

[0067] Specifically, the FPGA information interaction module samples the current value of the telemetry current sampling chip and sets a threshold in the software. When the threshold is exceeded, it counts once. After N consecutive counts (preferably N=3), the FPGA sends a reset signal, forcibly pulls down the MOS gate voltage, cuts off the system power supply, and reports the abnormal situation. At this point, manual intervention is required. Depending on the situation, a power-on signal is sent again and the count is restored to 0.

[0068] The aforementioned low-cost, high-reliability single-event lockout (SOL) circuit includes a current sampling module, a threshold comparison module, an RC delay restart module, a switching module, and an FPGA information interaction module. The circuit samples the circuit current using the current sampling module, converts it into voltage, and outputs it to the threshold comparison module. The threshold comparison module compares the sampled signal with a reference signal. If the threshold is not exceeded, the threshold comparison module outputs a high level, turning on the MOSFET and allowing normal system power supply. If the threshold is exceeded, the threshold comparison module outputs a low level, turning off the MOSFET. The RC delay circuit module enables soft start-up after power interruption and subsequent power restoration.

[0069] In one embodiment, the threshold comparison module includes an operational amplifier.

[0070] The positive input terminal of the operational amplifier receives a reference voltage, and the negative input terminal receives the voltage output by the current sampling chip.

[0071] The input voltage of the operational amplifier and the current sampling chip is sampled by a second supply voltage, which is not the same as the first supply voltage that provides the operating voltage for the system circuit.

[0072] In one embodiment, the switching module includes an NPN transistor, a PMOS transistor, a diode, and three resistors R1 to R3.

[0073] The base of the transistor is connected to the cathode of the diode through resistor R3, the anode of the diode is connected to the output of the threshold comparison module, and the base of the transistor is connected to the emitter of the transistor through resistor R2 and then grounded.

[0074] The collector of the transistor is connected to the gate of the PMOS transistor through the electronic resistor R1. The source of the PMOS transistor is connected to the negative input terminal of the current sampling chip. The drain of the PMOS transistor is connected to the load or the secondary power conversion module.

[0075] Specifically, the output voltage of the current sampling chip is connected to the IN- terminal (negative input terminal) of the operational amplifier, and the reference voltage is set to the voltage corresponding to the threshold current (here, 1.5V). During normal operation... When the voltage is 1V, which is less than the reference voltage, the operational amplifier outputs a high level, the transistor drives the PMOS transistor to turn on, and the load or secondary power supply switches normally. When heavy ions are incident on the components, causing single-event lockout, the system current exceeds the threshold (150mA). When the current is greater than the reference voltage, the operational amplifier outputs a low level, the PMOS transistor is turned off, the system power supply is cut off, the current decreases, and the components are released from the locked state. When the current is less than the threshold, the current sampling chip outputs a voltage less than the reference voltage, the operational amplifier outputs a high level, the transistor drives the PMOS transistor to turn on, and the system power supply first charges the capacitor. The charging time is calculated using the following formula:

[0076] Here, R is 100kΩ, C is 10μF, and the calculated charging time is 1s. The hardware uses a 1-second delay to raise the voltage to the MOSFET's turn-on threshold, and the load or secondary power supply is then switched back to power.

[0077] In one embodiment, the delayed restart module employs an RC delay module; the RC delay module includes a resistor R4 and a capacitor.

[0078] Resistor R4 and capacitor are connected in parallel across the gate and source terminals of the PMOS transistor.

[0079] In one embodiment, the FPGA information interaction module is also used to set a preset threshold for the current and set the initial value of the count value to 0.

[0080] The FPGA information interaction module periodically telemetry measures the current value of the current sampling chip. After each telemetry, the current value of the current sampling chip is compared with a preset threshold. When the current value of the current sampling chip exceeds the preset threshold, the count value is incremented by 1. If the count value is equal to N, a reset signal is issued to forcibly shut down the switch module, cut off the system power supply, and report the abnormal situation. With manual intervention, the power supply is reissued and the count value is restored to 0. N is an integer not less than 3.

[0081] The low-cost, high-reliability anti-single-event lockout circuit uses radiation-insensitive components such as resistors, capacitors, and inductors; the current detection chip is a chip that has passed radiation testing; the operational amplifier is a bipolar process device that is insensitive to single-event effects; and the transistors and MOSFETs have also passed radiation testing through derating design.

[0082] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0083] The above embodiments are merely illustrative of several implementation methods of this application, and their descriptions are relatively specific and detailed. However, they should not be construed as limiting the scope of protection of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and all such modifications and improvements fall within the scope of protection of this application.

Claims

1. A low-cost high-reliability anti-single-event-latchup method, characterized in that, Including the following steps: By connecting a sampling resistor in series with the system circuit, a current sampling chip is used to sample the current flowing through the sampling resistor and convert the sampled current into voltage. A threshold comparison module is used to compare the voltage output by the current sampling chip with a reference voltage. If the voltage output by the current sampling chip is lower than the reference voltage, the threshold comparison module outputs a high level; if the voltage output by the current sampling chip is higher than the reference voltage, the threshold comparison module outputs a low level. When the threshold comparison module outputs a high level, the switch module is turned on, and the system operates normally. When the threshold comparison module outputs a low level, the switch module is turned off, the system power supply is cut off, the system current decreases, and the components exit the locked state. When the voltage output by the current sampling chip is less than the reference voltage, the threshold comparison module outputs a high level, the switch module is turned on again, and the system restores power to the load or secondary power conversion module after a preset delay through the delay restart module. The FPGA information interaction module remotely measures the current value of the current sampling chip. When the current value exceeds the preset threshold for N consecutive times, a reset signal is issued to forcibly shut down the switch module, cut off the system power supply, and report the abnormal situation. N is an integer not less than 3.

2. The low-cost high-reliability anti-single-event-latchup method according to claim 1, wherein, The threshold comparison module is a comparison circuit composed of an operational amplifier; The positive input terminal of the operational amplifier receives a reference voltage, and the negative input terminal of the operational amplifier receives the voltage output by the current sampling chip. The input voltage of the operational amplifier and the current sampling chip is provided by the second power supply voltage, which is not the same as the first power supply voltage that provides the operating voltage for the system circuit.

3. The low-cost, high-reliability anti-single-event locking method according to claim 1, characterized in that, The switching module uses an NPN transistor, a PMOS transistor, a diode, and three resistors R1 to R3; The base of the transistor is connected to the cathode of the diode through resistor R3, the anode of the diode is connected to the output terminal of the threshold comparison module, and the base of the transistor is connected to the emitter of the transistor through resistor R2 and then grounded. The collector of the transistor is connected to the gate of the PMOS transistor through an electronic resistor R1. The source of the PMOS transistor is connected to the negative input terminal of the current sampling chip. The delayed restart module is connected in parallel across the gate and source of the PMOS transistor. The drain of the PMOS transistor is connected to the load or secondary power conversion module.

4. The low-cost high-reliability anti-single-event-latchup method of claim 1, wherein, The FPGA information interaction module remotely measures the current value of the current sampling chip. If the current value exceeds a preset threshold N times consecutively, a reset signal is issued to forcibly shut down the switching module, cut off the system power supply, and report the abnormal situation, including: Set the preset threshold for the current and set the initial value of the count to 0; The FPGA information interaction module periodically telemetry measures the current value of the current sampling chip. After each telemetry, the current value of the current sampling chip is compared with a preset threshold. When the current value of the current sampling chip exceeds the preset threshold, the count value is increased by 1. If the count value is equal to N, a reset signal is issued to forcibly shut down the switch module, cut off the system power supply, and report the abnormal situation. With manual intervention, the power supply is reissued and the count value is restored to 0.

5. The low-cost high-reliability anti-single-event-latchup method of claim 1, wherein, The delayed restart module uses an RC circuit to achieve the delay.

6. A low-cost high-reliability single event latchup immune circuit, characterized by, include: The current sampling module is used to sample the current flowing through the sampling resistor by connecting the sampling resistor in series with the system circuit, and to convert the sampled current into voltage. The threshold comparison module is used to compare the voltage output by the current sampling chip with the reference voltage. If the voltage output by the current sampling chip is lower than the reference voltage, a high level is output to the switching module. If the voltage output by the current sampling chip is higher than the reference voltage, it outputs a low level to the switching module. The switch module is used to turn on when the threshold comparison module outputs a high level, so that the system can work normally. When the threshold comparison module outputs a low level, the switch module is turned off, the system power supply is cut off, the system current decreases, and the components exit the locked state. When the voltage output by the current sampling chip is less than the reference voltage, the threshold comparison module outputs a high level, the switch module is turned on again, and the system restores power to the load or secondary power conversion module after a preset delay through the delay restart module. The delayed restart module is used to control the delay time after the circuit is cut off; The FPGA information interaction module is used to periodically telemetry the current value of the current sampling chip. After each telemetry, the current value of the current sampling chip is compared with a preset threshold. When the current value of the current sampling chip exceeds the preset threshold, the count value is incremented by 1. If the count value is equal to N, a reset signal is issued to forcibly shut down the switch module, cut off the system power supply, and report the abnormal situation. With manual intervention, a power-on signal is reissued, and the count value is restored to 0. N is an integer not less than 3.

7. The low-cost, high-reliability anti-single-event lock-out circuit according to claim 6, characterized in that, The threshold comparison module includes an operational amplifier; The positive input terminal of the operational amplifier receives a reference voltage, and the negative input terminal of the operational amplifier receives the voltage output by the current sampling chip. The input voltage of the operational amplifier and the current sampling chip is provided by the second power supply voltage, which is not the same as the first power supply voltage that provides the operating voltage for the system circuit.

8. The low-cost, high-reliability single-event lock-out circuit according to claim 1, characterized in that, The switching module includes: an NPN transistor, a PMOS transistor, a diode, and three resistors R1 to R3; The base of the transistor is connected to the cathode of the diode through resistor R3, the anode of the diode is connected to the output terminal of the threshold comparison module, and the base of the transistor is connected to the emitter of the transistor through resistor R2 and then grounded. The collector of the transistor is connected to the gate of the PMOS transistor through an electronic resistor R1. The source of the PMOS transistor is connected to the negative input terminal of the current sampling chip. The delayed restart module is connected in parallel across the gate and source of the PMOS transistor. The drain of the PMOS transistor is connected to the load or secondary power conversion module.

9. The low-cost, high-reliability anti-single event latch-up circuit of claim 8, wherein, The delayed restart module uses an RC delay module; the RC delay module includes a resistor R4 and a capacitor; The resistor R4 and the capacitor are connected in parallel across the gate and source terminals of the PMOS transistor.

10. The low-cost high-reliability anti-single event latch-up circuit of claim 6, wherein, The FPGA information interaction module is also used to set the preset threshold of the current and set the initial value of the count value to 0. The FPGA information interaction module periodically telemetry measures the current value of the current sampling chip. After each telemetry, the current value of the current sampling chip is compared with a preset threshold. When the current value of the current sampling chip exceeds the preset threshold, the count value is incremented by 1. If the count value is equal to N, a reset signal is issued to forcibly shut down the switch module, cut off the system power supply, and report the abnormal situation. With manual intervention, a power-on signal is reissued, and the count value is restored to 0. N is an integer not less than 3.

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