A silicon optical thin film lithium niobate hybrid integrated optoelectronic chip, a preparation method and system

Abstract

This application provides a silicon photonics thin-film lithium niobate hybrid integrated optoelectronic chip, its fabrication method, and a system, relating to the field of optoelectronics technology. Based on a thin-film lithium niobate platform, multiple thin-film lithium niobate modulators are fabricated on a thin-film lithium niobate wafer, and qualified thin-film lithium niobate modulator chips are selected. Based on a silicon photonics process platform, optoelectronic device structures other than the modulators are fabricated on a silicon photonics wafer, and a wafer map is generated to identify the locations of qualified chips. A transition structure with dimensions matching the silicon photonics wafer is then provided. The silicon photonics wafer and the transition structure are assembled to form a composite wafer. Based on the wafer map, qualified thin-film lithium niobate modulator chips are transferred and mounted one by one onto the composite wafer, and optical and electrical connections are completed. Finally, the mounted composite wafer is sliced ​​and tested to obtain the silicon photonics thin-film lithium niobate hybrid integrated optoelectronic chip. The solution provided in this application has the advantages of good process compatibility, high yield, and low cost.

Description

Technical Field

[0001] This application relates to the field of optoelectronic technology, and more specifically, to a silicon photonic thin film lithium niobate hybrid integrated optoelectronic chip, its fabrication method, and system. Background Technology

[0002] With the rapid development of technologies such as artificial intelligence, big data, and cloud computing, the demand for computing power is growing exponentially, driving a massive demand for AI (Artificial Intelligence) computing clusters. AI computing primarily utilizes GPUs (Graphics Processing Units) for large-scale parallel computing, which places extremely high demands on the interconnect bandwidth between chips. Scale-up networks enable direct interconnection between GPU chips, facilitating the pooling and resource sharing of computing and storage chips. Expanding the scale-up network can significantly improve the computing efficiency of AI computing clusters. To achieve this, substantial improvements are needed in the single-wavelength rate and number of optical interconnects.

[0003] Currently, single-channel 400Gbps modulation technology has become a research hotspot in the industry. Among numerous technical solutions, the hybrid integration technology based on thin-film lithium niobate modulators and silicon photonics integration platforms is considered the most competitive solution for realizing single-channel 400Gbps modulators because it combines the advantages of thin-film lithium niobate (high bandwidth, low loss, low drive voltage) with the advantages of silicon photonics platforms (high integration, high reliability, low cost).

[0004] In existing technologies, there are two main technical routes for achieving thin-film lithium niobate-silicon photonic heterogeneous integration: 1. Bonded Wafer Solution: This method involves directly bonding silicon-based SOI (Silicon on Insulator) wafers to thin-film lithium niobate wafers, followed by fab-end processing. While this approach offers high production efficiency, the two materials exhibit poor compatibility in fab (Fabrication Facility) processes. Furthermore, the bonding interface faces reliability risks in subsequent high-temperature and chemical environments, and requires significant modifications to existing fab processes.

[0005] 2. Front-end fabrication followed by back-end assembly: This approach involves completing the SOI process in a standard silicon photonics fab, then attaching a thin-film lithium niobate modulator onto the wafer, and finally performing the back-end process in a proprietary fab. This approach also faces process compatibility challenges; the wafer after fabrication cannot withstand the high temperatures and other environmental conditions of the back-end process, and the process maturity is low, making it difficult to guarantee yield.

[0006] Both of these approaches share common drawbacks: significant challenges in process compatibility, substantial yield losses, and high costs. Specifically, both require complex hybrid process development at the fab level, and KGD (Known Good Die) testing can only be performed on the chip after all processes are completed and the chip is diced. This means that defects in any part can render the entire chip unusable, resulting in huge yield losses and cost waste. Furthermore, silicon photonics wafers are typically 8 or 12 inches, while thin-film lithium niobate wafers are mostly 4 or 6 inches, and this size mismatch also leads to material waste. Summary of the Invention

[0007] The purpose of this application is to provide a silicon photonic thin film lithium niobate hybrid integrated optoelectronic chip, its fabrication method and system, to solve the problems of poor process compatibility, high yield and cost, and waste in the prior art.

[0008] To achieve the above objectives, the technical solutions adopted in the embodiments of this application are as follows: In a first aspect, embodiments of this application provide a method for fabricating a silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip, the method comprising: Based on the thin-film lithium niobate platform, multiple thin-film lithium niobate modulators are fabricated on thin-film lithium niobate wafers, diced to form discrete thin-film lithium niobate modulator chips, and tested to screen out qualified thin-film lithium niobate modulator chips. Based on the silicon photonics process platform, optoelectronic device structures other than modulators are fabricated on silicon photonics wafers, and input and output optical ports of modulators are reserved to form input and output optical couplers; wafer-level testing is performed on the fabricated silicon photonics wafers to generate wafer maps that identify the locations of qualified chips; A transition structure with dimensions matching the silicon photonics wafer is provided, and the transition structure includes an RDL layer for electrical signal rewiring and a light-transmitting interposer layer for optical signal connection. The silicon photonics wafer is assembled with the transition structure to form a composite wafer; Based on the wafer map, qualified thin-film lithium niobate modulator chips are transferred and mounted one by one onto the composite wafer, and optical and electrical connections are completed. The composite wafer after mounting was sliced ​​and tested to obtain a silicon photonic thin film lithium niobate hybrid integrated optoelectronic chip.

[0009] Optionally, the size of the adapter structure is greater than or equal to the size of the silicon photonics wafer.

[0010] Optionally, the optoelectronic device structure other than the modulator includes a passive optical waveguide, a thermally modulated phase shifter, and a photodetector.

[0011] Optionally, reserving input and output optical ports for the modulator, the steps for forming an input-output optical coupler include: An input optical coupler and an output optical coupler are respectively set at the optical path input and output ends of each chip functional area to form a silicon photonic wafer with reserved modulator mounting positions.

[0012] Optionally, the adapter structure is a packaging substrate or an interposer.

[0013] Optionally, the steps of transferring and mounting qualified thin-film lithium niobate modulator chips one by one onto the composite wafer and completing the optical and electrical connections include: Qualified thin-film lithium niobate modulator chips are mounted one by one to the modulator mounting positions of the corresponding chips on the composite wafer, so that the optical input end of the thin-film lithium niobate modulator chip is optically coupled to the input optical coupler, the optical output end is optically coupled to the output optical coupler, and its electrodes are electrically connected to the external driving circuit through the RDL layer.

[0014] Optionally, the silicon photonics wafer is 8 inches or 12 inches in size, and the thin-film lithium niobate wafer is 4 inches or 6 inches in size.

[0015] Optionally, the silicon photonic wafer includes multiple silicon photonic chips, and the step of performing wafer-level testing on the fabricated silicon photonic wafer includes: Each individual silicon photonic chip undergoes electrical, optical, and functional performance testing.

[0016] Secondly, embodiments of this application provide a silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip, fabricated using the above-described preparation method. The qualified thin-film lithium niobate modulator chip includes: Silicon photonics wafers, on which optoelectronic device structures other than modulators and input / output optical couplers are integrated; The adapter structure is assembled with the silicon photonics wafer to form a composite wafer, including an RDL layer for electrical signal rewiring and a light-transmitting interposer layer for optical signal connection. At least one thin-film lithium niobate modulator chip is mounted on the composite wafer and optically and electrically connected to the silicon photonics wafer through the adapter structure.

[0017] Thirdly, embodiments of this application also provide an optical interconnect system, including a GPU server, a switch, and an optical engine, wherein at least one optical transceiver module in the optical engine adopts the aforementioned silicon photonic thin film lithium niobate hybrid integrated optoelectronic chip.

[0018] Compared with the prior art, this application has the following advantages: This application provides a silicon photonics thin-film lithium niobate hybrid integrated optoelectronic chip, its fabrication method, and system. First, based on a thin-film lithium niobate platform, multiple thin-film lithium niobate modulators are fabricated on a thin-film lithium niobate wafer. These modulators are then diced to form discrete thin-film lithium niobate modulator chips, which are tested to screen out qualified chips. Next, based on a silicon photonics process platform, optoelectronic device structures other than the modulators are fabricated on the silicon photonics wafer, with input and output optical ports reserved for the modulators to form input / output optical couplers. Wafer-level testing is performed on the fabricated silicon photonics wafer to generate a wafer map identifying the locations of qualified chips. Then, a transition structure with dimensions matching the silicon photonics wafer is provided, including an RDL layer for electrical signal rewiring and a light-transmitting interposer layer for optical signal connection. Finally, the silicon photonics wafer and the transition structure are assembled to form a composite wafer. Finally, based on the wafer... The process involves transferring and mounting qualified thin-film lithium niobate modulator chips one by one onto a composite wafer, and completing the optical and electrical connections. Finally, the composite wafer is sliced ​​and tested to obtain a silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip.

[0019] Since this application independently prepares and tests the silicon photonics wafer and the thin-film lithium niobate modulator chip on their respective mature process platforms, there is no need to develop complex hybrid processes. This completely avoids the problems of compatibility and reliability of heterogeneous materials at the fab end. Existing mature process lines and foundries can be used directly, which greatly reduces the technology development risk and industrialization threshold.

[0020] Meanwhile, by testing the silicon photonics wafer and the thin-film lithium niobate modulator chip at the wafer level, qualified chips are screened in advance. Based on the wafer map of the silicon photonics wafer, only the qualified thin-film lithium niobate modulator chips are mounted on the composite wafer at the positions corresponding to the qualified silicon photonics chips. This avoids the yield loss caused by the scrapping of the entire chip due to the failure of any component in the existing technology, greatly improves the overall yield of the final product, and reduces the cost waste caused by packaging and testing.

[0021] Furthermore, this application introduces a transition structure that matches the size of the silicon photonics wafer and mounts the thin-film lithium niobate modulator chip in a discrete manner, ensuring that even with a small thin-film lithium niobate wafer, there is no waste of area on the large-size silicon photonics wafer. The transition structure can completely cover the silicon photonics wafer, achieving full utilization of the material.

[0022] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0023] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is an exemplary flowchart illustrating the fabrication method of the silicon photonic thin film lithium niobate hybrid integrated optoelectronic chip provided in this application embodiment.

[0025] Figure 2 This is a schematic diagram of a silicon photonic thin film lithium niobate hybrid integrated optoelectronic chip provided in an embodiment of this application.

[0026] Figure 3 This is a schematic diagram of a wafer map provided in an embodiment of this application.

[0027] Figure 4 Another schematic diagram of the wafer map provided in the embodiments of this application.

[0028] icon: 110 - Thin-film lithium niobate modulator chip; 120 - Adapter structure; 130 - Silicon photonics wafer. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0030] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0031] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this application, terms such as "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0032] It should be noted that in this paper, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.

[0033] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0034] In recent years, applications such as high-speed optical interconnects, on-chip optical computing, and coherent optical communication have placed increasingly stringent demands on the bandwidth density, power efficiency, and integration of optoelectronic chips. Silicon photonics (SiPh), with its advantages of CMOS-compatible processes, high integration, and low cost, has become the mainstream photonic integration platform; however, its intrinsic material (silicon) lacks linear electro-optic effects, making it difficult to achieve high-performance, low-drive-voltage high-speed modulators. In contrast, thin-film lithium niobate on insulator (LNOI) possesses excellent Pockels electro-optic coefficients, ultra-wide optical bandwidth (visible to mid-infrared), and low transmission loss, making it an ideal material platform for constructing high-speed modulators.

[0035] To balance the high-density passive device integration capabilities of silicon photonics with the superior electro-optical performance of LNOI, the industry generally adopts a hybrid integration strategy. Current mainstream technologies mainly include: (1) Bonding wafers based on silicon-based SOI and thin-film lithium niobate wafers, followed by fab-end processing. This approach has the advantage of high production efficiency, but it brings huge challenges to process, reliability and fab manufacturing process compatibility.

[0036] (2) The front-end process of SOI is completed in a standard silicon photonics fab, and then the thin-film lithium niobate modulator is attached to the silicon photonics SOI wafer after the front-end process is completed. Finally, the back-end process is completed in a proprietary fab. Both of these approaches are subject to significant challenges in terms of process maturity, and involve great difficulty and uncertainty. At the same time, KGD testing can only be performed on the wafer slices after all processes are completed, resulting in yield loss and waste.

[0037] In view of this, to address the aforementioned problems, this application provides a method for fabricating a silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip. This method utilizes mature, stable, reliable, and low-cost packaging technology to solve process challenges and reduce production yield and costs, while eliminating waste. The method provided in this application is illustrated below: As an optional implementation, please refer to Figure 1 and Figure 2 The method includes: S101, based on the thin-film lithium niobate platform, fabricates multiple thin-film lithium niobate modulators on a thin-film lithium niobate wafer, dices them to form discrete thin-film lithium niobate modulator chips and tests them to screen out qualified thin-film lithium niobate modulator chips.

[0038] S102, based on the silicon photonics process platform, fabricates optoelectronic device structures other than the modulator on a silicon photonics wafer, and reserves input and output optical ports for the modulator to form an input and output optical coupler; performs wafer-level testing on the fabricated silicon photonics wafer to generate a wafer map that identifies the location of qualified chips.

[0039] S103 provides an adapter structure with dimensions matching the silicon photonics wafer, and the adapter structure includes an RDL layer for electrical signal rewiring and a light-transmitting interposer layer for optical signal connection.

[0040] S104 assembles a silicon photonics wafer with a transition structure to form a composite wafer.

[0041] S105, based on the wafer map, transfers and mounts qualified thin-film lithium niobate modulator chips one by one onto the composite wafer, and completes the optical and electrical connections.

[0042] S106, the composite wafer after mounting is sliced ​​and tested to obtain a silicon photonic thin film lithium niobate hybrid integrated optoelectronic chip.

[0043] It should be noted that traditional single-process integration methods forcibly couple technologies with different physical properties, process windows, and maturity levels into the same manufacturing step. This not only fails to reuse their respective validated dedicated process modules but also makes it impossible to independently evaluate the performance and quality of each functional unit, leading to yield control failure. Therefore, when directly integrating silicon photonics chips with thin-film lithium niobate modulators in existing technologies, it is usually necessary to simultaneously process two heterogeneous material structures on the same wafer. This faces the fundamental problem of poor process compatibility. That is, the silicon photonics process platform and the thin-film lithium niobate platform have significant differences in substrate thermal expansion coefficient, etching selectivity, thin film stress control, and back-end metallization conditions. Forced integration not only requires the development of a completely new hybrid process flow but also necessitates large-scale modification and verification of existing mature foundry production lines, resulting in long R&D cycles, high trial-and-error costs, and high mass production risks.

[0044] In view of this, this application systematically avoids the aforementioned process compatibility obstacles and yield losses by adopting an overall technical approach of independent platform fabrication, independent testing at different stages, precise wafer-level matching, and selective mounting of heterogeneous chips. In this process, the independent platform fabrication method avoids adjustments and challenges to existing mature manufacturing processes. Silicon photonic wafers and thin-film lithium niobate wafers can be processed separately on mature silicon photonic wafer platforms and thin-film lithium niobate wafer platforms, without requiring new process development or hybrid processes, and can utilize existing mature process platforms and foundries. The independent testing at different stages allows for separate testing of the processed silicon photonic wafers and thin-film lithium niobate wafers, identifying good and bad chips. Subsequent processes only need to process and manufacture chips that meet performance standards, improving yield and reducing costs. The wafer-level precision matching method allows the dimensions of the adapter structure to match the dimensions of the silicon photonics wafer. Although the dimensions of thin-film lithium niobate wafers cannot match either, the technical solution of dicing, testing, and then selective mounting avoids the area waste that would inevitably occur when bonding a 4-inch or 6-inch thin-film lithium niobate wafer entirely onto an 8-inch or 12-inch silicon photonics wafer 130, thereby improving material utilization and overall yield. The heterogeneous chip selective mounting method relies on low-cost, stable, and mature packaging technology, avoiding complex foundry process development, and enabling the entire integration process to be completed in the packaging and testing environment without relying on collaborative development and production line adaptation with high-end process foundries.

[0045] In summary, the fabrication method provided in this application does not attempt to forcibly fuse two types of heterogeneous devices on a single wafer. Instead, it uses an adapter structure as a bridge and a wafer map as a reference to achieve optimal mounting. This decouples the originally highly coupled manufacturing task into several sub-steps that can be parallelized, verified, screened, and reused. Furthermore, it enables the detection and screening of each individual chip, achieving precise yield management and simultaneously improving manufacturing flexibility, cost control, and product reliability.

[0046] The preparation method provided in this application will be described in detail step by step below: First, the processing, dicing, and screening of thin-film lithium niobate modulators are completed independently on a mature thin-film lithium niobate platform. This completely decouples the manufacturing and testing of thin-film lithium niobate modulators from subsequent hybrid integration processes, thereby avoiding bringing process uncertainties into the overall process and ensuring that only thin-film lithium niobate modulator chips that meet performance standards enter the subsequent assembly stage.

[0047] It should be understood that as a core active device in high-speed optical interconnects, the electro-optic response characteristics, insertion loss, and half-wave voltage of thin-film lithium niobate modulators are extremely sensitive to material quality, thin film thickness uniformity, domain structure control, and electrode alignment accuracy. If they are directly integrated onto silicon photonic wafers for simultaneous processing, it is necessary to coordinate multiple process steps with different physical mechanisms, such as silicon-based etching, dielectric deposition, metal wiring, and lithium niobate polarization and thin film bonding. This not only significantly increases the difficulty of matching process windows but also makes it extremely easy for local performance degradation to occur due to thermal stress mismatch or plasma damage. The main reason is that when thin-film lithium niobate modulators are forced into the same manufacturing process as other optoelectronic devices, even a small deviation in any step (such as the local enrichment of impurities in a batch of lithium niobate films) can cause multiple modulators on the entire wafer to fail simultaneously. Due to the lack of independent evaluation methods, these defective chips cannot be identified in advance and can only enter the assembly, mounting and final packaging and testing stages of the adapter structure 120 along with the silicon photonics wafer 130. This results in a large amount of manpower, materials and equipment time that has already been invested being wasted, causing a sharp drop in yield and a non-linear increase in unit cost.

[0048] In this application, the high-speed modulator based on thin-film lithium niobate is processed on a mature thin-film lithium niobate platform, and then diced and tested. After the test is completed, the unqualified chips are rejected. This does not pose a challenge to the process and will not bring defective thin-film lithium niobate chips into the subsequent manufacturing process, which brings great benefits to improving yield and reducing costs.

[0049] In practical applications, a thin-film lithium niobate platform refers to a dedicated process line that has been validated through long-term mass production by a foundry, possessing stable film thickness control, low propagation loss, and a high electro-optic coefficient. Its photolithography, etching, polarization, and metallization steps do not require adaptation to silicon photonics process conditions. The dicing described in this application refers to using diamond blades or laser stealth cutting technology to separate a whole thin-film lithium niobate wafer into several independent thin-film lithium niobate modulator chips 110 along a preset dicing path. Testing involves applying an RF drive signal and continuous light input to each independent thin-film lithium niobate modulator chip 110 on a probe station, simultaneously measuring its light output intensity modulation depth, bandwidth response, and DC bias stability, and determining its qualification based on preset electro-optic performance thresholds. During the screening of thin-film lithium niobate modulator chips 110, only those meeting the key indicators such as light response linearity, extinction ratio, and bandwidth exceeding the corresponding thresholds are retained; the remaining substandard chips are physically rejected and do not participate in any subsequent processes.

[0050] Therefore, the fabrication method provided in this application moves the manufacturing quality control point of the highly sensitive thin-film lithium niobate modulator to its dedicated process platform, enabling defect identification to occur at the stage with the lowest cost, easiest intervention, and least impact. This avoids the systemic risks brought about by cross-platform process integration and achieves high-quality management by screening each chip. Through this screening mechanism, it is ensured that all thin-film lithium niobate modulator chips 110 participating in subsequent processes are high-quality chips, eliminating the need to waste costs on unqualified chips, thus improving the overall yield and avoiding waste.

[0051] Subsequently, the optoelectronic device structure, excluding the modulator, is independently fabricated on a mature silicon photonics process platform. Simultaneously, the input and output optical ports required by the modulator are reserved to form an input and output optical coupler. Then, wafer-level testing is performed on the entire silicon photonics wafer 130, and a wafer map is generated to identify the location of qualified chips.

[0052] It should be noted that although silicon photonics technology has been widely used in optical interconnects for data centers, its core components, such as passive waveguides (used to guide optical signal transmission), thermally modulated phase shifters (used to adjust the optical phase to achieve interference or switching functions), and photodetectors (used to convert optical signals into electrical signals), are highly sensitive to process parameters such as waveguide sidewall roughness, etching depth consistency, dielectric coverage uniformity, and metal electrode contact resistance. If the modulator is forced to be manufactured synchronously with other components in the same process flow, a special process window must be reserved for the modulator. This will interfere with the existing standard process stability of the silicon photonics platform, leading to fluctuations in the yield of existing devices and a decrease in batch repeatability.

[0053] In this application, the quality control of the silicon photonics part is completely placed in its dedicated process stage, so as to avoid bringing substandard silicon photonics chips into the subsequent heterogeneous integration process.

[0054] In this process, components other than the modulator, such as passive optical waveguides, thermally modulated phase shifters, and photodetectors, are fabricated on a mature silicon photonics platform. Input and output optical ports for the modulator are reserved to form input-output optical couplers. After completing the above processes, wafer-level testing is performed on the silicon photonics wafer 130 to calibrate good and bad chips, creating a performance-compliant wafer map. This wafer map clearly indicates the performance status of each silicon photonics chip on the wafer, distinguishing the locations of qualified and unqualified chips. Specifically, during wafer-level testing of the fabricated silicon photonics wafer 130, electrical, optical, and functional performance tests are performed on each individual silicon photonics chip to determine whether each chip is qualified. Furthermore, when reserving the input and output optical ports for the modulator to form input-output optical couplers, input and output optical couplers need to be installed at the optical path input and output ends of each chip's functional area, forming a silicon photonics wafer 130 with reserved modulator mounting positions.

[0055] In this approach, there are no process compatibility issues or process difficulties with silicon photonics production lines. Wafer-level testing of silicon photonics wafers 130 can be performed to identify chips that do not meet performance standards, eliminating the need for subsequent manufacturing processes. This results in significant benefits in improving yield and reducing costs.

[0056] In practical applications, a silicon photonics process platform refers to a dedicated production line that has been mass-produced and verified by mainstream silicon photonics foundries, possesses submicron-level lithography precision, low-loss silicon nitride or silicon-based silicon dioxide cladding structures, and mature CMOS-compatible metallization processes. The optoelectronic device structures, excluding the modulator, specifically include passive optical waveguides (POW), thermally modulated phase shifters (TPS), and photodetectors (PD). Their manufacturing process does not involve the introduction of any lithium niobate material or high-voltage polarization processes. The reserved input and output optical ports for the modulator refer to the pre-etching of vertical coupling gratings or edge coupling end faces on the surface of the silicon photonics wafer 130 near the location of each thin-film lithium niobate modulator chip 110 to be installed, and the deposition of an anti-reflection film layer, forming input and output optical couplers that can optically interface with external modulators. Wafer-level testing refers to the process in an automated prober system where fiber optic arrays are used to align each chip's optical port point-by-point, inject test light, and collect the corresponding electrical signals. Key performance indicators such as insertion loss, crosstalk, bandwidth, and linearity are simultaneously evaluated, and the test results are mapped to the wafer's physical coordinate system to generate an electronic wafer map containing the coordinates of all qualified chips. This wafer map serves as the sole guide for subsequent mounting processes, ensuring that only the thin-film lithium niobate modulator chip 110 is accurately transferred to the location of the silicon photonics chip whose performance has been verified to meet the standards.

[0057] Understandably, this application, based on the fabrication of silicon photonic chips using a silicon photonics process platform, has established a silicon photonics-side quality admission mechanism for heterogeneous integration by performing steps such as interface pre-setting, full-domain testing, and coordinate calibration, without altering the existing silicon photonics production line. This ensures both the purity and robustness of the silicon photonics platform process and enables refined manufacturing, ensuring that resource investment is always focused on qualified silicon photonic chips. It fundamentally eliminates ineffective processing and redundant packaging, providing a foundation for high-yield, low-cost, and scalable hybrid integration.

[0058] After fabricating the thin-film lithium niobate modulator chip 110 and the silicon photonics wafer 130, they need to be connected. However, the two have significant differences in material systems, process temperatures, and coefficients of thermal expansion, making monolithic integration on the same wafer difficult. If the thin-film lithium niobate modulator is directly fabricated on the silicon photonics wafer 130, it will lead to problems such as wafer warping, interface stress cracking, optical mode mismatch, and electrode alignment failure. If chip-level bonding or flip-chip bonding is used, it will face practical bottlenecks such as strict micron-level optical coupling tolerance, low yield of multi-channel parallel mounting, and long electrical signal wiring paths with large parasitics.

[0059] Therefore, in the fabrication method provided in this application, the connection between the two is achieved through the adapter structure 120. The adapter structure 120 can be a package substrate or an interposer, which is not limited here. Furthermore, the size of the adapter structure 120 is greater than or equal to the size of the silicon photonics wafer 130. For example, if the size of the silicon photonics wafer 130 is 8 inches or 12 inches, and the size of the thin-film lithium niobate wafer is 4 inches or 6 inches, then the adapter structure 120 can be 8 inches or 12 inches, or other sizes larger than the silicon photonics wafer 130, which is not limited here, thereby enabling conformal assembly of the entire surface with the silicon photonics wafer 130 on a physical scale.

[0060] The adapter structure 120 includes an RDL (Redistribution Layer) for rerouting electrical signals and a light-transmitting interposer layer for optical signal connection. The RDL layer reroutes electrical signals from external driving circuits to the required positions and pitches of the thin-film lithium niobate modulator chip 110, achieving electrical interface matching and signal integrity assurance. The light-transmitting interposer layer is defined as a vertically transparent light-transmitting channel structure formed inside or on the surface of the substrate. Its material can be silicon dioxide, silicon nitride, or polymer. Its lateral dimensions match the modulator's optical waveguide mode field, and its axial direction extends through the substrate thickness. It is used to establish a low-loss, high-alignment-tolerance free-space or near-field optical path connection between the input / output optical couplers of the silicon photonics wafer 130 and the optical input and output terminals of the thin-film lithium niobate modulator chip 110.

[0061] In practical applications, the adapter structure 120 is not simply a mechanical support for the devices, but rather serves as a dual optoelectronic interconnect hub. On one hand, its RDL layer can adopt a multi-layer metal wiring structure, using microvias to achieve inter-layer electrical signal transfer. This rewiring of the wide-pitch, low-density pad signals from the edge of the silicon photonics wafer 130 into a narrow-pitch, high-density pad array adapted to the microelectrodes of the thin-film lithium niobate modulator. On the other hand, its optical intermediate layer can optionally have a set of vertically penetrating rectangular or circular optical holes at the location corresponding to each modulator mounting position. The hole walls are polished or coated with anti-reflection films to reduce scattering and reflection losses, and form an optical coaxial relationship with the input and output optical couplers on the silicon photonics wafer 130 in the vertical direction. This allows the optical signal, after exiting the silicon photonics coupler, to be efficiently coupled into the thin-film lithium niobate modulator without additional lenses, modulated, and then coupled out to the output optical coupler via the same path or a redirection, thus completing the optical path closed loop.

[0062] As can be seen, the adapter structure 120 fundamentally avoids the process conflicts of direct integration of heterogeneous materials through size matching, functional integration of the redistribution layer and the light-transmitting intermediary layer. At the same time, it breaks through the process of light coupling relying on submicron-level active alignment in traditional chip mounting, enabling thin-film lithium niobate modulators to be precisely, stably and scalably embedded in silicon photonics systems at the wafer level in the form of qualified chips after screening, which significantly improves the overall performance consistency and mass production feasibility of hybrid integrated optoelectronic chips.

[0063] Next, the silicon photonics wafer 130 and the adapter structure 120 are assembled. It should be noted that the silicon photonics wafer 130 and the adapter structure 120 are two completely independently manufactured semiconductor substrates with different materials and vastly different thermodynamic properties: the silicon photonics wafer 130 is made of single-crystal silicon, with micron-scale optical waveguides and electrical structures integrated on its surface, and its manufacturing relies on high-temperature processes and a clean environment; while the adapter structure 120 is typically made of organic resin, glass, or silicon-based composite materials, with an embedded metal redistribution layer and a light-transmitting interlayer. Simply stacking the two together cannot guarantee the consistency of deformation caused by temperature changes during long-term use, nor can it achieve the nanometer-scale optical alignment stability and micro-ohm-level electrical contact reliability required for the subsequent mounting of the thin-film lithium niobate modulator chip 110. Therefore, a controllable, repeatable, and detectable assembly process is necessary to firmly combine the silicon photonics wafer 130 and the adapter structure 120 into a single structural unit, i.e., a composite wafer, thereby providing a unified, rigid, and coplanar physical carrier for the subsequent high-precision mounting of heterogeneous devices.

[0064] Optionally, during the assembly of the silicon photonics wafer 130 and the packaging structure, in a clean environment, using wafer bonding equipment, the device side of the silicon photonics wafer 130 is positioned upwards and the functional side of the transition structure 120 downwards. A physical connection between the two is achieved using temporary or permanent bonding materials. The transition structure 120 is a packaging substrate or interposer, and its dimensions match those of the silicon photonics wafer 130, and can be 8 inches or 12 inches. The assembled composite wafer is defined as an integral wafer structure with a unified mechanical reference surface, formed by the physical bonding of the silicon photonics wafer 130 and the transition structure 120. Its overall flatness, thickness uniformity, and thermal expansion matching all meet the requirements of subsequent optoelectronic hybrid mounting processes.

[0065] Specifically, in practical applications, this assembly can be achieved using wafer-level thermo-press bonding or plasma-activated bonding processes. First, the bonding surfaces of the silicon photonics wafer 130 and the transition structure 120 are subjected to plasma cleaning and activation treatment to enhance interfacial affinity. Then, uniform pressure is applied under precise temperature, pressure, and time control to cause controllable deformation of the surface microstructures and form a stable interface connection. During this process, the redistribution layer and the light-transmitting interlayer in the transition structure 120 maintain functional integrity and do not break or shift due to bonding stress. After assembly, the composite wafer can be held, transported, and positioned by a robotic arm like a single wafer, and used as a unified reference benchmark in subsequent photolithography, alignment, and mounting processes.

[0066] After assembling the composite wafer, qualified thin-film lithium niobate modulator chips need to be mounted onto the composite wafer. In this application, only the tested and verified qualified thin-film lithium niobate modulator chips 110 are selectively mounted onto the areas of the silicon photonics wafer 130 that have been confirmed to be functional, thereby avoiding the situation where the entire silicon photonics chip is scrapped due to the failure of individual modulators.

[0067] Optionally, in this embodiment, the qualified thin-film lithium niobate modulator chips 110 are transferred and mounted onto the composite wafer one by one based on the wafer map, and optical and electrical connections are completed. The specific process is as follows: First, obtain the wafer map generated by the level test of the silicon photonics wafer 130. This wafer map is an electronic map that precisely identifies whether each chip functional area on the silicon photonics wafer 130 is qualified in the form of coordinates. Subsequently, according to the qualified chip position information indicated by the wafer map, locate the modulator installation positions in the corresponding areas on the composite wafer. Then, use a high-precision pick-and-place device to pick up the qualified thin-film lithium niobate modulator chips 110 that have been individually tested and screened, visually calibrate them, and thermally press or ultraviolet-cure them onto the corresponding installation positions on the composite wafer. During this process, the optical input end of each thin-film lithium niobate modulator chip 110 is optically coupled with the input optical coupler, the optical output end is optically coupled with the output optical coupler, and its electrodes are electrically connected to the external drive circuit through the RDL layer, thereby achieving double connectivity of the optical path and the circuit.

[0068] In the actual application process, the transfer and mounting one by one is not a random or full-coverage operation, but is strictly controlled by the guidance of the wafer map. For example, there are hundreds of chip functional areas distributed on a 12-inch silicon photonics wafer 130, and some of them are marked as unqualified by the wafer map due to problems such as excessive waveguide loss, low coupler efficiency, or electrical leakage.

[0069] As Figure 3 shown, Figure 3 is a schematic diagram of a wafer map. In this figure, 9 chip functional areas are schematically shown. After testing, 2 of the chip functional areas are marked as unqualified, namely Chip02 and Chip06, and the remaining chip functional areas are marked as qualified. Of course, the wafer map can also adopt other diagrams. For example, as Figure 4 shown, the white represents the chip functional areas that pass the test, and the black represents the chip functional areas with unqualified test results.

[0070] Furthermore, during mounting, the mounting operation is performed only on the composite wafer locations above those functional areas marked as qualified on the wafer map, leaving the remaining areas empty. This selective mounting method allows for the mixed integration of different batches, performance levels, and even different models of thin-film lithium niobate modulator chips 110 on the same silicon photonics wafer 130, as long as their optical mode fields and electrical interfaces meet the matching conditions. Simultaneously, because the mounting operation occurs under the premise that the composite wafer has formed a unified mechanical reference, each thin-film lithium niobate modulator chip 110 can achieve high-efficiency coupling with the input and output optical couplers in the underlying silicon photonics wafer 130 with nanometer-level repeatability, and its electrodes can stably contact the pre-set pads on the RDL layer without the need for additional wire bonding or flexible circuit transitions.

[0071] Therefore, based on the aforementioned wafer map, qualified thin-film lithium niobate modulator chips 110 are transferred and mounted one by one onto the composite wafer, and optical and electrical connections are completed. This solves the problem of area waste and yield loss caused by the forced integration of all modulators on the silicon photonics wafer 130. This application, through wafer map-driven on-demand point-to-point assembly, ensures that every qualified area of ​​the silicon photonics wafer 130 is fully utilized, completely avoiding local resource idleness caused by a globally uniform layout, and significantly improving wafer area utilization and overall yield of the terminal chip.

[0072] Semiconductor chip manufacturing ultimately requires dividing the entire wafer into individual usable units for mounting onto circuit boards or systems. Therefore, the mounted composite wafer needs to be sliced ​​and tested to obtain a silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip.

[0073] Specifically, after the thin-film lithium niobate modulator chip 110 is individually mounted onto the composite wafer and optically and electrically connected, the aforementioned packaged structure is physically separated using a diamond blade or laser cutting equipment to form multiple independent chip units. Subsequently, each separated unit undergoes electrical continuity testing, optical signal coupling efficiency verification, and data transmission rate confirmation to verify whether it meets the performance requirement of 400Gbps per wave (i.e., 400Gbits of data transmitted per second per channel). Thus, the slicing and testing steps work together to achieve both physical individualization and final functional completeness assessment, resulting in a single-wavelength 400Gbps silicon photonics thin-film lithium niobate hybrid integrated optoelectronic chip.

[0074] It should be noted that for the defective chip functional areas in the wafer map, which do not have thin-film lithium niobate modulators mounted on them, the chip functional areas can be directly discarded after cutting and separation. The overall processing cost is not invested in the defective chip functional areas, thus avoiding waste and reducing costs.

[0075] In summary, the preparation method provided in this application has at least the following beneficial effects: (1) It avoids the adjustment and challenge of existing mature manufacturing processes. Silicon photonic wafers 130 and thin-film lithium niobate wafers can be processed on mature silicon photonic process platforms and lithium niobate process platforms respectively. No new process development and hybrid processes are required. Existing mature process platforms and foundries can be utilized.

[0076] (2) The processed silicon photonics wafer 130 and thin film lithium niobate wafer can be tested separately to identify good and bad chips. The subsequent process only needs to process and process the chips that meet the performance standards, which improves the yield and reduces the cost.

[0077] (3) The substrate or interposer can be matched with the size of the silicon photonics wafer 130. Although the size of the thin film lithium niobate wafer cannot be matched with the two, the technology of removing defective chips by slicing and then attaching them separately avoids the waste of area of ​​attaching 4 or 6-inch thin film lithium niobate wafers onto 8 or 12-inch wafers, thereby improving yield and reducing costs.

[0078] (4) By using low-cost, stable and mature packaging technology, the complex process development of foundry is avoided.

[0079] Based on the above implementation, this application provides a silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip, fabricated using the above-described preparation method, comprising: A silicon photonics wafer 130 integrates optoelectronic device structures other than the modulator and input / output optical couplers; a transition structure 120 is assembled with the silicon photonics wafer 130 to form a composite wafer, including an RDL layer for electrical signal rewiring and a light-transmitting interposer layer for optical signal connection; at least one thin-film lithium niobate modulator chip 110 is mounted on the composite wafer and is optically and electrically connected to the silicon photonics wafer 130 through the transition structure 120.

[0080] Understandably, this application constructs a novel optoelectronic chip by organically integrating optical and electronic components from three different process systems. Its core lies in using a silicon photonic wafer 130 as a substrate to carry the main circuit function, using a transition structure 120 as a bridge to realize signal communication between heterogeneous components, and using a thin-film lithium niobate modulator chip 110 as a high-speed optical signal control unit. The three work together to form a single device with complete optoelectronic conversion and transmission capabilities.

[0081] Specifically, this silicon photonics thin-film lithium niobate hybrid integrated optoelectronic chip is not manufactured entirely from a single material or process, but rather consists of three interconnected physical parts: The first part is the silicon photonics wafer 130, on which other optoelectronic device structures, except for the modulator, have been pre-fabricated, such as passive optical waveguides to guide light propagation, thermally modulated phase shifters to adjust the light phase, and photodetectors to convert optical signals into electrical signals. Input and output optical couplers are also positioned at corresponding locations for future optical path ports to the modulator. The second part is the adapter structure 120, which, when assembled with the silicon photonics wafer 130, forms a composite wafer. It contains a redistribution layer and a light-transmitting interposer layer. The former redistributes the electrical signals from the external driving circuit and connects them to the electrodes of the thin-film lithium niobate modulator chip 110, while the latter provides a transparent channel allowing optical signals to pass through the structure and be stably transmitted between the couplers of the silicon photonics wafer 130 and the thin-film lithium niobate modulator chip 110. The third part is at least one thin-film lithium niobate modulator chip 110, which is precisely mounted at a designated position on the composite wafer. Its optical input end is aligned and optically coupled to the input optical coupler on the silicon photonics wafer 130, and its optical output end is optically coupled to the output optical coupler. At the same time, its electrodes are electrically connected to the external circuit through the redistribution layer in the transition structure 120.

[0082] Based on this, the silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip can be directly applied to optical interconnect systems, such as optical interconnect systems used in data centers. This system includes a graphics processing unit (GPU) server, a network switch, and an optical engine. The optical transceiver module inside the optical engine uses the aforementioned silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip, thereby leveraging its advantages of high bandwidth, low power consumption, and small size to improve the transmission efficiency and stability of massive amounts of data between the server and the switch.

[0083] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

[0084] It will be apparent to those skilled in the art that this application is not limited to the details of the exemplary embodiments described above, and that this application can be implemented in other specific forms without departing from the spirit or essential characteristics of this application. Therefore, the embodiments should be considered illustrative and non-limiting in all respects, and the scope of this application is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within this application. No reference numerals in the claims should be construed as limiting the scope of the claims.

Claims

1. A method for fabricating a silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip, characterized in that, The method includes: Based on the thin-film lithium niobate platform, multiple thin-film lithium niobate modulators are fabricated on thin-film lithium niobate wafers, diced to form discrete thin-film lithium niobate modulator chips, and tested to screen out qualified thin-film lithium niobate modulator chips. Based on the silicon photonics process platform, optoelectronic device structures other than modulators are fabricated on silicon photonics wafers, and input and output optical ports of modulators are reserved to form input and output optical couplers; wafer-level testing is performed on the fabricated silicon photonics wafers to generate wafer maps that identify the locations of qualified chips; A transition structure with dimensions matching the silicon photonics wafer is provided, and the transition structure includes an RDL layer for electrical signal rewiring and a light-transmitting interposer layer for optical signal connection. The silicon photonics wafer is assembled with the transition structure to form a composite wafer; Based on the wafer map, qualified thin-film lithium niobate modulator chips are transferred and mounted one by one onto the composite wafer, and optical and electrical connections are completed. The composite wafer after mounting was sliced ​​and tested to obtain a silicon photonic thin film lithium niobate hybrid integrated optoelectronic chip.

2. The method for fabricating a silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip according to claim 1, characterized in that, The dimensions of the adapter structure are greater than or equal to the dimensions of the silicon photonics wafer.

3. The method for fabricating a silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip according to claim 1, characterized in that, The optoelectronic device structure, excluding the modulator, includes a passive optical waveguide, a thermally modulated phase shifter, and a photodetector.

4. The method for fabricating a silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip according to claim 1, characterized in that, The steps for reserving input and output optical ports for the modulator to form an input-output optical coupler include: An input optical coupler and an output optical coupler are respectively set at the optical path input and output ends of each chip functional area to form a silicon photonic wafer with reserved modulator mounting positions.

5. The method for fabricating a silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip according to claim 1, characterized in that, The adapter structure is a packaging substrate or an interposer.

6. The method for fabricating a silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip according to claim 1, characterized in that, The steps of transferring and mounting qualified thin-film lithium niobate modulator chips one by one onto the composite wafer and completing the optical and electrical connections include: Qualified thin-film lithium niobate modulator chips are mounted one by one to the modulator mounting positions of the corresponding chips on the composite wafer, so that the optical input end of the thin-film lithium niobate modulator chip is optically coupled to the input optical coupler, the optical output end is optically coupled to the output optical coupler, and its electrodes are electrically connected to the external driving circuit through the RDL layer.

7. The method for fabricating a silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip according to claim 1, characterized in that, The silicon photonics wafer is 8 inches or 12 inches in size, and the thin-film lithium niobate wafer is 4 inches or 6 inches in size.

8. The method for fabricating a silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip according to claim 1, characterized in that, The silicon photonic wafer includes multiple silicon photonic chips. The steps for performing wafer-level testing on the fabricated silicon photonic wafer include: Each individual silicon photonic chip undergoes electrical, optical, and functional performance testing.

9. A silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip, characterized in that, The silicon photonic thin-film lithium niobate hybrid integrated optoelectronic chip, fabricated using the preparation method described in any one of claims 1 to 8, comprises: Silicon photonics wafers, on which optoelectronic device structures other than modulators and input / output optical couplers are integrated; The adapter structure is assembled with the silicon photonics wafer to form a composite wafer, including an RDL layer for electrical signal rewiring and a light-transmitting interposer layer for optical signal connection. At least one thin-film lithium niobate modulator chip is mounted on the composite wafer and optically and electrically connected to the silicon photonics wafer through the adapter structure.

10. An optical interconnect system, comprising a GPU server, a switch, and an optical engine, characterized in that, At least one optical transceiver module in the optical engine employs the silicon photonic thin film lithium niobate hybrid integrated optoelectronic chip as described in claim 9.

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