Nitride semiconductor epitaxial wafer, method for manufacturing the same, and optoelectronic device

Abstract

This invention relates to a nitride semiconductor epitaxial wafer, its fabrication method, and optoelectronic devices. The nitride semiconductor epitaxial wafer comprises a substrate, a first n-type nitride layer, a nitride control layer, a composite nanopillar structure layer, a nitride buffer layer, a second n-type nitride layer, a light-emitting layer, and a p-type nitride layer, stacked sequentially. The composite nanopillar structure layer includes a first nanopillar spacer unit and a second nanopillar spacer unit. The height of the first nanopillar spacer unit is greater than the height of the second nanopillar spacer unit. The first nanopillar spacer unit includes a first metal microstructure, a first nanopillar, and a first top unit. The second nanopillar spacer unit includes a second metal microstructure, a second nanopillar, and a second top unit. By adopting the solution provided by this invention, the probability of dislocation extension to the light-emitting layer is reduced, leakage channels are reduced, and radiative recombination is enhanced, thereby improving the brightness, leakage current, and ESD antistatic discharge performance of the epitaxial wafer.

Description

Technical Field

[0001] This invention belongs to the field of optoelectronic device technology, and relates to an epitaxial wafer structure, particularly to a nitride semiconductor epitaxial wafer, its preparation method, and an optoelectronic device. Background Technology

[0002] Wide bandgap nitride semiconductor materials have advantages such as high breakdown field strength, high thermal conductivity, and fast electron saturation mobility, and have broad application prospects in fields such as blue-green LEDs, photodetectors, and high-temperature, high-frequency, high-power devices.

[0003] Because nitride single-crystal materials are scarce in nature, and the growth of bulk single-crystal nitrides is extremely difficult, the growth of nitride materials mainly employs heteroepitaxial growth. Currently, the most mature epitaxial method for preparing nitride materials is substrate-based growth. However, due to lattice mismatch and thermal expansion mismatch between the substrate and the epitaxial layer, the epitaxially grown crystal material exhibits high dislocation density and high stress. Furthermore, dislocations and defects arising from lattice constants and thermal mismatches between different materials extend upwards with the growth of the epitaxial layer. These dislocations act as non-radiative recombination centers during device operation, affecting device efficiency, and also act as leakage channels, increasing leakage current and causing rapid device aging. This impacts device efficiency and lifespan, limiting its application in the semiconductor field.

[0004] In order to broaden the application of nitride materials in semiconductor optoelectronic devices, there is an urgent need for a nitride semiconductor epitaxial wafer that can reduce the dislocation density during epitaxial growth, its preparation method, and optoelectronic devices. Summary of the Invention

[0005] The purpose of this invention is to provide a nitride semiconductor epitaxial wafer, its preparation method, and an optoelectronic device, which can delay the merging process of the lateral epitaxial growth surface of the nitride buffer layer, thereby allowing the dislocations inside to fully redirect and self-annihilate, thus reducing the probability of dislocations extending to the light-emitting layer, reducing leakage channels, enhancing radiative recombination, thereby improving the luminous brightness of the nitride semiconductor epitaxial wafer, as well as improving leakage current and ESD antistatic discharge performance.

[0006] To achieve this objective, the present invention adopts the following technical solution:

[0007] In a first aspect, the present invention provides a nitride semiconductor epitaxial wafer, the nitride semiconductor epitaxial wafer comprising a substrate, a first n-type nitride layer, a nitride control layer, a composite nanopillar structure layer, a nitride buffer layer, a second n-type nitride layer, a light-emitting layer and a p-type nitride layer stacked sequentially.

[0008] The composite nanopillar structure layer includes first nanopillar spacer units spaced apart and second nanopillar spacer units disposed between adjacent first nanopillar spacer units.

[0009] The height of the first nanopillar spacer unit is greater than the height of the second nanopillar spacer unit;

[0010] The first nanopillar spacer unit includes a first metal microstructure, a first nanopillar, and a first top unit; the first nanopillar is disposed on the top surface of the first metal microstructure; the first top unit is disposed on the top surface of the first nanopillar.

[0011] The second nanopillar spacer unit includes a second metal microstructure, a second nanopillar, and a second top unit; the second nanopillar is disposed on the top surface of the second metal microstructure; the second top unit is disposed on the top surface of the second nanopillar.

[0012] The composite nanopillar structure layer in this invention enhances the lateral epitaxial growth of the nitride buffer layer and delays the merging process of its lateral epitaxial growth surface, thereby causing the dislocations inside to self-annihilate, thus obtaining a high-quality nitride buffer layer growth template, reducing the probability of dislocations extending upward to the light-emitting layer, reducing leakage channels, enhancing radiative recombination, and thus improving the luminescence brightness and antistatic discharge performance of the nitride semiconductor epitaxial wafer.

[0013] Preferably, the light-emitting layer includes a quantum well layer containing In elements. By setting the composite nanopillar structure layer, the incorporation of In atoms is easier under tensile stress conditions on the growth surface of the quantum well layer, which greatly improves the incorporation of In in the light-emitting layer and makes the resulting nitride semiconductor epitaxial wafer suitable for fabricating long-wavelength optoelectronic infrared devices that emit red and orange light.

[0014] Preferably, the first nanopillar spacer unit further includes a first side unit disposed on the side of the first nanopillar unit; the second nanopillar spacer unit further includes a second side unit disposed on the side of the second nanopillar unit.

[0015] Preferably, a silicon-aluminum nitride layer is disposed on the surface of the nitride control layer between any two adjacent first nanopillar spacers and second nanopillar spacers.

[0016] Preferably, the first metal microstructure is made of AlGaN and the second metal microstructure is made of AlN; or, the first metal microstructure is made of AlN and the second metal microstructure is made of AlN.

[0017] Preferably, the first nanopillar and the second nanopillar are each made of silicon.

[0018] Preferably, the materials of the first top unit and the second top unit each independently include AlN.

[0019] Secondly, the present invention provides a method for preparing a nitride semiconductor epitaxial wafer, the method comprising the following steps:

[0020] A first n-type nitride layer, a nitride regulation layer, and a composite nanopillar structure layer are sequentially fabricated on the surface of a substrate. The composite nanopillar structure layer includes spaced-apart first nanopillar spacer units and second nanopillar spacer units disposed between adjacent first nanopillar spacer units. The height of the first nanopillar spacer units is greater than the height of the second nanopillar spacer units. Each first nanopillar spacer unit includes a first metal microstructure, a first nanopillar, and a first top unit. The first nanopillar is disposed on the top surface of the first metal microstructure. The first top unit is disposed on the top surface of the first nanopillar. The second nanopillar spacer unit includes a second metal microstructure, a second nanopillar, and a second top unit. The second nanopillar is disposed on the top surface of the second metal microstructure. The second top unit is disposed on the top surface of the second nanopillar.

[0021] A nitride buffer layer, a second n-type nitride layer, a light-emitting layer, and a p-type nitride layer are sequentially grown on the surface of the composite nanopillar structure layer.

[0022] This invention, through the setting of a composite nanopillar structure layer, enhances the lateral epitaxial growth of the nitride buffer layer and delays the merging process of its lateral epitaxial growth surface, thereby causing the dislocations inside to self-annihilate, thus obtaining a high-quality nitride buffer layer growth template, reducing the probability of dislocations extending upward to the light-emitting layer, reducing leakage channels, enhancing radiative recombination, and thus improving the luminescence brightness and antistatic discharge performance of the nitride semiconductor epitaxial wafer.

[0023] Preferably, the first nanopillar spacer unit further includes a first side unit disposed on the side of the first nanopillar unit; the second nanopillar spacer unit further includes a second side unit disposed on the side of the second nanopillar unit; and a silicon-aluminum nitride layer is disposed on the surface of the nitride control layer between any adjacent first nanopillar spacer unit and second nanopillar spacer unit.

[0024] Preferably, the method for preparing the composite nanopillar structure layer includes:

[0025] S1. A first metal microsphere distribution is formed on the surface of the nitride control layer.

[0026] S2. The nitride control layer having the first metal microsphere distribution is heat-treated, and then a second metal microsphere distribution is formed on the surface of the nitride control layer after the heat treatment.

[0027] S3. Perform heat treatment on the first metal microsphere distribution and the second metal microsphere distribution.

[0028] S4, growth of nanopillar structures.

[0029] S5. Nitrogen treatment is performed to obtain the composite nanopillar structure layer.

[0030] Preferably, the heat treatment of the first metal microsphere distribution and the second metal microsphere distribution includes:

[0031] S31. Perform N heat treatment for 30s to 180s at a temperature of 1000℃ to 1200℃ and a pressure of 300 torr to 600 torr.

[0032] S32. Perform Si heat treatment for 90s to 300s at a temperature of 900℃ to 1000℃ and a pressure of 300 to 600 torr.

[0033] S33. Perform heat treatment for 60s to 180s at a temperature of 1000℃ to 1100℃ and a pressure of 300 torr to 600 torr.

[0034] S34. Perform Al heat treatment for 300s to 900s at a temperature of 500℃ to 1000℃ and a pressure of 300 to 600 torr.

[0035] Preferably, the formation of the first metal microsphere distribution on the surface of the nitride control layer includes:

[0036] Under conditions of 500°C to 1000°C and 400 torr to 600 torr, a first metal capping layer is grown on the surface of the nitride control layer, and the first metal capping layer is annealed for 50s to 300s to generate a first metal microsphere distribution with a height of 10nm to 100nm.

[0037] Preferably, the step of forming a second metal microsphere distribution on the surface of the nitride control layer after heat treatment includes: forming a second metal capping layer on the surface of the nitride control layer after heat treatment at a temperature of 500°C to 1000°C and a pressure of 400 to 600 tor, and annealing the second metal capping layer for 60 to 450 seconds to generate a second metal microsphere distribution with a height of 10 nm to 100 nm.

[0038] Preferably, the nitride control layer is a Ga vacancy distribution layer; the heat treatment of the nitride control layer having the first metal microsphere distribution includes:

[0039] Ga is heat-treated for 10 to 40 seconds at a temperature of 1000°C to 1200°C and a pressure of 200 to 500 torr to achieve a Ga vacancy concentration of 1 × 10⁻⁶ in the Ga vacancy distribution layer. 17 cm -3 Up to 1×10 18 cm -3 ;or,

[0040] The nitride control layer is an N-vacancy distribution layer; the heat treatment of the nitride control layer having the first metal microsphere distribution includes:

[0041] Under conditions of 1000℃ to 1200℃ and 200 torr to 500 torr, N heat treatment is performed for 15 to 60 seconds to achieve an N vacancy concentration of 1 × 10⁻⁶ in the N vacancy distribution layer. 17 cm -3 Up to 1×10 18 cm -3 .

[0042] Preferably, the surface of the first metal microspheres has a coating layer after N heat treatment, and the heat treatment of the nitride control layer having the first metal microsphere distribution further includes:

[0043] In a reducing gas atmosphere, the first metal microsphere distribution is heat-treated for 30s to 240s at a temperature of 1050℃ to 1150℃ and a pressure of 100 torr to 300 torr to decompose the coating layer on the surface of the first metal microsphere.

[0044] Preferably, the grown nanopillar structure comprises:

[0045] S41. Under conditions of temperature of 500℃ to 1000℃ and pressure of 300 torr to 600 torr, the Si source is introduced at a flow rate of 20 sccm to 200 sccm for 10s to 100s.

[0046] S42. Under conditions of temperature of 500℃ to 1000℃ and pressure of 300 torr to 600 torr, interrupt the Si source for 10s to 180s.

[0047] S43, and S41 and S42 are repeated 100 to 1000 times in a periodic cycle to complete the growth of the nanopillar structure.

[0048] Preferably, the nitrogen treatment includes: introducing an N source at a flow rate of 1 slm to 100 slm for 100 s to 600 s at a temperature of 600°C to 1250°C.

[0049] Preferably, the preparation of the first n-type nitride layer comprises: under conditions of a temperature of 850°C to 1000°C and a pressure of 200 torr to 400 torr, introducing a Ga source with a flow rate of 20 sccm to 200 sccm, an N source with a flow rate of 20 slm to 100 slm, and a Si source with a flow rate of 10 sccm to 100 sccm, to grow a doping concentration of 1 × 10⁻⁶. 17 cm -3 Up to 1×10 18 cm -3 The first n-type nitride layer.

[0050] Preferably, the preparation of the nitride control layer includes: growing a nitride control layer with a thickness of 1 nm to 10 nm on the surface of the first n-type nitride layer under conditions of temperature of 1050°C to 1250°C and pressure of 100 torr to 300 torr.

[0051] Preferably, the growth of the nitride buffer layer includes: under conditions of a temperature of 900°C to 1250°C and a pressure of 100 torr to 300 torr, introducing a Ga source with a flow rate of 100 sccm to 500 sccm and an N source with a flow rate of 20 slm to 100 slm, to grow a nitride buffer layer with a thickness of 500 nm to 1500 nm on the surface of the composite nanopillar structure layer.

[0052] Preferably, growing the second n-type nitride layer includes: under conditions of a temperature of 900°C to 1200°C and a pressure of 100 torr to 300 torr, introducing a Ga source with a flow rate of 100 sccm to 500 sccm, an N source with a flow rate of 20 slm to 100 slm, and a Si source with a flow rate of 50 sccm to 300 sccm, to grow on the surface of the nitride buffer layer a thickness of 1000 nm to 5000 nm and a doping concentration of 1 × 10⁻⁶. 18 cm -3 Up to 5×10 19 cm -3 The n-type nitride layer.

[0053] Preferably, growing the light-emitting layer includes:

[0054] A11. At a temperature of 650°C to 950°C and a pressure of 200 torr to 400 torr, a Ga source with a flow rate of 100 sccm to 300 sccm, an In source with a flow rate of 500 sccm to 2000 sccm, and an N source with a flow rate of 30 slm to 100 slm are introduced to grow a quantum well layer with a thickness of 0.5 nm to 5 nm.

[0055] A12. Under conditions of 700°C to 950°C and 200 torr to 400 torr, a Ga source with a flow rate of 100 sccm to 300 sccm and an N source with a flow rate of 30 slm to 100 slm are introduced to grow a quantum barrier layer with a thickness of 6 nm to 25 nm.

[0056] The light-emitting layer is obtained by periodically alternating A11 and A12 2 to 15 times;

[0057] Preferably, growing the p-type nitride layer comprises: growing a thickness of 50 nm to 300 nm and a doping concentration of 1 × 10⁻⁶ under conditions of a temperature of 850 °C to 1050 °C and a pressure of 200 torr to 600 torr. 19 cm -3 Up to 5×10 20 cm -3 The p-type nitride layer.

[0058] Thirdly, the present invention provides an optoelectronic device, the optoelectronic device comprising the nitride semiconductor epitaxial wafer described in the first aspect, or comprising the nitride semiconductor epitaxial wafer prepared by the preparation method described in the second aspect.

[0059] Compared with the prior art, the present invention has the following beneficial effects:

[0060] This invention, through the setting of a composite nanopillar structure layer, enhances the lateral epitaxial growth of the nitride buffer layer and delays the merging process of its lateral epitaxial growth surface, thereby causing the dislocations inside to self-annihilate, thus obtaining a high-quality nitride buffer layer growth template, reducing the probability of dislocations extending upward to the light-emitting layer, reducing leakage channels, enhancing radiative recombination, and thus improving the luminescence brightness and antistatic discharge performance of the nitride semiconductor epitaxial wafer. Attached Figure Description

[0061] Figure 1 This is a schematic diagram of the structure of the nitride semiconductor epitaxial wafer provided in Embodiment 1 of the present invention.

[0062] Wherein: 1, substrate; 2, first n-type nitride layer; 3, nitride control layer; 4, nitride buffer layer; 51, first metal microstructure; 52, first nanopillar; 53, first top unit; 54, first side unit; 61, second metal microstructure; 62, second nanopillar; 63, second top unit; 64, second side unit; 7, second n-type nitride layer; 8, light-emitting layer; 9, p-type nitride layer; 10, silicon-aluminum nitride layer. Detailed Implementation

[0063] The technical solution of the present invention will be further illustrated below through specific embodiments. Those skilled in the art should understand that the embodiments are merely illustrative of the present invention and should not be considered as specific limitations thereof.

[0064] An embodiment of the present invention provides a nitride semiconductor epitaxial wafer, which includes a substrate, a first n-type nitride layer, a nitride control layer, a composite nanopillar structure layer, a nitride buffer layer, a second n-type nitride layer, a light-emitting layer, and a p-type nitride layer stacked sequentially.

[0065] The composite nanopillar structure layer includes first nanopillar spacer units spaced apart and second nanopillar spacer units disposed between adjacent first nanopillar spacer units.

[0066] The height of the first nanopillar spacer unit is higher than the height of the second nanopillar spacer unit.

[0067] The first nanopillar spacer unit includes a first metal microstructure, a first nanopillar, and a first top unit; the first nanopillar is disposed on the top surface of the first metal microstructure; the first top unit is disposed on the top surface of the first nanopillar;

[0068] The second nanopillar spacer unit includes a second metal microstructure, a second nanopillar, and a second top unit; the second nanopillar is disposed on the top surface of the second metal microstructure; the second top unit is disposed on the top surface of the second nanopillar.

[0069] The composite nanopillar structure layer in this invention enhances the lateral epitaxial growth of the nitride buffer layer and delays the merging process of its lateral epitaxial growth surface, thereby causing the dislocations inside to self-annihilate, thus obtaining a high-quality nitride buffer layer growth template, reducing the probability of dislocations extending upward to the light-emitting layer, reducing leakage channels, enhancing radiative recombination, and thus improving the luminescence brightness and antistatic discharge performance of the nitride semiconductor epitaxial wafer.

[0070] In some embodiments, the light-emitting layer includes a quantum well layer containing In elements. By setting up a composite nanopillar structure layer, the incorporation of In atoms is easier under tensile stress conditions on the growth surface of the quantum well layer, which greatly improves the incorporation of In in the light-emitting layer and makes the resulting nitride semiconductor epitaxial wafer suitable for fabricating long-wavelength optoelectronic devices that emit red and orange light.

[0071] The composite nanopillar structure layer includes spaced first nanopillar spacers and second nanopillar spacers disposed between adjacent first nanopillar spacers. The first nanopillar spacers coarsen the nitride buffer layer during growth, enhancing lateral epitaxial growth and slowing down transverse growth, resulting in a flat surface. This allows for sufficient dislocation redirection and reduces surface dislocation distribution in the nitride buffer layer. During the nitride buffer layer growth and merging process, due to differences in grain size, it is difficult to achieve optimal balance between polycrystalline interfaces, leading to high stress in the nitride buffer layer. The placement of the second nanopillar spacers allows the nitride buffer layer between the first nanopillar spacers to better release stress through height differences, facilitating the fabrication of large-size, highly uniform nitride semiconductor epitaxial wafers.

[0072] In some embodiments, the first nanopillar spacer unit further includes a first side unit disposed on the side of the first nanopillar unit; the second nanopillar spacer unit further includes a second side unit disposed on the side of the second nanopillar unit.

[0073] In some embodiments, a silicon-aluminum nitride layer is disposed on the surface of the nitride control layer between any adjacent first nanopillar spacer unit and second nanopillar spacer unit.

[0074] In some embodiments, the first metal microstructure is made of AlGaN and the second metal microstructure is made of AlN; or, the first metal microstructure is made of AlN and the second metal microstructure is made of AlN.

[0075] In some embodiments, the first nanopillar and the second nanopillar are each independently made of silicon.

[0076] In some embodiments, the materials of the first top unit and the second top unit are independently AlN.

[0077] Some embodiments of the present invention provide a method for preparing a nitride semiconductor epitaxial wafer, the method comprising the following steps:

[0078] A first n-type nitride layer, a nitride regulation layer, and a composite nanopillar structure layer are sequentially fabricated on the surface of a substrate. The composite nanopillar structure layer includes spaced first nanopillar spacer units and second nanopillar spacer units disposed between adjacent first nanopillar spacer units. The height of the first nanopillar spacer units is greater than the height of the second nanopillar spacer units. Each first nanopillar spacer unit includes a first metal microstructure, a first nanopillar, and a first top unit. The first nanopillar is disposed on the top surface of the first metal microstructure. The first top unit is disposed on the top surface of the first nanopillar. The second nanopillar spacer unit includes a second metal microstructure, a second nanopillar, and a second top unit. The second nanopillar is disposed on the top surface of the second metal microstructure. The second top unit is disposed on the top surface of the second nanopillar.

[0079] A nitride buffer layer, a second n-type nitride layer, a light-emitting layer, and a p-type nitride layer are sequentially grown on the surface of the composite nanopillar structure layer.

[0080] This invention, through the setting of a composite nanopillar structure layer, enhances the lateral epitaxial growth of the nitride buffer layer and delays the merging process of its lateral epitaxial growth surface, thereby causing the dislocations inside to self-annihilate, thus obtaining a high-quality nitride buffer layer growth template, reducing the probability of dislocations extending upward to the light-emitting layer, reducing leakage channels, enhancing radiative recombination, and thus improving the luminescence brightness and antistatic discharge performance of the nitride semiconductor epitaxial wafer.

[0081] In some embodiments, the first nanopillar spacer unit further includes a first side unit disposed on the side of the first nanopillar unit; the second nanopillar spacer unit further includes a second side unit disposed on the side of the second nanopillar unit; and a silicon-aluminum nitride layer is disposed on the surface of the nitride control layer between any adjacent first nanopillar spacer unit and second nanopillar spacer unit.

[0082] In some embodiments, the fabrication of the first n-type nitride layer includes: introducing a Ga source with a flow rate of 20 sccm to 200 sccm, an N source with a flow rate of 20 slm to 100 slm, and a Si source with a flow rate of 10 sccm to 100 sccm at a temperature of 850°C to 1000°C and a pressure of 200 to 400 torr, to grow a doping concentration of 1 × 10⁻⁶. 17 cm -3 Up to 1×10 18 cm -3 The first n-type nitride layer.

[0083] The temperature for preparing the first n-type nitride layer can be 850℃, 900℃, 950℃ or 1000℃, etc.

[0084] The pressure for preparing the first n-type nitride layer can be 200 torr, 250 torr, 300 torr, 350 torr, or 400 torr, etc.

[0085] The Ga source flux used to prepare the first n-type nitride layer can be 20 sccm, 50 sccm, 100 sccm, 150 sccm, or 200 sccm, etc.

[0086] The N source flux during the preparation of the first n-type nitride layer can be 20 slm, 30 slm, 40 slm, 50 slm, 60 slm, 80 slm, or 100 slm, etc.

[0087] The Si source flux used to prepare the first n-type nitride layer can be 10 sccm, 30 sccm, 50 sccm, 60 sccm, 80 sccm, or 100 sccm, etc.

[0088] The doping concentration during the preparation of the first n-type nitride layer can be 1×10⁻⁶. 17 cm -3 3×10 17 cm -3 5×10 17 cm -3 8×10 17 cm -3 Or 1×10 18 cm -3 wait.

[0089] In some embodiments, the preparation of the nitride control layer includes growing a nitride control layer with a thickness of 1 nm to 10 nm on the surface of the first n-type nitride layer at a temperature of 1050 °C to 1250 °C and a pressure of 100 torr to 300 torr.

[0090] The temperature for preparing the nitride control layer can be 1050℃, 1100℃, 1150℃, 1200℃ or 1250℃, etc.

[0091] The pressure used to prepare the nitride control layer can be 100 torr, 150 torr, 200 torr, 250 torr, or 300 torr, etc.

[0092] The thickness of the nitride control layer can be 1 nm, 3 nm, 5 nm, 6 nm, 8 nm, or 10 nm, etc.

[0093] In some embodiments, the method for preparing the composite nanopillar structure layer includes:

[0094] S1. A first metal microsphere distribution is formed on the surface of the nitride control layer.

[0095] S2. The nitride control layer with the first metal microsphere distribution is heat-treated, and then a second metal microsphere distribution is formed on the surface of the heat-treated nitride control layer.

[0096] S3. Heat treatment is performed on the first and second metal microsphere distributions.

[0097] S4, growth of nanopillar structures.

[0098] S5. Nitrogen treatment is performed to obtain a composite nanopillar structure layer.

[0099] In some embodiments, forming a first metal microsphere distribution on the surface of the nitride control layer includes:

[0100] Under conditions of 500℃ to 1000℃ and 400 torr to 600 torr, a first metal capping layer is grown on the surface of the nitride control layer, and the first metal capping layer is annealed for 50s to 300s to generate a first metal microsphere distribution with a height of 10nm to 100nm.

[0101] The temperature at which the first metal microsphere distribution is formed can be 500℃, 600℃, 800℃, 900℃, or 1000℃. The pressure at which the first metal microsphere distribution is formed can be 400 torr, 450 torr, 500 torr, 550 torr, or 600 torr. The annealing time for the first metal capping layer can be 50s, 100s, 150s, 200s, 250s, or 300s. The height of the first metal microsphere distribution can be 10nm, 30nm, 50nm, 60nm, 80nm, or 100nm.

[0102] In some embodiments, the nitride control layer is a Ga vacancy distribution layer; the nitride control layer having a first metal microsphere distribution is subjected to heat treatment, including: Ga heat treatment for 10 to 40 seconds at a temperature of 1000°C to 1200°C and a pressure of 200 torr to 500 torr, so that the Ga vacancy concentration in the Ga vacancy distribution layer is 1 × 10⁻⁶. 17 cm -3 Up to 1×10 18 cm -3 .

[0103] The temperature can be 1000℃, 1050℃, 1100℃, 1150℃, or 1200℃, etc. The pressure can be 200 torr, 250 torr, 300 torr, 350 torr, 400 torr, 450 torr, or 500 torr, etc. The Ga heat treatment time can be 10s, 20s, 30s, or 40s, etc. The Ga vacancy concentration is 1×10⁻⁶. 17 cm-3 3×10 17 cm -3 5×10 17 cm -3 8×10 17 cm -3 Or 1×10 18 cm -3 wait.

[0104] A nitride-controlled layer with a first metal microsphere distribution is subjected to Ga heat treatment. After treatment, Ga vacancies on the surface of the nitride-controlled layer are replaced by Ga atoms, resulting in a difference in potential energy distribution between the treated and untreated surfaces. This allows the second metal microspheres to nucleate on the surface between the first metal microspheres. Simultaneously, the Ga heat treatment forms a Ga metal coating on the surface of the first metal microsphere distribution. Due to the size difference between Al and Ga atoms, the alloy crystal structure formed when Al atoms replace Ga atoms will be distorted, resulting in voids in the crystal lattice. Thus, after the formation of the second metal microsphere distribution, the first metal microsphere distribution, the second metal microsphere distribution, and the Ga metal coating form an Al-Ga alloy mutually soluble structure.

[0105] Alternatively, the nitride-controlled layer is an N vacancy distribution layer; the nitride-controlled layer with the first metal microsphere distribution is subjected to heat treatment, including: N heat treatment for 15s to 60s at a temperature of 1000℃ to 1200℃ and a pressure of 200 torr to 500 torr, so that the N vacancy concentration in the N vacancy distribution layer is 1×10⁻⁶. 17 cm -3 Up to 1×10 18 cm -3 .

[0106] The temperature can be 1000℃, 1050℃, 1100℃, 1150℃, or 1200℃, etc. The pressure can be 200 torr, 250 torr, 300 torr, 350 torr, 400 torr, 450 torr, or 500 torr, etc. The nitrogen heat treatment time can be 15s, 30s, 40s, 50s, or 60s, etc. The nitrogen vacancy concentration is 1×10⁻⁶. 17 cm -3 3×10 17 cm -3 5×10 17 cm -3 8×10 17 cm -3 Or 1×10 18 cm -3 wait.

[0107] The nitride control layer with the first metal microsphere distribution is subjected to N heat treatment. After treatment, the N vacancies on the surface of the nitride control layer are replaced by N atoms, resulting in a difference in potential energy distribution between the treated surface and the untreated surface. In this way, the second metal microspheres nucleate on the surface of the region between the first metal microspheres (i.e., the nitride control layer). However, the nucleation density center on the surface of the nitride control layer is suppressed after the surface N heat treatment. Therefore, the second metal microspheres formed on the nitride control layer occupy a smaller space.

[0108] In some embodiments, the surface of the first metal microspheres after N heat treatment has a coating layer, and the heat treatment of the nitride control layer having the first metal microsphere distribution further includes:

[0109] In a reducing gas atmosphere, the temperature is set to 1050℃ to 1150℃ and the pressure is set to 100 to 300 torr. The first metal microsphere distribution is heat-treated for 30 to 240 seconds to decompose the coating layer on the surface of the first metal microsphere.

[0110] The temperature can be 1050℃, 1080℃, 1100℃, 1120℃, or 1150℃, etc. The pressure can be 100 torr, 150 torr, 200 torr, 250 torr, or 300 torr, etc. The heat treatment time of the first metal microsphere distribution in the reducing gas atmosphere can be 30s, 50s, 80s, 100s, 150s, 200s, or 240s, etc. In some embodiments, the reducing atmosphere gas includes at least one of H2, Cl2, or HCl.

[0111] In some embodiments, forming a second metal microsphere distribution on the surface of the heat-treated nitride control layer includes: forming a second metal capping layer on the surface of the heat-treated nitride control layer at a temperature of 500°C to 1000°C and a pressure of 400 to 600 tor, and annealing the second metal capping layer for 60 to 450 seconds to generate a second metal microsphere distribution with a height of 10 nm to 100 nm.

[0112] The temperature at which the second metal microsphere distribution forms can be 500℃, 600℃, 800℃, 900℃, or 1000℃. The pressure at which the second metal microsphere distribution forms can be 400 torr, 450 torr, 500 torr, 550 torr, or 600 torr. The annealing time for the second metal capping layer can be 60s, 100s, 200s, 300s, 400s, or 450s. The height of the second metal microsphere distribution can be 10nm, 30nm, 50nm, 60nm, 80nm, or 100nm.

[0113] In some embodiments, heat treatment of the first and second metal microsphere distributions includes:

[0114] S31. Perform N heat treatment for 30s to 180s at a temperature of 1000℃ to 1200℃ and a pressure of 300 torr to 600 torr.

[0115] The temperature in step S31 can be 1000℃, 1050℃, 1100℃, 1150℃ or 1200℃, etc.

[0116] The pressure in step S31 can be 300 torr, 350 torr, 400 torr, 450 torr, 500 torr, 550 torr, or 600 torr, etc.

[0117] The N heat treatment time in step S31 can be 30s, 50s, 60s, 80s, 100s, 120s, 150s or 180s, etc.

[0118] In this invention, the first and second metal microsphere distributions are nitrided by N heat treatment in step S31 to form metal microsphere distributions made of AlGaN or AlN.

[0119] S32. Perform Si heat treatment for 90s to 300s at a temperature of 900℃ to 1000℃ and a pressure of 300 to 600 torr.

[0120] The temperature in step S32 can be 900℃, 920℃, 950℃, 980℃ or 1000℃, etc.

[0121] The pressure in step S32 can be 300 torr, 350 torr, 400 torr, 450 torr, 500 torr, 550 torr, or 600 torr, etc.

[0122] The Si heat treatment time in step S32 can be 90s, 100s, 150s, 200s, 250s or 300s, etc.

[0123] The present invention forms a Si distribution on the surface of the first and second nitrided metal microsphere distributions through Si heat treatment in step S32, and also forms a Si distribution between adjacent microsphere distribution structures.

[0124] S33. Perform heat treatment for 60s to 180s at a temperature of 1000℃ to 1100℃ and a pressure of 300 torr to 600 torr.

[0125] The temperature in step S33 can be 1000℃, 1030℃, 1050℃, 1080℃ or 1100℃, etc.

[0126] The pressure in step S33 can be 300 torr, 350 torr, 400 torr, 450 torr, 500 torr, 550 torr, or 600 torr, etc.

[0127] The heat treatment time in step S33 can be 60s, 80s, 100s, 120s, 150s, or 180s, etc.

[0128] The present invention uses heat treatment in step S33 to diffuse the Si distribution formed between adjacent microsphere distribution structures into the nitride control layer, thereby reducing the working voltage. At the same time, since the first metal microspheres distributed within the second metal microsphere distribution have a higher formation energy, after heat treatment, most silicon atoms are distributed on the surface and form dangling Si bonds.

[0129] S34. Perform Al heat treatment for 300s to 900s at a temperature of 500℃ to 1000℃ and a pressure of 300 to 600 torr.

[0130] The temperature in step S34 can be 500℃, 600℃, 800℃, 900℃ or 1000℃, etc.

[0131] The pressure in step S34 can be 300 torr, 350 torr, 400 torr, 450 torr, 500 torr, 550 torr, or 600 torr, etc.

[0132] The heat treatment time of Al in step S34 can be 300s, 400s, 500s, 600s, 800s or 900s, etc.

[0133] In step S34 of this invention, the Al heat treatment forms an Al microstructure centered on suspended Si bonds. Because small-sized micro / nano structures possess different physical properties than large-sized ones, the Al microstructure is more prone to saturation. Furthermore, the Si distribution between any adjacent first and second metal microspheres more easily forms a mutually soluble metal layer with Al, namely a silicon-aluminum nitride layer. This serves two purposes: firstly, it acts as a lattice buffer between the nitride-controlled layer and the nanopillar material; secondly, it reduces the nucleation and aggregation centers of the nitride buffer layer, enhancing the lateral epitaxial growth of the nitride buffer layer and thus delaying the surface merging time of the nitride buffer layer on the composite nanopillar structure layer, allowing more dislocations to fully redirect and achieve self-annihilation.

[0134] In some embodiments, growing nanopillar structures includes:

[0135] S41. Under conditions of temperature of 500℃ to 1000℃ and pressure of 300 torr to 600 torr, the Si source is introduced at a flow rate of 20 sccm to 200 sccm for 10s to 100s.

[0136] The temperature in step S41 can be 500℃, 600℃, 800℃, 900℃ or 1000℃, etc.

[0137] The pressure in step S41 can be 300 torr, 350 torr, 400 torr, 450 torr, 500 torr, 550 torr, or 600 torr, etc.

[0138] In step S41, the flow rate of the Si source can be 20 sccm, 50 sccm, 100 sccm, 150 sccm, or 200 sccm, etc.

[0139] In step S41, the time for introducing the Si source can be 10s, 30s, 50s, 80s, or 100s, etc.

[0140] S42. Under conditions of temperature of 500℃ to 1000℃ and pressure of 300 torr to 600 torr, interrupt the Si source for 10s to 180s.

[0141] The temperature in step S42 can be 500℃, 600℃, 800℃, 900℃ or 1000℃, etc.

[0142] The pressure in step S42 can be 300 torr, 350 torr, 400 torr, 450 torr, 500 torr, 550 torr, or 600 torr, etc.

[0143] In step S42, the interruption time of the Si source can be 10s, 50s, 100s, 150s, or 180s, etc.

[0144] S43, and S41 and S42 are cycled 100 to 1000 times to complete the growth of the nanopillar structure.

[0145] The number of times that S41 and S42 alternate periodically can be 100, 300, 500, 800 or 1000, etc.

[0146] This invention forms a eutectic structure of metal and silicon by introducing a Si source onto the surface of a first and a second distribution of metal microspheres. During a periodic, alternating process, the introduction of the Si source is interrupted, allowing silicon atoms to fully dissolve and continuously and uniformly precipitate, resulting in a smooth nanopillar structure. This structure prevents the accumulation of freely moving silicon atoms on the microsphere surface. This avoids doping of the nitride control layer by freely moving silicon atoms and prevents light absorption towards the substrate caused by impurity atoms.

[0147] In some embodiments, nitrogen treatment in step S5 includes: introducing an N source at a flow rate of 1 slm to 100 slm for 100 s to 600 s at a temperature of 600°C to 1250°C.

[0148] The nitrogen treatment temperature can be 600℃, 800℃, 900℃, 1000℃, 1200℃ or 1250℃, etc.

[0149] The flow rate of the N source during nitrogen treatment can be 1 slm, 10 slm, 30 slm, 50 slm, 60 slm, 80 slm, or 100 slm, etc.

[0150] The time for introducing the N source during nitrogen treatment can be 100s, 200s, 300s, 400s, 500s, or 600s, etc.

[0151] In some embodiments, the growth of a nitride buffer layer includes: introducing a Ga source with a flow rate of 100 sccm to 500 sccm and an N source with a flow rate of 20 slm to 100 slm on the surface of the composite nanopillar structure layer at a temperature of 900°C to 1250°C and a pressure of 100 torr to 300 torr, to grow a nitride buffer layer with a thickness of 500 nm to 1500 nm.

[0152] The temperature for growing the nitride buffer layer can be 900℃, 950℃, 1000℃, 1050℃, 1100℃, 1150℃, 1200℃, or 1250℃, etc. The pressure for growing the nitride buffer layer can be 100 torr, 150 torr, 200 torr, 250 torr, or 300 torr, etc. The Ga source flow rate during nitride buffer layer growth can be 100 sccm, 200 sccm, 300 sccm, 400 sccm, or 500 sccm, etc. The N source flow rate during nitride buffer layer growth can be 20 slm, 40 slm, 50 slm, 60 slm, 80 slm, or 100 slm, etc. The thickness of the nitride buffer layer can be 500 nm, 800 nm, 1000 nm, 1200 nm, or 1500 nm, etc.

[0153] In some embodiments, growing the second n-type nitride layer includes: introducing a Ga source with a flow rate of 100 sccm to 500 sccm, an N source with a flow rate of 20 slm to 100 slm, and a Si source with a flow rate of 50 sccm to 300 sccm at a temperature of 900°C to 1200°C and a pressure of 100 torr to 300 torr, to grow a nitride buffer layer with a thickness of 1000 nm to 5000 nm and a doping concentration of 1 × 10⁻⁶ nm on the surface of the nitride buffer layer. 18 cm -3 Up to 5×10 19 cm -3 The second n-type nitride layer.

[0154] The temperature for growing the second n-type nitride layer can be 900℃, 950℃, 1000℃, 1050℃, 1100℃, 1150℃, or 1200℃, etc. The pressure for growing the second n-type nitride layer can be 100 torr, 150 torr, 200 torr, 250 torr, or 300 torr, etc. The flow rate of the Ga source during the growth of the second n-type nitride layer can be 100 sccm, 200 sccm, 300 sccm, 400 sccm, or 500 sccm, etc. The flow rate of the N source during the growth of the second n-type nitride layer can be 20 slm, 40 slm, 50 slm, 60 slm, 80 slm, or 100 slm, etc. The flow rate of the Si source during the growth of the second n-type nitride layer can be 50 sccm, 100 sccm, 150 sccm, 200 sccm, 250 sccm, or 300 sccm, etc. The doping concentration of the second n-type nitride layer can be 1 × 10⁻⁶. 18 cm -3 5×10 18 cm -3 1×10 19 cm -3 3×10 19 cm -3 Or 5×10 19 cm -3 The thickness of the second n-type nitride layer can be 1000 nm, 2000 nm, 3000 nm, 4000 nm, or 5000 nm, etc.

[0155] In some embodiments, the growth of the light-emitting layer includes:

[0156] A11. At a temperature of 650°C to 950°C and a pressure of 200 torr to 400 torr, a Ga source with a flow rate of 100 sccm to 300 sccm, an In source with a flow rate of 500 sccm to 2000 sccm, and an N source with a flow rate of 30 slm to 100 slm are introduced to grow a quantum well layer with a thickness of 0.5 nm to 5 nm.

[0157] The temperature in step A11 can be 650℃, 700℃, 750℃, 800℃, 850℃, 900℃, or 950℃, etc. The pressure in step A11 can be 200 torr, 250 torr, 300 torr, 350 torr, or 400 torr, etc. The Ga source flow rate in step A11 can be 100 sccm, 150 sccm, 200 sccm, 250 sccm, or 300 sccm, etc. The In source flow rate in step A11 can be 500 sccm, 800 sccm, 1000 sccm, 1200 sccm, 1500 sccm, 1800 sccm, or 2000 sccm, etc. The N source flow rate in step A11 can be 30 slm, 40 slm, 50 slm, 60 slm, 80 slm, or 100 slm, etc. The thickness of the quantum well layer in step A11 can be 0.5nm, 1nm, 2nm, 3nm, 4nm, or 5nm, etc.

[0158] A12, under a temperature of 700°C to 950°C and a pressure of 200 torr to 400 torr, a Ga source with a flow rate of 100 sccm to 300 sccm and an N source with a flow rate of 30 slm to 100 slm are introduced to grow a quantum barrier layer with a thickness of 6 nm to 25 nm.

[0159] The temperature in step A12 can be 750℃, 800℃, 850℃, 900℃, or 950℃, etc. The pressure in step A12 can be 200 torr, 250 torr, 300 torr, 350 torr, or 400 torr, etc. The Ga source flux in step A12 can be 100 sccm, 150 sccm, 200 sccm, 250 sccm, or 300 sccm, etc. The N source flux in step A12 can be 30 slm, 40 slm, 50 slm, 60 slm, 80 slm, or 100 slm, etc. The thickness of the quantum barrier layer in step A12 can be 6 nm, 10 nm, 15 nm, 20 nm, or 25 nm, etc.

[0160] A13, and A11 and A12 are periodically alternated 2 to 15 times to obtain the light-emitting layer.

[0161] The number of times that A11 and A12 alternate periodically can be 2, 5, 8, 10, 12 or 15, etc.

[0162] In some embodiments, growing a p-type nitride layer includes growing a layer with a thickness of 50 nm to 300 nm and a doping concentration of 1 × 10⁻⁶ at a temperature of 850°C to 1050°C and a pressure of 200 torr to 600 torr. 19cm -3 Up to 5×10 20 cm -3 The p-type nitride layer.

[0163] The temperature for growing p-type nitride layers can be 850℃, 900℃, 950℃, 1000℃, or 1050℃, etc. The pressure for growing p-type nitride layers can be 200 torr, 300 torr, 400 torr, 500 torr, or 600 torr, etc. The thickness of the p-type nitride layer can be 50nm, 100nm, 150nm, 200nm, 250nm, or 300nm, etc. The doping concentration of the p-type nitride layer can be 1×10⁻⁶. 19 cm -3 5×10 19 cm -3 1×10 20 cm -3 3×10 20 cm -3 Or 5×10 20 cm -3 wait.

[0164] Furthermore, in this invention, the Ga source can be triethylgallium (TEGa), the N source can be NH3, the Si source can be SiH4, the In source can be trimethylindium (TMIn), and the Al source used for Al heat treatment can be trimethylaluminum (TMA).

[0165] An embodiment of the present invention provides an optoelectronic device, which includes a nitride semiconductor epitaxial wafer of any embodiment, or a nitride semiconductor epitaxial wafer prepared by any embodiment.

[0166] Example 1

[0167] This embodiment provides a method such as Figure 1 The nitride semiconductor epitaxial wafer shown includes a substrate 1, a first n-type nitride layer 2, a nitride control layer 3, a composite nanopillar structure layer, a nitride buffer layer 4, a second n-type nitride layer 7, a light-emitting layer 8, and a p-type nitride layer 9, which are stacked sequentially.

[0168] Substrate 1 is a 4-inch sapphire substrate.

[0169] The composite nanopillar structure layer includes first nanopillar spacer units spaced apart and second nanopillar spacer units disposed between adjacent first nanopillar spacer units.

[0170] The height of the first nanopillar spacer unit is higher than the height of the second nanopillar spacer unit.

[0171] The first nanopillar spacer unit includes a first metal microstructure 51, a first nanopillar 52, a first top unit 53, and a first side unit 54; the first nanopillar 52 is disposed on the top surface of the first metal microstructure 51; the first top unit 53 is disposed on the top surface of the first nanopillar 52; and the first side unit 54 is disposed on the side surface of the first nanopillar 52 unit.

[0172] The second nanopillar spacer unit includes a second metal microstructure 61, a second nanopillar 62, a second top unit 63, and a second side unit 64; the second nanopillar 62 is disposed on the top surface of the second metal microstructure 61; the second top unit 63 is disposed on the top surface of the second nanopillar 62; and the second side unit 64 is disposed on the side surface of the second nanopillar 62 unit.

[0173] A silicon-aluminum nitride layer 10 is disposed on the surface of the nitride control layer 3 between any two adjacent first nanopillar spacers and second nanopillar spacers.

[0174] The first metal microstructure 51 is made of AlN, the second metal microstructure 61 is made of AlN; the first nanopillar 52 and the second nanopillar 62 are each made of silicon; the first top unit 53 and the second top unit 63 are each made of AlN.

[0175] The method for preparing the nitride semiconductor epitaxial wafer in this embodiment includes the following steps:

[0176] (1) Under conditions of 950℃ and 300 torr, TEGa with a flow rate of 100 sccm, NH3 with a flow rate of 50 slm, and SiH4 with a flow rate of 50 sccm are introduced to grow a doping concentration of 5×10⁻⁶ on the surface of substrate 1. 17 cm -3 The first n-type nitride layer 2.

[0177] (2) Under the conditions of temperature of 1150℃ and pressure of 200 torr, a nitride control layer 3 with a thickness of 5nm and material of GaN is grown on the surface of the first n-type nitride layer 2.

[0178] (3) Under the conditions of 800℃ and 500 torr, a first metal capping layer of Al material is grown on the surface of the nitride control layer 3. The first metal capping layer is annealed for 200s to generate a first metal microsphere distribution with a height of 50nm.

[0179] (4) The nitride control layer 3 with the first metal microsphere distribution is subjected to heat treatment, including: N heat treatment with NH3 for 40s at a temperature of 1100℃ and a pressure of 400 torr, so that the N vacancy concentration in the nitride control layer 3 is 5×10 17 cm -3 Then, under a hydrogen atmosphere, the temperature was set to 1100℃ and the pressure to 200 torr, and the first metal microsphere distribution was heat-treated for 150s to decompose the AlN coating layer on the surface of the first metal microsphere.

[0180] (5) Under the conditions of 800℃ and 500 torr, a second metal cover layer of Al material is formed on the surface of the nitride control layer 3 after heat treatment. The second metal cover layer is annealed for 250s to generate a second metal microsphere distribution with a height of 50nm.

[0181] (6) Heat treatment of the first and second metal microsphere distributions, including:

[0182] A61. Under conditions of 1100℃ and 450 torr, N heat treatment is performed using NH3 for 100s.

[0183] A62. Under the conditions of 950℃ and 450 torr, Si is heat-treated with SiH4 for 200s.

[0184] A63. Heat treatment for 120 seconds at a temperature of 1050℃ and a pressure of 450 torr.

[0185] A64. Under conditions of 700℃ and 450 torr, perform Al heat treatment using TMA for 600s.

[0186] (7) Growth of nanopillar structures, including:

[0187] A71. Under conditions of 800℃ and 450 torr, SiH4 is introduced at a flow rate of 100 sccm for 50 s.

[0188] A72. Under conditions of 800℃ and 450 torr, interrupt the Si source for 100s.

[0189] The growth of the nanopillar structure is completed by alternating A73, A71 and A72 cyclically 500 times.

[0190] (8) Nitrogen treatment is performed to obtain a composite nanopillar structure layer, including: passing NH3 at a flow rate of 50 slm for 300 s at a temperature of 900 °C.

[0191] (9) Growing a nitride buffer layer 4, including: under the conditions of temperature of 1050℃ and pressure of 200 torr, introducing TEGa with a flow rate of 300 sccm and NH3 with a flow rate of 50 slm, growing a nitride buffer layer 4 with a thickness of 1000 nm on the surface of the composite nanopillar structure layer.

[0192] (10) Growing a second n-type nitride layer 7, comprising: introducing TEGa at a flow rate of 300 sccm, NH3 at a flow rate of 60 slm, and SiH4 at a flow rate of 150 sccm on the surface of the nitride buffer layer 4 at a temperature of 1000℃ and a pressure of 200 torr, to grow a 3000 nm thick layer with a doping concentration of 1×10⁻⁶. 19 cm -3 The second n-type nitride layer 7.

[0193] (11) A light-emitting layer 8 is grown, including:

[0194] A111, under conditions of 800℃ and 300 torr, a quantum well layer with a thickness of 2.5 nm is grown by introducing TEGa at a flow rate of 200 sccm, TMIn at a flow rate of 1200 sccm, and NH3 at a flow rate of 60 slm.

[0195] A112, under conditions of 850℃ and 300 torr, TEGa with a flow rate of 200 sccm and NH3 with a flow rate of 60 slm were introduced to grow a quantum barrier layer with a thickness of 15 nm.

[0196] A113, A111 and A112 are periodically alternated 8 times to obtain the light-emitting layer 8.

[0197] (12) The growth of the p-type nitride layer 9 includes: under conditions of 950°C and 400 torr, introducing TEGa at a flow rate of 720 sccm and NH3 at a flow rate of 50 slm, to grow a layer with a thickness of 200 nm and a Mg doping concentration of 1×10⁻⁶. 20 cm -3 9. p-type nitride layer.

[0198] Example 2

[0199] This embodiment provides a nitride semiconductor epitaxial wafer, the structure of which is the same as that in Embodiment 1, and will not be described again here.

[0200] The method for preparing the nitride semiconductor epitaxial wafer in this embodiment includes the following steps:

[0201] (1) Under conditions of 850℃ and 200 torr, TEGa with a flow rate of 20 sccm, NH3 with a flow rate of 20 slm, and SiH4 with a flow rate of 10 sccm are introduced to grow a substrate with a doping concentration of 1×10⁻⁶. 17 cm -3 The first n-type nitride layer.

[0202] (2) A nitride control layer with a thickness of 1 nm is grown on the surface of the first n-type nitride layer under the conditions of temperature of 1050℃ and pressure of 100 torr.

[0203] (3) Under the conditions of 500℃ and 400 torr, a first metal capping layer of Al material is grown on the surface of the nitride control layer, and the first metal capping layer is annealed for 50s to generate a first metal microsphere distribution with a height of 10nm.

[0204] (4) The nitride control layer with the first metal microsphere distribution is subjected to heat treatment, including: N heat treatment with NH3 for 15s at a temperature of 1000℃ and a pressure of 200 torr, so that the N vacancy concentration in the nitride control layer is 1×10 17 cm -3 Then, under a hydrogen atmosphere, the temperature was set to 1050℃ and the pressure to 100 torr, and the first metal microsphere distribution was heat-treated for 30s to decompose the AlN coating layer on the surface of the first metal microsphere.

[0205] (5) Under the conditions of 500℃ and 400 torr, a second metal cover layer of Al material is formed on the surface of the heat-treated nitride control layer. The second metal cover layer is annealed for 60s to generate a second metal microsphere distribution with a height of 10nm.

[0206] (6) Heat treatment of the first and second metal microsphere distributions, including:

[0207] A61. Under conditions of 1000℃ and 300 torr, N heat treatment is performed using NH3 for 30s.

[0208] A62. Under the conditions of 900℃ and 300 torr, Si is heat-treated with SiH4 for 90s.

[0209] A63. Heat treatment for 60 seconds at a temperature of 1000℃ and a pressure of 300 torr.

[0210] A64. Under conditions of 500℃ and 300 torr, perform Al heat treatment using TMA for 300s.

[0211] (7) Growth of nanopillar structures, including:

[0212] A71. Under conditions of 500℃ and 300 torr, SiH4 is introduced at a flow rate of 20 sccm for 10 s.

[0213] A72. Under conditions of 500℃ and 300 torr, interrupt the SiH4 flow for 10s.

[0214] A73, A71 and A72 are cycled 100 times to complete the growth of the nanopillar structure.

[0215] (8) Nitrogen treatment is performed to obtain a composite nanopillar structure layer, including: passing NH3 at a flow rate of 1 slm for 100 s at a temperature of 600℃.

[0216] (9) Growing a nitride buffer layer, including: under the conditions of temperature of 900℃ and pressure of 100 torr, introducing TEGa with a flow rate of 100 sccm and NH3 with a flow rate of 20 slm, growing a nitride buffer layer with a thickness of 500 nm on the surface of the composite nanopillar structure layer.

[0217] (10) Growth of a second n-type nitride layer, including: under conditions of 900℃ and 100 torr, introducing TEGa at a flow rate of 100 sccm, NH3 at a flow rate of 20 slm, and SiH4 at a flow rate of 50 sccm, to grow a 1000 nm thick layer with a doping concentration of 1×10⁻⁶ on the surface of the nitride buffer layer. 18 cm -3 The second n-type nitride layer.

[0218] (11) A light-emitting layer is grown, including:

[0219] A111, under conditions of 650℃ and 200 torr, a quantum well layer with a thickness of 0.5 nm is grown by introducing TEGa at a flow rate of 100 sccm, TMIn at a flow rate of 500 sccm, and NH3 at a flow rate of 30 slm.

[0220] A112, under conditions of 700℃ and 200 torr, TEGa with a flow rate of 100 sccm and NH3 with a flow rate of 30 slm were introduced to grow a quantum barrier layer with a thickness of 6 nm.

[0221] A113, A111 and A112 are periodically alternated 15 times to obtain the light-emitting layer.

[0222] (12) The growth of the p-type nitride layer includes: under conditions of 850℃ and 200 torr, introducing TEGa at a flow rate of 720 sccm and NH3 at a flow rate of 50 slm, to grow a thickness of 50 nm and a Mg doping concentration of 1×10⁻⁶. 19 cm -3 The p-type nitride layer.

[0223] Example 3

[0224] This embodiment provides a nitride semiconductor epitaxial wafer, the structure of which is the same as that in Embodiment 1, and will not be described again here.

[0225] The method for preparing the nitride semiconductor epitaxial wafer in this embodiment includes the following steps:

[0226] (1) Under conditions of 1000℃ and 400 torr, TEGa with a flow rate of 200 sccm, NH3 with a flow rate of 100 slm, and SiH4 with a flow rate of 100 sccm are introduced to grow a substrate with a doping concentration of 1×10⁻⁶. 18 cm -3 The first n-type nitride layer.

[0227] (2) Under the conditions of temperature of 1250℃ and pressure of 300 torr, a nitride control layer with a thickness of 10nm and material of GaN is grown on the surface of the first n-type nitride layer.

[0228] (3) Under the conditions of 1000℃ and 600 torr, a first metal capping layer of Al material is grown on the surface of the nitride control layer, and the first metal capping layer is annealed for 300s to generate a first metal microsphere distribution with a height of 100nm.

[0229] (4) The nitride control layer with the first metal microsphere distribution is subjected to heat treatment, including: N heat treatment with NH3 for 60s at a temperature of 1200℃ and a pressure of 500 torr, so that the N vacancy concentration in the nitride control layer is 1×10 18 cm -3 Then, under a hydrogen atmosphere, the temperature was set to 1150℃ and the pressure to 300 torr, and the first metal microsphere distribution was heat-treated for 240s to decompose the AlN coating layer on the surface of the first metal microsphere.

[0230] (5) Under the conditions of 1000℃ and 600 torr, a second metal cover layer of Al material is formed on the surface of the heat-treated nitride control layer. The second metal cover layer is annealed for 450s to generate a second metal microsphere distribution with a height of 100nm.

[0231] (6) Heat treatment of the first and second metal microsphere distributions, including:

[0232] A61. Under conditions of 1200℃ and 600 torr, N heat treatment is performed using NH3 for 180s.

[0233] A62. Under the conditions of 1000℃ and 600 torr, Si is heat-treated with SiH4 for 300s.

[0234] A63. Heat treatment for 180 seconds at a temperature of 1100℃ and a pressure of 600 torr.

[0235] A64. Under conditions of 1000℃ and 600 torr, perform Al heat treatment using TMA for 900s.

[0236] (7) Growth of nanopillar structures, including:

[0237] A71. Under conditions of 1000℃ and 600 torr, SiH4 is introduced at a flow rate of 200 sccm for 100 s.

[0238] A72. Under the conditions of 1000℃ and 600 torr, the SiH4 flow is interrupted for 180s.

[0239] A73, A71 and A72 are cycled 1000 times to complete the growth of the nanopillar structure.

[0240] (8) Nitrogen treatment is performed to obtain a composite nanopillar structure layer, including: passing NH3 at a flow rate of 100 slm for 600 s at a temperature of 1250 °C.

[0241] (9) Growing a nitride buffer layer, including: under the conditions of temperature of 1250℃ and pressure of 300 torr, introducing TEGa with a flow rate of 500 sccm and NH3 with a flow rate of 100 slm, growing a nitride buffer layer with a thickness of 1500 nm on the surface of the composite nanopillar structure layer.

[0242] (10) Growth of a second n-type nitride layer, including: under conditions of 1200℃ and 300 torr, introducing TEGa at a flow rate of 500 sccm, NH3 at a flow rate of 100 slm, and SiH4 at a flow rate of 300 sccm, to grow a 5000 nm thick layer with a doping concentration of 5 × 10⁻⁶ on the surface of the nitride buffer layer. 19 cm -3 The second n-type nitride layer.

[0243] (11) A light-emitting layer is grown, including:

[0244] A111, under conditions of 950℃ and 400 torr, a quantum well layer with a thickness of 5nm is grown by introducing TEGa at a flow rate of 300 sccm, TMIn at a flow rate of 2000 sccm, and NH3 at a flow rate of 100 slm.

[0245] A112, under conditions of 950℃ and 400 torr, TEGa with a flow rate of 300 sccm and NH3 with a flow rate of 100 slm were introduced to grow a quantum barrier layer with a thickness of 25 nm.

[0246] A113, and A111 and A112, which are periodically alternated twice, are used to obtain the light-emitting layer.

[0247] (12) The growth of the p-type nitride layer includes: under conditions of 1050℃ and 600 torr, introducing TEGa at a flow rate of 720 sccm and NH3 at a flow rate of 50 slm, to grow a thickness of 300 nm and a Mg doping concentration of 5 × 10⁻⁶. 20 cm -3 The p-type nitride layer.

[0248] Example 4

[0249] This embodiment provides a nitride semiconductor epitaxial wafer, which includes a substrate, a first n-type nitride layer, a nitride control layer, a composite nanopillar structure layer, a nitride buffer layer, a second n-type nitride layer, a light-emitting layer, and a p-type nitride layer stacked sequentially.

[0250] The substrate is a 4-inch sapphire substrate.

[0251] The composite nanopillar structure layer includes first nanopillar spacer units spaced apart and second nanopillar spacer units disposed between adjacent first nanopillar spacer units.

[0252] The height of the first nanopillar spacer unit is higher than the height of the second nanopillar spacer unit.

[0253] The first nanopillar spacer unit includes a first metal microstructure, a first nanopillar, a first top unit, and a first side unit; the first nanopillar is disposed on the top surface of the first metal microstructure; the first top unit is disposed on the top surface of the first nanopillar; and the first side unit is disposed on the side surface of the first nanopillar unit.

[0254] The second nanopillar spacer unit includes a second metal microstructure, a second nanopillar, a second top unit, and a second side unit; the second nanopillar is disposed on the top surface of the second metal microstructure; the second top unit is disposed on the top surface of the second nanopillar; and the second side unit is disposed on the side surface of the second nanopillar unit.

[0255] A silicon-aluminum nitride layer is disposed on the surface of the nitride control layer between any two adjacent first nanopillar spacers and second nanopillar spacers.

[0256] The first metal microstructure is made of AlGaN, and the second metal microstructure is made of AlN; the first nanopillar and the second nanopillar are each made of silicon; the first top unit and the second top unit are each made of AlN.

[0257] The method for preparing the nitride semiconductor epitaxial wafer in this embodiment includes the following steps:

[0258] (1) Under conditions of 950℃ and 300 torr, TEGa with a flow rate of 100 sccm, NH3 with a flow rate of 50 slm, and SiH4 with a flow rate of 50 sccm are introduced to grow a substrate with a doping concentration of 5×10⁻⁶. 17 cm -3 The first n-type nitride layer.

[0259] (2) Under the conditions of temperature of 1150℃ and pressure of 200 torr, a nitride control layer with a thickness of 5nm and material of GaN is grown on the surface of the first n-type nitride layer.

[0260] (3) Under the conditions of 800℃ and 500 torr, a first metal capping layer of Al material is grown on the surface of the nitride control layer, and the first metal capping layer is annealed for 200s to generate a first metal microsphere distribution with a height of 50nm.

[0261] (4) The nitride control layer with the first metal microsphere distribution is subjected to heat treatment, including: Ga heat treatment with TEGa for 30s at a temperature of 1100℃ and a pressure of 400 torr, so that the Ga vacancy concentration in the nitride control layer is 5×10 17 cm -3 .

[0262] (5) Under the conditions of 800℃ and 500 torr, a second metal cover layer of Al material is formed on the surface of the heat-treated nitride control layer. The second metal cover layer is annealed for 250s to generate a second metal microsphere distribution with a height of 50nm.

[0263] (6) Heat treatment of the first and second metal microsphere distributions, including:

[0264] A61. Under conditions of 1100℃ and 450 torr, N heat treatment is performed using NH3 for 100s.

[0265] A62. Under the conditions of 950℃ and 450 torr, Si is heat-treated with SiH4 for 200s.

[0266] A63. Heat treatment for 120 seconds at a temperature of 1050℃ and a pressure of 450 torr.

[0267] A64. Under conditions of 700℃ and 450 torr, perform Al heat treatment using TMA for 600s.

[0268] (7) Growth of nanopillar structures, including:

[0269] A71. Under conditions of 800℃ and 450 torr, SiH4 is introduced at a flow rate of 100 sccm for 50 s.

[0270] A72. Under conditions of 800℃ and 450 torr, interrupt the SiH4 flow for 100s.

[0271] The growth of the nanopillar structure is completed by alternating A73, A71 and A72 cyclically 500 times.

[0272] (8) Nitrogen treatment is performed to obtain a composite nanopillar structure layer, including: passing NH3 at a flow rate of 50 slm for 300 s at a temperature of 900 °C.

[0273] (9) Growing a nitride buffer layer, including: under the conditions of temperature of 1050℃ and pressure of 200 torr, introducing TEGa with a flow rate of 300 sccm and NH3 with a flow rate of 50 slm, growing a nitride buffer layer with a thickness of 1000 nm on the surface of the composite nanopillar structure layer.

[0274] (10) Growth of a second n-type nitride layer, including: under conditions of 1000℃ and 200 torr, introducing TEGa at a flow rate of 300 sccm, NH3 at a flow rate of 60 slm, and SiH4 at a flow rate of 150 sccm, to grow a 3000 nm thick layer with a doping concentration of 1×10⁻⁶ on the surface of the nitride buffer layer. 19 cm -3 The second n-type nitride layer.

[0275] (11) A light-emitting layer is grown, including:

[0276] A111, under conditions of 800℃ and 300 torr, a quantum well layer with a thickness of 2.5 nm is grown by introducing TEGa at a flow rate of 200 sccm, TMIn at a flow rate of 1200 sccm, and NH3 at a flow rate of 60 slm.

[0277] A112, under conditions of 850℃ and 300 torr, TEGa with a flow rate of 200 sccm and NH3 with a flow rate of 60 slm were introduced to grow a quantum barrier layer with a thickness of 15 nm.

[0278] A113, A111 and A112 are periodically alternated 8 times to obtain the light-emitting layer.

[0279] (12) The growth of the p-type nitride layer includes: under conditions of 950℃ and 400 torr, introducing TEGa at a flow rate of 720 sccm and NH3 at a flow rate of 50 slm, to grow a thickness of 200 nm and a Mg doping concentration of 1×10⁻⁶. 20 cm -3 The p-type nitride layer.

[0280] Example 5

[0281] This embodiment provides a nitride semiconductor epitaxial wafer. Except that step A72 is not performed when growing the nanopillar structure, but the nanopillar structure is grown directly, the rest is the same as in embodiment 1, and will not be described again here.

[0282] Comparative Example 1

[0283] This comparative example provides a nitride semiconductor epitaxial wafer, which includes a substrate, a first n-type nitride layer, a nitride control layer, a nanopillar structure layer, a nitride buffer layer, a second n-type nitride layer, a light-emitting layer, and a p-type nitride layer stacked sequentially.

[0284] The substrate is a 4-inch sapphire substrate.

[0285] The nanopillar structure layer includes spaced-apart first nanopillar spacer units.

[0286] The first nanopillar spacer unit includes a first metal microstructure, a first nanopillar, a first top unit, and a first side unit; the first nanopillar is disposed on the top surface of the first metal microstructure; the first top unit is disposed on the top surface of the first nanopillar; and the first side unit is disposed on the side surface of the first nanopillar unit.

[0287] A silicon-aluminum nitride layer is disposed on the surface of the nitride control layer between any two adjacent first nanopillar spacer units.

[0288] The first metallic microstructure is made of AlN; the first nanopillar is made of silicon; and the first top unit is made of AlN.

[0289] The fabrication method of the nitride semiconductor epitaxial wafer in this comparative example includes the following steps:

[0290] (1) Under conditions of 950℃ and 300 torr, TEGa with a flow rate of 100 sccm, NH3 with a flow rate of 50 slm, and SiH4 with a flow rate of 50 sccm are introduced to grow a substrate with a doping concentration of 5×10⁻⁶. 17 cm -3 The first n-type nitride layer.

[0291] (2) Under the conditions of temperature of 1150℃ and pressure of 200 torr, a nitride control layer with a thickness of 5nm and material of GaN is grown on the surface of the first n-type nitride layer.

[0292] (3) Under the conditions of 800℃ and 500 torr, a first metal capping layer of Al material is grown on the surface of the nitride control layer, and the first metal capping layer is annealed for 200s to generate a first metal microsphere distribution with a height of 50nm.

[0293] (4) The nitride control layer with the first metal microsphere distribution is subjected to heat treatment, including: N heat treatment with NH3 for 40s at a temperature of 1100℃ and a pressure of 400 torr, so that the N vacancy concentration in the nitride control layer is 5×10 17 cm -3 .

[0294] (5) In a hydrogen atmosphere, the temperature is set to 1100℃ and the pressure to 200 torr, and the first metal microsphere distribution is heat-treated for 150s to decompose the AlN coating layer on the surface of the first metal microsphere.

[0295] (6) Heat treatment of the first metal microsphere distribution, including:

[0296] A61. Under conditions of 1100℃ and 450 torr, N heat treatment is performed using NH3 for 100s.

[0297] A62. Under the conditions of 950℃ and 450 torr, Si is heat-treated with SiH4 for 200s.

[0298] A63. Heat treatment for 120 seconds at a temperature of 1050℃ and a pressure of 450 torr.

[0299] A64. Under conditions of 700℃ and 450 torr, perform Al heat treatment using TMA for 600s.

[0300] (7) Growth of nanopillar structures, including:

[0301] A71. Under conditions of 800℃ and 450 torr, SiH4 is introduced at a flow rate of 100 sccm for 50 s.

[0302] A72. Under conditions of 800℃ and 450 torr, interrupt the SiH4 flow for 100s.

[0303] The growth of the nanopillar structure is completed by alternating A73, A71 and A72 cyclically 500 times.

[0304] (8) Nitrogen treatment is performed to obtain a nanopillar structure layer, including: passing NH3 at a flow rate of 50 slm for 300 s at a temperature of 900 °C.

[0305] (9) Growing a nitride buffer layer, including: under the conditions of temperature of 1050℃ and pressure of 200 torr, introducing TEGa with a flow rate of 300 sccm and NH3 with a flow rate of 50 slm, growing a nitride buffer layer with a thickness of 1000 nm on the surface of the nanopillar structure layer.

[0306] (10) Growth of a second n-type nitride layer, including: under conditions of 1000℃ and 200 torr, introducing TEGa at a flow rate of 300 sccm, NH3 at a flow rate of 60 slm, and SiH4 at a flow rate of 150 sccm, to grow a 1500 nm thick layer with a doping concentration of 1×10⁻⁶ on the surface of the nitride buffer layer. 19 cm -3 The second n-type nitride layer.

[0307] (11) A light-emitting layer is grown, including:

[0308] A111, under conditions of 800℃ and 300 torr, a quantum well layer with a thickness of 2.5 nm is grown by introducing TEGa at a flow rate of 200 sccm, TMIn at a flow rate of 1200 sccm, and NH3 at a flow rate of 60 slm.

[0309] A112, under conditions of 850℃ and 300 torr, TEGa with a flow rate of 200 sccm and NH3 with a flow rate of 60 slm were introduced to grow a quantum barrier layer with a thickness of 15 nm.

[0310] A113, A111 and A112 are periodically alternated 8 times to obtain the light-emitting layer.

[0311] (12) The growth of the p-type nitride layer includes: under conditions of 950℃ and 400 torr, introducing TEGa at a flow rate of 720 sccm and NH3 at a flow rate of 50 slm, to grow a thickness of 200 nm and a Mg doping concentration of 1×10⁻⁶. 20 cm -3 The p-type nitride layer.

[0312] Performance Characterization

[0313] The performance of the blue (465nm±1nm) nitride semiconductor epitaxial wafers obtained in the above embodiments and comparative examples was tested. The half-width at half maximum (FW / arcsec) of the (102) crystal plane of the epitaxial wafer was measured by X-ray diffraction (XRD), and the wavelength uniformity (std / nm) and half-width at half maximum (FW / nm) of the epitaxial wafers prepared in the above embodiments and comparative examples were measured by photoluminescence (PL). Then, LED devices were fabricated using the same fabrication process, and they were tested using an LED optoelectronic performance tester, including luminous intensity (Lop / mW) under a 2mA current injection condition and leakage yield (IR) performance test under a reverse voltage of 7V. The results are shown in Table 1.

[0314] Table 1

[0315] WLD / nm std / nm (102) / arcsec HW / nm Lop / mW / 2mA IR / % Example 1 465.1 0.51 165 15.5 13.7 98.2 Example 2 465.1 0.69 171 15.4 13.1 97.9 Example 3 465.8 0.81 174 15.7 14.2 98.1 Example 4 464.6 0.41 149 15.0 14.9 100 Example 5 465.4 1.43 221 16.5 12.9 96.0 Comparative Example 1 465.1 1.95 241 16.9 12.1 94.7

[0316] As shown in Table 1, Examples 1 to 4 exhibit low wavelength std, low (102) crystal plane half-width, smaller wavelength half-width HW, high brightness and leakage current yield IR performance, thus demonstrating excellent optoelectronic performance. The interrupted Si source process in Example 5 prevents silicon atoms from being fully dissolved, resulting in uneven precipitation of silicon atoms, which affects the consistency of Si nanopillars, the thickness and composition uniformity of the nitride emitting layer, and the uniformity of carrier injection and stress distribution in the nitride emitting layer, thereby forming high non-radiative recombination and leakage current channels in the nitride emitting layer.

[0317] Comparative Example 1 presents a nanopillar structure distribution, which cannot utilize the mutual relaxation between the nanopillar spacer units and the metal microstructure in the composite nanopillar structure layer to reduce the epitaxial layer stress, and cannot utilize the nitride buffer layer between the nanopillar spacer units to achieve better stress release by utilizing the height difference, so that more dislocations can be fully redirected; while the embodiments of the present invention can effectively reduce the probability of dislocations extending upward to the light-emitting layer, reduce leakage channels, enhance radiative recombination, thereby improving the luminescence brightness and antistatic discharge performance of the nitride semiconductor epitaxial wafer.

[0318] It should be noted that: by setting the composite nanopillar structure layer, the present invention makes it easier for In atoms to be incorporated into the quantum well layer growth surface under tensile stress, which greatly improves the In incorporation in the light-emitting layer, making the resulting nitride semiconductor epitaxial wafer suitable for the preparation of long-wavelength optoelectronic devices. The luminous intensity of the epitaxial wafers with 585nm orange light and 665nm red light prepared by the scheme of the present invention is increased by more than 40% and 20% respectively compared with the epitaxial wafers without the composite nanopillar structure layer.

[0319] In summary, this invention, through the inclusion of a composite nanopillar structure layer, enhances the lateral epitaxial growth of the nitride buffer layer and delays the merging process of its lateral epitaxial growth surface. This leads to the self-annihilation of dislocations within the buffer layer, resulting in a high-quality nitride buffer layer growth template. It also reduces the probability of dislocations extending upwards to the emitting layer, decreases leakage channels, and enhances radiative recombination, thereby improving the luminescence brightness and antistatic discharge performance of the nitride semiconductor epitaxial wafer. Furthermore, the composite nanopillar structure layer facilitates the incorporation of In atoms into the quantum well layer under tensile stress, significantly increasing In incorporation in the emitting layer. This makes the resulting nitride semiconductor epitaxial wafer suitable for fabricating long-wavelength infrared devices.

[0320] The above description is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Those skilled in the art should understand that any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention fall within the protection and disclosure scope of the present invention.

Claims

1. A nitride semiconductor epitaxial wafer, characterized in that, The nitride semiconductor epitaxial wafer includes a substrate, a first n-type nitride layer, a nitride control layer, a composite nanopillar structure layer, a nitride buffer layer, a second n-type nitride layer, a light-emitting layer, and a p-type nitride layer stacked sequentially. The composite nanopillar structure layer includes first nanopillar spacer units spaced apart and second nanopillar spacer units disposed between adjacent first nanopillar spacer units. The height of the first nanopillar spacer unit is greater than the height of the second nanopillar spacer unit; The first nanopillar spacer unit includes a first metal microstructure, a first nanopillar, and a first top unit; the first nanopillar is disposed on the top surface of the first metal microstructure; the first top unit is disposed on the top surface of the first nanopillar. The second nanopillar spacer unit includes a second metal microstructure, a second nanopillar, and a second top unit; the second nanopillar is disposed on the top surface of the second metal microstructure; the second top unit is disposed on the top surface of the second nanopillar.

2. The nitride semiconductor epitaxial wafer according to claim 1, characterized in that, The first nanopillar spacer unit further includes a first side unit disposed on the side of the first nanopillar unit; the second nanopillar spacer unit further includes a second side unit disposed on the side of the second nanopillar unit. Preferably, a silicon-aluminum nitride layer is disposed on the surface of the nitride control layer between any two adjacent first nanopillar spacers and second nanopillar spacers; Preferably, the first metal microstructure is made of AlGaN and the second metal microstructure is made of AlN; or, the first metal microstructure is made of AlN and the second metal microstructure is made of AlN. Preferably, the first nanopillar and the second nanopillar are each made of silicon independently; Preferably, the materials of the first top unit and the second top unit each independently include AlN.

3. A method for preparing a nitride semiconductor epitaxial wafer, characterized in that, The preparation method includes the following steps: A first n-type nitride layer, a nitride regulation layer, and a composite nanopillar structure layer are sequentially fabricated on the surface of a substrate. The composite nanopillar structure layer includes spaced-apart first nanopillar spacer units and second nanopillar spacer units disposed between adjacent first nanopillar spacer units. The height of the first nanopillar spacer units is greater than the height of the second nanopillar spacer units. Each first nanopillar spacer unit includes a first metal microstructure, a first nanopillar, and a first top unit. The first nanopillar is disposed on the top surface of the first metal microstructure. The first top unit is disposed on the top surface of the first nanopillar. The second nanopillar spacer unit includes a second metal microstructure, a second nanopillar, and a second top unit. The second nanopillar is disposed on the top surface of the second metal microstructure. The second top unit is disposed on the top surface of the second nanopillar. A nitride buffer layer, a second n-type nitride layer, a light-emitting layer, and a p-type nitride layer are sequentially grown on the surface of the composite nanopillar structure layer.

4. The preparation method according to claim 3, characterized in that, The first nanopillar spacer unit further includes a first side unit, which is disposed on the side of the first nanopillar unit; the second nanopillar spacer unit further includes a second side unit, which is disposed on the side of the second nanopillar unit; a silicon-aluminum nitride layer is disposed on the surface of the nitride control layer between any adjacent first nanopillar spacer unit and second nanopillar spacer unit. Preferably, the method for preparing the composite nanopillar structure layer includes: S1. A first metal microsphere distribution is formed on the surface of the nitride control layer; S2. The nitride control layer having the first metal microsphere distribution is heat-treated, and then a second metal microsphere distribution is formed on the surface of the nitride control layer after the heat treatment. S3. Perform heat treatment on the first metal microsphere distribution and the second metal microsphere distribution; S4, growth of nanopillar structures; S5. Nitrogen treatment is performed to obtain the composite nanopillar structure layer.

5. The preparation method according to claim 4, characterized in that, The heat treatment of the first metal microsphere distribution and the second metal microsphere distribution includes: S31. Under conditions of temperature of 1000℃ to 1200℃ and pressure of 300 to 600 tor, perform N heat treatment for 30s to 180s; S32. Perform Si heat treatment for 90s to 300s at a temperature of 900℃ to 1000℃ and a pressure of 300 to 600 torr. S33. Heat treatment for 60s to 180s at a temperature of 1000℃ to 1100℃ and a pressure of 300 torr to 600 torr. S34. Perform Al heat treatment for 300s to 900s at a temperature of 500℃ to 1000℃ and a pressure of 300 to 600 torr.

6. The preparation method according to claim 4, characterized in that, The formation of the first metal microsphere distribution on the surface of the nitride control layer includes: Under conditions of temperature of 500℃ to 1000℃ and pressure of 400 torr to 600 torr, a first metal capping layer is grown on the surface of the nitride control layer, and the first metal capping layer is annealed for 50s to 300s to generate a first metal microsphere distribution with a height of 10nm to 100nm. Preferably, the step of forming a second metal microsphere distribution on the surface of the nitride control layer after heat treatment includes: forming a second metal capping layer on the surface of the nitride control layer after heat treatment at a temperature of 500°C to 1000°C and a pressure of 400 to 600 tor, and annealing the second metal capping layer for 60 to 450 seconds to generate a second metal microsphere distribution with a height of 10 nm to 100 nm.

7. The preparation method according to claim 4, characterized in that, The nitride control layer is a Ga vacancy distribution layer; the heat treatment of the nitride control layer having the first metal microsphere distribution includes: Ga is heat-treated for 10 to 40 seconds at a temperature of 1000°C to 1200°C and a pressure of 200 to 500 torr to achieve a Ga vacancy concentration of 1 × 10⁻⁶ in the Ga vacancy distribution layer. 17 cm -3 Up to 1×10 18 cm -3 ;or The nitride control layer is an N-vacancy distribution layer; the heat treatment of the nitride control layer having the first metal microsphere distribution includes: Under conditions of 1000℃ to 1200℃ and 200 torr to 500 torr, N heat treatment is performed for 15 to 60 seconds to achieve an N vacancy concentration of 1 × 10⁻⁶ in the N vacancy distribution layer. 17 cm -3 Up to 1×10 18 cm -3 .

8. The preparation method according to claim 7, characterized in that, After N heat treatment, the surface of the first metal microspheres has a coating layer. The heat treatment of the nitride control layer having the distribution of the first metal microspheres further includes: In a reducing gas atmosphere, the first metal microsphere distribution is heat-treated for 30s to 240s at a temperature of 1050℃ to 1150℃ and a pressure of 100 torr to 300 torr to decompose the coating layer on the surface of the first metal microsphere.

9. The preparation method according to claim 4, characterized in that, The grown nanopillar structure includes: S41. Under conditions of temperature of 500℃ to 1000℃ and pressure of 300 torr to 600 torr, the Si source is introduced at a flow rate of 20 sccm to 200 sccm for 10s to 100s. S42. Under conditions of temperature of 500℃ to 1000℃ and pressure of 300 torr to 600 torr, interrupt the Si source for 10s to 180s. S43, S41 and S42 are cycled and alternated 100 to 1000 times to complete the growth of the nanopillar structure; Preferably, the nitrogen treatment includes: Under conditions of 600℃ to 1250℃, the N source is fed at a flow rate of 1slm to 100slm for 100s to 600s. Preferably, the preparation of the first n-type nitride layer includes: Under conditions of 850℃ to 1000℃ and 200 torr to 400 torr, a Ga source with a flow rate of 20 sccm to 200 sccm, an N source with a flow rate of 20 slm to 100 slm, and a Si source with a flow rate of 10 sccm to 100 sccm are introduced to grow a doping concentration of 1×10⁻⁶. 17 cm -3 Up to 1×10 18 cm -3 The first n-type nitride layer; Preferably, the preparation of the nitride control layer includes: Under conditions of temperature of 1050°C to 1250°C and pressure of 100 torr to 300 torr, a nitride control layer with a thickness of 1 nm to 10 nm is grown on the surface of the first n-type nitride layer. Preferably, growing the nitride buffer layer includes: Under conditions of temperature of 900℃ to 1250℃ and pressure of 100 torr to 300 torr, a Ga source with a flow rate of 100 sccm to 500 sccm and an N source with a flow rate of 20 slm to 100 slm are introduced to grow a nitride buffer layer with a thickness of 500 nm to 1500 nm on the surface of the composite nanopillar structure layer. Preferably, growing the second n-type nitride layer includes: Under conditions of 900℃ to 1200℃ and 100 torr to 300 torr, a Ga source with a flow rate of 100 sccm to 500 sccm, an N source with a flow rate of 20 slm to 100 slm, and a Si source with a flow rate of 50 sccm to 300 sccm are introduced to grow a nitride buffer layer with a thickness of 1000 nm to 5000 nm and a doping concentration of 1 × 10⁻⁶. 18 cm -3 Up to 5×10 19 cm -3 The second n-type nitride layer; Preferably, growing the light-emitting layer includes: A11. At a temperature of 650°C to 950°C and a pressure of 200 torr to 400 torr, a Ga source with a flow rate of 100 sccm to 300 sccm, an In source with a flow rate of 500 sccm to 2000 sccm, and an N source with a flow rate of 30 slm to 100 slm are introduced to grow a quantum well layer with a thickness of 0.5 nm to 5 nm. A12. Under conditions of 700°C to 950°C and 200 torr to 400 torr, a Ga source with a flow rate of 100 sccm to 300 sccm and an N source with a flow rate of 30 slm to 100 slm are introduced to grow a quantum barrier layer with a thickness of 6 nm to 25 nm. The light-emitting layer is obtained by periodically alternating A11 and A12 2 to 15 times; Preferably, growing the p-type nitride layer comprises: growing a thickness of 50 nm to 300 nm and a doping concentration of 1 × 10⁻⁶ under conditions of a temperature of 850 °C to 1050 °C and a pressure of 200 torr to 600 torr. 19 cm -3 Up to 5×10 20 cm -3 The p-type nitride layer.

10. An optoelectronic device, characterized in that, The optoelectronic device includes the nitride semiconductor epitaxial wafer as described in claim 1 or 2, or the nitride semiconductor epitaxial wafer prepared by the preparation method described in any one of claims 3 to 9.

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