FPGA-based rubidium atomic clock servo control system and method

Abstract

This invention provides a rubidium atomic clock servo control system and method based on FPGA, belonging to the field of atomic frequency standard technology. The system includes a laser driving current modulation module, a microwave radio frequency synthesis module, a photoelectric signal acquisition module, a laser frequency locking module, a microwave frequency locking module, a laser temperature control module, a cavity temperature control module, and a magnetic field control module. This invention adopts FPGA digital integration of VCSEL driving current modulation, high-precision microwave radio frequency signal generation, and digital frequency locking control to replace traditional analog circuits, reduce system complexity and cost, and improve the stability and reliability of the rubidium atomic clock.

Description

Technical Field

[0001] This invention relates to the field of atomic frequency standard technology, specifically to a rubidium atomic clock servo control system and method based on FPGA, which is applicable to high-precision time and frequency reference, communication and navigation, aerospace and deep space exploration and other application scenarios. Background Technology

[0002] An atomic clock is a high-precision frequency standard device that uses the energy level transition frequency within atoms as a time reference. It plays an irreplaceable role in modern communication, navigation, time synchronization, aerospace, and deep space exploration. Rubidium atomic clocks, due to their moderate size, low power consumption, and stable performance, have become one of the most widely used atomic frequency standards. In typical rubidium atomic clock systems, the coherent population trapping (CPT) technique has attracted much attention due to its advantages of not requiring a microwave resonant cavity, compact structure, and ease of miniaturization. The excitation of the CPT effect requires the joint driving of a tunable laser and a microwave modulation signal to form a stable dark-state structure in rubidium atoms, thereby achieving precise locking between the microwave frequency and the atomic transition frequency. This process is extremely sensitive to multiple parameters such as laser wavelength, laser intensity, microwave frequency, chamber temperature, and magnetic field stability. Any minute perturbation can lead to frequency locking failure or frequency drift. Therefore, constructing a highly integrated, fast-responding, and precisely controlled servo control system is particularly crucial.

[0003] However, existing rubidium atomic clock servo control systems have several shortcomings. First, most systems use discrete circuits or independent microcontrollers to control each sub-module separately, resulting in a loose system structure, poor coupling between modules, and difficulty in achieving high integration and high bandwidth real-time servo control. They also lack unified coordination capabilities for signal links and feedback paths. Second, in the microwave synthesis path, traditional schemes typically use multi-stage frequency multiplication links to generate the required microwave frequency. This not only increases system complexity but also introduces additional phase noise, which is detrimental to overall frequency stability. Furthermore, the closed-loop robustness of the temperature control system and the stability control of the laser wavelength are often limited by the accuracy and response speed of analog devices, making it difficult to meet the stringent requirements of high-performance atomic clocks. In addition, some existing schemes do not fully consider the potential for digital integration of the system and still rely on analog controllers for frequency locking and temperature control, making it difficult to achieve flexible configuration and remote adjustment, thus limiting the promotion of rubidium atomic clocks in new low-power, low-cost, and high-reliability embedded applications.

[0004] To address the aforementioned technical challenges, there is an urgent need for a highly integrated, configurable, and digitally controlled rubidium atomic clock servo control system and method based on FPGA. This system would enable comprehensive integrated control of laser driving, microwave synthesis, temperature control, magnetic field modulation, and photoelectric feedback paths, thereby improving the frequency locking accuracy, anti-interference capability, and long-term stability of the rubidium atomic clock and meeting the application requirements for integration, miniaturization, and high performance. Summary of the Invention

[0005] The purpose of this invention is to overcome the problems of low system integration, slow feedback response, insufficient control accuracy, and lack of a unified digital platform in existing rubidium atomic clock servo control systems, and to provide an FPGA-based rubidium atomic clock servo control system and method. This system features high integration, fast response, and strong digital configurability, enabling comprehensive servo control of laser drive current, radio frequency signal synthesis, temperature control, magnetic field modulation, and frequency locking feedback, thereby significantly improving the stability and frequency accuracy of the atomic clock system.

[0006] To achieve the above objectives, this invention provides an FPGA-based rubidium atomic clock servo control system, including a laser-driven current modulation module, a microwave radio frequency synthesis module, a photoelectric signal acquisition module, a laser frequency locking module, a microwave frequency locking module, a laser temperature control module, a cavity temperature control module, and a magnetic field control module. The system is connected to an atomic clock physical system, which includes at least a VCSEL laser, a MEMS atomic gas cell, and a photodetector. Preferably, the atomic clock physical system further includes a collimating lens, an attenuator, and a quarter-wave plate. The VCSEL laser, collimating lens, attenuator, quarter-wave plate, MEMS atomic gas cell, and photodetector are sequentially connected to form a complete atomic optical path.

[0007] The laser drive current modulation module is used to control the drive current of the VCSEL laser, enabling precise adjustment of the laser output wavelength to match the frequency required for atomic transitions. This module uses an FPGA as its control core and generates various digital modulation waveforms, including DC bias, triangular waves, and sine waves, based on direct digital synthesis (DDS) technology. These waveforms are then combined using internal combinational logic to form a composite waveform, which is output to a high-resolution digital-to-analog converter for conversion into an analog signal, thereby achieving dynamic control of the laser's emission wavelength.

[0008] The microwave radio frequency synthesis module is used to synthesize frequency-stable and modulated radio frequency signals to drive a VCSEL laser to form a sideband optical field to excite the CPT effect in atoms. Using a temperature-controlled crystal oscillator as a reference, the module provides a high-speed clock to the radio frequency digital-to-analog converter (RF-DAC) after frequency multiplication via a phase-locked loop. Under FPGA control, the RF-DAC directly outputs the radio frequency signal based on DDS technology, which can superimpose various modulated waveforms and output a pure composite radio frequency signal after filtering.

[0009] The laser driving signal and the radio frequency signal are superimposed through a Bias-Tee and then input into the VCSEL laser to form a composite laser driving current with superimposed frequency sidebands. This gives the VCSEL output a dual-color light field structure, which meets the spectral requirements for exciting the CPT effect of rubidium atoms in the MEMS atomic gas cell.

[0010] The photoelectric signal acquisition module is connected to the photodetector. After amplification and high-resolution analog-to-digital conversion, the weak analog signal output by the module is transmitted to the FPGA for real-time extraction and processing of atomic absorption spectral lines and CPT spectral lines, providing key feedback information for subsequent frequency locking control.

[0011] Both the laser frequency locking module and the microwave frequency locking module are based on a digital lock-in amplifier, a low-pass filter, and a PID control algorithm embedded in the FPGA. They perform modulation and demodulation processing on the absorption spectrum and CPT spectrum respectively to obtain the corresponding first-order differential error signal. The error is calculated in real time through the PID algorithm to generate a feedback control signal, thereby achieving precise closed-loop locking of the laser frequency and microwave frequency.

[0012] The laser temperature control module and the cavity temperature control module each use thermistors as temperature sensing elements. They achieve accurate temperature sampling through a Wheatstone bridge circuit and use a PID control algorithm to output control signals to drive the corresponding heating or cooling elements, ensuring that the laser and the atomic gas chamber operate in a constant temperature environment, thereby stabilizing the laser output wavelength and atomic transition frequency.

[0013] The magnetic field control module includes a Helmholtz coil for establishing a spatially uniform and stable bias magnetic field within the atomic gas chamber region; preferably, the magnetic field control module also includes a magnetic shielding device for shielding external interference magnetic fields to ensure that the magnetic field conditions during the atomic transition process meet the high-precision requirements of the rubidium atomic clock.

[0014] Furthermore, the present invention also provides a rubidium atomic clock servo control method based on the above system, comprising the following steps:

[0015] Step S1: The laser and radio frequency signals are synthesized using the FPGA programmable module. Based on the direct digital synthesis technology, a composite analog voltage signal is generated to control the driving current of the VCSEL laser. At the same time, a 3.4GHz radio frequency signal is synthesized. The two signals are combined by the Bias-Tee to drive the VCSEL laser to form a dual-color light field.

[0016] Step S2: The laser temperature control module collects the temperature signal of the VCSEL laser, detects the change of the thermistor based on the Wheatstone bridge, and generates a PWM control signal to drive the thermoelectric cooling device in combination with the PID control module to realize closed-loop control of the laser temperature.

[0017] Step S3: The temperature signal of the MEMS atomic gas chamber is acquired by the cavity temperature control module. The actual gas chamber temperature is obtained by digital filtering and temperature conversion. The heating element is driven by the output PWM control signal of the PID module to realize closed-loop control of the gas chamber temperature.

[0018] Step S4: The magnetic field control module uses a multi-layer magnetic shielding structure to suppress stray magnetic fields from the outside, and a uniform bias magnetic field is established in the atomic gas chamber region through a Helmholtz coil. The coil drive current is controlled by the FPGA to achieve precise adjustment of the magnetic field strength.

[0019] Step S5: Connect the servo control system to the atomic clock physical system. The output signal of the photodetector is acquired by the analog-to-digital converter and sent to the FPGA for digital signal processing.

[0020] Step S6: The acquired absorption spectrum is modulated and demodulated using the laser frequency locking module. The first-order differential signal is extracted as the error signal. The VCSEL driving current bias is adjusted by the feedback signal output by the PID controller so that the laser wavelength is stably locked to the atomic absorption peak.

[0021] Step S7: Servo control of the CPT spectrum is performed using a microwave frequency locking module. The first-order differential signal of CPT is extracted as an error signal. The voltage signal output by the PID controller controls the tuning terminal of the voltage-controlled crystal oscillator, stabilizes the 10MHz reference signal, and ensures that the radio frequency signal is accurately locked to the atomic transition frequency.

[0022] Compared with existing technologies, the beneficial effects of this invention include: the use of FPGA digital integration of VCSEL drive current modulation, high-precision microwave RF signal generation, and digital frequency locking control to replace traditional analog circuits and large components such as current regulators and microwave frequency multipliers, reducing system complexity and cost; the highly integrated and digital design of the system improves the flexibility and accuracy of signal processing, and enhances the stability and reliability of the rubidium atomic clock; the multi-closed-loop collaborative control mechanism realizes dynamic parameter cross-optimization between each servo loop, further enhancing the system's anti-interference capability and long-term stability, and meeting the application requirements of integration, miniaturization, and high performance. Attached Figure Description

[0023] Figure 1 This is an overall architecture diagram of the rubidium atomic clock servo control system based on FPGA provided in an embodiment of the present invention.

[0024] Figure 2 This is a flowchart of a rubidium atomic clock servo control method based on FPGA provided in an embodiment of the present invention.

[0025] Figure 3 This is a schematic diagram of the peripheral control circuit provided in an embodiment of the present invention. Detailed Implementation

[0026] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Those skilled in the art should understand that the following embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit the scope of protection of the present invention.

[0027] like Figure 1 and Figure 3 As shown in the embodiment of the present invention, the rubidium atomic clock servo control system based on FPGA is as follows: Figure 1 As shown, it mainly consists of an FPGA control core, an atomic clock physical system, and peripheral control circuits. The FPGA control core implements core digital signal processing functions such as a digital lock-in amplifier, a low-pass filter, and a PID control algorithm. The atomic clock physical system mainly includes a VCSEL laser, a collimating lens, an attenuator, a quarter-wave plate, a MEMS atomic gas cell, and a photodetector, arranged sequentially to form a complete atomic optical path. The peripheral control circuits include a laser drive current modulation module 1, a microwave radio frequency synthesis module 2, a photoelectric signal acquisition module 3, a laser frequency locking module 4, a microwave frequency locking module 5, a laser temperature control module 6, a cavity temperature control module 7, and a magnetic field control module 8.

[0028] The laser drive current modulation module 1 is the core component for achieving precise laser wavelength control. Its main function is to generate programmable composite modulation signals to drive the VCSEL laser. In this embodiment of the invention, the module is controlled by a high-speed FPGA chip, which drives a dual-channel, 16-bit resolution, 500MSPS sampling rate digital-to-analog converter (DAC) chip via an SPI interface. Preferably, direct digital synthesis (DDS) technology is used to generate various digital modulation waveforms, including DC bias signals, triangular wave scanning signals, and sine wave modulation signals.

[0029] Within the FPGA, this embodiment of the invention incorporates a dedicated waveform generation module. Triangular wave generation is achieved using a programmable counter, with a sweep period continuously adjustable from 1ms to 1000ms and a sweep range flexibly configurable from 1% to 100% of full scale. The sinusoidal modulation signal is generated using a lookup table (LUT), with a modulation frequency range of 100Hz to 100kHz and a modulation depth set between 0.1% and 50%. Various waveforms are combined and weighted using digital adders and multipliers to form a composite digital signal. In one embodiment of the invention, the DC bias signal amplitude ranges from 0V to 2.5V, corresponding to a laser drive current of 0mA to 5mA.

[0030] The composite digital signal, after being output by the DAC, enters the analog processing link, which includes a low-pass filter, a signal buffer, an impedance matching network, and a power amplifier circuit. The low-pass filter employs a fourth-order Butterworth structure with a cutoff frequency set at 250kHz, effectively suppressing high-frequency quantization noise and image frequency components in the DAC output. The signal buffer is implemented using a high-speed operational amplifier with a bandwidth greater than 50MHz and a slew rate greater than 2000V / μs. The impedance matching network uses a π-type structure to achieve 50Ω characteristic impedance matching, ensuring minimal reflection during signal transmission. The power amplifier circuit provides sufficient drive capability, with a maximum output current of 100mA.

[0031] The modulated voltage signal, after the above processing, is finally coupled to the microwave radio frequency signal through a Bias-Tee and output, and then sent to the VCSEL laser driver to modulate the laser current, thereby achieving precise control of the laser wavelength. In this embodiment of the invention, the VCSEL laser operates at a wavelength of 795 nm, corresponding to the D1 line transition of the 87Rb atom. A small change in the driving current will cause a corresponding shift in the laser wavelength, with a typical tuning factor of 0.01 nm / mA.

[0032] The microwave radio frequency synthesis module 2 is used to generate a frequency-stable, modulated, high-quality radio frequency signal to drive the VCSEL laser to form the sideband optical field required to excite the CPT effect. In this embodiment of the invention, the module adopts an innovative direct radio frequency synthesis architecture, including a 10MHz oven-controlled crystal oscillator (OCXO), a phase-locked loop (PLL) chip, and a dual-channel, 16-bit resolution, 12.6GSPS sampling rate radio frequency digital-to-analog converter (RF DAC).

[0033] A 10MHz temperature-controlled crystal oscillator, used as the reference clock source for the entire system, exhibits better short-term stability than a 5×10⁻⁶ crystal oscillator. -12 @1s, phase noise below -140dBc / Hz@10kHz offset. The reference signal output by this crystal oscillator serves as the system's frequency reference on one hand, and is also input to the phase-locked loop (PLL) chip for frequency multiplication. Preferably, the PLL chip employs a fractional-N divider structure, with a programmable multiplication factor. After frequency multiplication and phase locking, a 12.6GHz high-speed sampling clock signal is generated for use by the RF DAC. The loop bandwidth of the PLL is set to 100kHz to achieve an optimal balance between phase noise suppression and locking speed.

[0034] The RF DAC operates based on direct digital synthesis technology under FPGA control. In this embodiment, a high-precision DDS core is implemented internally within the FPGA, with a 48-bit phase accumulator, achieving a frequency resolution better than 1μHz. The digital signal output from the DDS is converted by the RF DAC into an RF carrier with a center frequency of 3.4GHz, which precisely corresponds to half of the 6.834GHz hyperfine splitting frequency of the 87Rb atom's ground state. The RF DAC's spurious-free dynamic range (SFDR) is better than 65dBc, ensuring the purity of the output RF signal.

[0035] This invention also supports the superposition of various programmable modulation schemes on the radio frequency carrier, including triangular wave frequency scanning and sine wave modulation. Triangular wave frequency scanning is used to search for CPT spectral lines; the sweep period can be set from 10ms to 10s, and the sweep range can be configured from 1kHz to 1MHz. Sine wave modulation is used for error signal extraction in frequency-locked feedback; the typical modulation frequency is 156Hz, and the modulation depth can be adjusted from 0.1kHz to 10kHz. These modulation parameters can all be modified in real-time via FPGA programming to adapt to optimization requirements under different operating conditions.

[0036] The composite RF signal output from the RF DAC is purified by a bandpass filter to remove out-of-band noise and spurious signals. The bandpass filter has a center frequency of 3.4 GHz, a 3 dB bandwidth of 200 MHz, and out-of-band rejection better than 60 dB. The filtered RF signal, along with the DC bias and modulation signals from the laser drive current modulation module, is combined through a Bias-Tee to drive the VCSEL laser. The Bias-Tee has a DC port bandwidth from DC to 50 MHz, an RF port bandwidth from 100 MHz to 6 GHz, and isolation better than 40 dB.

[0037] When a composite driving current is applied to a VCSEL laser, a ±3.4 GHz sideband structure is formed in the laser output spectrum, constructing the two-color light field required to excite the CPT effect of rubidium atoms. The frequency difference between the two first-order sidebands is exactly equal to the hyperfine splitting frequency of the ground state of 87Rb atoms, which is 6.834 GHz, satisfying the coherence condition for the formation of the CPT dark state.

[0038] It should be noted that, although both the laser frequency-locking loop and the microwave frequency-locking loop in this embodiment of the invention are coupled to the same VCSEL laser via a Bias-Tee, the two modulation signals are effectively isolated in the frequency domain to avoid the impact of intermodulation distortion on the frequency-locking accuracy. Specifically, the typical value of the sinusoidal modulation frequency f1 applied by the laser frequency-locking loop is 4.88 kHz, while the typical value of the low-frequency modulation frequency f2 applied by the microwave frequency-locking loop is 156 Hz. The frequency difference between the two is more than 30 times, and they are completely separated in the spectrum. Even though the VCSEL laser exhibits weak nonlinear characteristics that generate second-order intermodulation components (frequency f1+f2≈5.036kHz and f1-f2≈4.724kHz), these intermodulation components are not at the same frequency as the fundamental frequencies f1 (4.88kHz) and f2 (156Hz) of the two modulation signals. After being demodulated at the same frequency by their respective digital lock-in amplifiers, the intermodulation components are mapped to a high-frequency band far from DC. The subsequent low-pass filters (laser frequency-locked loop cutoff frequency 1Hz to 100Hz, microwave frequency-locked loop cutoff frequency 10Hz) completely filter out these high-frequency intermodulation components, with a stopband attenuation better than 60dB. Simultaneously, the demodulation of the two modulation signals uses their own independent reference signals at the same frequency. According to the principle of orthogonality, the modulation response components of different frequencies are not coupled to each other within the demodulation integration window. Therefore, the dual-frequency-locked loop of this invention can still achieve independent closed-loop control without interference when sharing the same VCSEL laser, and the error signal extraction accuracy of laser frequency locking and microwave frequency locking is not affected by dual-frequency co-drive.

[0039] The photoelectric signal acquisition module 3 is responsible for conditioning and digitizing the weak analog signal output by the photodetector, providing high-quality input data for subsequent FPGA digital signal processing. In this embodiment of the invention, the module includes a photodetector, a high-precision resistor, a DC subtractor, an adjustable gain amplifier, and a four-channel, 12-bit resolution, up to 126MSPS sampling rate analog-to-digital converter (ADC).

[0040] The photodetector uses a silicon photodiode with a response wavelength range of 400 nm to 1100 nm, a peak response around 900 nm, and a responsivity of approximately 0.6 A / W at 795 nm. The photodetector converts the laser signal passing through the MEMS atomic gas cell into a current signal. This current signal typically has an amplitude in the range of 1 μA to 100 μA and contains atomic absorption and CPT spectral information.

[0041] The current signal is converted into a voltage signal by a high-precision resistor. The selection of the conversion resistor value requires a trade-off between sensitivity and bandwidth. In this embodiment of the invention, a 10kΩ metal film resistor is used, with a temperature coefficient of less than 25ppm / ℃, achieving a conversion sensitivity of 10mV / μA while maintaining a bandwidth of approximately 16kHz, thus meeting the system signal bandwidth requirements.

[0042] Since the output signal of the photodetector contains a large DC component (corresponding to the average power of the laser), while the useful signal (atomic absorption modulation signal) usually only accounts for a small portion of the total signal, this embodiment of the invention employs a DC subtractor to remove the DC component, thereby fully utilizing the dynamic range of the subsequent amplifier and ADC. The DC subtractor is implemented using a differential circuit composed of a precision operational amplifier, wherein the reference voltage is generated by a DAC controlled by an FPGA, which can track and compensate for slow changes in optical power in real time.

[0043] The adjustable gain amplifier optimizes the dynamic range of the signal after removing the DC component, with a gain range of 1 to 100 times, which can be set via FPGA programming. Preferably, a digitally programmable gain amplifier (PGA) is used, with a gain switching time of less than 1μs, ensuring signal continuity when switching between different operating states. The amplifier's noise figure is less than 5nV / √Hz, bandwidth is greater than 10MHz, and total harmonic distortion is less than 0.01%.

[0044] The conditioned signal enters the analog-to-digital converter (ADC) for synchronous sampling and conversion into a digital signal. This embodiment of the invention employs a four-channel 12-bit ADC with a sampling rate configurable from 1MSPS to 126MSPS. For typical applications, a sampling rate of 10MSPS provides sufficient oversampling to support the implementation of digital filters while maintaining acceptable power consumption. The ADC has an effective bit width (ENOB) of 11.2 bits and a signal-to-noise ratio (SNR) better than 68dB. The digital signal is transmitted to the FPGA via an LVDS interface at a transmission rate of up to 3.2Gbps, ensuring reliable and real-time data transmission.

[0045] The laser frequency locking module 4 is the core control unit for achieving stable laser wavelength locking. Its function is to precisely lock the laser wavelength at the 87Rb atomic reference absorption peak position through closed-loop feedback. In this embodiment of the invention, this module is fully digitally integrated based on FPGA and mainly includes three sub-modules: a digital lock-in amplifier, a low-pass filter, and a PID control unit.

[0046] The digital lock-in amplifier (LCA) employs quadrature demodulation technology and is a key component for extracting weak signals. Its working principle is as follows: the laser-driven current modulation module applies a frequency of [frequency value missing] to the VCSEL. The sinusoidal modulation causes a minute periodic oscillation in the laser wavelength, which in turn generates a response component in the atomic absorption signal that has the same frequency as the modulation frequency. The amplitude and phase of this response component contain information about the deviation of the laser wavelength from the atomic absorption peak.

[0047] In this embodiment of the invention, the digital lock-in amplifier is implemented using the following algorithm structure. First, an orthogonal reference signal with the same frequency and phase as the modulation signal is generated inside the FPGA. and ,in The sampling point number, The sampling period is [number]. Then, the photoelectric signal acquired by the ADC [is used]. Multiplying each component by the two reference signals yields the in-phase component. and orthogonal components :

[0048] ,

[0049] ,

[0050] in: For the first The photoelectric signal value at each sampling point is expressed in V. This is the modulation frequency, typically 4.88 kHz; The sampling period is expressed in seconds. , The sampling frequency; and These are the in-phase and quadrature components after demodulation, respectively, in units of V.

[0051] The above multiplication operation is implemented in the FPGA using an 18×18-bit signed multiplier, which can be completed within a single clock cycle, ensuring real-time performance. The multiplication result is then filtered by a low-pass filter to remove high-frequency components, resulting in a smooth, in-phase component. and orthogonal components The low-pass filter employs a configurable finite impulse response (FIR) structure with an order of 128, and its cutoff frequency can be programmed within the range of 1Hz to 100Hz. The filter coefficients utilize a Kaiser window design, achieving a stopband attenuation better than 60dB.

[0052] Because the absorption spectrum is symmetrical about the center frequency, when the laser wavelength is exactly at the absorption peak, the modulation response exhibits a purely even function characteristic, and at this time the in-phase component... Approaching zero; when the laser wavelength deviates from the absorption peak, It presents a non-zero value, the sign of which indicates the direction of deviation, and the magnitude is proportional to the amount of deviation. Therefore, It can be directly used as an error signal for laser frequency locking. .

[0053] The PID control unit calculates the feedback control quantity in real time based on the error signal. Its discrete-domain control algorithm is expressed as follows:

[0054] ,

[0055] in: For the first The output control quantity per control cycle, in V; For the first The error signal value for each control cycle, in V; This is a proportionality constant, dimensionless, with a typical value range of 0.1 to 10; This is the integral coefficient, in units of s⁻¹, with a typical value range of 0.01 to 1; This is the differential coefficient, expressed in units of s, with a typical value range of 0 to 0.1. The control period is measured in seconds (s).

[0056] In this embodiment of the invention, the PID controller is implemented using 32-bit fixed-point arithmetic within the FPGA, and the integrator is configured with an anti-saturation mechanism to prevent integral term overflow. Control output After being converted by a DAC, the laser output wavelength is used to dynamically adjust the laser drive current bias, thereby stabilizing the laser output wavelength at the reference absorption peak of the 87Rb atom, thus completing the laser frequency locking control.

[0057] Preferably, the PID control unit in this embodiment of the invention also incorporates an adaptive parameter adjustment mechanism, which dynamically adjusts the PID parameters based on the amplitude and rate of change of the real-time detected error signal. Specifically, when the amplitude of the detected error signal continuously increases, the system automatically increases the proportional coefficient to accelerate the response speed; when the detected error signal is stable within a set range, the system appropriately decreases the proportional coefficient and increases the integral coefficient to improve steady-state accuracy. The mathematical expression of the adaptive algorithm is:

[0058] ,

[0059] in: and These are the ratio coefficients before and after the update, respectively. To adaptively adjust the step size factor, its value ranges from 0.01 to 0.1, and it needs to be optimized based on the system response characteristics. This is the sign function. This adaptive mechanism significantly improves the system's adaptability to environmental disturbances and its robustness in frequency locking.

[0060] The function of the microwave frequency locking module 5 is to precisely lock the frequency of the radio frequency signal to the atomic transition frequency, thereby stabilizing the frequency output of the atomic clock. In this embodiment of the invention, this module is also fully digitally implemented using an FPGA, including a digital lock-in amplifier, a low-pass filter, and a PID control unit. Its architecture is similar to that of the laser frequency locking module, but the controlled object and parameter configuration are different.

[0061] The principle of microwave frequency locking is as follows: The microwave radio frequency synthesis module applies low-frequency modulation (typically 156Hz) to the radio frequency signal, causing the CPT spectral response to contain a component coherent with the modulation frequency. When the radio frequency is exactly half the atomic hyperfine transition frequency, the CPT signal reaches its peak, and the modulation response exhibits even-function characteristics. When the radio frequency deviates from this value, the CPT signal decreases, and the modulation response exhibits a non-zero odd-function component, which can be used as the frequency locking error signal.

[0062] In this embodiment of the invention, the digital lock-in amplifier employs the same quadrature demodulation algorithm as the laser frequency-locking module, but the reference signal frequency is set to the microwave modulation frequency of 156Hz. The demodulated in-phase component is low-pass filtered to obtain the first-order differential signal of the CPT spectrum, which serves as the microwave frequency-locking error signal. The cutoff frequency of the low-pass filter is set to 10Hz to obtain a sufficiently low noise bandwidth.

[0063] The PID control unit calculates the control output based on the microwave frequency locking error signal. This output signal is then converted by a DAC to drive the tuning pin of a voltage-controlled crystal oscillator (VCXO). The VCXO has a nominal frequency of 10MHz, a tuning range of ±10ppm, and a tuning sensitivity of 1ppm / V. Through closed-loop feedback, the output frequency of the VCXO is precisely locked, ensuring that the final synthesized RF signal accurately corresponds to the atomic transition frequency.

[0064] In this embodiment of the invention, to improve the accuracy and stability of microwave frequency locking, a high-precision digital phase-locked loop (PLL) detection algorithm is implemented within the FPGA, capable of detecting minute frequency shifts. The PID controller employs 32-bit floating-point arithmetic to ensure control accuracy. Simultaneously, the system implements an adaptive control algorithm that dynamically adjusts control parameters based on the signal-to-noise ratio of the CPT spectrum, improving system robustness. A stable 10MHz output signal serves as the reference input for both the PLL chip and the RF digital-to-analog converter, ensuring the coherence and long-term stability of the entire microwave frequency synthesis chain.

[0065] The laser temperature control module 6 is used to achieve precise temperature control of the VCSEL laser, ensuring that the laser operates in a constant temperature environment to stabilize its output wavelength. In this embodiment of the invention, the module uses a temperature measurement mechanism based on a Wheatstone bridge and a PID control algorithm to construct a temperature control closed loop.

[0066] A thermistor, used as a temperature sensing element, is installed near the VCSEL laser package to monitor the ambient temperature of the laser in real time. The thermistor is of the negative temperature coefficient (NTC) type, with a nominal resistance of 10kΩ at 25℃, a temperature coefficient B of 3950K, and an operating temperature range of -40℃ to 125℃. The thermistor, along with three other precision resistors in a Wheatstone bridge, forms a four-arm bridge structure. When a temperature change causes a change in the thermistor's resistance, the bridge output produces a corresponding voltage change.

[0067] In this embodiment of the invention, the Wheatstone bridge employs a constant current excitation method, with the excitation current set to 100μA to reduce the self-heating effect of the thermistor. The bridge output signal is amplified 100 times by an instrumentation amplifier before being sent to the ADC for sampling. The amplifier uses a chopper-stabilized zero-crossing structure, with an offset voltage below 1μV and a common-mode rejection ratio better than 120dB, ensuring that minute temperature changes can be accurately detected.

[0068] The measured temperature value is compared with the set temperature value (typically set at 25.00℃) to obtain a temperature error signal. This error signal is input to the PID control module, which calculates and outputs a control signal in real time. The PID parameters are optimized based on the laser's thermal time constant and the transfer function of the temperature control system to achieve a balance between fast response and low overshoot.

[0069] The control output signal drives the thermoelectric cooler (TEC) element in PWM mode. The PWM frequency is set to 10kHz, the duty cycle resolution is 12 bits, and the control accuracy is 0.024%. The TEC element has a maximum cooling power of 2W and a maximum temperature difference of 60℃, enabling rapid heating and cooling bidirectional control. The temperature changes mentioned above are again collected by a thermistor and fed back to the controller, forming a complete closed-loop temperature control system. This achieves stable temperature control of the VCSEL, with a temperature stability better than ±0.01℃, thereby ensuring the long-term stability of the laser wavelength.

[0070] The cavity temperature control module 7 is used to achieve precise temperature control of the MEMS atomic gas chamber, ensuring that the atomic gas chamber operates at the optimal temperature to stabilize the atomic transition frequency. In this embodiment of the invention, the module uses an STM32 microcontroller as the control core and adopts a Wheatstone bridge temperature measurement structure similar to that of the laser temperature control module.

[0071] The MEMS atomic gas chamber integrates a thermistor as a temperature sensing element. This thermistor, together with an externally constructed Wheatstone bridge, forms a temperature measurement circuit. When the chamber temperature changes, the resistance of the thermistor changes, causing a corresponding change in the bridge's output voltage. The differential voltage signal output by the bridge is amplified by a differential amplifier and then input to the STM32's internal ADC module. The ADC has a 12-bit resolution and a configurable sampling rate.

[0072] The STM32 microcontroller incorporates a digital low-pass filter algorithm to denoise the sampled signal. The filter uses a moving average structure with a window length of 16 sampling points. The filtered signal is then converted using a pre-calibrated thermistor resistance-temperature curve to obtain the current temperature value of the atomic gas chamber. This calibration curve is stored in the microcontroller's Flash memory and contains calibration data for 256 temperature points, with a temperature resolution better than 0.01℃.

[0073] The temperature error is obtained by comparing the measured temperature with the set temperature value (typically 75.00℃), and this error is input to the software-implemented PID control module for adjustment. The PID control output is related to the duty cycle of the PWM signal, with the PWM frequency set to 1kHz, controlling the MOSFET to drive the heating resistor. The heating resistor is made of nickel-chromium alloy wire, with a rated power of 1W and a thermal response time constant of approximately 5s.

[0074] The chamber temperature control module of this invention achieves dynamic adjustment and closed-loop control of the atomic gas chamber temperature, with a temperature stability better than ±0.005℃, thereby maintaining the stability of the atomic transition frequency and improving the frequency output accuracy of the atomic clock system. Preferably, the module also has a temperature ramp function, which can achieve a smooth temperature rise during system startup and avoid the impact of thermal shock on the atomic gas chamber.

[0075] The magnetic field control module 8 is used to provide a stable magnetic field environment for the atomic gas chamber, ensuring that the magnetic field conditions during the atomic transition process meet the high-precision requirements of the rubidium atomic clock. In this embodiment of the invention, the module includes a magnetic shielding device and a Helmholtz coil.

[0076] The magnetic shielding device is constructed from multiple layers of high-permeability materials to shield against external stray magnetic field interference. In this embodiment of the invention, the magnetic shielding employs a three-layer permalloy structure with an inner diameter of 30 mm and a length of 50 mm, with a 1 mm gap between each layer. The shielding factor is better than 10000, which can attenuate the geomagnetic field and environmental magnetic disturbances to the sub-microtesla level, ensuring that the MEMS atomic gas chamber is in a stable magnetic environment.

[0077] Helmholtz coils are used to generate a spatially uniform bias magnetic field (C-field) within the atomic gas cell region, providing constant Zeeman splitting conditions for atomic energy levels to select specific magnon energy levels to participate in CPT transitions. In this embodiment of the invention, the Helmholtz coil consists of two coaxial, oriented circular coils with a radius of 15 mm and a distance between them equal to the radius. Each coil has 100 turns. This geometric configuration generates a highly uniform magnetic field in the central region of the two coils, with a magnetic field uniformity better than 0.1% within a range of ±5 mm from the center.

[0078] The Helmholtz coil is connected to the system control circuit board via a 2.54mm pin header, and the drive current is provided by a current source controlled by the FPGA. The current source employs a high-precision DAC and constant-current drive circuit, with a current range of 0 to 100 mA, a resolution of 1 μA, and a stability better than 10 ppm. The FPGA adjusts the output current of the drive circuit through the DAC to achieve precise control of the magnetic field strength. A typical bias magnetic field strength is set to 20 μT, corresponding to a drive current of approximately 10 mA.

[0079] The magnetic field control module of this invention enables real-time stable control of the local magnetic field in the atomic gas chamber, thereby ensuring the stability of the atomic transition frequency and eliminating the influence of magnetic field drift on the atomic clock frequency.

[0080] During system operation, a 10MHz temperature-controlled crystal oscillator serves as the reference clock source. Its output signal receives an error signal from the microwave frequency-locked module via a voltage-controlled port for frequency fine-tuning, outputting a stable 10MHz reference signal. This reference signal also serves as the input to the phase-locked loop chip, and after frequency multiplication, outputs a high-speed clock for the RF DAC. Under FPGA control, the RF DAC generates a 3.4GHz radio frequency signal, which, together with the DC bias and modulation signals from the laser drive current modulation module, is combined via a bias-tee to drive the VCSEL laser.

[0081] The temperature of the VCSEL laser is monitored and adjusted in real time by the laser temperature control module to ensure constant temperature operation. The dual-color light field output by the laser (including ±3.4GHz sidebands) enters the MEMS atomic gas cell after passing through a collimating lens, attenuator, and quarter-wave plate. The temperature of the atomic gas cell is stably controlled by the cavity temperature control module, and the magnetic field environment is provided and maintained by the magnetic field control module.

[0082] After the laser interacts with rubidium atoms, the transmitted light is detected by a photodetector and converted into an electrical signal. This signal is then conditioned and digitized by a photoelectric signal acquisition module and sent to an FPGA for processing. The FPGA extracts error signals from the absorption and CPT spectra, which are then processed by a digital lock-in amplifier, a low-pass filter, and a PID controller to generate feedback control signals for laser frequency locking and microwave frequency locking, forming two mutually coordinating closed-loop control systems.

[0083] Through the aforementioned multi-closed-loop collaborative control, the rubidium atomic clock servo control system of this invention can achieve comprehensive and precise control of laser wavelength, microwave frequency, laser temperature, atomic gas cell temperature, and bias magnetic field, ensuring high-precision and high-stability frequency output of the atomic clock system. Test results show that the rubidium atomic clock using the system of this invention achieves a short-term stability of 3×10⁻¹¹@1s and a daily stability better than 5×10⁻¹², meeting the requirements of high-performance applications.

[0084] The FPGA-based rubidium atomic clock servo control method provided in this invention adopts the system described in the above system embodiments, such as... Figure 2 As shown, it includes the following steps:

[0085] Step S1: Laser and radio frequency signal synthesis.

[0086] The synthesis of laser and radio frequency (RF) signals is accomplished using an FPGA programmable module. The FPGA is used to design and drive interface chips such as DAC, RF DAC, and ADC, employing the SPI protocol for module communication control. The DAC module, based on direct digital synthesis (DDS), outputs triangular and sine waves with adjustable frequency, amplitude, and waveform. These are superimposed with a DC bias signal to generate a composite analog voltage signal. This signal, after voltage-to-current conversion, controls the VCSEL laser's drive current, adjusting its output wavelength. The RF DAC module, under FPGA control, synthesizes a 3.4 GHz RF signal and can superimpose a modulation signal with an adjustable sweep period and waveform to generate a composite RF output. The laser drive signal and RF signal are combined via a bias-tee circuit, ultimately driving the VCSEL laser to form ±3.4 GHz sidebands, constructing a dual-color light field for exciting the CPT effect.

[0087] Step S2: Laser temperature control.

[0088] A laser temperature control module is used to acquire the temperature signal from the VCSEL temperature control interface. A Wheatstone bridge-based temperature acquisition method is employed to detect changes in the resistance of a thermistor. These resistance changes cause variations in the bridge's output voltage, which is amplified and sent to the controller. The controller compares the measured temperature with the set temperature (25.00℃), calculates the temperature error, and generates a PWM control signal based on a PID control algorithm. This PWM signal drives the TEC module, achieving closed-loop temperature control of the VCSEL with a temperature stability of ±0.01℃, thus stabilizing its wavelength output.

[0089] Step S3: Temperature control of the atomic gas chamber.

[0090] The output signal of the integrated thermistor in the MEMS atomic gas chamber is acquired using a cavity temperature control module. A Wheatstone bridge is constructed, and the temperature signal is obtained through differential amplification and ADC sampling. The microcontroller internally performs noise reduction processing on the sampled signal using a digital low-pass filter algorithm, and calculates the actual gas chamber temperature based on the pre-calibrated thermistor resistance-temperature curve. The measured temperature is compared with the set temperature value (75.00℃), and a PWM control signal is calculated and output through a PID module to drive the gas chamber heating element, achieving closed-loop temperature control of the atomic gas chamber. The temperature stability reaches ±0.005℃, improving the environmental stability of the atomic transition frequency.

[0091] Step S4: Magnetic field environment control.

[0092] The magnetic field control module employs a multi-layered magnetic shielding structure to suppress external stray magnetic field interference, achieving a shielding factor better than 10000. A spatially uniform bias magnetic field is established within the atomic gas chamber region using a Helmholtz coil, with a typical magnetic field strength of 20 μT and a uniformity better than 0.1%. The coil drive current is provided by a high-precision current source controlled by an FPGA, with a current stability better than 10 ppm, enabling precise adjustment of the magnetic field strength and ensuring that the atomic transition frequency is unaffected by magnetic field drift.

[0093] Step S5: System connection and signal acquisition.

[0094] The servo control system is connected to the atomic clock physical system. The output signals from the laser drive and RF synthesis modules are input to the VCSEL drive interface via a Bias-Tee. The laser temperature control module is connected to the VCSEL temperature control interface, the cavity temperature control module is connected to the atomic gas cell interface, and the magnetic field control module is arranged around the gas cell. A photodetector is connected to the ADC acquisition interface to acquire photoelectric signals. The ADC converts the acquired analog signals into digital signals and transmits them to the FPGA control chip for subsequent frequency locking control processing.

[0095] Step S6: Laser frequency locking control.

[0096] The absorption spectrum signal acquired by the ADC is modulated and demodulated using a laser frequency-locking module. A digital lock-in amplifier designed within the FPGA generates a reference signal with the same frequency and phase as the modulation signal. The acquired signal is multiplied by the reference signal and then low-pass filtered to extract the first-order differential signal of the absorption spectrum as the laser frequency-locking error signal. This error signal is compared with a set reference value (zero) and input to a PID controller. The controller uses a proportional-integral-derivative algorithm to calculate the error in real time and outputs a feedback control signal. This signal is used to dynamically adjust the VCSEL drive current bias, so that the laser output wavelength is stably locked at the 87Rb atomic absorption peak (795nm), completing the laser frequency-locking closed-loop control.

[0097] Step S7: Microwave frequency locking control.

[0098] A microwave frequency-locking module is used to perform servo control on the CPT spectral line signal. A digital lock-in amplifier designed within the FPGA extracts the component coherent with the modulation frequency from the CPT signal using a quadrature demodulation algorithm. After processing by a low-pass filter, the first-order differential signal of the CPT spectral line is obtained as the microwave frequency-locking error signal. A PID controller calculates the output control voltage based on the error signal, driving the RF DAC channel output voltage signal to control the tuning terminal of the voltage-controlled crystal oscillator (VCXO), dynamically adjusting the VCXO output frequency to achieve stable control of the 10MHz reference signal. This stable 10MHz signal serves as the reference input for the phase-locked loop and the RF DAC, ensuring that the final RF signal (3.4GHz) is precisely locked at half the atomic transition frequency, achieving closed-loop microwave frequency-locking control.

[0099] Through the coordinated execution of steps S1 to S7 above, the rubidium atomic clock servo control method of this embodiment of the invention realizes a complete control process of laser signal generation, temperature control, magnetic field control and dual closed-loop frequency locking, ensuring the frequency adaptive adjustment and stable operation of the atomic clock physical system.

[0100] A key innovation of this invention lies in achieving dynamic collaborative optimization among the laser frequency-locking loop, microwave frequency-locking loop, laser temperature control loop, cavity temperature control loop, and magnetic field control loop. In traditional solutions, each servo loop operates independently, lacking the ability to cross-optimize parameters. When external disturbances cause a large error in one loop, it may trigger a cascading response in other loops, affecting the overall system stability.

[0101] This invention implements a multi-loop cooperative control algorithm within an FPGA. Its core idea is to establish a correlation model between the error signals of each loop and dynamically adjust the control parameters of each loop based on the real-time detected multi-dimensional error vector. Specifically, the system defines a five-dimensional error vector. These correspond to laser frequency locking error, microwave frequency locking error, laser temperature error, gas chamber temperature error, and magnetic field error, respectively.

[0102] The cooperative control algorithm employs the following strategy: when a laser temperature error is detected... When the temperature exceeds a preset threshold (e.g., 0.02℃), the system automatically increases the integral coefficient of the laser frequency locking loop to compensate for wavelength drift caused by temperature changes; when a microwave frequency locking error is detected... As the temperature and magnetic field of the gas chamber continue to increase, the system checks the temperature and magnetic field status of the chamber. If any abnormality is found, the temperature and magnetic field control loops are processed first. When multiple loops have large errors at the same time, the system processes them in order of priority (magnetic field, temperature, laser frequency locking, microwave frequency locking) to avoid control conflicts.

[0103] Preferably, the collaborative control algorithm also incorporates an error coupling compensation mechanism. Since there is a clear physical relationship between laser wavelength and temperature (temperature coefficient approximately 0.06 nm / ℃), the system can predict the wavelength drift based on temperature measurements and perform feedforward compensation in the laser frequency-locking loop, thereby reducing the burden on closed-loop control and improving response speed. Similarly, the effect of magnetic field changes on atomic transition frequencies (Zeeman effect, approximately 575 Hz / μT) can also be pre-corrected through feedforward compensation.

[0104] The aforementioned multi-loop collaborative control mechanism fully leverages the parallel processing capabilities of the FPGA. The control algorithms for each loop run in independent logic modules, while the collaborative controller, as the top-level module, coordinates the parameter configurations and operating states of each sub-module. System resource utilization is as follows: Lookup table (LUT) utilization is approximately 65%, flip-flop (FF) utilization is approximately 45%, and digital signal processing unit (DSP) utilization is approximately 80%, ensuring real-time performance while reserving sufficient resource margin for functional expansion.

[0105] The performance of a rubidium atomic clock was tested and verified using the system and method provided in this embodiment of the invention. The test conditions were: ambient temperature 25±2℃, relative humidity 50±10%, and a test period of 7 days.

[0106] Frequency stability test results show that the Allan deviation of the system is 2.8 × 10⁻⁶ over a 1-second averaging time. -11 The average value is 3.5 × 10⁻¹² over a 100-second average time and 5.2 × 10⁻¹² over a 10000-second average time. -13 The daily frequency drift is less than 5 × 10⁻¹². These indicators are all superior to the typical performance levels of existing CPT rubidium atomic clocks of the same type.

[0107] Power consumption test results show that the entire servo control system consumes 2.3W, with the FPGA core consuming approximately 1.2W, the temperature control module consuming approximately 0.8W, and other modules consuming approximately 0.3W. Compared to the traditional solution using discrete analog circuits, power consumption is reduced by approximately 40%.

[0108] Size test results show that the servo control circuit board is 100mm×80mm in size, with significantly improved integration, meeting the requirements of miniaturized applications.

[0109] In summary, the FPGA-based rubidium atomic clock servo control system and method provided by this invention highly integrates functions such as laser driving, microwave synthesis, frequency locking control, temperature control, and magnetic field control onto a unified digital platform based on FPGA, offering significant advantages over traditional discrete implementation schemes. Using an FPGA as the core control unit integrates multiple functional modules, reducing the number of peripheral devices, system complexity, and size. Furthermore, it improves signal processing accuracy and system stability through digital lock-in amplifiers, digital filters, and digital PID controllers. The programmability of FPGAs allows system parameters to be adjusted in real time via a software interface, facilitating system optimization and functional expansion. Its parallel processing capabilities and high-speed interface enable rapid response, improving the bandwidth and stability of the frequency locking loop. Moreover, replacing traditional analog circuits and large components with digital solutions effectively reduces system cost and power consumption. Through these technical solutions, this invention achieves high integration, high precision, and high reliability in the rubidium atomic clock servo control system, meeting the application requirements of rubidium atomic clocks in terms of miniaturization, low power consumption, and high performance.

[0110] It should be noted that the specific parameters and configurations of the various modules described in the embodiments of the present invention can be appropriately adjusted according to actual application requirements, and the above values ​​are only typical values ​​in preferred embodiments. For example, for atomic clock applications of different accuracy levels, PID control parameters, filter cutoff frequency, sampling rate, etc., can all be optimized accordingly. In addition, the technical solution of the present invention is also applicable to other types of alkali metal atomic clock systems such as cesium atomic clocks; similar servo control functions can be achieved simply by adjusting the corresponding parameters according to the transition frequency characteristics of different atoms.

[0111] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made by those skilled in the art within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A FPGA-based rubidium atomic clock servo control system, characterized in that, The system includes a laser-driven current modulation module, a microwave radio frequency synthesis module, a photoelectric signal acquisition module, a laser frequency locking module, a microwave frequency locking module, a laser temperature control module, a cavity temperature control module, and a magnetic field control module. The system is connected to the atomic clock physical system. The atomic clock physical system includes at least a VCSEL laser, a MEMS atomic gas cell, and a photodetector; The laser drive current modulation module is controlled by an FPGA chip and generates a composite digital modulation signal containing a DC bias signal, a triangular wave scanning signal, and a sine wave modulation signal based on direct digital synthesis technology. The signal is then converted into an analog signal by a digital-to-analog converter and output. The microwave radio frequency synthesis module uses a temperature-controlled crystal oscillator as a reference and provides a high-speed clock to the radio frequency digital-to-analog converter after frequency multiplication by a phase-locked loop. The radio frequency digital-to-analog converter outputs radio frequency carrier signals based on direct digital synthesis technology under FPGA control. The output signal of the laser driving current modulation module and the output signal of the microwave radio frequency synthesis module are coupled through a Bias-Tee and then input to the VCSEL laser to form a two-color light field containing sidebands to excite the CPT effect. The photoelectric signal acquisition module is connected to the photoelectric detector, and its output analog electrical signal is acquired by the analog-to-digital converter and converted into a digital signal before being transmitted to the FPGA for processing; Both the laser frequency locking module and the microwave frequency locking module are embedded in the FPGA, and each includes a digital lock-in amplifier, a low-pass filter and a PID control unit, which are used to construct servo closed-loop control of the laser frequency and the microwave frequency respectively. The laser temperature control module and the cavity temperature control module respectively use thermistor temperature measurement and PID algorithm to control the heating or cooling elements to achieve closed-loop temperature regulation. The magnetic field control module includes a Helmholtz coil, which is driven by a current source controlled by an FPGA to form a stable bias magnetic field.

2. The system of claim 1, wherein, The laser-driven current modulation module drives a dual-channel, 16-bit resolution, 500MSPS sampling rate digital-to-analog converter chip through an SPI interface. The sweep period, sweep range, and waveform type of the composite digital modulation signal are all programmable. The analog signal is output after being processed by low-pass filtering, signal buffering, impedance matching, and amplification circuits.

3. The system of claim 2, wherein, The microwave radio frequency synthesis module includes a 10MHz temperature-controlled crystal oscillator, a phase-locked loop chip, and a dual-channel, 16-bit resolution, 12.6GSPS sampling rate radio frequency digital-to-analog converter. The radio frequency digital-to-analog converter outputs a radio frequency carrier with a center frequency of 3.4GHz and supports superimposed triangular wave frequency scanning and sine wave modulation, which is then filtered by a bandpass filter before being output.

4. The system of claim 3, wherein, The photoelectric signal acquisition module includes a high-precision resistor, a DC subtractor, an adjustable gain amplifier, and a four-channel, 12-bit resolution, and a maximum sampling rate of 126 MSPS analog-to-digital converter. The current signal output by the photodetector is converted into a voltage signal by the high-precision resistor, the DC component is removed by the DC subtractor, and the dynamic range is optimized by the adjustable gain amplifier before being input to the analog-to-digital converter.

5. The system according to claim 4, characterized in that, The digital lock-in amplifier in the laser frequency locking module adopts quadrature demodulation technology. By applying periodic modulation to the laser frequency and extracting the response component with the same frequency as the modulation frequency in the absorption spectrum, the first-order differential signal of the absorption spectrum is obtained after filtering out high-frequency noise by a low-pass filter as the frequency locking error signal. The PID control unit outputs a feedback control signal in real time according to the error signal to adjust the laser drive current bias.

6. The system according to claim 5, characterized in that, The microwave frequency locking module modulates the radio frequency signal so that the CPT spectral response contains a coherent component of the modulation frequency. This component is extracted by a digital lock-in amplifier and processed by a low-pass filter to obtain the first-order differential signal of the CPT spectral line. The PID control unit outputs a control voltage based on this differential signal to drive the tuning terminal of the voltage-controlled crystal oscillator, thereby stabilizing the output of a 10MHz clock signal and using it as the reference clock for the microwave frequency synthesis chain.

7. The system according to claim 1, characterized in that, The PID control units in the laser frequency locking module and the microwave frequency locking module adopt an adaptive parameter adjustment mechanism, which dynamically adjusts the proportional coefficient, integral coefficient and derivative coefficient according to the amplitude and rate of change of the error signal detected in real time.

8. The system according to claim 1, characterized in that, The laser temperature control module uses a Wheatstone bridge temperature measurement structure. The thermistor, as one arm of the bridge, senses temperature changes and causes changes in the bridge output voltage. The controller compares the measured value with the set temperature value and outputs a PWM signal through a PID algorithm to drive the thermoelectric cooling device. The cavity temperature control module uses a microcontroller as the control core. It uses a digital low-pass filter algorithm to denoise the sampled signal and convert it into the actual temperature. It outputs a PWM signal through a PID algorithm to drive the heating resistor.

9. The system according to claim 1, characterized in that, The magnetic field control module also includes a magnetic shielding device, which is made of multiple layers of high magnetic permeability material and covers the outside of the MEMS atomic gas chamber. The Helmholtz coil is connected to the system control circuit through a standard interface. The FPGA adjusts the output current of the current source through a digital-to-analog converter to achieve precise control of the magnetic field strength.

10. A rubidium atomic clock servo control method based on FPGA, characterized in that, The system according to any one of claims 1 to 9 comprises the following steps: Step S1: The laser and radio frequency signals are synthesized using the FPGA programmable module. Based on the direct digital synthesis technology, a composite analog voltage signal is generated to control the driving current of the VCSEL laser. At the same time, a 3.4GHz radio frequency signal is synthesized. The two signals are combined by the Bias-Tee to drive the VCSEL laser to form a dual-color light field. Step S2: The laser temperature control module collects the temperature signal of the VCSEL laser, detects the change of the thermistor based on the Wheatstone bridge, and generates a PWM control signal to drive the thermoelectric cooling device in combination with the PID control module to realize closed-loop control of the laser temperature. Step S3: The temperature signal of the MEMS atomic gas chamber is acquired by the cavity temperature control module. The actual gas chamber temperature is obtained by digital filtering and temperature conversion. The heating element is driven by the output PWM control signal of the PID module to realize closed-loop control of the gas chamber temperature. Step S4: The magnetic field control module uses a multi-layer magnetic shielding structure to suppress stray magnetic fields from the outside, and a uniform bias magnetic field is established in the atomic gas cell region through a Helmholtz coil. The coil drive current is controlled by the FPGA to achieve precise adjustment of the magnetic field strength. Step S5: Connect the servo control system to the atomic clock physical system. The output signal of the photodetector is acquired by the analog-to-digital converter and sent to the FPGA for digital signal processing. Step S6: The acquired absorption spectrum is modulated and demodulated using the laser frequency locking module. The first-order differential signal is extracted as the error signal. The VCSEL driving current bias is adjusted by the feedback signal output by the PID controller so that the laser wavelength is stably locked to the atomic absorption peak. Step S7: Servo control of the CPT spectrum is performed using a microwave frequency locking module. The first-order differential signal of CPT is extracted as an error signal. The voltage signal output by the PID controller controls the tuning terminal of the voltage-controlled crystal oscillator, stabilizes the 10MHz reference signal, and ensures that the radio frequency signal is accurately locked to the atomic transition frequency.

Images