Signal conditioning circuit and microphone device

Abstract

The application discloses a signal conditioning circuit and a sound collecting device. The signal conditioning circuit has a first output end, a second output end, and a first input end and a second input end for coupling a transducer. The signal conditioning circuit comprises a first capacitor with a first capacitance matched with the transducer, a first end of the first capacitor coupled with the second input end, a first follower with an output end coupled with the first output end, a second follower with an output end coupled with the second output end, an inverting amplifier with a first input end coupled with the output end of the first follower, a second input end coupled with the output end of the second follower, and an output end coupled with the second input end. When the signal conditioning circuit is coupled with the transducer and the transducer generates a first induced voltage according to a signal inputted into the transducer, the first output end and the second output end generate a differential signal corresponding to the first induced voltage. The signal conditioning circuit has the advantages of strong anti-interference capability, symmetrical output differential signal, and wide application range.

Description

Technical Field

[0001] This application relates to the field of signal processing technology, and in particular to a signal conditioning circuit and a sound transmission device. Background Technology

[0002] In miniaturized sensing applications such as MEMS microphones and pressure sensors, single-ended output structures are widely used due to their simple design and low cost. However, single-ended signals are susceptible to common-mode noise interference, and their dynamic range is limited by the power supply voltage, making it difficult to meet the requirements of signal-to-noise ratio (SNR) and acoustic overload point (AOP) in high-fidelity audio acquisition or precision measurement scenarios. Therefore, signal conditioning circuits are needed to convert single-ended signals into differential signals to improve interference immunity and signal dynamic range.

[0003] Existing single-ended to differential conversion techniques mainly employ two approaches: charge pump coupling and feedback amplification. Charge pump coupling requires a dual charge pump circuit to isolate the MEMS signal, but it relies on ultra-high steric ohms (>1 GΩ) to prevent signal attenuation, leading to a significant increase in thermal noise. Furthermore, mismatch between the charge pump filter capacitor and the MEMS capacitor disrupts differential symmetry. While feedback amplification simplifies the circuit structure, it still requires high-resistance resistors to maintain charge balance, and its gain adjustment flexibility is insufficient, making it unsuitable for sensors with varying sensitivity. Summary of the Invention

[0004] The purpose of this application is to provide a signal conditioning circuit to solve the technical problems of limited dynamic range, poor differential symmetry, and poor adaptability in existing single-ended signal input to differential signal technology solutions.

[0005] To achieve one of the above objectives, one embodiment of this application provides a signal conditioning circuit. The signal conditioning circuit has a first output terminal, a second output terminal, and a first input terminal and a second input terminal for coupling two ends of a sensor. The signal conditioning circuit includes: a first capacitor having a first capacitance value matched with the sensor, the first end of which is coupled to the second input terminal; a first follower, the output terminal of which is coupled to the first output terminal; the first follower includes a first input transistor, the control terminal of which is coupled to the first input terminal, and the first end of which is coupled to the output terminal of the first follower; a second follower, the output terminal of which is coupled to the second output terminal; the second follower includes a second input transistor, the control terminal of which is coupled to the second end of the first capacitor, and the first end of which is coupled to the output terminal of the second follower; and an inverting amplifier, the first input terminal of which is coupled to the output terminal of the first follower, the second input terminal of which is coupled to the output terminal of the second follower, and the output terminal of which is coupled to the second input terminal. When the signal conditioning circuit is coupled to the sensor, and the sensor generates a first induced voltage according to the input signal, the first output terminal and the second output terminal generate a differential signal corresponding to the first induced voltage.

[0006] To achieve one of the above objectives, one embodiment of this application provides a sound transmission device, including: a signal conditioning circuit for generating a differential signal corresponding to an external sound signal, and a sensor for generating a first induced voltage based on the external sound signal input thereto.

[0007] Compared with existing technologies, the signal conditioning circuit provided in this application achieves closed-loop feedback control by setting a first follower, a second follower, and an inverting amplifier, suppressing signal distortion and ensuring strict symmetry of the differential signal. Furthermore, by constructing a differential compensation loop, it enhances noise immunity and expands the dynamic range. By setting a first capacitor with a first capacitance value matched to the sensor, the signal conditioning circuit can adapt to different sensors, preventing mismatches caused by process variations or other reasons. Attached Figure Description

[0008] Figure 1 This is a schematic diagram of a signal conditioning circuit according to one embodiment of this application.

[0009] Figure 2 This is a schematic diagram of a signal conditioning circuit according to another embodiment of this application.

[0010] Figure 3 This is a schematic diagram of a sound transmission device according to one embodiment of this application. Detailed Implementation

[0011] The present application will now be described in detail with reference to the specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present application, and any structural, methodological, or functional modifications made by those skilled in the art based on these embodiments are included within the scope of protection of this application.

[0012] It should be noted that the term "comprising" or any other variation thereof is intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.

[0013] Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. There is no necessary relationship between "first," "second," and "third," for example, the presence of "second" in an embodiment does not necessarily mean the presence of "first," and so on.

[0014] Signal conditioning circuit

[0015] One embodiment of this application provides a signal conditioning circuit 100, such as... Figure 1 and Figure 2 As shown.

[0016] The signal conditioning circuit 100 has a first output terminal out1 and a second output terminal out2.

[0017] The first output terminal out1 and the second output terminal out2 can be used to output differential signals.

[0018] The signal conditioning circuit 100 includes a first input terminal in1 and a second input terminal in2.

[0019] The first input terminal in1 and the second input terminal in2 are coupled to the two ends of the sensor 200. Specifically, the first input terminal in1 can be coupled to the first end of the sensor 200, and the second input terminal in2 can be coupled to the second end of the sensor 200.

[0020] Sensor 200 can be used to achieve single-ended output. The signal conditioning circuit 100 corresponding to sensor 200 is used to achieve single-ended to differential output.

[0021] In one embodiment, the differential signal includes a first voltage signal V1 at the first output terminal out1.

[0022] In one embodiment, the differential signal includes a second voltage signal V2 at the second output terminal out2.

[0023] The first voltage signal V1 and the second voltage signal V2 can form a fully differential output.

[0024] The first voltage signal V1 and the second voltage signal V2 can be opposite.

[0025] In one embodiment, the first voltage signal V1 is a positive voltage; the second voltage signal V2 is a negative voltage. Alternatively, in one embodiment, the first voltage signal V1 is a negative voltage; the second voltage signal V2 is a positive voltage.

[0026] In one embodiment, the absolute value of the first voltage signal V1 is equal to the absolute value of the second voltage signal V2. Alternatively, in one embodiment, the amplitude of the first voltage signal V1 is equal to the amplitude of the second voltage signal V2.

[0027] In one embodiment, the absolute value of the first voltage signal V1 is equal to half the absolute value of the first induced voltage Vsig. Alternatively, in one embodiment, the amplitude of the first voltage signal V1 is equal to half the amplitude of the first induced voltage Vsig.

[0028] In one embodiment, the absolute value of the second voltage signal V2 is equal to half the absolute value of the first induced voltage Vsig. Alternatively, in one embodiment, the amplitude of the second voltage signal V2 is equal to half the amplitude of the first induced voltage Vsig.

[0029] The signal conditioning circuit 100 can be used to divide the first induced voltage Vsig generated by the sensor 200 into a first voltage signal V1 and a second voltage signal V2 in terms of amplitude.

[0030] The signal conditioning circuit 100 includes a first capacitor 101.

[0031] The first capacitor 101 has a first capacitance value Ctrim. The first capacitance value Ctrim is matched with the sensor 200.

[0032] The first capacitance value Ctrim is matched with the sensor 200, or at least it can adapt to changes in the model, status, or selection of the sensor 200.

[0033] In one embodiment, the first capacitance value Ctrim is adjusted to be compatible with the capacitance range of the capacitors (e.g., MEMS capacitors) used to achieve sensing in the sensor 200, in order to adapt to the specifications of different sensors 200 and ensure differential matching of different sensors 200.

[0034] In one embodiment, the first capacitance value Ctrim can be equal to the static capacitance value or the calibrated capacitance value of the sensor 200 to ensure that the charge changes of the two are equal, thereby ensuring signal link symmetry and noise performance.

[0035] In one embodiment, the first capacitor 101 is an adjustable capacitor; in another embodiment, the first capacitance value Ctrim of the first capacitor 101 is adjustable.

[0036] The first capacitor 101 is integrated inside the chip where the signal conditioning circuit 100 is located.

[0037] The first terminal of the first capacitor 101 is coupled to the second input terminal in2.

[0038] The signal conditioning circuit 100 includes a first follower 11 and a second follower 12. The second terminal of the first capacitor 101 is coupled to the second follower 12.

[0039] In one embodiment, the first follower 11 may be a source follower, and preferably a super source-follower (SSF).

[0040] In one embodiment, the first source follower 11 can be used to increase input impedance, decrease output impedance, enhance drive capability, or improve linearity. In some embodiments, the first source follower 11 can be a Darlington-type super source follower or a super source follower with a BJT-FET hybrid structure.

[0041] The output terminal o11 of the first follower 11 is coupled to the first output terminal out1.

[0042] The first follower 11 includes a first input transistor M1.

[0043] In one embodiment, at least some terminals of the first input transistor M1 are used to form the input terminals of the first follower 11. The first follower 11 can receive signals from the sensor 200 through the first input transistor M1, and after processing, form the output of the signal conditioning circuit 100.

[0044] The control terminal of the first input transistor M1 is coupled to the first input terminal in1.

[0045] In one embodiment, the control terminal of the first input transistor M1 is the input terminal of the first follower 11.

[0046] In one embodiment, the control terminal of the first input transistor M1 is the gate of the first input transistor M1.

[0047] The first terminal of the first input transistor M1 is coupled to the output terminal o11 of the first follower 11.

[0048] In one embodiment, the first terminal of the first input transistor M1 can serve as the output terminal of the first follower 11.

[0049] In one embodiment, the first terminal of the first input transistor M1 is the source of the first input transistor M2.

[0050] In one embodiment, the first input transistor M1 further has a second terminal. In another embodiment, the second terminal of the first input transistor M1 is the drain of the first input transistor M1.

[0051] In one embodiment, the second terminal of the first input transistor M1 is grounded, or grounded through a current source.

[0052] The first input transistor M1 can be a P-type transistor.

[0053] In addition to the first input transistor M1, the first follower 11 may also include other components for implementing any of the following, source following, and super source following modes.

[0054] In one embodiment, the second follower 12 may be a source follower, and preferably a super source follower.

[0055] In one embodiment, the second follower 12 may be configured as described for the first follower 11.

[0056] In one embodiment, the components included in the second follower 12 may correspond to the same components included in the first follower 11.

[0057] In one embodiment, the structure of the second follower 12 can be symmetrically arranged with the structure of the first follower 11.

[0058] The output terminal o12 of the second follower 12 is coupled to the second output terminal out2.

[0059] The second follower 12 includes a second input transistor M2.

[0060] The control terminal of the second input transistor M2 is coupled to the second input terminal in2.

[0061] In one embodiment, the control terminal of the second input transistor M2 can be the input terminal of the second follower 12.

[0062] In one embodiment, the control terminal of the second input transistor M2 can be the gate of the second input transistor M2.

[0063] The first terminal of the second input transistor M2 is coupled to the output terminal o12 of the second follower 12.

[0064] In one embodiment, the first terminal of the second input transistor M2 can serve as the output terminal of the second follower 12.

[0065] In one embodiment, the first terminal of the second input transistor M2 is the source of the second input transistor M2.

[0066] In one embodiment, the second input transistor M2 further has a second terminal. In another embodiment, the second terminal of the second input transistor M2 is the drain of the second input transistor M2.

[0067] In one embodiment, the second terminal of the second input transistor M2 is grounded, or grounded through a current source.

[0068] The second input transistor M2 can be a P-type transistor.

[0069] In addition to the second input transistor M2, the second follower 12 may also include other components for implementing any of the following, source following, or super source following modes.

[0070] The signal conditioning circuit 100 includes an inverting amplifier 13.

[0071] In one embodiment, the inverting amplifier 13 is used to amplify and / or invert the phase of a signal. In another embodiment, the inverting amplifier 13 can participate in the generation of a differential signal, or be used for summing and amplifying the difference between the differential signals.

[0072] The first input terminal of the inverting amplifier 13 is coupled to the output terminal o11 of the first follower 11.

[0073] The second input terminal of the inverting amplifier 13 is coupled to the output terminal o12 of the second follower 12.

[0074] The output of the inverting amplifier 13 is coupled to the second input terminal in2.

[0075] The control terminal of the first input transistor M1 of the first follower 11 is coupled to the first input terminal in1. The first input terminal in1 is used to couple one end of the sensor 200, and the second input terminal in2 is used to couple the other end of the sensor 200. The first follower 11 and the inverting amplifier 13 can form a feedback loop, thereby generating a differential signal. Unlike existing technologies, there is no need to set a resistor between the capacitor at the output of the charge pump and the capacitor of the sensor 200, which solves the problems of mismatch between differential signals and noise generated by resistors that degrades noise performance.

[0076] The control terminal of the second input transistor M1 based on the second follower 12 is coupled to the second terminal of the first capacitor 101, and the first terminal of the first capacitor 101 is coupled to the second input terminal in2. The second follower 12 and the inverting amplifier 13 can form a feedback loop, thereby forming a differential signal and having a similar function and effect as the first follower 11.

[0077] The feedback loops formed by the first follower 11 and the second follower 12 with the inverting amplifier 13 can be used to divide the amplitude of the first induced voltage equally and make the output voltages at the first follower 11 and the second follower 12 out of phase, thereby achieving the effect of converting single-ended input to differential output and maintaining the high symmetry of the differential signal.

[0078] When the signal conditioning circuit 100 is coupled to the sensor 200, and when the sensor 200 generates a first induced voltage Vsig based on the signal input to the sensor 200, the first output terminal out1 and the second output terminal out2 generate differential signals corresponding to the first induced voltage Vsig.

[0079] Thus, based on the stronger anti-interference capability of differential signals, the signal conditioning circuit 100 will not affect performance indicators such as AOP when processed by the sensor 200. Based on the feedback control of the two followers and the inverting amplifier 13, the strict symmetry of the structure is also reflected in the strict symmetry of the differential signal, meaning the output differential signal has higher quality and signal-to-noise ratio, eliminating the generation of degrading noise. The two feedback loops also establish a correspondence with the sensor 200 through the first capacitor 101. When the sensor 200 is adjusted, the first capacitance value Ctrim of the first capacitor 101 can be adjusted to adapt to different sensors 200, providing stronger adaptability.

[0080] In one embodiment, the first capacitor 101 is a MOM (Metal-Oxide-Metal) capacitor.

[0081] MOM capacitors can be formed within the same metal layer using interlaced finger-shaped metals (such as the M3 layer), relying on the oxide layer (ILD, interlayer dielectric) between the metal sidewalls as the dielectric. MOM capacitors offer advantages such as requiring no additional mask, high design flexibility, full compatibility with standard CMOS processes, and low cost.

[0082] In one embodiment, the first capacitor 101 is a MIM (Metal-Insulator-Metal) capacitor.

[0083] MIM capacitors consist of two metal layers (such as the top metal layers M4 and M5) and a high-dielectric-constant insulator (such as Si3N4, SiO2, or a high-k material) sandwiched between the two layers. MIM capacitors are characterized by high capacitance density, good linearity, low parasitic capacitance, and strong temperature stability.

[0084] The control terminal of the second input transistor M2 is also the input terminal of the second follower 12, coupled to the second terminal of the first capacitor 101. The first terminal of the first capacitor 101 is coupled to the second input terminal in2. Considering that the electrical signal across the first capacitor 101 cannot change abruptly, when the capacitance of the control terminal of the second input transistor M2 is ignored, it can be assumed that the control terminal of the second input transistor M2 and the input terminal of the second follower 12 are coupled to the second input terminal in2 for coupling to the second terminal of the sensor 200. The control terminal of the second input transistor M2, the input terminal of the second follower 12, or the second terminal of the first capacitor 101 are all high-impedance points with a cutoff frequency of less than 20Hz, which can ensure that the signal is not attenuated.

[0085] The control terminal of the first input transistor M1 and the input terminal of the first follower 11 are coupled to the first input terminal in1 for coupling to the first terminal of the sensor 200. Due to the symmetry of the feedback loop where the first follower 11 and the second follower 12 are located, the generated differential signal has extremely strong symmetry.

[0086] In one embodiment, the voltage at the first terminal of the first capacitor 101 is equal to the voltage at the second terminal of the first capacitor 101. This means that the voltage across the first capacitor 101 does not change abruptly, and without considering the control terminal capacitor, the voltage at the control terminal of the second input transistor M2 is equal to the voltage at the second input terminal in2.

[0087] In one embodiment, the voltage at the second input terminal in2 is equal to the voltage at the control terminal of the second input transistor M2.

[0088] The following will combine Figure 2 This application provides optional embodiments.

[0089] In one embodiment, the signal conditioning circuit 100 includes a charge pump 14.

[0090] The output terminal of charge pump 14 is coupled to the second input terminal in2.

[0091] The charge pump 14 can be used to provide a DC bias voltage to the sensor 200, maintain differential signal symmetry, overcome capacitance-related process errors, provide a common-mode reference point, improve AOP, and reduce signal attenuation, among other functions, at least one of the following.

[0092] In this application, only one charge pump 14 can be provided. This is because this application provides two feedback loops to realize differential signal output. The charge pump 14 is coupled to the second input terminal in2, which is equivalent to being coupled to the trunk of the two feedback loops where the inverting amplifier 13 is located. While achieving the same effect, it is equivalent to saving one charge pump, thereby reducing the chip area and lowering the power consumption requirements.

[0093] In one embodiment, the signal conditioning circuit 100 includes a second capacitor 102.

[0094] The second capacitor 102 is located between the output terminal of the inverting amplifier 13 and the second input terminal in2.

[0095] Thus, AC coupling between the output of the inverting amplifier 13 (which is also the output of the feedback loop) and the second input terminal in2 can be achieved through the second capacitor 102. The second input terminal in2 is coupled to the sensor 200, the first capacitor 101, and the second capacitor 102, respectively, affecting the signal of the sensor 200 and participating in the formation of the differential signal in the feedback loop, thereby realizing complete feedback regulation.

[0096] Follower In one embodiment, the first follower 11 includes a third transistor M3.

[0097] The first terminal of the third transistor M3 is coupled to the second terminal of the first input transistor M1.

[0098] In one embodiment, the first terminal of the third transistor M3 can be the source of the third transistor M3. The second terminal of the first input transistor M1 can be the drain of the first input transistor M1.

[0099] The third transistor M3 can be an N-type transistor.

[0100] In one embodiment, the first terminal of the third transistor M3 is grounded, or grounded through a current source.

[0101] The control terminal of the first input transistor M1 is coupled to the first input terminal in1 for coupling with the sensor 200. When the sensor 200 generates the first induced voltage, the voltage change at the control terminal of the first input transistor M1 affects the first terminal of the third transistor M3 coupled to it through the second terminal of the first input transistor M1, thereby affecting the voltage at the second terminal of the third transistor M3, forming the output of the first follower 11.

[0102] In one embodiment, the third transistor M3 further has a control terminal. In another embodiment, the control terminal of the third transistor M3 is the gate of the third transistor M3.

[0103] In one embodiment, the control terminal of the third transistor M3 is coupled to a bias voltage Vbias. When the bias voltage Vbias is preset and fixed, the voltage at the second terminal of the third transistor M3 changes with the change of the current across the third transistor M3, and the current across the third transistor M3 changes with the change of the voltage at the control terminal of the first input transistor M1, thereby enabling the first follower 11 to follow the signal at the first input terminal in1.

[0104] In one embodiment, the first follower 11 includes a first operational amplifier A1.

[0105] The input terminal of the first operational amplifier A1 is coupled to the second terminal of the third transistor M3.

[0106] The first operational amplifier A1 can be used to amplify the signal at the second terminal of the third transistor M3 according to its preset gain and then output it.

[0107] In one embodiment, the second terminal of the third transistor M3 can be the drain of the third transistor M3.

[0108] In one embodiment, the first follower 11 includes a first resistor 111.

[0109] The first terminal of the first resistor 111 is coupled to the output terminal of the first operational amplifier A1.

[0110] The second terminal of the first resistor 111 is coupled to the first terminal of the first input transistor M1.

[0111] In one embodiment, the first resistor 111 is an adjustable resistor; in another embodiment, the resistance value of the first resistor 111 is adjustable. In yet another embodiment, the first resistor 111 is a variable resistor.

[0112] In one embodiment, the first resistor 111 is used to adjust the output gain of the signal conditioning circuit 100. The gain refers to the gain of the differential signal output by the signal conditioning circuit 100 relative to the first induced voltage. This allows for the adaptation of sensors 200 with a wider sensitivity range.

[0113] In one embodiment, the first resistor 111 participates in the feedback so that the first voltage signal V1 and the second voltage signal V2 are in opposite directions and the amplitude of the first voltage signal V1 is half the amplitude of the first induced voltage.

[0114] In some embodiments, the first resistor 111 may also be replaced by other impedance elements such as a capacitor.

[0115] In one embodiment, the second follower 12 includes a fourth transistor M4.

[0116] The first terminal of the fourth transistor M4 is coupled to the second terminal of the second input transistor M2.

[0117] In one embodiment, the first terminal of the fourth transistor M4 can be the source of the fourth transistor M4. The second terminal of the second input transistor M2 can be the drain of the second input transistor M2.

[0118] The fourth transistor M4 can be an N-type transistor.

[0119] In one embodiment, the first terminal of the fourth transistor M4 is grounded, or grounded through a current source.

[0120] In one embodiment, the fourth transistor M4 further has a control terminal. In another embodiment, the control terminal of the fourth transistor M4 is the gate of the fourth transistor M4.

[0121] In one embodiment, the control terminal of the fourth transistor M4 is coupled to a bias voltage Vbias.

[0122] In one embodiment, the second follower 12 includes a second operational amplifier A2.

[0123] The input terminal of the second operational amplifier A2 is coupled to the second terminal of the fourth transistor M4.

[0124] The second operational amplifier A2 can be used to amplify the signal at the second terminal of the fourth transistor M4 and output it according to its preset gain.

[0125] In one embodiment, the second terminal of the fourth transistor M4 can be the drain of the fourth transistor M4.

[0126] In one embodiment, the second follower 12 includes a second resistor 122.

[0127] The first terminal of the second resistor 122 is coupled to the output terminal of the second operational amplifier A2.

[0128] The second terminal of the second resistor 122 is coupled to the first terminal of the second input transistor M2.

[0129] In one embodiment, the second resistor 122 is an adjustable resistor; in another embodiment, the resistance value of the second resistor 122 is adjustable. In yet another embodiment, the second resistor 122 is a variable resistor.

[0130] In one embodiment, the second resistor 122 is used to adjust the output gain of the signal conditioning circuit 100.

[0131] In one embodiment, the second resistor 122 participates in the feedback so that the first voltage signal V1 and the second voltage signal V2 are in opposite directions and the amplitude of the first voltage signal V1 is half the amplitude of the first induced voltage.

[0132] In some embodiments, the second resistor 122 may also be replaced by other impedance elements such as a capacitor.

[0133] The first follower 11 may include a first current source and a second current source. The output terminal of the first current source is coupled to the second terminal of the third transistor M3. The output terminal of the second current source is coupled to the first terminal of the first input transistor M1.

[0134] The second follower 12 may include a third current source and a fourth current source. The output terminal of the third current source is coupled to the first terminal of the second input transistor M2. The output terminal of the fourth current source is coupled to the second terminal of the fourth transistor M4.

[0135] Inverting amplifier In one embodiment, the inverting amplifier 13 includes a third resistor 133.

[0136] The first end of the third resistor 133 is coupled to the output of the first follower 11.

[0137] In one embodiment, the first terminal of the third resistor 133 is coupled to the first resistor 111. In another embodiment, the first terminal of the third resistor 133 is coupled to the first terminal of the first input transistor M1.

[0138] In one embodiment, the third resistor 133 is used to adjust the output gain of the signal conditioning circuit 100.

[0139] In some embodiments, the third resistor 133 may also be replaced by other impedance elements such as a capacitor.

[0140] In one embodiment, the inverting amplifier 13 includes a fourth resistor 134.

[0141] The first end of the fourth resistor 134 is coupled to the output of the second follower 12.

[0142] In one embodiment, the first terminal of the fourth resistor 134 is coupled to the second resistor 122. In another embodiment, the first terminal of the fourth resistor 134 is coupled to the first terminal of the second input transistor M2.

[0143] In one embodiment, the fourth resistor 134 is used to adjust the output gain of the signal conditioning circuit 100.

[0144] In some embodiments, the fourth resistor 134 may also be replaced by other impedance elements such as a capacitor.

[0145] In one embodiment, the inverting amplifier 13 includes a third operational amplifier A3.

[0146] In one embodiment, the inverting amplifier 13 includes a fifth resistor 135.

[0147] The first terminal of the fifth resistor 135 is coupled to the output terminal of the third operational amplifier A3.

[0148] The second terminal of the fifth resistor 135 is coupled to the inverting input terminal of the third operational amplifier A3.

[0149] The output of the third operational amplifier A3 is coupled to the second input terminal in2.

[0150] The non-inverting input of the third operational amplifier A3 is connected to the common-mode reference voltage Vcom.

[0151] The inverting input of the third operational amplifier A3 is coupled to the second terminal of the third resistor 133.

[0152] At this time, the third operational amplifier A3, the third resistor 133, the fifth resistor 135, the sensor 200 (coupled to the first input terminal in1 and the second input terminal in2), and the first follower 11 form a feedback loop.

[0153] The inverting input of the third operational amplifier A3 is coupled to the second terminal of the fourth resistor 134.

[0154] At this point, the third operational amplifier A3, the fourth resistor 134, the fifth resistor 135, the first capacitor 101, and the second follower 12 form another set of feedback loops.

[0155] In this way, the first capacitor 101 simulates differential function, generating a signal with the same amplitude but opposite direction as the first induced voltage at the sensor 200.

[0156] In one embodiment of any technical solution of this application, the signal conditioning circuit 100 includes a third capacitor 103.

[0157] The first terminal of the third capacitor 103 is coupled to the second input terminal in2.

[0158] The second terminal of the third capacitor 103 is grounded.

[0159] In an embodiment where the signal conditioning circuit 100 includes a charge pump 14, the aforementioned third capacitor 103 is also provided to provide a high-frequency filter circuit relative to the output of the charge pump 14, thereby filtering out the frequency component of the internal clock refresh of the charge pump 14 and preventing this frequency component from being directly reflected at the output of the signal conditioning circuit 100.

[0160] When a charge pump 14 is provided in the signal conditioning circuit 100, and the capacitance of the first capacitor 101 is not perfectly matched with that of the sensor 200, the output noise of the charge pump 14 may be directly reflected at the output terminal of the signal conditioning circuit 100. Based on this, by providing a third capacitor 103, the suppression effect on the output noise of the charge pump 14 can be improved.

[0161] In this application, the grounding can be coupled to ground level GND, which will not be described in detail below.

[0162] In some embodiments, the ground level GND can be one of analog ground, digital ground, or chassis ground.

[0163] The foregoing has described the structural features of the first follower 11, the second follower 12, and the inverting amplifier 13 in several embodiments of this application. The following description will focus on the combination of the circuits formed by the cooperation of these different components.

[0164] First feedback loop In one embodiment, the signal conditioning circuit 100 includes a second capacitor 102. The second capacitor 102 is disposed between the output terminal of the inverting amplifier 13 and the second input terminal in2.

[0165] The first follower 11 includes a third transistor M3. The first terminal of the third transistor M3 is coupled to the second terminal of the first input transistor M1.

[0166] The first follower 11 includes a first operational amplifier A1. The input terminal of the first operational amplifier A1 is coupled to the second terminal of the third transistor M3.

[0167] The first follower 11 includes a first resistor 111. A first terminal of the first resistor 111 is coupled to the output terminal of the first operational amplifier A1. A second terminal of the first resistor 111 is coupled to the first terminal of the first input transistor M1.

[0168] The inverting amplifier 13 includes a third resistor 133. The first terminal of the third resistor 133 is coupled to the output terminal of the first follower 11. The inverting amplifier 13 includes a third operational amplifier A3. The inverting input of the third operational amplifier A3 is coupled to the second terminal of the third resistor 133. The output of the third operational amplifier A3 is coupled to the second input terminal in2.

[0169] The inverting amplifier 13 includes a fifth resistor 135. The first terminal of the fifth resistor 135 is coupled to the output terminal of the third operational amplifier A3. The second terminal of the fifth resistor 135 is coupled to the inverting input terminal of the third operational amplifier A3.

[0170] Thus, the sensor 200, the first input transistor M1 of the first follower 11, the third resistor 133 of the inverting amplifier 13, the third operational amplifier A3 of the inverting amplifier 13, the fifth resistor 135 of the inverting amplifier 13, the second capacitor 102 and the third capacitor 103 constitute the first feedback loop.

[0171] In one embodiment, the third capacitor 103 has a capacitance value Cp, the second capacitor 102 has a capacitance value Cf, the first resistor 111 has a resistance value R2, the third resistor 133 has a resistance value R1, and the fifth resistor 135 has a resistance value Rf.

[0172] In one embodiment, the capacitance value of the capacitor and the resistance value of the resistor satisfy the following relationship: .

[0173] Thus, if the voltage value of the first induced voltage is defined as Vsig, then the first output terminal out1 can generate a first voltage signal with a voltage value of +Vsig / 2, which is used to form a differential signal.

[0174] Second feedback loop In one embodiment, the signal conditioning circuit 100 includes a second capacitor 102. The second capacitor 102 is disposed between the output terminal of the inverting amplifier 13 and the second input terminal in2.

[0175] The second follower 12 includes a fourth transistor M4. The first terminal of the fourth transistor M4 is coupled to the second terminal of the second input transistor M2.

[0176] The second follower 12 includes a second operational amplifier A2. The input terminal of the second operational amplifier A2 is coupled to the second terminal of the fourth transistor M4.

[0177] The second follower 12 includes a second resistor 122. The first terminal of the second resistor 122 is coupled to the output terminal of the second operational amplifier A2. The second terminal of the second resistor 122 is coupled to the first terminal of the second input transistor M2.

[0178] The inverting amplifier 13 includes a fourth resistor 134. The first terminal of the fourth resistor 134 is coupled to the output of the second follower 12.

[0179] The inverting amplifier 13 includes a third operational amplifier A3. The inverting input of the third operational amplifier A3 is coupled to the second terminal of the fourth resistor 134. The output of the third operational amplifier A3 is coupled to the second input terminal in2.

[0180] The inverting amplifier 13 includes a fifth resistor 135. The first terminal of the fifth resistor 135 is coupled to the output terminal of the third operational amplifier A3. The second terminal of the fifth resistor 135 is coupled to the inverting input terminal of the third operational amplifier A3.

[0181] Thus, the second feedback loop can be defined by the first capacitor 101, the second input transistor M2 of the second follower 12, the fourth resistor 134 of the inverting amplifier 13, the third operational amplifier A3 of the inverting amplifier 13, the fifth resistor 135 of the inverting amplifier 13, the second capacitor 102, and the third capacitor 103.

[0182] In one embodiment, the third capacitor 103 has a capacitance value Cp, the second capacitor 102 has a capacitance value Cf, the second resistor 122 has a resistance value R2, the fourth resistor 134 has a resistance value R1, and the fifth resistor 135 has a resistance value Rf.

[0183] In one embodiment, the capacitance value of the capacitor and the resistance value of the resistor satisfy the following relationship: .

[0184] Thus, if the voltage value of the first induced voltage is defined as Vsig, then the second output terminal out2 can generate a second voltage signal with a voltage value of -Vsig / 2, which is used to form a differential signal.

[0185] Gain Configuration In one embodiment, the first follower 11 includes a third transistor M3. A first terminal of the third transistor M3 is coupled to a second terminal of the first input transistor M1.

[0186] The first follower 11 includes a first operational amplifier A1. The input terminal of the first operational amplifier A1 is coupled to the second terminal of the third transistor M3.

[0187] The first follower 11 includes a first resistor 111. A first terminal of the first resistor 111 is coupled to the output terminal of the first operational amplifier A1. A second terminal of the first resistor 111 is coupled to the first terminal of the first input transistor M1.

[0188] Thus, a set of closed-loop gain circuits is formed inside the first follower 11.

[0189] The second follower 12 includes a fourth transistor M4. The first terminal of the fourth transistor M4 is coupled to the second terminal of the second input transistor M2.

[0190] The second follower 12 includes a second operational amplifier A2. The input terminal of the second operational amplifier A2 is coupled to the second terminal of the fourth transistor M4.

[0191] The second follower 12 includes a second resistor 122. The first terminal of the second resistor 122 is coupled to the output terminal of the second operational amplifier A2. The second terminal of the second operational amplifier A2 is coupled to the first terminal of the second input transistor M2.

[0192] Thus, a set of closed-loop gain circuits is formed inside the second follower 12.

[0193] The inverting amplifier 13 includes a third resistor 133. The first end of the third resistor 133 is coupled to the output of the first follower 11.

[0194] The inverting amplifier 13 includes a fourth resistor 134. The first terminal of the fourth resistor 134 is coupled to the output of the second follower 12.

[0195] The inverting amplifier 13 includes a third operational amplifier A3. The inverting input terminal of the third operational amplifier A3 is coupled to the second terminal of the third resistor 133. The inverting input terminal of the third operational amplifier A3 is coupled to the second terminal of the fourth resistor 134. The output terminal of the third operational amplifier A3 is coupled to the second input terminal in2.

[0196] The inverting amplifier 13 includes a fifth resistor 135. The first terminal of the fifth resistor 135 is coupled to the output terminal of the third operational amplifier A3. The second terminal of the fifth resistor 135 is coupled to the inverting input terminal of the third operational amplifier A3.

[0197] In this way, the signal conditioning circuit 100 can simultaneously realize the differential signal output and the amplification and reduction of the output signal (through gain adjustment), without the need for cascaded buffer circuits and programmable amplifiers as in the prior art, thus improving the noise situation.

[0198] In one embodiment, the differential signal output by the signal conditioning circuit 100 has a gain Ag relative to the first induced voltage Vsig.

[0199] In one embodiment, the first resistor 111 has a resistance value of R2, the second resistor 122 has a resistance value of R2, the third resistor 133 has a resistance value of R1L, and the fourth resistor 134 has a resistance value of R1R.

[0200] In one embodiment, the gain Ag and the resistance value of the above-mentioned resistor satisfy the following relationship: .

[0201] In some embodiments, the first operational amplifier A1 and the second operational amplifier A2 may also be configured to have a higher first gain, so that the closed-loop gain of the voltage from the control terminal of the first input transistor M1 of the first follower 11 to the voltage from the first output terminal out1 is 1, and the closed-loop gain of the voltage from the control terminal of the second input transistor M1 of the second follower 12 to the voltage from the second output terminal out2 is 1.

[0202] In one embodiment of any technical solution of this application, the signal conditioning circuit includes a first bias element 151.

[0203] The first terminal of the first bias element 151 is coupled to the first input terminal in2. The second terminal of the first bias element 151 is grounded.

[0204] The first bias element 151 can be used to provide DC bias to the control terminal of the first input transistor M1.

[0205] In one embodiment, the first biasing element 151 includes a resistor. In another embodiment, the first biasing element 151 is a resistor.

[0206] The resistor can have a resistance value greater than 10 GΩ.

[0207] In one embodiment, the first biasing element 151 includes a diode. In another embodiment, the first biasing element 151 is a diode.

[0208] In one embodiment, a first terminal of the first biasing element 151 is coupled to the negative terminal of the diode; or, the first terminal of the first biasing element 151 is the negative terminal of the diode. In another embodiment, a second terminal of the first biasing element 151 is coupled to the positive terminal of the diode; or, the second terminal of the first biasing element 151 is the positive terminal of the diode.

[0209] In one embodiment of any technical solution of this application, the signal conditioning circuit includes a second bias element 152.

[0210] The first terminal of the second bias element 152 is coupled to the second terminal of the first capacitor 101. The second terminal of the second bias element 152 is grounded.

[0211] The first bias element 151 can be used to provide DC bias to the control terminal of the first input transistor M1.

[0212] In one embodiment, the second biasing element 152 includes a resistor. In another embodiment, the second biasing element 152 is a resistor.

[0213] The resistor can have a resistance value greater than 10 GΩ.

[0214] In one embodiment, the second biasing element 152 includes a diode. In another embodiment, the second biasing element 152 is a diode.

[0215] In one embodiment, the first end of the second bias element 152 is coupled to the negative terminal of the diode; or, the first end of the second bias element 152 is the negative terminal of the diode. In another embodiment, the second end of the second bias element 152 is coupled to the positive terminal of the diode; or, the second end of the second bias element 152 is the positive terminal of the diode.

[0216] Transmission equipment One embodiment of this application provides a sound transmission device 1000, such as... Figure 3 As shown.

[0217] The sound transmission device 1000 can be a device that converts sound signals (e.g., mechanical vibrations) into electrical signals, or electrical signals into sound signals.

[0218] The sound transmission device 1000 can specifically be a condenser microphone, a dynamic microphone, a piezoelectric microphone, or a MEMS (Micro-Electro-Mechanical System) microphone. Specifically, the MEMS microphone can be based on microelectromechanical technology, and the diaphragm, backplane, and ASIC (Application Specific Integrated Circuit) can be integrated into a chip-scale package. In this application, the signal conditioning circuit 100 and the sensor included in the sound transmission device 1000 can be integrated as an ASIC.

[0219] Preferably, the sound transmission device 1000 is a MEMS microphone, which features miniaturization and integration, low power consumption, high reliability, high sensitivity consistency, and wide frequency response range.

[0220] The sound transmission device 1000 includes a sensor.

[0221] The sensor may be an acoustic sensing capacitor.

[0222] The acoustic sensing capacitor can be a MEMS capacitor.

[0223] The sensor is used to generate a first induced voltage based on an external acoustic signal input to the sensor. Specifically, after receiving an external acoustic signal, the sensor will generate a change in capacitance, thereby causing a change in the voltage across the sensor. This voltage change can be defined as the first induced voltage.

[0224] The sensor can be a single-ended output.

[0225] The sound transmission device 1000 includes a signal conditioning circuit 100. Correspondingly, the signal conditioning circuit 100 has a single-ended input signal after being coupled to the sensor.

[0226] The signal conditioning circuit 100 of the sound transmission device 1000 is configured according to any technical solution of this application, which can solve the problem that the single-ended input signal is easily interfered with and thus the performance degrades, and can also overcome the problem that the single-ended input is limited by the maximum input range and thus limits the AOP (Acoustic Overload Point, maximum sound pressure level) index.

[0227] In one embodiment, the signal conditioning circuit 100 can be used to achieve a relatively balanced differential output, avoid adding additional noise costs, and enable flexible configuration of subsequent stage gains.

[0228] The signal conditioning circuit 100 is used to generate a differential signal corresponding to an external acoustic signal.

[0229] In one embodiment, the differential signal includes a first voltage signal and a second voltage signal. The correspondence between the differential signal and the external acoustic signal can be represented as follows: the external acoustic signal corresponds to a first induced voltage, the first induced voltage corresponds to the first voltage signal and the second voltage signal, and the first voltage signal and the second voltage signal constitute the differential signal.

[0230] In one embodiment, the amplitudes of the first voltage signal and the second voltage signal are the same. In another embodiment, the absolute values ​​of the first voltage signal and the absolute values ​​of the second voltage signal are equal.

[0231] In one embodiment, the first voltage signal and the second voltage signal are in opposite directions. In another embodiment, the first voltage signal is a positive voltage, and the second voltage signal is a negative voltage.

[0232] In one embodiment, the sum of the amplitudes of the first voltage signal and the second voltage signal is equal to the amplitude of the first induced voltage. In another embodiment, the sum of the absolute values ​​of the first voltage signal and the second voltage signal is equal to the absolute value of the first induced voltage.

[0233] like Figure 1 As shown, in one embodiment, the signal conditioning circuit 100 has a first output terminal out1, a second output terminal out2, a first input terminal in1, and a second input terminal in2. The first input terminal in1 and the second input terminal in2 are used to couple to the two ends of the sensor 200, respectively. When the signal conditioning circuit 100 is coupled to the sensor 200, and the sensor 200 generates a first induced voltage based on the signal input to the sensor 200, the first output terminal out1 and the second output terminal out2 generate differential signals corresponding to the first induced voltage.

[0234] When configuring a sound transmission device 1000 that includes the signal conditioning circuit 100 provided in this application, the sensor 200 may be an acoustic sensing capacitor.

[0235] When configuring a sound transmission device 1000 that includes the signal conditioning circuit 100 provided in this application, the signal input to the sensor 200 may specifically be the sound signal input to the sensor.

[0236] The sound transmission device 1000 provided in this application has all the technical effects of the signal conditioning circuit 100 provided in this application, which will not be repeated here.

[0237] In summary, the signal conditioning circuit provided in this application achieves closed-loop feedback control by setting a first follower, a second follower, and an inverting amplifier, suppressing signal distortion and ensuring the strict symmetry of the differential signal. Furthermore, by constructing a differential compensation loop, it enhances noise immunity and expands the dynamic range. By setting a first capacitor with a first capacitance value matched to the sensor, the signal conditioning circuit can adapt to different sensors, preventing mismatches caused by process variations or other reasons.

[0238] It should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This way of describing the specification is only for clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

[0239] The detailed descriptions listed above are merely specific descriptions of feasible implementation methods of this application and are not intended to limit the scope of protection of this application. All equivalent implementation methods or modifications made without departing from the spirit of the art of this application should be included within the scope of protection of this application.

Claims

1. A signal conditioning circuit, characterized in that, The signal conditioning circuit has a first output terminal, a second output terminal, and Used to couple the first and second input terminals of the sensor. The signal conditioning circuit includes: A first capacitor has a first capacitance value that matches the sensor, and its first terminal is coupled to the second input terminal. A first follower, the output of which is coupled to a first output terminal, includes a first input transistor, the control terminal of which is coupled to the first input terminal, and a first terminal of which is coupled to the output terminal of the first follower. A second follower, the output of which is coupled to a second output terminal, includes a second input transistor. The control terminal of the second input transistor is coupled to a second terminal of a first capacitor, and the first terminal of the second input transistor is coupled to the output terminal of the second follower. An inverting amplifier, wherein its first input terminal is coupled to the output terminal of the first follower, its second input terminal is coupled to the output terminal of the second follower, and its output terminal is coupled to the second input terminal. When the signal conditioning circuit is coupled to the sensor and the sensor generates a first induced voltage based on the input signal, the first output terminal and the second output terminal generate a differential signal corresponding to the first induced voltage.

2. The signal conditioning circuit of claim 1, wherein, The differential signal includes a first voltage signal at a first output terminal and a second voltage signal at a second output terminal; the first voltage signal and the second voltage signal are configured according to at least one of the following: The first voltage signal is a positive voltage, and the second voltage signal is a negative voltage. The absolute values ​​of the first voltage signal and the second voltage signal are equal. The absolute value of the first voltage signal is equal to half the absolute value of the first induced voltage. The absolute value of the second voltage signal is equal to half the absolute value of the first induced voltage.

3. The signal conditioning circuit according to claim 1, characterized in that, The first capacitor is a MOM capacitor, or The first capacitor is a MIM capacitor.

4. The signal conditioning circuit of claim 1, wherein, The voltage at the first terminal of the first capacitor is equal to the voltage at its second terminal.

5. The signal conditioning circuit according to claim 1, characterized in that, include: A charge pump, the output of which is coupled to the second input.

6. The signal conditioning circuit according to claim 1, characterized in that, include: The second capacitor is disposed between the output terminal and the second input terminal of the inverting amplifier.

7. The signal conditioning circuit according to claim 1, characterized in that, The first follower includes: The third transistor has its first terminal coupled to the second terminal of the first input transistor. The first operational amplifier has its input terminal coupled to the second terminal of the third transistor. The first resistor has its first end coupled to the output of the first operational amplifier and its second end coupled to the first end of the first input transistor.

8. The signal conditioning circuit according to claim 1, characterized in that, The second follower includes: The fourth transistor has its first terminal coupled to the second terminal of the second input transistor. The second operational amplifier has its input terminal coupled to the second terminal of the fourth transistor. The second resistor has its first end coupled to the output of the second operational amplifier and its second end coupled to the first end of the second input transistor.

9. The signal conditioning circuit according to claim 1, characterized in that, Inverting amplifiers include: The third resistor has its first end coupled to the output of the first follower. The fourth resistor has its first end coupled to the output of the second follower. The third operational amplifier has its inverting input terminal coupled to the second terminal of the third resistor and the second terminal of the fourth resistor, and its output terminal coupled to the second input terminal. The fifth resistor has its first end coupled to the output of the third operational amplifier and its second end coupled to the inverting input of the third operational amplifier.

10. The signal conditioning circuit according to claim 1, characterized in that, include: The third capacitor has its first end coupled to the second input terminal and its second end grounded.

11. The signal conditioning circuit according to claim 10, characterized in that, include: The second capacitor is disposed between the output terminal and the second input terminal of the inverting amplifier. The first follower includes: The third transistor has its first terminal coupled to the second terminal of the first input transistor. The first operational amplifier has its input terminal coupled to the second terminal of the third transistor. The first resistor has its first end coupled to the output terminal of the first operational amplifier, and its second end coupled to the first terminal of the first input transistor. Inverting amplifiers include: The third resistor has its first end coupled to the output of the first follower. The third operational amplifier has its inverting input coupled to the second terminal of the third resistor, and its output coupled to the second input. The fifth resistor has its first terminal coupled to the output of the third operational amplifier, and its second terminal coupled to the inverting input of the third operational amplifier. The third capacitor has a capacitance value Cp, the second capacitor has a capacitance value Cf, the first resistor has a resistance value R2, the third resistor has a resistance value R1, and the fifth resistor has a resistance value Rf, and the following relationship is satisfied: .

12. The signal conditioning circuit according to claim 10, characterized in that, include: The second capacitor is disposed between the output terminal and the second input terminal of the inverting amplifier. The second follower includes: The fourth transistor has its first terminal coupled to the second terminal of the second input transistor. The second operational amplifier has its input terminal coupled to the second terminal of the fourth transistor. The second resistor has its first end coupled to the output terminal of the second operational amplifier, and its second end coupled to the first terminal of the second input transistor. Inverting amplifiers include: The fourth resistor has its first end coupled to the output of the second follower. The third operational amplifier has its inverting input coupled to the second terminal of the fourth resistor, and its output coupled to the second input. The fifth resistor has its first terminal coupled to the output of the third operational amplifier, and its second terminal coupled to the inverting input of the third operational amplifier. The third capacitor has a capacitance value Cp, the second capacitor has a capacitance value Cf, the second resistor has a resistance value R2, the fourth resistor has a resistance value R1, and the fifth resistor has a resistance value Rf, and the following relationship is satisfied: .

13. The signal conditioning circuit according to claim 1, characterized in that, The first follower includes: The third transistor has its first terminal coupled to the second terminal of the first input transistor. The first operational amplifier has its input terminal coupled to the second terminal of the third transistor. The first resistor has its first end coupled to the output terminal of the first operational amplifier, and its second end coupled to the first terminal of the first input transistor. The second follower includes: The fourth transistor has its first terminal coupled to the second terminal of the second input transistor. The second operational amplifier has its input terminal coupled to the second terminal of the fourth transistor. The second resistor has its first end coupled to the output terminal of the second operational amplifier, and its second end coupled to the first terminal of the second input transistor. Inverting amplifiers include: The third resistor has its first end coupled to the output of the first follower. The fourth resistor has its first end coupled to the output of the second follower. The third operational amplifier has its inverting input terminal coupled to the second terminal of the third resistor and the second terminal of the fourth resistor, and its output terminal coupled to the second input terminal. The fifth resistor has its first terminal coupled to the output of the third operational amplifier, and its second terminal coupled to the inverting input of the third operational amplifier. The differential signal has a gain Ag compared to the first induced voltage, the first resistor has a resistance value R2, the second resistor has a resistance value R2, the third resistor has a resistance value R1L, and the fourth resistor has a resistance value R1R, and satisfies the following relationship: .

14. The signal conditioning circuit according to claim 1, characterized in that, include: A first biasing element, having a first terminal coupled to the first input terminal and a second terminal grounded, includes a resistor or a diode, and / or... The second biasing element has a first terminal coupled to the second terminal of the first capacitor and its second terminal grounded. The first biasing element includes a resistor or a diode.

15. A sound transmission device, characterized in that, include: The signal conditioning circuit according to any one of claims 1-14 is used to generate a differential signal corresponding to an external acoustic signal. A sensor for generating a first induced voltage based on an external acoustic signal input to it.

16. The sound transmission device according to claim 15, characterized in that, The sensor is an acoustic sensing capacitor.

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