A high-efficiency inductance detection control circuit

Abstract

The application discloses a kind of efficient inductance detection control circuit, it is related to inductance detection technical field, including double state detection module, using switch fault threshold and load fault threshold respectively to MOS tube hard switch short circuit and load equipment short circuit are independently judged, introduce self-detection module, micro-control module is superimposed specific detection pulse signal on normal drive signal, self-detection module is compared inductance response signal under normal circumstances with current situation by sampling and hold and error calculation, in real time.The beneficial effects of the present application compared with the prior art are: the efficient inductance detection control circuit of the present application can distinguish different fault types, avoids the misjudgment or the missed judgment caused by single threshold setting, significantly improves the flexibility and accuracy of fault diagnosis, can effectively identify the performance drift or fault of inductance sampling, isolation conversion and other links, prevent system misoperation caused by detection channel failure, module reduces the software judgment burden of micro-control module.

Description

Technical Field

[0001] This invention relates to the field of inductance detection technology, specifically a high-efficiency inductance detection and control circuit. Background Technology

[0002] Inductive detection technology is widely used in power electronics, motor drives, power transistors and other fields for power monitoring and fault diagnosis. A change in current in an inductor (or any conductor circuit) will induce an electromotive force proportional to the rate of change in itself or a nearby circuit. In existing technologies, the fault state of the load to be tested in series is generally determined by the rate of change of current in the inductor. A detection threshold is used to determine the fault state, which results in poor fault detection flexibility and an inability to distinguish different fault types, making it easy to misjudge or miss the fault. Furthermore, it is impossible to detect whether the inductor is in an abnormal state during fault detection, which reduces the detection accuracy and may cause malfunctions. Moreover, the entire process is handled by the microcontroller, which increases the software's judgment burden. Therefore, improvements are needed. Summary of the Invention

[0003] This invention provides a high-efficiency inductance detection and control circuit to solve the problems mentioned in the background art.

[0004] According to an embodiment of the present invention, a high-efficiency inductor detection and control circuit is provided, comprising:

[0005] An inductor sampling module is used to detect the rate of change of current in the load under test through a sampling inductor. The load under test consists of a load device and a MOSFET. The working state of the sampling inductor is controlled by a self-testing MOSFET and a self-testing load.

[0006] The dual-state detection module, connected to the inductor sampling module, is used to perform MOSFET hard switch short circuit detection and load device short circuit detection on the inductor sampling signal according to the set switch fault threshold and load fault threshold, respectively. When both MOSFET hard switch short circuit and load device short circuit occur simultaneously or neither short circuit occurs, a self-test signal is output.

[0007] The isolation detection module, connected to the inductance sampling module, is used to isolate the inductance change of the inductor and convert the inductance change signal into a frequency signal, and then convert the frequency signal into a voltage signal.

[0008] The microcontroller module is connected to the isolation detection module, the dual-state detection module and the inductor sampling module. It is used to receive the signal and frequency signal output by the dual-state detection module when performing short circuit detection. When it receives the self-test signal, it provides a set of normal drive signals to the inductor sampling module and drives the self-test MOS transistor to work. It also superimposes a detection pulse signal with a higher frequency and a smaller duty cycle than the normal drive signal onto the normal drive signal.

[0009] The self-test module, connected to the microcontroller module and the isolation detection module, is used to sample and hold the voltage signal when the microcontroller module first superimposes the detection pulse signal, and to calculate the error between the real-time converted voltage signal and the sampled and held voltage signal when the detection pulse signal is superimposed for the second time. When the error exceeds the set error threshold, the module outputs a second fault signal and transmits the second fault signal to the microcontroller module.

[0010] As a further embodiment of the present invention: the dual-state detection module includes a dual-threshold detection unit and a self-test triggering unit;

[0011] The dual threshold detection unit is used to set the switch fault threshold and the load fault threshold, compare the switch fault threshold and the load fault threshold with the signal voltage sampled by the inductor respectively, and perform MOSFET hard switch short circuit judgment and load device short circuit judgment respectively.

[0012] The self-test trigger unit, connected to the dual threshold detection unit, is used to output a self-test signal when both a hard switch short circuit of the MOSFET and a short circuit of the load device occur simultaneously, or when neither occurs.

[0013] As a further embodiment of the present invention: the self-detection module includes a difference detection unit and a fault detection unit;

[0014] The difference detection unit is used to sample and hold the voltage signal when the microcontroller module first superimposes the detection pulse signal, and to calculate the error between the real-time converted voltage signal and the sampled and held voltage signal when the detection pulse signal is superimposed for the second time.

[0015] The fault detection unit, connected to the difference detection unit, is used to output a second fault signal and transmit the second fault signal to the microcontroller module when the error exceeds a set error threshold.

[0016] As a further embodiment of the present invention: the inductor sampling module includes a first inductor, a first voltage regulator, a load under test, a first load, a first power transistor, and a first diode; the microcontroller module includes a first controller;

[0017] Preferably, the first end of the first inductor is connected to the first end of the load under test, the source of the first power transistor and the ground, the drain of the first power transistor is connected to the second end of the load under test and the first voltage regulator through the first load, the gate of the first power transistor is connected to the IO1 terminal of the first controller and the cathode of the first diode, and the anode of the first diode is connected to the IO2 terminal of the first controller.

[0018] As a further embodiment of the present invention: the dual threshold detection unit includes a fourth capacitor, a third capacitor, a third inductor, a fourth inductor, an eighth resistor, a ninth resistor, a third diode, a tenth resistor, a first comparator, a first reference source, a second reference source, and a second comparator;

[0019] Preferably, one end of the fourth capacitor is connected to the first end of the first inductor and, through the third capacitor, to the inverting input of the first comparator and one end of the tenth resistor. The tenth resistor is connected to the anode of the third diode and one end of the ninth resistor through the fourth inductor. The other end of the fourth capacitor is connected to the inverting input of the second comparator and, in sequence, to the cathode of the third diode, the other end of the ninth resistor, and the second end of the first inductor through the third inductor and the eighth resistor. The non-inverting input of the first comparator and the non-inverting input of the second comparator are respectively connected to the first reference source and the second reference source. The output terminals of the first comparator and the second comparator are respectively connected to the IO3 and IO4 terminals of the first controller.

[0020] As a further embodiment of the present invention: the self-test trigger unit includes a first logic unit and a second logic unit;

[0021] Preferably, the first input terminal of the first logic device and the first input terminal of the second logic device are both connected to the output terminal of the first comparator, the second input terminal of the first logic device and the second input terminal of the second logic device are both connected to the output terminal of the second comparator, and the output terminal of the first logic device and the output terminal of the second logic device are respectively connected to the IO6 terminal and the IO7 terminal of the first controller.

[0022] As a further embodiment of the present invention: the isolation detection module includes an induction coil, a first transformer, a seventh diode, a second diode, a first switching transistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a second voltage regulator, a first operational amplifier, a first capacitor, and a second capacitor;

[0023] Preferably, the first and second ends of the induction coil are respectively connected to the first and second ends of the primary side of the first transformer. The first end of the secondary side of the first transformer is connected to the anode of the seventh diode and the collector of the first switching transistor. The cathode of the seventh diode is connected to the cathode of the second diode. The emitter of the first switching transistor is connected to one end of the second resistor and one end of the second capacitor, and through the first capacitor, it is connected to the base of the first switching transistor, one end of the fourth resistor, one end of the third resistor, and one end of the sixth resistor. The other end of the second resistor is connected to the other end of the third resistor and the second voltage regulator, and through the fifth resistor, it is connected to the output terminal of the first operational amplifier and the IO5 terminal of the first controller. The inverting input of the first operational amplifier is connected to the other end of the sixth resistor. The non-inverting input of the first operational amplifier is connected through the seventh resistor to the other end of the second capacitor, the other end of the fourth resistor, the anode of the second diode, the second end of the secondary side of the first transformer, and the ground terminal.

[0024] As a further embodiment of the present invention, the isolation detection module also includes a signal conversion device;

[0025] Preferably, the input terminal of the signal conversion device is connected to the output terminal of the first operational amplifier, and the output terminal of the signal conversion device is connected to the self-test module.

[0026] As a further embodiment of the present invention: the difference detection unit includes a first analog switch, a first trigger, a fourth diode, a sample and hold device, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a second operational amplifier, a fourteenth resistor, and a difference device;

[0027] Preferably, the input terminal of the first analog switch is connected to the output terminal of the signal conversion device; the control terminal of the first analog switch is connected to the cathode of the fourth diode and the first trigger terminal of the first counter; the second trigger terminal of the first counter is connected to the anode of the fourth diode and the holding terminal of the sample-and-hold device; the pulsation terminal of the first counter is connected to the IO2 terminal of the first controller; the output terminal of the first analog switch is connected to the input terminal of the sample-and-hold device, one end of the eleventh resistor, and the second input terminal of the difference device; the output terminal of the sample-and-hold device is connected to one end of the twelfth resistor and the first input terminal of the difference device; the other end of the eleventh resistor is connected to the inverting input of the second operational amplifier and connected to the output terminal of the second operational amplifier through the fourteenth resistor; the other end of the twelfth resistor is connected to the non-inverting input of the second operational amplifier and grounded through the thirteenth resistor.

[0028] As a further embodiment of the present invention: the fault detection unit includes a third comparator, a third reference source, a fifth diode, and a sixth diode;

[0029] Preferably, the inverting input of the third comparator is connected to the third reference source, the non-inverting input of the third comparator is connected to the cathodes of the fifth and sixth diodes, the anodes of the fifth and sixth diodes are respectively connected to the output of the second operational amplifier and the output of the differential device, and the output of the third comparator is connected to the IO8 terminal of the first controller.

[0030] Compared with the prior art, the beneficial effects of the present invention are as follows: The high-efficiency inductor detection and control circuit of the present invention, by setting a dual-state detection module, independently judges the hard switch short circuit of MOSFET and the short circuit of load device by using switch fault threshold and load fault threshold respectively. It can distinguish different fault types and avoid misjudgment or missed judgment caused by a single threshold setting, which significantly improves the flexibility and accuracy of fault diagnosis. The introduction of a self-detection module allows the microcontroller module to superimpose a specific detection pulse signal on the normal drive signal. The self-detection module compares the inductor response signal under normal conditions with the current conditions in real time through sampling and holding and error calculation. It can effectively identify the performance drift or fault of inductor sampling, isolation conversion and other links, and prevent system malfunction caused by detection channel failure. The module reduces the software judgment burden of the microcontroller module. Attached Figure Description

[0031] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 This is a block diagram illustrating the principle of a high-efficiency inductor detection and control circuit provided in an embodiment of the present invention.

[0033] Figure 2 This is a block diagram illustrating the principle of the dual-state detection module provided in an embodiment of the present invention.

[0034] Figure 3 This is a block diagram illustrating the principle of the self-detection module provided in an embodiment of the present invention.

[0035] Figure 4 The circuit diagram is provided for an embodiment of the present invention of an efficient inductance detection and control circuit.

[0036] Figure 5 The circuit diagram of the self-test trigger unit provided in the embodiment of the present invention.

[0037] Figure 6 The circuit diagram is provided for the difference detection unit in an embodiment of the present invention.

[0038] Figure 7 The circuit diagram of the fault detection unit provided in the embodiment of the present invention. Detailed Implementation

[0039] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0040] Please see Figure 1 , Figure 2 and Figure 3 A high-efficiency inductor detection and control circuit, comprising:

[0041] Inductor sampling module 1 is used to detect the rate of change of current of the load under test through the sampling inductor. The load under test consists of a load device and a MOSFET. The working state of the sampling inductor is controlled by the self-test MOSFET and the self-test load.

[0042] The dual-state detection module 2 is connected to the inductor sampling module 1. It is used to perform MOSFET hard switch short circuit detection and load device short circuit detection on the inductor sampling signal according to the set switch fault threshold and load fault threshold respectively. When both MOSFET hard switch short circuit and load device short circuit occur at the same time or neither short circuit occurs, a self-test signal is output.

[0043] The isolation detection module 3 is connected to the inductance sampling module 1 and is used to isolate the inductance change of the inductor and convert the inductance change signal into a frequency signal, and the frequency signal into a voltage signal.

[0044] The microcontroller module 4 is connected to the isolation detection module 3, the dual-state detection module 2 and the inductor sampling module 1. It is used to receive the signal and frequency signal output by the dual-state detection module 2 when performing short circuit detection. When it receives the self-test signal, it provides a set of normal drive signals to the inductor sampling module 1 and drives the self-test MOS transistor to work. It also superimposes a detection pulse signal with a frequency higher than the normal drive signal frequency and a small duty cycle on the normal drive signal.

[0045] The self-detection module 5 is connected to the microcontroller module 4 and the isolation detection module 3. It is used to sample and hold the voltage signal when the microcontroller module 4 first superimposes the detection pulse signal, and to calculate the error between the real-time converted voltage signal and the sampled and held voltage signal when the detection pulse signal is superimposed for the second time. When the error is greater than the set error threshold, it outputs a second fault signal and transmits the second fault signal to the microcontroller module 4.

[0046] Furthermore, the dual-state detection module 2 includes a dual-threshold detection unit 201 and a self-test trigger unit 202;

[0047] The dual threshold detection unit 201 is used to set the switch fault threshold and the load fault threshold, compare the switch fault threshold and the load fault threshold with the signal voltage sampled by the inductor respectively, and perform MOSFET hard switch short circuit judgment and load device short circuit judgment respectively.

[0048] The self-test trigger unit 202 is connected to the dual threshold detection unit 201 and is used to output a self-test signal when both a hard switch short circuit of the MOS transistor and a short circuit of the load device occur simultaneously, or when neither short circuit occurs.

[0049] Furthermore, the self-detection module 5 includes a difference detection unit 501 and a fault detection unit 502;

[0050] The difference detection unit 501 is used to sample and hold the voltage signal when the microcontroller module 4 first superimposes the detection pulse signal, and to calculate the error between the real-time converted voltage signal and the sampled and held voltage signal when the detection pulse signal is superimposed for the second time.

[0051] The fault detection unit 502 is connected to the difference detection unit 501 and is used to output a second fault signal and transmit the second fault signal to the microcontroller module 4 when the error is greater than the set error threshold.

[0052] In a specific embodiment, the aforementioned inductor sampling module 1 can employ an inductor sampling circuit composed of a detection inductor, the load under test, a field-effect transistor, and a resistor. It can detect the rate of change of current through the sampling inductor and adjust the current through a self-testing MOSFET and a self-testing load to determine the current rate of change state of the detection inductor. The aforementioned dual-state detection module 2 can employ a dual-state detection circuit composed of an inductor, a capacitor, a comparator, and a logic unit. It can filter the signal sampled by the inductor sampling module 1 and compare the processed signal with a set switch fault threshold and a load fault threshold. Based on the comparison result, it can determine whether the MOSFET is hard-switched short-circuited or the load device is short-circuited. The load fault threshold is greater than the switch fault threshold and both are negative values. The aforementioned isolation detection module 3 can employ an induction coil L2... The isolation detection circuit, composed of transistors, transformers, capacitors, etc., can sense changes in isolated inductance, convert the sensed signal into a frequency signal, and then convert the frequency signal into a voltage signal. The microcontroller module 4 can be a microcontroller circuit composed of a single-chip microcomputer, integrating many components such as an arithmetic unit, a controller, a memory, and input / output devices, to realize functions such as signal processing, data storage, module control, and timing control. The self-detection module 5 can be a self-detection circuit composed of analog switches, counters, sample-and-hold devices, operational amplifiers, comparators, etc. It can perform signal sampling and holding and error calculation based on the state of the detection pulse signal output by the microcontroller module 4, and compare the inductance response signal under normal conditions with that under the current conditions in real time according to the set error threshold, thereby determining whether the detection inductor is faulty.

[0053] In this embodiment, please refer to Figure 4 and Figure 5 The inductor sampling module 1 includes a first inductor L1, a first voltage regulator VCC1, a load under test, a first load RL1, a first power transistor Q1, and a first diode D1; the microcontroller module 4 includes a first controller U1.

[0054] Specifically, the first terminal of the first inductor L1 is connected to the first terminal of the load under test, the source of the first power transistor Q1 and the ground terminal. The drain of the first power transistor Q1 is connected to the second terminal of the load under test and the first voltage regulator VCC1 through the first load RL1. The gate of the first power transistor Q1 is connected to the IO1 terminal of the first controller U1 and the cathode of the first diode D1. The anode of the first diode D1 is connected to the IO2 terminal of the first controller U1.

[0055] In a specific embodiment, the load under test consists of a load device and a MOSFET. The MOSFET can be driven and controlled by a first controller U1, thereby completing the drive adjustment of the load device. The first controller U1 can be an STM32 microcontroller. The first power transistor Q1 can be an N-channel MOSFET, which, together with the first load RL1, is used as a self-test MOSFET and a self-test load, respectively.

[0056] Furthermore, the dual threshold detection unit 201 includes a fourth capacitor C4, a third capacitor C3, a third inductor L3, a fourth inductor L4, an eighth resistor R8, a ninth resistor R9, a third diode D3, a tenth resistor R10, a first comparator A1, a first reference source VF1, a second reference source VF2, and a second comparator A2.

[0057] Specifically, one end of the fourth capacitor C4 is connected to the first end of the first inductor L1 and is connected to the inverting input of the first comparator A1 and one end of the tenth resistor R10 through the third capacitor C3. The tenth resistor R10 is connected to the anode of the third diode D3 and one end of the ninth resistor R9 through the fourth inductor L4. The other end of the fourth capacitor C4 is connected to the inverting input of the second comparator A2 and is connected to the cathode of the third diode D3, the other end of the ninth resistor R9 and the second end of the first inductor L1 in sequence through the third inductor L3 and the eighth resistor R8. The non-inverting inputs of the first comparator A1 and the second comparator A2 are connected to the first reference source VF1 and the second reference source VF2, respectively. The outputs of the first comparator A1 and the second comparator A2 are connected to the IO3 and IO4 terminals of the first controller U1, respectively.

[0058] In a specific embodiment, the first reference source VF1 and the second reference source VF2 provide the load fault threshold and the switch fault threshold, respectively; the first comparator A1 and the second comparator A2 can both be LM358 comparators; the fourth capacitor C4, the third inductor L3 and the eighth resistor R8 detect the signal at the moment of turn-on, and the third capacitor C3, the tenth resistor R10, the fourth inductor L4, the third diode D3 and the ninth resistor R9 detect the load state after the switch is turned on.

[0059] Furthermore, the self-test trigger unit 202 includes a first logic unit J1 and a second logic unit J2;

[0060] Specifically, the first input terminal of the first logic device J1 and the first input terminal of the second logic device J2 are both connected to the output terminal of the first comparator A1, the second input terminal of the first logic device J1 and the second input terminal of the second logic device J2 are both connected to the output terminal of the second comparator A2, and the output terminal of the first logic device J1 and the output terminal of the second logic device J2 are respectively connected to the IO6 terminal and the IO7 terminal of the first controller U1.

[0061] In a specific embodiment, the first logic unit J1 and the second logic unit J2 can be selected as AND gates and NOR gates, respectively.

[0062] Furthermore, the isolation detection module 3 includes an induction coil L2, a first transformer B1, a seventh diode D7, a second diode D2, a first switching transistor V1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a second voltage regulator VCC2, a first operational amplifier OP1, a first capacitor C1, and a second capacitor C2.

[0063] Specifically, the first and second ends of the induction coil L2 are connected to the first and second ends of the primary side of the first transformer B1, respectively. The first end of the secondary side of the first transformer B1 is connected to the anode of the seventh diode D7 and the collector of the first switching transistor V1. The cathode of the seventh diode D7 is connected to the cathode of the second diode D2. The emitter of the first switching transistor V1 is connected to one end of the second resistor R2 and one end of the second capacitor C2, and through the first capacitor C1, it is connected to the base of the first switching transistor V1, one end of the fourth resistor R4, one end of the third resistor R3, and one end of the sixth resistor R6. The other end of the second resistor R2 is connected to the other end of the third resistor R3 and the second voltage regulator VCC2, and through the fifth resistor R5, it is connected to the output terminal of the first operational amplifier OP1 and the IO5 terminal of the first controller U1. The inverting terminal of the first operational amplifier OP1 is connected to the other end of the sixth resistor R6. The non-inverting terminal of the first operational amplifier OP1 is connected through the seventh resistor R7 to the other end of the second capacitor C2, the other end of the fourth resistor R4, the anode of the second diode D2, the second end of the secondary side of the first transformer B1, and the ground terminal.

[0064] In a specific embodiment, the aforementioned induction coil L2 may be a magnetic sensor; the aforementioned transistor may be a PNP transistor; the aforementioned first operational amplifier OP1 may be an LM339; and the aforementioned first transformer B1 may be a coupling transformer.

[0065] Furthermore, the isolation detection module 3 also includes a signal conversion device;

[0066] Specifically, the input terminal of the signal conversion device is connected to the output terminal of the first operational amplifier OP1, and the output terminal of the signal conversion device is connected to the self-test module 5.

[0067] In a specific embodiment, the signal conversion device described above may be a frequency-to-voltage conversion device mainly composed of operational amplifiers, which converts frequency signals into voltage signals.

[0068] In this embodiment, please refer to Figure 6The difference detection unit 501 includes a first analog switch IC1, a first trigger IC2, a fourth diode D4, a sample and hold device, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a second operational amplifier OP2, a fourteenth resistor R14, and a difference device.

[0069] Specifically, the input terminal of the first analog switch IC1 is connected to the output terminal of the signal conversion device; the control terminal of the first analog switch IC1 is connected to the cathode of the fourth diode D4 and the first trigger terminal of the first counter; the second trigger terminal of the first counter is connected to the anode of the fourth diode D4 and the holding terminal of the sample-and-hold device; the pulsation terminal of the first counter is connected to the IO2 terminal of the first controller U1; the output terminal of the first analog switch IC1 is connected to the input terminal of the sample-and-hold device, one end of the eleventh resistor R11, and the second input terminal of the difference device; the output terminal of the sample-and-hold device is connected to one end of the twelfth resistor R12 and the first input terminal of the difference device; the other end of the eleventh resistor R11 is connected to the inverting terminal of the second operational amplifier OP2 and connected to the output terminal of the second operational amplifier OP2 through the fourteenth resistor R14; the other end of the twelfth resistor R12 is connected to the non-inverting terminal of the second operational amplifier OP2 and grounded through the thirteenth resistor R13.

[0070] In a specific embodiment, the first analog switch IC1 can be a CD4066; the first trigger IC2 can be a CD4017; the sample-and-hold device can be composed of an operational amplifier, resistors, capacitors, and switching transistors, which samples the input signal and performs sample-and-hold processing when the input is high; the second operational amplifier OP2 can be an OP07, which, together with the fourteenth resistor R14, the eleventh resistor R11, the twelfth resistor R12, and the thirteenth resistor R13, calculates the difference between the voltage input to the twelfth resistor R12 and the voltage input to the eleventh resistor R11; the circuit structure of the difference device is the same as that of the second operational amplifier OP2, the fourteenth resistor R14, the eleventh resistor R11, the twelfth resistor R12, and the thirteenth resistor R13, and calculates the difference between the voltage input to the eleventh resistor R11 and the voltage input to the twelfth resistor R12.

[0071] In this embodiment, please refer to Figure 7 The fault detection unit 502 includes a third comparator A3, a third reference source VF3, a fifth diode D5, and a sixth diode D6;

[0072] Specifically, the inverting input of the third comparator A3 is connected to the third reference source VF3, the non-inverting input of the third comparator A3 is connected to the cathodes of the fifth diode D5 and the sixth diode D6, the anodes of the fifth diode D5 and the sixth diode D6 are respectively connected to the output of the second operational amplifier OP2 and the output of the difference device, and the output of the third comparator A3 is connected to the IO8 terminal of the first controller U1.

[0073] In a specific embodiment, the third comparator A3 can be an LM358 comparator; the third reference source VF3 provides an error threshold.

[0074] The working principle of the high-efficiency inductor detection and control circuit of this invention is as follows: the MOSFET used by the load under test drives the working state of the load device, so that the state of the load under test can be detected by detecting the state of the first inductor L1. Specifically, the fourth capacitor C4, the third inductor L3 and the eighth resistor R8 detect the signal at the moment the MOSFET of the load under test is turned on, and the third capacitor C3, the tenth resistor R10, the fourth inductor L4, the third diode D3 and the ninth resistor R9 detect the state of the load device after the switch is turned on. The detected signals are all negative values ​​and are respectively used by the second transformer and the first comparator A1 in conjunction with the second reference source VF2 and the first reference source VF1 to perform switch fault detection and load fault detection, respectively. The VF2 provides load fault thresholds and switch fault thresholds, which are received by the IO3 and IO4 terminals of the first controller U1 respectively when load faults and switch faults occur. This distinguishes different fault types and avoids misjudgments or omissions caused by a single threshold setting, significantly improving the flexibility and accuracy of fault diagnosis. Simultaneously, the inductor L2 senses the current change of the first inductor L1, and the inductance change of the inductor L2 is coupled by the first transformer B1. This oscillation is then achieved through the second diode D2, the first switch V1, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5, the first capacitor C1, and the second capacitor C2, and is oscillated by the sixth resistor R6, the seventh resistor R7, and the first operational amplifier OP. 1. The signal is converted into a square wave and received by the IO5 terminal of the first controller U1. The first controller U1 obtains the state of the first inductor L1 based on the square wave state. The first logic unit J1 detects whether a hard switch short circuit of the MOSFET and a short circuit of the load device occur simultaneously. The second logic unit J2 detects whether neither short circuit occurs. When a hard switch short circuit of the MOSFET and a short circuit of the load device occur simultaneously, or when neither short circuit occurs, a self-test signal is output and received by the IO6 or IO7 terminal of the first controller U1. This causes the IO1 terminal of the first controller U1 to provide a set of normal drive signals and drive the self-test MOSFET to work. At the same time, the IO2 terminal of the first controller U1 provides a detection pulse signal with a frequency higher than the normal drive signal frequency and a small duty cycle. The signal is superimposed on the signal provided by IO1. At this time, the load under test stops working, and magnetic induction is achieved by induction coil L2. The frequency signal output by the first operational amplifier OP1 is converted into a voltage signal by the signal conversion device. During the first detection pulse signal provided by IO2 of the first controller U1, the first trigger terminal of the first trigger IC2 outputs a high level, triggering the first analog switch IC1 to conduct. The voltage signal is transmitted to the sample-and-hold device for signal sampling. When the same detection pulse signal is provided again by IO2 of the first controller U1, the second trigger terminal of the first counter provides a high level. The sample-and-hold device stops real-time sampling and performs sample-and-hold, holding the voltage signal sampled when the first controller U1 first provides the detection signal.This allows for difference calculation via the second operational amplifier OP2, the fourteenth resistor R14, the eleventh resistor R11, the twelfth resistor R12, the thirteenth resistor R13, and the difference device. When the calculated difference exceeds the error threshold provided by the third reference source VF3, it indicates a significant error in the two detected states of the first inductor L1. The third comparator A3 outputs a second fault signal, which is received by the IO8 terminal of the first controller U1, indicating an abnormality in the first inductor L1. This system can distinguish different fault types, avoiding misjudgments or omissions caused by a single threshold setting, and significantly improving the flexibility and accuracy of fault diagnosis.

[0075] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0076] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A high-efficiency inductance detection and control circuit, characterized in that, The circuit includes: An inductor sampling module is used to detect the rate of change of current in the load under test through a sampling inductor. The load under test consists of a load device and a MOSFET. The working state of the sampling inductor is controlled by a self-testing MOSFET and a self-testing load. The dual-state detection module, connected to the inductor sampling module, is used to perform MOSFET hard switch short circuit detection and load device short circuit detection on the inductor sampling signal according to the set switch fault threshold and load fault threshold, respectively. When both MOSFET hard switch short circuit and load device short circuit occur simultaneously or neither short circuit occurs, a self-test signal is output. The isolation detection module, connected to the inductance sampling module, is used to isolate the inductance change of the inductor and convert the inductance change signal into a frequency signal, and then convert the frequency signal into a voltage signal. The microcontroller module is connected to the isolation detection module, the dual-state detection module and the inductor sampling module. It is used to receive the signal and frequency signal output by the dual-state detection module when performing short circuit detection. When it receives the self-test signal, it provides a set of normal drive signals to the inductor sampling module and drives the self-test MOS transistor to work. It also superimposes a detection pulse signal with a higher frequency and a smaller duty cycle than the normal drive signal onto the normal drive signal. The self-test module, connected to the microcontroller module and the isolation detection module, is used to sample and hold the voltage signal when the microcontroller module first superimposes the detection pulse signal, and to calculate the error between the real-time converted voltage signal and the sampled and held voltage signal when the detection pulse signal is superimposed for the second time. When the error exceeds the set error threshold, the module outputs a second fault signal and transmits the second fault signal to the microcontroller module.

2. The high-efficiency inductance detection and control circuit according to claim 1, characterized in that, The dual-state detection module includes a dual-threshold detection unit and a self-test trigger unit; The dual threshold detection unit is used to set the switch fault threshold and the load fault threshold, compare the switch fault threshold and the load fault threshold with the signal voltage sampled by the inductor respectively, and perform MOSFET hard switch short circuit judgment and load device short circuit judgment respectively. The self-test trigger unit, connected to the dual threshold detection unit, is used to output a self-test signal when both a hard switch short circuit of the MOSFET and a short circuit of the load device occur simultaneously, or when neither occurs.

3. The high-efficiency inductance detection and control circuit according to claim 2, characterized in that, The self-testing module includes a difference detection unit and a fault detection unit; The difference detection unit is used to sample and hold the voltage signal when the microcontroller module first superimposes the detection pulse signal, and to calculate the error between the real-time converted voltage signal and the sampled and held voltage signal when the detection pulse signal is superimposed for the second time. The fault detection unit, connected to the difference detection unit, is used to output a second fault signal and transmit the second fault signal to the microcontroller module when the error exceeds a set error threshold.

4. The high-efficiency inductor detection and control circuit according to claim 3, characterized in that, The inductor sampling module includes a first inductor, a first voltage regulator, a load under test, a first load, a first power transistor, and a first diode; the microcontroller module includes a first controller; The first end of the first inductor is connected to the first end of the load under test, the source of the first power transistor and the ground. The drain of the first power transistor is connected to the second end of the load under test and the first voltage regulator through the first load. The gate of the first power transistor is connected to the IO1 terminal of the first controller and the cathode of the first diode. The anode of the first diode is connected to the IO2 terminal of the first controller.

5. The high-efficiency inductor detection and control circuit according to claim 4, characterized in that, The dual threshold detection unit includes a fourth capacitor, a third capacitor, a third inductor, a fourth inductor, an eighth resistor, a ninth resistor, a third diode, a tenth resistor, a first comparator, a first reference source, a second reference source, and a second comparator. One end of the fourth capacitor is connected to the first end of the first inductor and, through the third capacitor, to the inverting input of the first comparator and one end of the tenth resistor. The tenth resistor is connected to the anode of the third diode and one end of the ninth resistor through the fourth inductor. The other end of the fourth capacitor is connected to the inverting input of the second comparator and, in sequence, to the cathode of the third diode, the other end of the ninth resistor, and the second end of the first inductor through the third inductor and the eighth resistor. The non-inverting input of the first comparator and the non-inverting input of the second comparator are respectively connected to the first reference source and the second reference source. The output terminals of the first comparator and the second comparator are respectively connected to the IO3 and IO4 terminals of the first controller.

6. The high-efficiency inductor detection and control circuit according to claim 5, characterized in that, The self-test trigger unit includes a first logic unit and a second logic unit; The first input terminal of the first logic device and the first input terminal of the second logic device are both connected to the output terminal of the first comparator. The second input terminal of the first logic device and the second input terminal of the second logic device are both connected to the output terminal of the second comparator. The output terminals of the first logic device and the second logic device are respectively connected to the IO6 terminal and the IO7 terminal of the first controller.

7. The high-efficiency inductance detection and control circuit according to claim 5, characterized in that, The isolation detection module includes an induction coil, a first transformer, a seventh diode, a second diode, a first switching transistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a second voltage regulator, a first operational amplifier, a first capacitor, and a second capacitor. The first and second ends of the induction coil are respectively connected to the first and second ends of the primary side of the first transformer. The first end of the secondary side of the first transformer is connected to the anode of the seventh diode and the collector of the first switching transistor. The cathode of the seventh diode is connected to the cathode of the second diode. The emitter of the first switching transistor is connected to one end of the second resistor and one end of the second capacitor, and through the first capacitor, it is connected to the base of the first switching transistor, one end of the fourth resistor, one end of the third resistor, and one end of the sixth resistor. The other end of the second resistor is connected to the other end of the third resistor and the second voltage regulator, and through the fifth resistor, it is connected to the output terminal of the first operational amplifier and the IO5 terminal of the first controller. The inverting input of the first operational amplifier is connected to the other end of the sixth resistor. The non-inverting input of the first operational amplifier is connected through the seventh resistor to the other end of the second capacitor, the other end of the fourth resistor, the anode of the second diode, the second end of the secondary side of the first transformer, and the ground terminal.

8. The high-efficiency inductance detection and control circuit according to claim 7, characterized in that, The isolation detection module also includes a signal conversion device; The input terminal of the signal conversion device is connected to the output terminal of the first operational amplifier, and the output terminal of the signal conversion device is connected to the self-detection module.

9. The high-efficiency inductance detection and control circuit according to claim 8, characterized in that, The difference detection unit includes a first analog switch, a first trigger, a fourth diode, a sample and hold device, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a second operational amplifier, a fourteenth resistor, and a difference device; The input terminal of the first analog switch is connected to the output terminal of the signal conversion device. The control terminal of the first analog switch is connected to the cathode of the fourth diode and the first trigger terminal of the first counter. The second trigger terminal of the first counter is connected to the anode of the fourth diode and the holding terminal of the sample-and-hold device. The pulsation terminal of the first counter is connected to the IO2 terminal of the first controller. The output terminal of the first analog switch is connected to the input terminal of the sample-and-hold device, one end of the eleventh resistor, and the second input terminal of the difference device. The output terminal of the sample-and-hold device is connected to one end of the twelfth resistor and the first input terminal of the difference device. The other end of the eleventh resistor is connected to the inverting terminal of the second operational amplifier and connected to the output terminal of the second operational amplifier through the fourteenth resistor. The other end of the twelfth resistor is connected to the non-inverting terminal of the second operational amplifier and grounded through the thirteenth resistor.

10. The high-efficiency inductance detection and control circuit according to claim 9, characterized in that, The fault detection unit includes a third comparator, a third reference source, a fifth diode, and a sixth diode; The inverting input of the third comparator is connected to the third reference source, the non-inverting input of the third comparator is connected to the cathodes of the fifth and sixth diodes, the anodes of the fifth and sixth diodes are respectively connected to the output of the second operational amplifier and the output of the differential device, and the output of the third comparator is connected to the IO8 terminal of the first controller.

Images