Communication resource scheduling method and system based on GPU parallel computing

Abstract

The application discloses a communication resource scheduling method and system based on GPU parallel computing, aiming at the eMBB and URLLC service coexistence scene, first, the mean and variance of service communication are utilized to construct a joint opportunity constraint model to represent service demand in an uncertain environment; then, a large-scale parallel sorting is executed through a GPU kernel function to identify a promising resource allocation space and realize search space dimension reduction; after a plurality of allocation instances are generated by sampling, resource block reduction, analytical power allocation based on a water injection algorithm and cross-time domain risk shaping calculation are synchronously executed by using the kernel function; finally, a global optimal scheduling scheme is screened out according to the minimum rate loss minimization principle of eMBB through the parallel reduction logic of the kernel function. Under the premise of guaranteeing the extremely low time delay and high reliability of URLLC, the rate loss of eMBB service is significantly reduced, and the decision delay can meet the real-time requirement.

Description

Technical Field

[0001] This invention relates to the field of wireless communication technology, and specifically to a communication resource scheduling method and system based on parallel computing of a graphics processing unit (GPU). Background Technology

[0002] With the evolution of fifth-generation (5G) and future communication systems, networks need to simultaneously support two typical user types: enhanced mobile broadband (eMBB) and ultra-reliable low-latency communication (URLLC). eMBB users focus on providing high data rates for applications such as ultra-high-definition video, while URLLC users require extremely low latency and extremely high reliability for mission-critical applications such as autonomous driving and remote surgery. Because URLLC user communications are highly bursty and sporadic, allocating dedicated bandwidth for them would result in extremely low spectrum utilization. Therefore, the 3GPP standard recommends using puncturing or superposition mechanisms to schedule URLLC user communications onto ongoing eMBB user resources as they arrive. However, this coexistence mode inevitably causes data rate losses for eMBB users.

[0003] In achieving efficient coexistence scheduling of eMBB and URLLC users, existing technologies face the following significant technical bottlenecks: 1. Communication uncertainty is difficult to model: Most existing studies assume that URLLC user communication follows a precise probability distribution (such as Poisson or Bernoulli distribution), but in real network environments, precise statistical distributions are often difficult to obtain, and usually only limited knowledge such as mean and variance can be obtained.

[0004] 2. Insufficient Static Constraints and Flexible Adjustment in Scheduling Strategies: Traditional resource allocation methods often employ static, unchanging criteria when addressing service reliability requirements. Under this model, the system cannot flexibly adjust risk tolerance according to dynamically fluctuating channel conditions over time. For example, rigidly enforcing fixed high-reliability constraints during extremely adverse channel conditions will lead to a surge in resource overhead and severely impair the eMBB user experience. Furthermore, existing technologies lack a unified, flexible scheduling architecture that can balance the extreme response of a single time slot with cross-time-domain risk mitigation across multiple time slots, limiting the overall resource utilization of the system in complex and dynamic environments.

[0005] 3. Limited real-time processing capabilities: According to 5G standards, scheduling decisions for URLLC users must be completed within a microsecond timescale (e.g., 143). However, optimization algorithms capable of handling uncertainties and complex coexistence scenarios (such as mixed-integer nonlinear programming) have extremely high computational complexity, and the running time of existing solution schemes is typically in the hundreds of milliseconds to seconds, which is far from meeting the stringent requirements of real-time scheduling.

[0006] Therefore, how to provide a resource scheduling scheme that can balance latency, reliability and spectrum efficiency and has extremely high real-time processing capabilities in wireless communication environments with uncertain communication demand has become an urgent problem to be solved in the current communication field. Summary of the Invention

[0007] This invention provides a communication resource scheduling method and system based on GPU parallel computing to overcome the problems existing in the prior art. While ensuring extremely low latency and high reliability of URLLC, this invention significantly reduces the rate loss of eMBB services, and the decision latency can meet the real-time requirements.

[0008] To achieve the above objectives, the present invention adopts the following technical solution: A communication resource scheduling method based on GPU parallel computing includes the following steps: Step S1: Based on the wireless communication network structure, set... One eMBB user and URLLC users; the time domain is divided into consecutive time slots, each time slot corresponding to the transmission time interval of an eMBB user, and each time slot is further divided into segments containing... A set of sub-time slots, each sub-time slot corresponding to the transmission time interval of a URLLC user; Step S2: Divide the frequency domain into Each subcarrier is considered as an RB; obtain the RB allocation matrix occupied by eMBB users in the current time slot, as well as the traffic statistics parameters and real-time channel gain matrix of URLLC users; Step S3: In each sub-slot, for each RB, call the GPU kernel function and its multiple thread blocks, sort them in parallel in descending order according to the channel gain of each URLLC user, and select the top... One of the URLLC users is selected as a candidate scheduling object for this RB, and the size of the candidate RB allocation space is from Reduced to ; Step S4: Generate from the candidate RB allocation space by uniform sampling An independent RB allocation scheme instance; Step S5: Generate Each RB allocation scheme instance is mapped to a parallel thread of the kernel function, and the optimal transmit power and risk level are calculated synchronously for each RB allocation scheme instance. Based on the principle of minimizing eMBB user rate loss, the optimal RB allocation result for the current sub-slot is selected using a parallel reduction algorithm.

[0009] Furthermore, the traffic statistics parameters mentioned in step S2 are specifically the mean and variance of the transmitted data, which are used to characterize the service needs of URLLC users when the traffic distribution of URLLC users is unknown.

[0010] Further, after generating the RB allocation scheme instance in step S4, RB reduction processing is performed on the generated RB allocation scheme instance, specifically including: For each URLLC user in each RB allocation scheme instance, based on the lightweight communication load requirements, the RBs initially allocated to that URLLC user are preferentially retained from the set of RBs with the highest channel gain. One RB was allocated to the original eMBB user, and the remaining RBs were released to reduce the cumulative rate loss.

[0011] Furthermore, steps S3, S4, and S5 involve multi-level execution logic of the GPU kernel function, specifically including: Parallel sorting of the channel gain of each URLLC user under different RBs is used to determine the set of feasible solutions for the URLLC user in each sub-slot. ; Within each parallel thread block of the GPU, power allocation and risk assessment calculations for the corresponding RB allocation scheme instance are performed synchronously and independently, and local optimal solutions within the thread block are selected. Filter out the globally optimal RB allocation scheme instance from the locally optimal solutions returned by all thread blocks.

[0012] Furthermore, the method for calculating the optimal transmission power and risk level in step S5 includes: For each RB allocation scheme instance, the water-filling algorithm logic is used to analyze and solve the optimal power value on each RB in each parallel thread; Based on the joint opportunity constraint model, the risk level of each sub-slot is synchronously analyzed according to the statistical parameters of service requirements and real-time channel conditions.

[0013] Furthermore, the method also employs a hierarchical storage and asynchronous transmission mechanism for parameter attributes to manage data communication between the central processing unit (CPU) and the GPU, specifically including: The CPU is used to maintain and store quasi-static parameters that are decoupled from instantaneous channel conditions. These quasi-static parameters include URLLC user traffic statistics parameters that reflect service requirements and preset configuration parameters. Within each sub-slot scheduling period, the CPU only sends dynamic feature data that is strongly correlated with the user's real-time channel state to the GPU. The dynamic feature data includes the real-time channel gain matrix of each URLLC user and the data transmission rate of the URLLC user in each sub-slot. The asynchronous data bus is used to achieve parallel overlap between the dynamic feature data distribution process and the parallel computing task of the GPU in the current cycle on the time axis, thereby compressing the feedback time of the overall decision by hiding the data transmission latency.

[0014] Furthermore, during the execution of the kernel function, memory access efficiency is optimized through hierarchical memory storage logic, specifically including: Global memory storage: used to store quasi-static parameters used across scheduling cycles, large-scale raw input data, and final decision results; specifically, global memory storage includes traffic statistics parameters of URLLC users, real-time channel gain matrix, and instances of globally optimal RB allocation schemes; Shared memory storage: used to store frequently accessed real-time computation data and intermediate variables within the thread block; real-time computation data includes local objective function values ​​and candidate user set indices when executing the parallel reduction algorithm; intermediate variables include the real-time channel gain matrix corresponding to the current URLLC user and the Lagrange multiplier iteration values ​​during the power allocation process of the water-filling algorithm. Memory access optimization mechanism: Use shared memory as a low-latency public cache within the thread block to replace repetitive high-latency access to global memory.

[0015] A communication resource scheduling system based on GPU parallel computing includes: Module 1: Used to set up according to the wireless communication network structure. One eMBB user and URLLC users; the time domain is divided into consecutive time slots, each time slot corresponding to the transmission time interval of an eMBB user, and each time slot is further divided into segments containing... A set of sub-time slots, each sub-time slot corresponding to the transmission time interval of a URLLC user; The second module: used to divide the frequency domain into... Each subcarrier is considered as an RB; obtain the RB allocation matrix occupied by eMBB users in the current time slot, as well as the traffic statistics parameters and real-time channel gain matrix of URLLC users; The third module: Within each sub-time slot, for each RB, it calls the GPU's kernel function and its multiple thread blocks, sorting them in parallel descending order based on the channel gain of each URLLC user, and selecting the top... One of the URLLC users is selected as a candidate scheduling object for this RB, and the size of the candidate RB allocation space is from Reduced to ; Fourth module: used to generate from the candidate RB allocation space through uniform sampling An independent RB allocation scheme instance; Module 5: Used to generate Each RB allocation scheme instance is mapped to a parallel thread of the kernel function, and the optimal transmit power and risk level are calculated synchronously for each RB allocation scheme instance. Based on the principle of minimizing eMBB user rate loss, the optimal RB allocation result for the current sub-slot is selected using a parallel reduction algorithm.

[0016] A computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the GPU-based parallel computing communication resource scheduling method.

[0017] A computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the GPU-based parallel computing communication resource scheduling method.

[0018] Compared with the prior art, the present invention has the following beneficial technical effects: 1. Microsecond-level real-time scheduling under extremely high concurrency: In steps S3, S4, and S5, the system fully utilizes the massive computing cores of the GPU to decompose the original complex RB allocation problem into... Each problem is a simple, independent subproblem, mapped to the GPU's Single Instruction Multithreaded (SIMT) architecture for synchronous execution. This highly parallel processing method enables the system to overcome the computational bottleneck of traditional CPU serial computing or commercial solvers, achieving a resolution of 143... The resource scheduling problem was resolved within the micro-slot time limit, ensuring an immediate response to URLLC users.

[0019] 2. Intelligent dimensionality reduction and computing power adaptation for complex decision spaces: Step S3 identifies the foreground space of each resource block (RB) and sets the candidate user set accordingly. Reduced to the highest channel gain This makes the solution space size from [number], Exponential dimensionality reduction to a level that the hardware can handle This dimensionality reduction logic provides a high-quality candidate set for uniform sampling in step S4, ensuring that even with a limited number of GPU cores, it is still possible to obtain the desired candidate set through this process. Parallel screening of representative schemes leads to the identification of near-optimal solutions.

[0020] 3. Throughput Optimization with Deep Overlap of Computation and Transmission: During the execution of steps S3, S4, and S5, the pipeline overlap between the current cycle's computation task and the next cycle's statistical parameter distribution is achieved through the PCIe asynchronous data transmission mechanism between the CPU and GPU. Combined with the GPU's internal shared memory for caching channel gain and intermediate variables, memory access latency is significantly reduced and I / O bottlenecks are eliminated, significantly improving the overall throughput efficiency of resource scheduling.

[0021] 4. Hardware-level parallel reduction achieves global optimal selection: In the scheme selection stage of step S5, the traditional sequential traversal is not used. Instead, a multi-level parallel reduction algorithm of the GPU is employed. By performing logarithmic time complexity searches within and between thread blocks, a solution can be obtained from the optimal solution in a very short time. Among the various schemes, the globally optimal allocation result that minimizes the eMBB user rate loss was accurately identified.

[0022] This invention is based on the dual-scale spatiotemporal modeling of the base station in step S1, obtains real-time channel and uncertain traffic statistics parameters in step S2, and then performs intelligent dimensionality reduction and sample generation through GPU in steps S3 and S4. Finally, in step S5, the GPU parallel acceleration engine is used again to perform analytical solution.

[0023] This invention first achieves the "atomic" decomposition of complex optimization problems, breaking down the originally intractable mixed-integer nonlinear programming problem into standardized task flows that are suitable for GPU processing and do not interfere with each other. At the same time, it realizes a burst of computing power through deep hardware and software collaboration, using the GPU's SIMT architecture to simultaneously complete the mathematical closed-form solution calculation for the water-filling algorithm and risk shaping, solving the extreme demand for computing resources in high-performance real-time scheduling. Finally, it realizes end-to-end automated scheduling under uncertain environments, reducing manual configuration intervention through parallel optimization of the entire process, ensuring extremely low latency and high reliability for URLLC users while maximizing the efficiency of eMBB users. Attached Figure Description

[0024] The accompanying drawings are provided to further understand the invention and constitute a part of this invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an improper limitation of the invention.

[0025] Figure 1 This is a flowchart of the communication resource scheduling method based on GPU parallel computing of the present invention; Figure 2 This is a schematic diagram of a scenario according to an embodiment of the present invention; Figure 3 This is a schematic diagram illustrating the resource and power allocation for each sub-slot according to an embodiment of the present invention. Figure 4This is a logic diagram of GPU parallel computing in an embodiment of the present invention. Detailed Implementation

[0026] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0027] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0028] This invention proposes a communication resource scheduling method based on GPU parallel computing and designs a hardware-software collaborative resource scheduling system capable of achieving microsecond-level response under large-scale concurrent requests. Specifically, it optimizes the problems existing in the prior art from the following aspects: 1. Extremely Real-Time Scheduling Response Capability: The system decomposes a complex mixed-integer nonlinear programming problem into a massive number of parallelizable subproblems, utilizing the massive computing cores of the GPU to achieve synchronous analytical solutions. In a scenario with a subcarrier spacing of 15kHz, this invention can ensure a response time of 143... The optimal scheduling scheme is locked within the sub-slot time limit, breaking through the computing power bottleneck of traditional serial algorithms in real-time communication.

[0029] 2. Robustness under Uncertainty: To address the technical challenge of unknown user traffic distribution in URLLC, the system introduces an opportunity constraint model. By simply obtaining the mean and variance of traffic demand, the system can guarantee the reliability of services and effectively cope with the impact of sudden traffic surges without needing to know the precise statistical distribution, through a closed-form mathematical solution.

[0030] 3. Refined Protection of Spectrum Resource Utilization: By introducing an RB reduction processing mechanism, excess pre-allocated resources are dynamically released to the original eMBB users based on the real-time load demand of URLLC users. This fallback mechanism significantly reduces the cumulative rate loss of eMBB users caused by URLLC "punching" preemption, thereby maximizing throughput.

[0031] 4. Flexible Scheduling and Risk Shaping Across Time Domains: The system overcomes the limitations of static constraints on single sub-slots by optimizing risk distribution across consecutive sub-slot sequences using a joint chance constraint model. It dynamically relaxes single-point constraints when channel conditions are poor and tightens risk when channel conditions are good, further improving the average data transmission rate for eMBB users through flexible scheduling in the time domain.

[0032] 5. Intelligent Dimensionality Reduction and Sampling of Large-Scale Solution Space: This method designs a foreground space identification mechanism, utilizing channel gain sorting to select only the foreground space. 10 candidate URLLC users. This expands the search space from By exponentially scaling down to a hardware-processable size, coupled with a uniform sampling strategy, the GPU core is able to select near-optimal solutions with maximum efficiency.

[0033] 6. Asynchronous Communication and Hardware-Level Reduction Acceleration: The data path between the CPU and GPU is deeply optimized, and the PCIe asynchronous transmission mechanism is used to achieve overlap between computation and I / O. At the same time, a hardware-level parallel reduction algorithm is used in the optimization stage to complete the global comparison of massive solutions in logarithmic time complexity, which greatly improves the throughput of the decision-making process.

[0034] Specifically, the present invention provides a communication resource scheduling method based on parallel computing of a graphics processing unit (GPU), comprising the following steps: Step S1: The base station configures enhanced mobile bandwidth (eMBB) users according to the wireless communication network. Ultra-Reliable Low-Latency Communication (URLLC) users In the time domain, resources are divided into consecutive time slots, serving as the transmission time interval for eMBB users; each time slot is further divided into... The sub-slot set serves as the transmission time interval for URLLC users.

[0035] Step S2: Identify the set of resource blocks composed of subcarriers in the frequency domain, denoted as... Obtain the RB allocation matrix currently occupied by eMBB users in the current slot. Simultaneously, the real-time channel gain of each URLLC user on each RB is captured. And statistical parameters characterizing the traffic demand of URLLC users, including the mean of URLLC user demand. and variance .

[0036] Step S3: In each sub-slot, for each RB, call the GPU kernel function and its multiple thread blocks, based on the channel gain of each URLLC user. Perform parallel descending sorting. Select the items before sorting. One of the URLLC users is selected as a candidate scheduling object for the RB, thereby constructing the prospect space and increasing the size of the search space allocated by the RB. Reduced to .

[0037] Step S4: The GPU parallel computing scheme samples and performs refined resource block reduction processing; from the dimensionality-reduced foreground space, a number of blocks are generated through uniformly distributed sampling. Each generated RB allocation scheme instance. For each RB allocation scheme instance, resource block reduction is performed based on the real-time load requirements of URLLC users: From the initial set of resource blocks allocated to each URLLC user, priority is given to reserving the blocks with the highest channel gain. One RB is allocated to the original eMBB user, and the remaining RBs are released to the original eMBB user, thereby reducing the cumulative rate loss while ensuring reliability.

[0038] Step S5: Parallel analytical solution and global filtering of massive RB allocation scheme instances driven by GPU; the generated number of... The solution instances are mapped to parallel threads within GPU kernel functions, synchronously allocating instances for each RB to compute the optimal configuration: Parallel power allocation: For each RB allocation scheme instance, the water-filling algorithm logic is used to construct a Lagrangian function and introduce a multiplier corresponding to the total transmit power limit to analytically solve the optimal power value on each RB in each parallel thread.

[0039] Dynamic Risk Shaping: Based on a joint opportunity constraint model, risk levels are synchronously and analytically assigned to each sub-slot according to the mean and variance of URLLC user demand and real-time channel conditions. Risk tolerance is flexibly adjusted over time, optimizing resource utilization by allocating higher risks when the channel is poor and tightening risks when the channel is good.

[0040] Global result filtering: Based on the principle of minimizing eMBB user rate loss, the optimal RB allocation result for the current sub-slot is selected from all feasible RB allocation scheme instances using the parallel reduction algorithm inside the GPU.

[0041] Furthermore, the specific execution methods of the GPU parallel processing in steps S3, S4, and S5 include: The channel gain ranking task for each subcarrier is processed in parallel using multiple thread blocks on the GPU, quickly identifying a set of prospective candidate users for each RB. RB allocation reduction, power allocation resolution, and risk shaping calculations are performed within kernel functions. High-frequency access channels are stored using the GPU's shared memory to eliminate kernel switching overhead between different functional modules and reduce memory access latency. Finally, a parallel reduction algorithm is used for hierarchical filtering within and between thread blocks to ensure that the overall scheduling latency meets microsecond-level real-time requirements.

[0042] Furthermore, the above scheduling involves data interaction between the central processing unit (CPU) and the GPU, and the specific steps include: 1. The CPU is responsible for storing and maintaining quasi-static parameters that do not fluctuate instantaneously with URLLC user channel conditions. These parameters mainly include traffic statistics parameters characterizing service requirements and global configuration parameters. Since these parameters remain relatively stable over a macroscopic time scale, they are persistently stored in a specific memory area of ​​the CPU or GPU for repeated use, eliminating the need for repeated distribution in each sub-slot, thus effectively reducing the communication bandwidth pressure on the PCIe bus.

[0043] 2. At the beginning of each sub-slot, the scheduling process focuses on transmitting dynamic characteristic data strongly correlated with the current physical layer channel from the CPU to the GPU. The transmitted content mainly includes the real-time channel gain matrix of each URLLC user, and the data transmission rate of the URLLC user on each RB, pre-calculated based on the current channel state. This strategy of "transmitting only dynamic characteristic data" enables the synchronization of physical layer information with minimal packet size.

[0044] The above interaction process employs the PCIe asynchronous bus transmission mechanism, enabling parallel overlap of computational tasks and data transmission on the time axis. Specifically, while the GPU is executing kernel function calculations using the parameters of the current cycle, the CPU can synchronously prepare and distribute real-time channel data for the next cycle. This pipelined operation mode eliminates the performance bottleneck caused by I / O waiting in traditional serial logic, significantly compressing the total latency from data acquisition to decision output, and ensuring that the overall scheduling process strictly meets 143 The real-time requirements.

[0045] To make the objectives, technical solutions, and advantages of this invention clearer, the following description is provided in conjunction with embodiments. Figure 1 The present invention will be further described in detail below.

[0046] For clarity, the embodiments of the present invention are divided into three parts, and the scene model is as follows: Figure 2As shown, Example 1 focuses on a large-scale single-sub-slot scenario (8 eMBB users, 8 URLLC users, 32 RBs, risk level 0.1), emphasizing the process of optimizing spatial resources using a GPU parallel architecture. Example 2 expands the temporal domain to 7 sub-slots based on Example 1, aiming to verify the protection effect of cross-temporal domain risk shaping on eMBB users in a multi-sub-slot environment. Example 3 focuses on a distributed collaborative architecture, describing the data transmission process between the base station and the URLLC user end and the scheduling implementation after computing power offloading by decoupling the computing tasks between the two ends.

[0047] Example 1 Example 1 of this invention takes a large-scale single-slot system as an example, where the number of eMBB users is... The number of URLLC users is The number of schedulable RBs is And the risk level is expected Set it to 0.1.

[0048] As attached Figure 1 As shown, this invention provides a communication resource scheduling method based on parallel computing of an image processor, which includes the following steps: Step S1: The base station configures enhanced mobile bandwidth (eMBB) users according to the wireless communication network. Ultra-Reliable Low-Latency Communication (URLLC) users In the time domain, resources are divided into consecutive time slots, serving as the transmission time interval for eMBB users; each time slot is further divided into... Sub-slots are the transmission time intervals for URLLC users.

[0049] Step S2: Identify the set of resource blocks composed of subcarriers in the frequency domain, represented as Obtain the RB allocation matrix currently occupied by eMBB users in the slot. According to the proportional fairness algorithm, each eMBB user is equally allocated 2 RBs according to the order of RB allocation. Therefore, the resulting RB allocation matrix occupied by eMBB users is:

[0050] Capture the real-time channel gain of each URLLC user on each RB. And statistical parameters characterizing the traffic demand of URLLC users, including the mean of URLLC user demand. and variance .

[0051] Step S3: In each sub-slot, for each RB, call the GPU kernel function and its contained thread blocks to sort the channel gains of each URLLC user in descending order. Select the pre-sorting... One of the URLLC users is selected as a candidate scheduling object for the RB, thereby constructing the foreground space and increasing the size of the search space allocated by the original RB. Reduced to .

[0052] according to Figure 4 As shown, step S3 mainly executes the allocation of the first process RB in kernel function 1 and kernel function 2, and the specific method is as follows: Kernel function 1 utilizes the GPU for parallel sorting, using 32 thread blocks to represent 32 RBs, and using within each thread block... Each thread represents a URLLC user in a different sub-time slot. Each thread block is responsible for sorting the channel gain of different URLLC users in each sub-time slot in descending order in parallel, and the threads use a parallel reduction algorithm for calculation. Compared with traditional serial algorithms such as bubble sort, using a parallel reduction algorithm in GPU can greatly improve the identification efficiency of candidate scheduling space and code execution speed.

[0053] Kernel function 2 consists of five processes. The first process, RB allocation, is executed in step S3, where for each RB, a selection is made from two candidate URLLC users to narrow down the prospect space. The specific process is as follows: 1. Data Interaction and Transmission: After kernel function 1 sorts the channel gain of different URLLC users in each sub-slot in descending order, it transmits the sorted index results to kernel function 2.

[0054] 2. Parallel architecture mapping: Kernel function 2 is configured to use 128 thread blocks, with a total of 1024 threads in each thread block for computation support.

[0055] 3. Instance Generation: Within each thread block, the number of GPUs utilized is... The thread is responsible for executing the URLLC user selection operation in the RB. Through this parallel processing mechanism, each thread block can synchronously generate a quantity of... An example of an RB allocation scheme, in which The value of satisfies the maximum number of threads limit for each thread block, that is...

[0056] 4. Foreground Space Reduction: In the allocation instance corresponding to each thread, each RB randomly selects a URLLC user from the candidate list provided by kernel function 1 or retains the original eMBB user for allocation (i.e., does not select a URLLC user). This process intelligently compresses the originally huge search space into a high-quality set of foreground solutions, thereby enabling the system to meet the real-time processing requirements at the microsecond level while ensuring scheduling performance.

[0057] Step S4: The GPU samples and performs fine-grained resource block reduction processing; according to Figure 4 As shown, step S4 executes the second process in kernel function 2, namely RB reduction processing. First, it generates a total of [number missing] samples from the foreground space using a uniform distribution. An example of an allocation scheme, where the total number of samples is... Composed of 128 thread blocks and the number of solutions processed within each thread block Multiplying them together yields the result, i.e. In terms of hardware implementation, kernel function 2 is configured with 128 thread blocks, and each thread block supports a maximum of 1024 threads.

[0058] For each sampled RB allocation scheme instance, based on the real-time load of the URLLC user, a resource block rollback operation is performed within a thread: for each URLLC user, only the RBs with the highest channel gain initially allocated to them are retained. The process involves assigning one redundancy block (RB) and promptly releasing the remaining redundant RBs back to the original eMBB user. This process is achieved by calling [the relevant function] within each RB. The process is completed in parallel by multiple threads, with each thread corresponding to a URLLC user within a specific sub-time slot. This represents an instance of the RB allocation scheme in each thread block. Through this fine-grained reduction mechanism based on thread-level parallelism, the present invention significantly reduces the preemption overhead for eMBB users while ensuring the transmission needs of URLLC users.

[0059] Step S5: Parallel analytical solution and global optimization of massive solution instances driven by GPU; according to Figure 4 As shown, step S5 executes the remaining three processes in kernel function 2 and kernel function 3, using GPU-driven parallel analytical solutions for a massive number of solution instances, as follows. Figure 3 As shown, the power allocation is the last part. The total generated is The solution instance is mapped to a parallel thread on the GPU to synchronously calculate the optimal configuration. The specific method is as follows: 1. Kernel function 2 is called within each thread block. Multiple threads synchronously execute parallel power allocation and dynamic risk shaping, with each thread corresponding to a URLLC user within a specific sub-time slot. Power allocation uses a water-filling algorithm to logically analyze and solve for the optimal power value of each RB; risk shaping is based on a joint chance constraint model and statistical parameters according to business needs to dynamically adjust the risk level of each sub-time slot to optimize resource utilization.

[0060] 2. In kernel function 2, utilize the code within each thread block. Each thread performs local solution selection. This process uses a parallel reduction algorithm to quickly identify the locally optimal objective function value from the 128 solutions processed by each thread block and store it in global memory.

[0061] 3. Call kernel function 3 to perform global result filtering. Kernel function 3 is configured with 1 thread block and 64 threads. It uses parallel reduction logic to filter the global optimal RB allocation instance result that minimizes the eMBB user rate loss from the local results returned by 128 thread blocks and executes it.

[0062] Example 2 Example 2 of this invention takes large-scale multi-slot as an example, where the number of eMBB users is... The number of URLLC users is The number of schedulable resource blocks is Risk level ,by For example, the risk level of multiple time slots .

[0063] As attached Figure 1 As shown, this invention provides a communication resource scheduling method based on parallel computing of an image processor, which includes the following steps: Step S1: The base station configures enhanced mobile bandwidth (eMBB) users according to the wireless communication network. Ultra-Reliable Low-Latency Communication (URLLC) users In the time domain, resources are divided into consecutive time slots, serving as the transmission time interval for eMBB users; each time slot is further divided into... Sub-slots are the transmission time intervals for URLLC users.

[0064] Step S2: Identify the set of resource blocks composed of subcarriers in the frequency domain, denoted as... Obtain the RB allocation matrix currently occupied by eMBB users in the current slot. According to the proportional fairness algorithm, allocate the first 4 RBs to the first eMBB user and the last 4 RBs to the second eMBB user. Therefore, the resulting RB allocation matrix for eMBB users is:

[0065] Capture the real-time channel gain of each URLLC user on each RB. And statistical parameters characterizing the traffic demand of URLLC users, including the mean of URLLC user demand. and variance .

[0066] Step S3: In each sub-slot, for each RB, the GPU sorts the channel gains of each URLLC user in descending order in parallel. Select the pre-sorting... One of the URLLC users is selected as a candidate scheduling object for the RB, thereby constructing the foreground space and increasing the size of the search space allocated by the original RB. Reduced to .

[0067] according to Figure 4 As shown, step S3 mainly executes the allocation of the first process RB in kernel function 1 and kernel function 2, and the specific method is as follows: Kernel function 1 utilizes the GPU for parallel sorting, using 32 thread blocks to represent 32 RBs, and using within each thread block... Each thread represents a URLLC user in a different sub-time slot. Each thread block is responsible for sorting the channel gain of different URLLC users in each sub-time slot in descending order in parallel, and the threads use a parallel reduction algorithm for calculation.

[0068] Kernel function 2 consists of five processes. The first process, RB allocation, is executed in step S3, where for each RB, a selection is made from two candidate URLLC users to narrow down the prospect space. The specific process is as follows: 1. Data Interaction and Transmission: After the GPU sorts the channel gain of different URLLC users in each sub-slot in descending order, it transmits the sorted index results to kernel function 2.

[0069] 2. Parallel architecture mapping: Kernel function 2 is configured to use 128 thread blocks, with a total of 1024 threads in each thread block for computation support.

[0070] 3. Scheme Instance Generation: Within each RB, the number of GPUs utilized is... The thread is responsible for executing the URLLC user selection operation in the RB. Through this parallel processing mechanism, each thread block can synchronously generate a quantity of... An example of an RB allocation scheme, in which The value of satisfies the maximum number of threads limit for each thread block, that is...

[0071] 4. Foreground Space Reduction: In the allocation instance corresponding to each thread, each RB randomly selects a URLLC user from the candidate list provided by kernel function 1 or retains the original eMBB user for allocation (i.e., does not select a URLLC user). This process intelligently compresses the originally huge search space into a high-quality set of foreground solutions, thereby enabling the system to meet the real-time processing requirements at the microsecond level while ensuring scheduling performance.

[0072] Step S4: The GPU samples and performs fine-grained resource block reduction processing; according to Figure 4 As shown, step S4 executes the second process in kernel function 2, namely RB reduction processing. First, it generates a total of [number missing] samples from the foreground space using a uniform distribution. An example of an RB allocation scheme, where the total number of samples is... Composed of 128 thread blocks and the number of solutions processed within each thread block Multiplying them together yields the result, i.e. In terms of hardware implementation, kernel function 2 is configured with 128 thread blocks, each supporting a maximum of 1024 threads.

[0073] For each sampled scheme instance, based on the real-time load of the URLLC users, a resource block rollback operation is performed within a thread: for each URLLC user, only the first RB with the highest channel gain initially allocated to them is retained. One RB is allocated, and the remaining redundant RBs are promptly released to the original eMBB user. This process is achieved by calling [the relevant function] within each thread block. The process is completed in parallel by multiple threads, with each thread corresponding to a URLLC user within a specific sub-time slot. This represents an instance of the RB allocation scheme in each thread block. Through this fine-grained reduction mechanism based on thread-level parallelism, the present invention significantly reduces the preemption loss for eMBB users while ensuring URLLC transmission requirements.

[0074] Step S5: Parallel analytical solution and global optimization of massive solution instances driven by GPU; according to Figure 4 As shown, step S5 executes the remaining three processes in kernel function 2 and kernel function 3, using GPU-driven parallel analytical solving and global optimization of massive solution instances. The total number of generated... The solution instance is mapped to a parallel thread on the GPU to synchronously calculate the optimal configuration. The specific method is as follows: 1. Kernel function 2 is called within each thread block. Multiple threads synchronously execute parallel power allocation and dynamic risk shaping, with each thread corresponding to a URLLC user within a specific sub-time slot. Power allocation uses a water-filling algorithm to logically analyze and solve for the optimal power value of each RB; risk shaping is based on a joint chance constraint model and statistical parameters according to business needs to dynamically adjust the risk level of each sub-time slot to optimize resource utilization.

[0075] 2. Utilize the code within each thread block in kernel function 2. Each thread performs local solution selection. This process uses a parallel reduction algorithm to quickly identify the locally optimal objective function value from the 128 solutions processed by each thread block and store it in global memory.

[0076] 3. Call kernel function 3 to perform global result filtering. Kernel function 3 is configured with 1 thread block and 64 threads. It uses parallel reduction logic to filter the global optimal RB allocation instance result that minimizes the eMBB user rate loss from the local results returned by 128 thread blocks and executes it.

[0077] Example 3 Embodiment 3 of this invention addresses a distributed computing architecture for large-scale multi-sub-slot scenarios, where the number of eMBB users is... The number of URLLC users is The number of schedulable resource blocks is The time slot contains This embodiment aims to improve the load awareness accuracy of decision-making by decoupling the tasks and data interaction between the base station (BS) and the URLLC user terminal. The specific implementation steps are as follows: Step S1: Base station topology configuration and time domain partitioning. The base station sets the number of eMBB users according to the wireless communication network. The number of URLLC users is In the time domain, resources are divided into 7 sub-time slots. The base station, as the initiator of the scheduling logic, is responsible for maintaining the global spatiotemporal index.

[0078] Step S2: Base station environmental perception and parameter acquisition. The base station identifies 32 RBs in the frequency domain and obtains the RB occupancy matrix of the current time slot eMBB user. The base station synchronously captures the real-time channel gain of each URLLC user on each RB and reads quasi-static statistical parameters such as the mean and variance of service requirements from the CPU storage.

[0079] Step S3: Parallel sorting and candidate space construction at the base station, specifically including: 1. GPU Parallel Sorting: The base station uses the GPU to start the kernel function, using 32 thread blocks corresponding to 32 RBs. Each thread block uses a parallel reduction algorithm to sort the channel gain of each URLLC user in descending order.

[0080] 2. Initial selection of foreground space: The base station selects the foreground space corresponding to each RB based on the sorting results. For each candidate user, construct a reduced candidate RB allocation space.

[0081] 3. Data transmission: The base station transmits the reduced candidate allocation space and related channel statistical parameters constructed above to each URLLC user terminal as input data for the subsequent local fine-grained processing and parsing solution of the URLLC user terminal.

[0082] Step S4: The URLLC client performs fine-grained RB reduction processing, specifically including: 1. Distributed uniform sampling: After receiving data, each user terminal, in conjunction with the base station, synchronously generates a total of... An example of an allocation scheme.

[0083] 2. URLLC client-side fine-tuning: For each RB allocation scheme instance, each URLLC client performs RB rollback operations within its local thread based on its own instantaneous actual communication load. Based on load requirements, the user retains only the RBs with the highest channel gain from the initially allocated RB set. One RB is set up, and the remaining redundant resource blocks are marked for release to the original eMBB user.

[0084] Step S5: URLLC user-side parsing calculation and base station-side global optimization, specifically including: 1. URLLC client-side partial resolution: Parallel power allocation and risk shaping: Each URLLC user terminal, within its processing unit, utilizes the GPU to synchronously execute the water-filling algorithm for power allocation and dynamic risk level decisions for RB allocation scheme instances involving itself. The URLLC user terminal adjusts its risk tolerance based on local channel conditions, minimizing resource consumption while ensuring reliability.

[0085] Data backhaul transmission: The URLLC user terminal feeds back the calculated local RB allocation scheme instance to the base station.

[0086] 2. Global filtering at the base station: Local reduction: The base station receives data transmitted back from each URLLC user terminal and uses the local filtering function of kernel function 2 to filter out the local optimal solution within each thread block.

[0087] Global optimization: The base station calls the GPU, configures 1 thread block and 64 threads, and uses parallel reduction logic to filter out the optimal RB allocation result that minimizes the global eMBB user rate loss from all feedback results and finally executes the scheduling.

[0088] In summary, the three embodiments of this invention have verified, from different dimensions, the superior performance and high flexibility of the GPU-based parallel computing-based communication resource scheduling method in handling large-scale, multi-service coexistence scenarios, constituting a complete technical system from basic parallel acceleration to complex time-domain optimization, and then to the evolution of distributed architecture: 1. Example 1 demonstrates, through a large-scale single-slot scenario, that by utilizing the GPU's kernel function parallel architecture and parallel reduction algorithm, the system can intelligently reduce the dimensionality of the traditional search space, achieving this in microseconds (…). Complete within the time limit Parallel filtering and parsing of RB allocation scheme instances. This overcomes the bottleneck of exploding computational complexity in existing technologies when facing large-scale users and RBs, ensuring the extremely low latency requirements of URLLC users. Example 2 extends the scheduling span from a single sub-slot to... The complete time slots of each sub-time slot fully validate the effectiveness of the joint opportunity constraint model and risk shaping strategy. This demonstrates that the present invention can utilize the channel fluctuation characteristics across time slots to maximize the protection of eMBB user throughput while meeting extremely high end-to-end reliability requirements.

[0089] 2. Example 2 extends the scheduling logic to the multi-sub-slot dimension, introducing a dynamic risk shaping strategy based on a joint opportunity constraint model. This example demonstrates that the system is no longer limited by strict constraints at a single point in time, but can flexibly adjust risk tolerance across the time axis, utilizing the randomness of channel fluctuations to hedge resources across the time domain. This mechanism significantly reduces the frequency of "punching" for eMBB services while ensuring end-to-end reliability, thus improving the overall spectrum utilization of the system.

[0090] 3. Example 3 demonstrates the application potential of this invention in a distributed network architecture by decoupling the tasks of the base station and the URLLC user terminal. By offloading "refined resource reduction" and "local parsing computation" to the user terminal, not only is the real-time computing pressure on the base station effectively alleviated, but the user side's accurate perception of its own instantaneous load is also fully utilized, further improving the robustness of decision-making. Simultaneously, through asynchronous transmission mechanisms and interaction with the reduced foreground space, extremely high scheduling efficiency is maintained even in the distributed cooperation mode.

[0091] This invention successfully addresses the three core technical challenges of coexisting eMBB and URLLC user scheduling in mobile communications—namely, the difficulty in uncertainty modeling, high real-time requirements, and poor scheduling flexibility—through a deep integration of kernel function cascade design, hierarchical memory storage optimization, and analytical solution algorithms (watering algorithm and joint chance constraint). The three embodiments complement each other, demonstrating that this solution is a highly efficient resource scheduling framework capable of simultaneously ensuring service reliability, system throughput, and real-time response performance.

[0092] The modules involved in this invention can be physically implemented based on field-programmable gate arrays (FPGAs), digital signal processors (DSPs), application-specific integrated circuits (ASICs), or general-purpose computing platforms (such as servers equipped with GPUs or embedded automotive computing units). Specifically, steps involving high-speed signal processing (such as dynamic phase rotation and IFFT / FFT) are preferably implemented in parallel within the FPGA, while steps involving complex logic control (such as task mode parsing and sequence management) can be implemented in ARM or DSP.

[0093] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0094] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0095] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0096] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1The steps of the function specified in one or more boxes.

[0097] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit its scope of protection. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that after reading the present invention, they can still make various changes, modifications or equivalent substitutions to the specific implementation of the invention, but these changes, modifications or equivalent substitutions are all within the scope of protection of the pending claims of the invention.

Claims

1. A communication resource scheduling method based on GPU parallel computing, characterized in that, Includes the following steps: Step S1: Based on the wireless communication network structure, set... One eMBB user and URLLC users; the time domain is divided into consecutive time slots, each time slot corresponding to the transmission time interval of an eMBB user, and each time slot is further divided into segments containing... A set of sub-time slots, each sub-time slot corresponding to the transmission time interval of a URLLC user; Step S2: Divide the frequency domain into Each subcarrier is considered as an RB; obtain the RB allocation matrix occupied by eMBB users in the current time slot, as well as the traffic statistics parameters and real-time channel gain matrix of URLLC users; Step S3: In each sub-slot, for each RB, call the GPU kernel function and its multiple thread blocks, sort them in parallel in descending order according to the channel gain of each URLLC user, and select the top... One of the URLLC users is selected as a candidate scheduling object for this RB, and the size of the candidate RB allocation space is from Reduced to ; Step S4: Generate from the candidate RB allocation space by uniform sampling An independent RB allocation scheme instance; Step S5: Generate Each RB allocation scheme instance is mapped to a parallel thread of the kernel function, which synchronously calculates the optimal transmit power and risk level for each RB allocation scheme instance, and uses a parallel reduction algorithm to select the optimal RB allocation result for the current sub-slot based on the principle of minimizing eMBB user rate loss.

2. The communication resource scheduling method based on GPU parallel computing according to claim 1, characterized in that, The communication volume statistics parameters mentioned in step S2 are specifically the mean and variance of the transmitted data, which are used to characterize the service needs of URLLC users when the communication volume distribution is unknown.

3. The communication resource scheduling method based on GPU parallel computing according to claim 1, characterized in that, After generating the RB allocation scheme instance in step S4, RB reduction processing is performed on the generated RB allocation scheme instance, specifically including: For each URLLC user in each RB allocation scheme instance, based on the lightweight communication load requirements, the RBs initially allocated to that URLLC user are preferentially retained from the set of RBs with the highest channel gain. One RB was allocated to the original eMBB user, and the remaining RBs were released to reduce the cumulative rate loss.

4. The communication resource scheduling method based on GPU parallel computing according to claim 1, characterized in that, Steps S3, S4, and S5 involve multi-level execution logic of GPU kernel functions, specifically including: Parallel sorting of the channel gain of each URLLC user under different RBs is used to determine the set of feasible solutions for the URLLC user in each sub-slot. ; Within each parallel thread block of the GPU, power allocation and risk assessment calculations for the corresponding RB allocation scheme instance are performed synchronously and independently, and local optimal solutions within the thread block are selected. Filter out the globally optimal RB allocation scheme instance from the locally optimal solutions returned by all thread blocks.

5. The communication resource scheduling method based on GPU parallel computing according to claim 1, characterized in that, The method for calculating the optimal transmission power and risk level in step S5 includes: For each RB allocation scheme instance, the water-filling algorithm logic is used to analyze and solve the optimal power value on each RB in each parallel thread; Based on the joint opportunity constraint model, the risk level of each sub-slot is synchronously analyzed according to the statistical parameters of service requirements and real-time channel conditions.

6. The communication resource scheduling method based on GPU parallel computing according to claim 1, characterized in that, The method also employs a parameter attribute hierarchical storage and asynchronous transmission mechanism to manage data communication between the central processing unit (CPU) and the GPU, specifically including: The CPU is used to maintain and store quasi-static parameters that are decoupled from instantaneous channel conditions. These quasi-static parameters include URLLC user traffic statistics parameters that reflect service requirements and preset configuration parameters. Within each sub-slot scheduling period, the CPU only sends dynamic feature data that is strongly correlated with the user's real-time channel state to the GPU. The dynamic feature data includes the real-time channel gain matrix of each URLLC user and the data transmission rate of the URLLC user in each sub-slot. The asynchronous data bus is used to achieve parallel overlap between the dynamic feature data distribution process and the parallel computing task of the GPU in the current cycle on the time axis, thereby compressing the feedback time of the overall decision by hiding the data transmission latency.

7. The communication resource scheduling method based on GPU parallel computing according to claim 4, characterized in that, The kernel function optimizes memory access efficiency through hierarchical memory storage logic during execution, specifically including: Global memory storage: used to store quasi-static parameters used across scheduling cycles, large-scale raw input data, and final decision results; specifically, global memory storage includes traffic statistics parameters of URLLC users, real-time channel gain matrix, and instances of globally optimal RB allocation schemes; Shared memory storage: used to store frequently accessed real-time computation data and intermediate variables within the thread block; real-time computation data includes local objective function values ​​and candidate user set indices when executing the parallel reduction algorithm; intermediate variables include the real-time channel gain matrix corresponding to the current URLLC user and the Lagrange multiplier iteration values ​​during the power allocation process of the water-filling algorithm. Memory access optimization mechanism: Use shared memory as a low-latency public cache within the thread block to replace repetitive high-latency access to global memory.

8. A communication resource scheduling system based on GPU parallel computing, characterized in that, include: Module 1: Used to set up according to the wireless communication network structure. One eMBB user and URLLC users; the time domain is divided into consecutive time slots, each time slot corresponding to the transmission time interval of an eMBB user, and each time slot is further divided into segments containing... A set of sub-time slots, each sub-time slot corresponding to the transmission time interval of a URLLC user; The second module: used to divide the frequency domain into... Each subcarrier is considered as an RB; obtain the RB allocation matrix occupied by eMBB users in the current time slot, as well as the traffic statistics parameters and real-time channel gain matrix of URLLC users; The third module: Within each sub-time slot, for each RB, it calls the GPU's kernel function and its multiple thread blocks, sorting them in parallel descending order based on the channel gain of each URLLC user, and selecting the top... One of the URLLC users is selected as a candidate scheduling object for this RB, and the size of the candidate RB allocation space is from Reduced to ; Fourth module: used to generate from the candidate RB allocation space through uniform sampling An independent RB allocation scheme instance; Module 5: Used to generate Each RB allocation scheme instance is mapped to a parallel thread of the kernel function, which synchronously calculates the optimal transmit power and risk level for each RB allocation scheme instance, and uses a parallel reduction algorithm to select the optimal RB allocation result for the current sub-slot based on the principle of minimizing eMBB user rate loss.

9. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the communication resource scheduling method based on GPU parallel computing as described in any one of claims 1 to 7.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the communication resource scheduling method based on GPU parallel computing as described in any one of claims 1 to 7.

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