Multi-power input autonomous switching circuit

Abstract

The utility model discloses a multi-power input autonomous switching circuit, which comprises an external power supply, a main battery and a standby battery, the external power supply is respectively connected to the positive electrode of a Schottky diode, the grid electrode of a first PMOS tube and the grid electrode of a second PMOS tube, the drain electrode of the first PMOS tube is connected with the drain electrode of the second PMOS tube, and the source electrode of the second PMOS tube and the negative electrode of the Schottky diode are both connected with a power output port; a main battery is connected to a source electrode of a first PMOS tube and a grid electrode of a first NMOS tube, and a drain electrode of the first NMOS tube is connected with a grid electrode of a second NMOS tube, grounded through a fourth resistor and connected to a power output port through a fifth resistor. The drain electrode of the second NMOS tube is respectively connected with the grid electrode of the third PMOS tube, the grid electrode of the fourth PMOS tube and the power supply output port through a sixth resistor; the standby battery is connected to the source electrode of the third PMOS tube, the drain electrode of the third PMOS tube is connected with the drain electrode of the fourth PMOS tube, and the source electrode of the fourth PMOS tube is connected with the power output port. According to the utility model, the external power supply can be rapidly switched to the main battery or the standby battery for power supply, and a rear-end functional circuit can be ensured to continuously, stably and normally work.

Description

Technical Field

[0001] The utility model relates to the field of main and standby power supply switching, and more specifically, to a multi-power input autonomous switching circuit. Background Art

[0002] For products with requirements for endurance, during the general product design, in order to make the product more stable and intelligent, generally two or more power supply methods are reserved. Generally, each power supply exists independently and can independently supply power to the product. However, if these power supplies exist simultaneously, a power supply automatic switching circuit is required to ensure that the product can work normally without interruption.

[0003] Currently, there are mainly two types of circuits applied in the industry. One is the diode parallel automatic switching circuit. There will be a certain voltage drop in each power supply path. When selecting the LDO for the subsequent power supply, a low-dropout chip needs to be selected. Otherwise, due to the voltage drop, the input voltage of the LDO may not meet the requirements, and seamless switching between multiple power supplies cannot be achieved, so the load will not be able to work properly. The other is to use a power supply switching chip, with basically no voltage drop. In theory, it can ensure that the circuit can work normally, but the cost is relatively high. Summary of the Utility Model

[0004] The purpose of the utility model is to overcome the deficiencies in the prior art and provide a multi-power input autonomous switching circuit, which can quickly switch the external power supply to the main battery or the backup battery for power supply, and ensure that the subsequent functional circuit can continuously and stably work normally.

[0005] The purpose of the utility model is achieved through the following technical solutions.

[0006] The multi-power input autonomous switching circuit of the utility model includes an external power supply, a main battery, and a backup battery. The external power supply is respectively connected to the positive electrode of a Schottky diode, the gate of a first PMOS transistor, and the gate of a second PMOS transistor. And the positive electrode of the Schottky diode is also grounded through a second resistor. The drain of the first PMOS transistor is connected to the drain of the second PMOS transistor. The source of the second PMOS transistor and the negative electrode of the Schottky diode are both connected to the power output port.

[0007] The main battery is respectively connected to the source of the first PMOS transistor and the gate of a first NMOS transistor. And the gate of the first NMOS transistor is also grounded through a third resistor. The source of the first NMOS transistor is grounded. The drain of the first NMOS transistor is respectively connected to the gate of a second NMOS transistor, grounded through a fourth resistor, and connected to the power output port through a fifth resistor. The source of the second NMOS transistor is grounded. The drain of the second NMOS transistor is respectively connected to the gate of a third PMOS transistor, the gate of a fourth PMOS transistor, and the power output port through a sixth resistor.

[0008] The backup battery is connected to the source of the third PMOS transistor. The drain of the third PMOS transistor is connected to the drain of the fourth PMOS transistor, and the source of the fourth PMOS transistor is connected to the power output port.

[0009] Further, the resistance values of the second resistor, the third resistor, the fourth resistor, the fifth resistor, and the sixth resistor are all 10 kΩ.

[0010] Further, the capacity of the main battery is larger than that of the backup battery.

[0011] Further, the power output port is used to supply power to the backend circuit, taking power from the power source with the highest priority first. It preferentially uses the external power source, followed by the main battery with a larger capacity, and finally the backup battery with a smaller capacity.

[0012] Compared with the prior art, the beneficial effects brought by the technical solution of the present utility model are as follows:

[0013] (1) In the present utility model, the power output port VOUT takes power from the power source with the highest priority. It preferentially uses the external power source VIN, followed by the main battery VBAT1 with a larger capacity, and finally the backup battery VBAT2 with a smaller capacity.

[0014] (2) The present utility model can achieve the following functions: The circuit can work as long as any one of the three power sources exists; when two power sources exist simultaneously, the power source with the highest priority supplies power to the backend circuit system, saving the power of the power source with a lower priority; when all three power sources exist simultaneously, the power of two batteries can be saved; when two or three power sources exist simultaneously, when the power source with the highest priority loses power, the power source with a lower priority will take over.

[0015] (3) The multi - power - input automatic - switching circuit designed in the present utility model has the characteristics of low cost, good reliability, fewer components, and simple circuit construction. Description of the Drawings

[0016] Figure 1 It is a schematic diagram of the original circuit of the multi - power - input automatic - switching circuit of the present utility model.

[0017] Reference numerals: R2 - the second resistor, R3 - the third resistor, R4 - the fourth resistor, R5 - the fifth resistor, R6 - the sixth resistor, D1 - Schottky diode, Q2 - the first PMOS transistor, Q3 - the second PMOS transistor, Q4 - the first NMOS transistor, Q5 - the third PMOS transistor, Q6 - the fourth PMOS transistor, Q7 - the second NMOS transistor, VIN - external power source, VBAT1 - main battery, VBAT2 - backup battery, VOUT - power output port, GND - ground;

[0018] Among them, the pin "1" of the first PMOS transistor Q2, the second PMOS transistor Q3, the third PMOS transistor Q5, and the fourth PMOS transistor Q6 are all gates, the pin "2" are all drains, and the pin "3" are all sources; the pin "1" of the first NMOS transistor Q4 and the second NMOS transistor Q7 are all gates, the pin "2" are all sources, and the pin "3" are all drains. Detailed implementation mode

[0019] The present invention will be further described below in conjunction with the accompanying drawings.

[0020] As Figure 1 shown, the multi-power-input autonomous switching circuit of the present invention includes an external power supply VIN, a main battery VBAT1, and a backup battery VBAT2. Preferably, the capacity of the main battery VBAT1 is larger than that of the backup battery VBAT2. The priority of this circuit is set as: VIN > VBAT1 > VBAT2. The power output port VOUT is used to supply power to the backend circuit, and it will draw power from the power source with a higher priority first. It will first use the external power supply VIN (5V), then the main battery VBAT1 with a larger capacity, and finally the backup battery VBAT2 with a smaller capacity.

[0021] The external power supply VIN is respectively connected to the positive electrode of the Schottky diode D1, the gate of the first PMOS transistor Q2, and the gate of the second PMOS transistor Q3. And the positive electrode of the Schottky diode D1 is also grounded to GND through the second resistor R2. The drain of the first PMOS transistor Q2 is connected to the drain of the second PMOS transistor Q3. The source of the second PMOS transistor Q3 and the negative electrode of the Schottky diode D1 are both connected to the power output port VOUT.

[0022] The main battery VBAT1 is respectively connected to the source of the first PMOS transistor Q2 and the gate of the first NMOS transistor Q4. And the gate of the first NMOS transistor Q4 is also grounded to GND through the third resistor R3. The source of the first NMOS transistor Q4 is grounded to GND. The drain of the first NMOS transistor Q4 is connected to the gate of the second NMOS transistor Q7. And the drain of the first NMOS transistor Q4 is grounded to GND through the fourth resistor R4. The drain of the first NMOS transistor Q4 is connected to the power output port VOUT through the fifth resistor R5. The source of the second NMOS transistor Q7 is grounded to GND. The drain of the second NMOS transistor Q7 is respectively connected to the gate of the third PMOS transistor Q5, the gate of the fourth PMOS transistor Q6, and the power output port VOUT through the sixth resistor R6.

[0023] The backup battery VBAT2 is connected to the source of the third PMOS transistor Q5. The drain of the third PMOS transistor Q5 is connected to the drain of the fourth PMOS transistor Q6. The source of the fourth PMOS transistor Q6 is connected to the power output port VOUT.

[0024] In the above multi - power - input autonomous switching circuit, preferably, when specifically connecting the circuit, the external power supply VIN, the positive electrode of the Schottky diode D1, the gate of the first PMOS transistor Q2, the gate of the second PMOS transistor Q3, and the second resistor R2 can be simultaneously connected to node A; the drain of the first NMOS transistor Q4, the gate of the second NMOS transistor Q7, the fourth resistor R4, and the fifth resistor R5 can be simultaneously connected to node B; the fifth resistor R5, the sixth resistor R6, the gate of the third PMOS transistor Q5, the gate of the fourth PMOS transistor Q6, and the power output port VOUT can be simultaneously connected to node C.

[0025] In the above multi - power - input autonomous switching circuit, preferably, the resistance values of the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5, and the sixth resistor R6 can all be 10 kΩ.

[0026] The working principle of the multi - power - input autonomous switching circuit of the present utility model:

[0027] ① When only the external power supply VIN is powered on, the first PMOS transistor Q2 and the second PMOS transistor Q3 are turned off, the first NMOS transistor Q4 and the second NMOS transistor Q7 are turned off, the third PMOS transistor Q5 and the fourth PMOS transistor Q6 are turned off, and the power output port VOUT draws power from the external power supply VIN through the Schottky diode D1, and the output voltage is close to 5V.

[0028] ② When only the main battery VBAT1 is powered on, the first PMOS transistor Q2 and the second PMOS transistor Q3 are turned on, the first NMOS transistor Q4 is turned on, the second NMOS transistor Q7 is turned off, the third PMOS transistor Q5 and the fourth PMOS transistor Q6 are turned off, and the power output port VOUT draws power from the main battery VBAT1, and the output is close to the voltage of the main battery VBAT1.

[0029] ③ When only the backup battery VBAT2 is powered on, the first NMOS transistor Q4 is turned off, the second NMOS transistor Q7 is turned off, the third PMOS transistor Q5 and the fourth PMOS transistor Q6 are turned on, the first PMOS transistor Q2 and the second PMOS transistor Q3 are turned off, and the power output port VOUT draws power from the backup battery VBAT2, and the output is close to the voltage of the backup battery VBAT2.

[0030] ④ When both the backup battery VBAT2 and the main battery VBAT1 are powered on, the first PMOS transistor Q2 and the second PMOS transistor Q3 are turned on, the first NMOS transistor Q4 is turned on, the second NMOS transistor Q7 is turned off, the third PMOS transistor Q5 and the fourth PMOS transistor Q6 are turned off, and the power output port VOUT draws power from the main battery VBAT1, and the output is close to the voltage of the main battery VBAT1.

[0031] ⑤ When both the backup battery VBAT2 and the external power supply VIN are powered, the first NMOS transistor Q4 and the second NMOS transistor Q7 are turned off, and the third PMOS transistor Q5 and the fourth PMOS transistor Q6 are turned off. The power output port VOUT draws power from the external power supply VIN through the Schottky diode D1, and the output voltage is close to 5V.

[0032] ⑥ When both the main battery VBAT1 and the external power supply VIN are powered, the first PMOS transistor Q2 and the second PMOS transistor Q3 are turned off, the first NMOS transistor Q4 is turned on, the second NMOS transistor Q7 is turned off, the third PMOS transistor Q5 and the fourth PMOS transistor Q6 are turned off. The power output port VOUT draws power from the external power supply VIN through the Schottky diode D1, and the output voltage is close to 5V.

[0033] ⑦ When both the backup battery VBAT2, the main battery VBAT1, and the external power supply VIN are powered, the first PMOS transistor Q2 and the second PMOS transistor Q3 are turned off, the first NMOS transistor Q4 is turned on, the second NMOS transistor Q7 is turned off, the third PMOS transistor Q5 and the fourth PMOS transistor Q6 are turned off. The power output port VOUT draws power from the external power supply VIN through the Schottky diode D1, and the output voltage is close to 5V.

[0034] This circuit can achieve: when any one of the three power supplies exists, the circuit can work; when two power supplies exist, the power supply with higher priority supplies power to the backend circuit system, saving the power of the power supply with lower priority; when all three power supplies exist, the power of two batteries can be saved simultaneously; when two or three power supplies exist simultaneously, when the power supply with higher priority is powered off, the power supply with lower priority will continue.

[0035] Although the functions and working processes of the present invention are described above in conjunction with the accompanying drawings, the present invention is not limited to the above specific functions and working processes. The above specific embodiments are merely illustrative and not restrictive. Under the inspiration of the present invention, those of ordinary skill in the art can also make many forms without departing from the spirit and scope protected by the claims of the present invention. These all fall within the protection scope of the present invention.

Claims

1. A multi-power-input autonomous switching circuit, including an external power supply (VIN), a main battery (VBAT1), and a backup battery (VBAT2), characterized in that the external power supply (VIN) is respectively connected to the positive electrode of a Schottky diode (D1), the gate of a first PMOS transistor (Q2), and the gate of a second PMOS transistor (Q3), and the positive electrode of the Schottky diode (D1) is also grounded (GND) through a second resistor (R2). The drain of the first PMOS transistor (Q2) is connected to the drain of the second PMOS transistor (Q3). The source of the second PMOS transistor (Q3) and the negative electrode of the Schottky diode (D1) are both connected to a power output port (VOUT); the main battery (VBAT1) is respectively connected to the source of the first PMOS transistor (Q2) and the gate of a first NMOS transistor (Q4), and the gate of the first NMOS transistor (Q4) is also grounded (GND) through a third resistor (R3). The source of the first NMOS transistor (Q4) is grounded (GND). The drain of the first NMOS transistor (Q4) is respectively connected to the gate of a second NMOS transistor (Q7), grounded (GND) through a fourth resistor (R4), and connected to the power output port (VOUT) through a fifth resistor (R5). The source of the second NMOS transistor (Q7) is grounded (GND). The drain of the second NMOS transistor (Q7) is respectively connected to the gate of a third PMOS transistor (Q5), the gate of a fourth PMOS transistor (Q6), and the power output port (VOUT) through a sixth resistor (R6); the backup battery (VBAT2) is connected to the source of the third PMOS transistor (Q5). The drain of the third PMOS transistor (Q5) is connected to the drain of the fourth PMOS transistor (Q6). The source of the fourth PMOS transistor (Q6) is connected to the power output port (VOUT).

2. The multi-power-input autonomous switching circuit according to claim 1, characterized in that, The resistance values of the second resistor (R2), the third resistor (R3), the fourth resistor (R4), the fifth resistor (R5), and the sixth resistor (R6) are all 10 kΩ.

3. The multi-power-input autonomous switching circuit according to claim 1, wherein The capacity of the main battery (VBAT1) is larger than that of the backup battery (VBAT2).

4. The multi-power-input autonomous switching circuit according to claim 1, characterized in that The power output port (VOUT) is used to supply power to the backend circuit, taking power from the power supply with a higher priority first. First, the external power supply (VIN) is used, followed by the main battery (VBAT1) with a larger capacity, and finally the backup battery (VBAT2) with a smaller capacity.

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