Four-channel germanium-silicon photodiode receiving array chip
By employing a four-channel germanium-silicon photodiode receiver array chip in the 400G DR4 optical module and integrating the four-channel photodiode array using silicon photonic monolithic integration technology, the problems of high cost, low production efficiency and low yield in the existing technology have been solved, achieving cost reduction and efficiency improvement.
Patent Information
- Application Number
- CN202423233134.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-26
- Publication Date
- 2026-03-17
- Estimated Expiration
- 2034-12-26
AI Technical Summary
The existing 400G DR4 optical module uses four separate photodiodes, which leads to high cost, low production efficiency and low yield.
A four-channel germanium-silicon photodiode receiver array chip is adopted, which integrates a four-channel photodiode array on a silicon-based chip using silicon photonic monolithic integration technology, replacing the four separate photodiodes in the traditional solution.
This significantly reduced the cost of optical modules and improved production efficiency and yield.
Smart Images
Figure CN224007018U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of optical module technology, specifically to a four-channel germanium-silicon photodiode receiver array chip. Background Technology
[0002] The existing 400G DR4 optical module uses four separate photodiodes, which has problems such as high cost, low production efficiency and low yield. Summary of the Invention
[0003] The purpose of this application is to provide a four-channel germanium-silicon photodiode receiver array chip to solve the problems of high cost, low production efficiency and low yield in the existing 400G DR4 optical module which uses four separate photodiodes.
[0004] To achieve the above objectives, this application provides a four-channel germanium-silicon photodiode receiver array chip, comprising: an optical input port I1 and a photodiode PD1, wherein...
[0005] The optical input port I1 is connected to the optical receiving end of the photodiode PD1, and the electrical output end of the photodiode PD1 is connected to the PD1+ and PD1- terminals provided on the chip, respectively.
[0006] Optionally, it also includes:
[0007] The optical input port I2 and the photodiode PD2 are connected. The optical input port I2 is connected to the optical receiving end of the photodiode PD2, and the electrical output end of the photodiode PD2 is connected to the PD2+ and PD2- terminals set on the chip, respectively.
[0008] Optionally, it also includes:
[0009] The optical input port I3 and the photodiode PD3 are connected. The optical input port I3 is connected to the optical receiving end of the photodiode PD3, and the electrical output end of the photodiode PD3 is connected to the PD3+ and PD3- terminals set on the chip, respectively.
[0010] Optionally, it also includes:
[0011] The optical input port I4 and the photodiode PD4 are connected. The optical input port I4 is connected to the optical receiving end of the photodiode PD4, and the electrical output end of the photodiode PD4 is connected to the PD4+ and PD4- terminals set on the chip, respectively.
[0012] Optionally, the optical input ports I1, I2, I3, and I4 are all edge couplers set on the chip.
[0013] The embodiments of this application have the following advantages:
[0014] Compared with existing technologies, the four-channel germanium-silicon photodiode receiver array chip provided by the above technical solution is suitable for 400G DR4 optical modules. It uses silicon photonic monolithic integration technology to integrate a four-channel photodiode (PD) array on a silicon-based chip, replacing the current traditional solution that uses four separate photodiodes, which significantly reduces the cost of optical modules and improves production efficiency and yield. Attached Figure Description
[0015] To more clearly illustrate the embodiments of this application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are merely exemplary, and those skilled in the art can derive other embodiments based on the provided drawings without creative effort.
[0016] Figure 1 A circuit structure block diagram of a four-channel germanium-silicon photodiode receiver array chip provided for at least one embodiment of this application. Detailed Implementation
[0017] The following specific embodiments illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0018] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Unless otherwise expressly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; and they can refer to the internal communication of two elements. For those skilled in the art, the specific meaning of the above terms in this application can be understood according to the specific circumstances.
[0019] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.
[0020] This application provides a four-channel germanium-silicon photodiode receiver array chip, referenced... Figure 1 ,include:
[0021] Optical input port I1, photodiode PD1, wherein,
[0022] The optical input port I1 is connected to the optical receiving end of the photodiode PD1, and the electrical output end of the photodiode PD1 is connected to the PD1+ and PD1- terminals provided on the chip, respectively.
[0023] In some embodiments, it also includes:
[0024] The optical input port I2 and the photodiode PD2 are connected. The optical input port I2 is connected to the optical receiving end of the photodiode PD2, and the electrical output end of the photodiode PD2 is connected to the PD2+ and PD2- terminals set on the chip, respectively.
[0025] In some embodiments, it also includes:
[0026] The optical input port I3 and the photodiode PD3 are connected. The optical input port I3 is connected to the optical receiving end of the photodiode PD3, and the electrical output end of the photodiode PD3 is connected to the PD3+ and PD3- terminals set on the chip, respectively.
[0027] In some embodiments, it also includes:
[0028] The optical input port I4 and the photodiode PD4 are connected. The optical input port I4 is connected to the optical receiving end of the photodiode PD4, and the electrical output end of the photodiode PD4 is connected to the PD4+ and PD4- terminals set on the chip, respectively.
[0029] In some embodiments, optical input port I1, optical input port I2, optical input port I3, and optical input port I4 are all edge couplers disposed on the chip.
[0030] In summary, compared with the prior art, the four-channel germanium-silicon photodiode receiver array chip provided in this application is suitable for 400G DR4 optical modules. It uses silicon photonic monolithic integration technology to integrate a four-channel photodiode (PD) array on a silicon-based chip, replacing the current traditional solution that uses four separate photodiodes, significantly reducing the cost of optical modules and improving production efficiency and yield.
[0031] Note that, unless otherwise explicitly stated, all features disclosed in this specification (including any appended claims, abstract, and drawings) may be replaced by alternative features for achieving the same, equivalent, or similar purpose. Therefore, unless explicitly stated otherwise, each disclosed feature is merely one example of a set of equivalent or similar features. Where used, "further," "preferably," "even further," and "more preferably" are simple starting points for describing another embodiment based on the foregoing embodiments, the combination of which with the foregoing embodiments constitutes the complete configuration of another embodiment. Any combination of several "further," "preferably," "even further," or "more preferably" settings following the same embodiment constitutes yet another embodiment.
[0032] In the implementation of functions and steps, the corresponding functions and steps in the various embodiments may occur in a different order than those shown. For example, two consecutive functions and steps may actually be executed or implemented substantially in parallel, and they may sometimes be executed or implemented in reverse order, depending on the functions involved.
[0033] Although this application has been described in detail above with general descriptions and specific embodiments, some modifications or improvements can be made to it, which will be obvious to those skilled in the art. Therefore, all such modifications or improvements made without departing from the spirit of this application fall within the scope of protection claimed in this application.
Claims
1. A quad-channel GeSi photodiode receiving array chip, characterized by, Comprise: An optical input port I1, a photodiode PD1, wherein, The optical input port I1 is connected with the light receiving end of the photodiode PD1, and the electrical output end of the photodiode PD1 is respectively connected with the PD1+ end and the PD1- end arranged on the chip; Further comprise: An optical input port I2, a photodiode PD2, the optical input port I2 is connected with the light receiving end of the photodiode PD2, and the electrical output end of the photodiode PD2 is respectively connected with the PD2+ end and the PD2- end arranged on the chip; An optical input port I3, a photodiode PD3, the optical input port I3 is connected with the light receiving end of the photodiode PD3, and the electrical output end of the photodiode PD3 is respectively connected with the PD3+ end and the PD3- end arranged on the chip; An optical input port I4, a photodiode PD4, the optical input port I4 is connected with the light receiving end of the photodiode PD4, and the electrical output end of the photodiode PD4 is respectively connected with the PD4+ end and the PD4- end arranged on the chip; The optical input port I1, the optical input port I2, the optical input port I3 and the optical input port I4 are all edge couplers arranged on the chip.