GENLOCK control circuit and device
CN224289865UActive Publication Date: 2026-05-26SHENZHEN MAITUOSI ELECTRONIC INFORMATION TECH CO LTD
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Patent Information
- Application Number
- CN202521162461.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-06
- Publication Date
- 2026-05-26
- Estimated Expiration
- 2035-06-06
AI Technical Summary
Technical Problem
Existing GENLOCK control circuits require multiple chips for processing, resulting in mediocre performance. They are also susceptible to interference in electrostatic and electromagnetic environments, have difficult power supply issues, cannot expand clock output, and are costly.
Method used
The control circuit, consisting of a super sync splitter, MCU module, and sync phase-locked loop chip, includes a SYNC-IN input, video amplifier, and clock driver to generate video and audio clocks and support multi-device synchronization.
Benefits of technology
It achieves flexible digital control, reduces design complexity, saves space, generates multiple clock signals, supports multi-device synchronization, and avoids screen tearing and time misalignment.
✦ Generated by Eureka AI based on patent content.
Smart Images
Figure CN224289865U_ABST
Abstract
The utility model relates to a GENLOCK control circuit and a GENLOCK control device. The GENLOCK control circuit comprises an SYNC-IN input end, a super synchronous separator, an MCU (Microprogrammed Control Unit) module and a synchronous phase-locked chip, the input end of the super synchronous separator is connected with the SYNC-IN input end, and the output end of the super synchronous separator is connected with the input end of the synchronous phase-locked chip; the MCU module is connected with the input end of the synchronous phase-locked chip; the utility model provides a highly flexible and digitally controlled GENLOCK control circuit, the adopted chip is very concise in structure, a plurality of VCXOs, PLLs and timing generators are replaced, the design complexity is reduced, the space of a circuit board is saved, video and audio clocks and timing signals can be generated, and a plurality of devices are allowed to carry out genlock with an input reference.
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