Packaging structure, chip module, and electronic device
Patent Information
- Application Number
- CN202522029835.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-19
- Publication Date
- 2026-09-11
- Estimated Expiration
- 2035-09-19
AI Technical Summary
但随着芯片功耗密度攀升,而并排封装结构的散热路径冗长、热耦合效应显著,导致芯片局部温度过高而导致其性能下降,这不利于提高电子设备的可靠性
[0022]该封装结构使用时,利用散热层能够增大第一芯片的散热面积,提高第一芯片的散热性能,避免第一芯片局部过热而影响封装结构的整体性能。如此,该封装结构具有良好的散热性能,能够保证其长期使用的稳定性,进而能够提高芯片模组以及电子设备的可靠性。
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Figure CN224746924U_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of electronic device technology, and in particular to a packaging structure, a chip module, and an electronic device. Background Technology
[0002] Mobile phones, tablets, smartwatches, electric vehicles, and other electronic devices have become indispensable technological products in people's lives, studies, and entertainment. With the development of electronic devices, they integrate more and more functions, requiring the use of different chips for control.
[0003] In related technologies, side-by-side multi-chip packaging structures are widely used in power module chips, AI chips, 5G communication chips, and other fields due to their flexible layout and strong compatibility. However, as chip power density increases, the heat dissipation path of side-by-side packaging structures is lengthy and the thermal coupling effect is significant, leading to excessively high local temperatures on the chip and resulting in performance degradation, which is detrimental to improving the reliability of electronic devices. Utility Model Content
[0004] This disclosure provides a packaging structure, a chip module, and an electronic device. The packaging structure has good heat dissipation performance, ensuring its long-term stability and thus improving the reliability of the chip module and the electronic device.
[0005] The technical solution is as follows:
[0006] According to one aspect of the present disclosure, a packaging structure is provided, including a redistribution layer, a first chip, a second chip, a heat dissipation layer, and an insulating layer. The first chip includes a first active surface electrically connected to the redistribution layer and a first non-active surface disposed opposite to the first active surface along the thickness direction of the first chip. The second chip is electrically connected to the redistribution layer and is disposed on the redistribution layer at a distance from the first chip. The heat dissipation layer is fixedly disposed on the first non-active surface. The insulating layer is fixedly connected to the redistribution layer and encapsulates at least a portion of the first chip, the second chip, and the heat dissipation layer.
[0007] The technical solution of this disclosure will be further explained below:
[0008] In one embodiment, a portion of the heat dissipation layer is exposed outside the insulating layer.
[0009] In one embodiment, the heat dissipation layer is embedded within the insulating layer.
[0010] In one embodiment, the heat dissipation layer includes a heat sink that is thermally coupled to a first non-active surface.
[0011] In one embodiment, the heat dissipation layer includes a plurality of heat dissipation protrusions spaced apart on the first non-active surface, the heat dissipation protrusions being in thermal contact with the first non-active surface.
[0012] In one embodiment, at least a portion of the heat dissipation layer is thermally coupled to the second chip.
[0013] And / or, the second chip includes at least two chips, which are spaced apart along the outer edge of the first chip.
[0014] In one embodiment, a portion of the insulating layer is sandwiched between the first active surface and the redistribution layer, and the first chip further includes a first conductive bump fixed to the first active surface, the first active surface being electrically connected to the redistribution layer through the first conductive bump.
[0015] And / or, the second chip includes a second active surface electrically connected to the redistribution layer and a second non-active surface disposed opposite to the second active surface along the thickness direction of the second chip; a portion of the insulating layer is sandwiched between the second active surface and the redistribution layer, and the second chip also includes a second conductive protrusion fixed to the second active surface, the second active surface being electrically connected to the redistribution layer through the second conductive protrusion.
[0016] And / or, the redistribution layer is provided with a third conductive protrusion, which is exposed on the outside of the insulating layer.
[0017] In one embodiment, the encapsulation structure includes a thermally conductive adhesive sandwiched between a first non-active surface and a heat dissipation layer, wherein the heat dissipation layer is fixed to the first non-active surface by the thermally conductive adhesive.
[0018] In one embodiment, the thermally conductive adhesive includes one of DAF film, graphene, and thermally conductive interface adhesive.
[0019] According to another aspect of the present disclosure, a chip module includes the packaging structure of any of the above embodiments.
[0020] According to another aspect of the embodiments of this disclosure, an electronic device is also provided, including a housing assembly. The electronic device further includes the packaging structure from any of the above embodiments, the packaging structure being disposed on the housing assembly. And / or, the electronic device further includes the chip module from the above embodiments, the chip module being disposed on the housing assembly.
[0021] The technical solutions provided by the embodiments of this disclosure may include the following beneficial effects:
[0022] When this packaging structure is used, the heat dissipation layer increases the heat dissipation area of the first chip, improving its heat dissipation performance and preventing localized overheating of the first chip from affecting the overall performance of the packaging structure. Thus, this packaging structure has excellent heat dissipation performance, ensuring its long-term stability and thereby improving the reliability of the chip module and electronic devices.
[0023] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description
[0024] The accompanying drawings, which form part of this disclosure, are used to provide a further understanding of this disclosure. The illustrative embodiments of this disclosure and their descriptions are used to explain this disclosure and do not constitute an undue limitation of this disclosure.
[0025] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0026] Figure 1 This is a schematic diagram of the structure of an electronic device shown in one embodiment.
[0027] Figure 2 for Figure 1 The diagram shows a half-section of the packaging structure.
[0028] Figure 3 This is a half-sectional schematic diagram of the packaging structure shown in another embodiment.
[0029] Figure 4 This is a half-sectional schematic diagram of the packaging structure shown in another embodiment.
[0030] Figure 5 This is a schematic diagram of the hardware structure of an electronic device in another embodiment.
[0031] Explanation of reference numerals in the attached figures:
[0032] 1. Electronic device; 11. Processing component; 12. Memory; 13. Power supply component; 14. Multimedia component; 15. Audio component; 16. Input / output interface; 17. Sensor component; 18. Communication component; 10. Housing component; 20. Packaging structure; 100. Redistribution layer; 110. Third conductive bump; 200. First chip; 210. First active surface; 220. First non-active surface; 230. First conductive bump; 300. Second chip; 310. Second active surface; 320. Second non-active surface; 330. Second conductive bump; 400. Heat dissipation layer; 410. Heat dissipation bump; 500. Insulating layer; 600. Thermally conductive adhesive. Detailed Implementation
[0033] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative and do not limit the scope of protection of this disclosure.
[0034] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of this disclosure.
[0035] For ease of understanding and explanation, some of the terms and technical terms that appear in the embodiments below this specification are explained.
[0036] The redistribution layer (RDL) is used to redistribute the input / output (I / O) signal connection locations of the chip to adapt to packaging requirements.
[0037] Die Attach Film (DAF) is a solid adhesive film that achieves bonding through heat curing.
[0038] like Figures 1 to 3 As shown, in an embodiment of this disclosure, an electronic device 1 is provided, including a housing assembly 10 and an encapsulation structure 20, wherein the encapsulation structure 20 is disposed on the housing assembly 10.
[0039] The packaging structure 20 includes a redistribution layer 100, a first chip 200, a second chip 300, a heat dissipation layer 400, and an insulating layer 500. The first chip 200 includes a first active surface 210 electrically connected to the redistribution layer 100 and a first non-active surface 220 disposed opposite to the first active surface 210 along the thickness direction of the first chip 200. The second chip 300 is electrically connected to the redistribution layer 100 and is disposed at a distance from the first chip 200 on the redistribution layer 100. The heat dissipation layer 400 is fixed to the first non-active surface 220. The insulating layer 500 is fixedly connected to the redistribution layer 100 and encapsulates at least a portion of the first chip 200, the second chip 300, and the heat dissipation layer 400.
[0040] When in use, the heat dissipation layer 400 of the packaging structure 20 increases the heat dissipation area of the first chip 200, improves the heat dissipation performance of the first chip 200, and prevents local overheating of the first chip 200 from affecting the overall performance of the packaging structure 20. Thus, the packaging structure 20 has excellent heat dissipation performance, ensuring its long-term stability and thereby improving the reliability of the electronic device 1.
[0041] Furthermore, by encapsulating the first chip and the second chip in the redistribution layer 100 through the insulating layer 500, the protection performance of the first chip and the second chip can be improved.
[0042] It should be noted that the insulating layer 500 may be made of materials including but not limited to waterproof silicone, waterproof adhesive, waterproof insulating adhesive, UV adhesive, UF adhesive, etc., and may encapsulate the first chip 200, the second chip 300, and at least part of the heat dissipation layer 400 in various ways, such as hot melt curing, coating, injection molding, etc.
[0043] Optionally, the first chip 200 is a main chip SOC (System on a Chip). The second chip 300 is a multi-functional chip such as a memory chip DRAM (Dynamic Random Access Memory).
[0044] In some embodiments, at least two second chips are provided and spaced apart along the outer edge of the first chip. This allows multiple second chips to be integrated onto a redistribution layer and to cooperate with the first chip to achieve various functions.
[0045] In one example, the insulating layer 500 encapsulates the first chip 200, the second chip 300, and at least a portion of the heat dissipation layer 400 within the redistribution layer 100 via injection molding. This provides protection while also improving the regularity of the encapsulation structure 20 and facilitating assembly.
[0046] like Figure 2 As shown, in some embodiments, a portion of the heat dissipation layer 400 is exposed outside the insulating layer 500. This facilitates the radiation of heat generated by the first chip 200 to the outside of the package structure 20 through the heat dissipation layer 400, thereby improving its heat dissipation efficiency.
[0047] Optionally, the heat dissipation layer 400 can be thermally coordinated with other heat dissipation devices of other electronic devices 1 (such as heat spreaders, loop heat pipes, cooling fans, etc.) to further improve the heat dissipation efficiency of the packaging structure 20.
[0048] like Figure 3 As shown, in some embodiments, the heat dissipation layer 400 is embedded within the insulating layer 500. This improves the sealing performance of the package structure 20.
[0049] like Figure 2 As shown, in some embodiments, the heat dissipation layer 400 includes a heat sink, which is thermally connected to the first non-active surface 220. The heat sink includes a metal heat sink or a graphene heat sink, etc., which has good heat dissipation performance and improves the heat dissipation performance of the packaging structure 20.
[0050] In some embodiments, the heat sink also includes a heat-dissipating silicon wafer.
[0051] like Figure 3 As shown, in some embodiments, the heat dissipation layer 400 includes a plurality of heat dissipation protrusions 410 spaced apart on the first non-active surface 220, and the heat dissipation protrusions 410 are in thermally conductive contact with the first non-active surface 220. Thus, the use of multiple heat dissipation protrusions 410 can also improve the heat dissipation performance of the first chip, allowing for flexible selection of the implementation method of the heat dissipation layer 400 to meet different needs.
[0052] Optional features include heat dissipation protrusions 410, such as metal heat sinks and graphene heat sinks.
[0053] In some embodiments, at least a portion of the heat dissipation layer 400 is thermally connected to the second chip 300. Thus, the heat dissipation layer can also improve the heat dissipation performance of the second chip 300.
[0054] like Figures 2 to 4 As shown, in some embodiments, a portion of the insulating layer 500 is sandwiched between the first active surface 210 and the redistribution layer 100. The first chip 200 also includes a first conductive bump 230 fixed to the first active surface 210, and the first active surface 210 is electrically connected to the redistribution layer 100 through the first conductive bump 230. Thus, the first active surface 210 is electrically connected to the redistribution layer 100 through the first conductive bump 230, allowing the first chip 200 to be better insulated and encapsulated within the insulating layer 500, while simultaneously utilizing the first conductive bump 230 to electrically connect to the redistribution layer 100.
[0055] like Figures 2 to 4 As shown, in some embodiments, the second chip 300 includes a second active surface 310 electrically connected to the redistribution layer 100 and a second non-active surface 320 disposed opposite to the second active surface 310 along the thickness direction of the second chip 300; a portion of the insulating layer 500 is sandwiched between the second active surface 310 and the redistribution layer 100, and the second chip 300 also includes a second conductive protrusion 330 fixed to the second active surface 310, the second active surface 310 being electrically connected to the redistribution layer 100 through the second conductive protrusion 330. Thus, the second active surface 310 being electrically connected to the redistribution layer 100 through the second conductive protrusion 330 allows the second chip 300 to be better insulated and encapsulated within the insulating layer 500, while simultaneously enabling electrical connection to the redistribution layer 100 via the second conductive protrusion 330.
[0056] Optionally, the heat dissipation layer 400 is thermally conductively coupled with the second non-active surface 320. This can further improve the heat dissipation performance of the second chip 300.
[0057] In some embodiments, the redistribution layer 100 is provided with a third conductive protrusion 110, which is exposed on the outside of the insulating layer 500. Thus, the package structure 20 facilitates electrical connection with electronic components of other electronic devices 1 via the third conductive protrusion 110.
[0058] like Figure 4 As shown, in some embodiments, the encapsulation structure 20 includes a thermally conductive adhesive 600 sandwiched between the first non-active surface 220 and the heat dissipation layer 400, with the heat dissipation layer 400 fixed to the first non-active surface 220 by the thermally conductive adhesive. Thus, the thermally conductive adhesive 600 can both improve the thermal conductivity between the first non-active surface 220 and the heat dissipation layer 400 and fix the heat dissipation layer 400 to the first non-active surface 220.
[0059] In some embodiments, the thermally conductive adhesive 600 includes a DAF film, graphene, thermally conductive interface adhesive, etc.
[0060] It should be noted that "thermal conductive mating" includes direct contact to achieve heat conduction, or indirect contact through thermally conductive interface materials to achieve heat conduction, as long as it can improve the heat dissipation performance of the chip.
[0061] The electronic devices disclosed herein include ranging devices, scanning devices, shooting devices, handheld devices, vehicle-mounted devices, wearable devices, monitoring devices, cellular phones, smartphones, personal digital assistant computers, tablet computers, laptop computers, camcorders, video recorders, cameras, vehicle-mounted computers, and other devices with video recording capabilities.
[0062] Reference Figure 5 As shown, in some embodiments, the electronic device 1 further includes at least one or more of the following components: a processing component 11, a memory 12, a power supply component 13, a multimedia component 14, an audio component 15, an input / output interface 16, a sensor component 17, and a communication component 18.
[0063] Processing components typically control the overall operation of electronic devices, such as operations associated with display, telephone calls, data communication, camera operation, and recording. A processing component includes at least one or more processors to execute instructions to complete all or part of the steps described above. Furthermore, a processing component includes at least one or more modules to facilitate interaction between the processing component and other components. For example, a processing component may include at least a multimedia module to facilitate interaction between multimedia components and the processing component.
[0064] The processing components include encapsulation structures.
[0065] Memory is configured to store various types of data to support the operation of electronic devices. Examples of this data include instructions for any application or method used to operate on the electronic device, contact data, phonebook data, messages, pictures, videos, etc. Memory can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory, read-only memory, magnetic storage, flash memory, disk, or optical disk.
[0066] Power supply components provide power to various components of electronic devices. A power supply component includes at least a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to electronic devices.
[0067] The multimedia component includes the display module of this disclosure, facilitating human-computer interaction. If the display module includes a touch panel, the display module can be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors can sense not only the boundaries of touch or swipe actions but also the duration and pressure associated with the touch or swipe operation. In some embodiments, the multimedia component includes a front-facing camera and / or a rear-facing camera. When the electronic device is in an operating mode, such as a shooting mode or a video mode, the front-facing camera and / or the rear-facing camera can receive external multimedia data. Each front-facing camera and rear-facing camera can be a fixed optical lens system or have focal length and optical zoom capabilities.
[0068] The audio component is configured to output and / or input audio signals. For example, the audio component includes a microphone (MIC) configured to receive external audio signals when the electronic device is in an operating mode, such as call mode, recording mode, or voice recognition mode. The received audio signals may be further stored in memory or transmitted via a communication component. In some embodiments, the audio component also includes a speaker for outputting audio signals.
[0069] The input / output interface provides an interface between the processing component and the peripheral interface module, which can be a keyboard, click wheel, buttons, etc. These buttons may include, but are not limited to: home button, volume buttons, start button, and lock button.
[0070] The sensor assembly includes one or more sensors for providing state assessments of various aspects of the electronic device. For example, the sensor assembly can detect the on / off state of the electronic device, the relative positioning of components such as the display and keypad of the electronic device, changes in the position of the electronic device or a component of the electronic device, the presence or absence of user contact with the electronic device, the orientation or acceleration / deceleration of the electronic device, and temperature changes of the electronic device. The sensor assembly includes at least a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly also includes at least a photosensitizing element, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly also includes at least an accelerometer, a gyroscope, a magnetometer, a pressure sensor, or a temperature sensor.
[0071] The communication component is configured to facilitate wired or wireless communication between electronic devices and other devices. The electronic device can access wireless networks based on communication standards, such as WiFi, 2G, 3G, 4G, or 6G, or combinations thereof. In one exemplary embodiment, the communication component receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, the communication component also includes a Near Field Communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID) technology, Infrared Data Association (IrDA) technology, Ultra-Wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.
[0072] In another embodiment, a chip module is provided, including the packaging structure of any of the above embodiments. When in use, this packaging structure utilizes a heat dissipation layer to increase the heat dissipation area of the first chip, improving the heat dissipation performance of the first chip and preventing localized overheating of the first chip from affecting the overall performance of the packaging structure. Thus, this packaging structure has excellent heat dissipation performance, ensuring its long-term stability and thereby improving the reliability of the chip module.
[0073] In some embodiments, the electronic device further includes the chip module described above and is disposed within the housing assembly.
[0074] In the description of this disclosure, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this disclosure.
[0075] Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first," "second," etc., may explicitly or implicitly include at least one of that feature. In the description of this disclosure, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0076] In this disclosure, unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this disclosure according to the specific circumstances.
[0077] In this disclosure, unless otherwise expressly specified and limited, "above" or "below" the second feature can mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.
[0078] It should be noted that when a component is referred to as "fixed to," "set on," "fixed to," or "mounted on" another component, it can be directly on the other component or there may be an intervening component. When a component is considered to be "connected" to another component, it can be directly connected to the other component or there may be an intervening component.
[0079] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0080] The above embodiments are merely illustrative of several implementation methods of this disclosure, and their descriptions are relatively specific and detailed. However, they should not be construed as limiting the scope of the utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the inventive concept of this disclosure, and these modifications and improvements all fall within the protection scope of this disclosure.
Claims
1. A package structure, characterized by, include: Redistribution layer; A first chip and a second chip, wherein the first chip includes a first active surface electrically connected to the redistribution layer and a first non-active surface disposed opposite to the first active surface along the thickness direction of the first chip, and the second chip is disposed at a distance from the first chip in the redistribution layer. A heat dissipation layer is fixed to the first non-active surface; as well as An insulating layer is fixedly connected to the redistribution layer and encapsulates at least a portion of the first chip, the second chip, and the heat dissipation layer.
2. The package structure of claim 1, wherein, A portion of the heat dissipation layer is exposed on the outside of the insulation layer.
3. The package structure of claim 1, wherein, The heat dissipation layer is embedded within the insulating layer.
4. The package structure of claim 1, wherein, The heat dissipation layer includes a heat sink, which is thermally connected to the first non-active surface.
5. The package structure of claim 4, wherein, The heat dissipation layer includes a plurality of heat dissipation protrusions spaced apart on the first non-active surface, and the heat dissipation protrusions are in thermal contact with the first non-active surface.
6. The package structure of claim 4, wherein, At least a portion of the heat dissipation layer is thermally connected to the second chip; And / or, the second chip includes at least two chips, which are spaced apart along the outer edge of the first chip.
7. The package structure of claim 4, wherein, A portion of the insulating layer is sandwiched between the first active surface and the redistribution layer. The first chip also includes a first conductive bump fixed to the first active surface, and the first active surface is electrically connected to the redistribution layer through the first conductive bump. And / or, the second chip includes a second active surface electrically connected to the redistribution layer and a second non-active surface disposed opposite to the second active surface along the thickness direction of the second chip; a portion of the insulating layer is sandwiched between the second active surface and the redistribution layer, and the second chip further includes a second conductive protrusion fixed to the second active surface, the second active surface being electrically connected to the redistribution layer through the second conductive protrusion; And / or, the redistribution layer is provided with a third conductive protrusion, which is exposed on the outside of the insulating layer.
8. The package structure of any one of claims 1 to 7, wherein, The encapsulation structure includes a thermally conductive adhesive sandwiched between the first non-active surface and the heat dissipation layer, wherein the heat dissipation layer is fixed to the first non-active surface by the thermally conductive adhesive.
9. The package structure of claim 8, wherein, The thermally conductive adhesive includes one of DAF film, graphene, and thermally conductive interface adhesive.
10. A chip module, characterized by Includes the packaging structure described in any one of claims 1 to 9.
11. An electronic device, comprising: The electronic device includes a housing assembly; the electronic device further includes a packaging structure as described in any one of claims 1 to 9, the packaging structure being disposed on the housing assembly; and / or, the electronic device further includes a chip module as described in claim 10, the chip module being disposed on the housing assembly.