Circuit and method for optimizing the dynamic range in a digital-to-analog signal path

Abstract

Circuit for maximizing the dynamic range in a digital-to-analog signal path (100; 200; 300; 400), comprising: a. an input for receiving an input signal (110; 201; 301; 401); b. a first gain stage (120; 210; 330; 445) coupled to the input, the first gain stage (120; 210; 330; 445) having a first gain setting; c. a second gain stage (140; 230; 370; 460) coupled to the first gain stage (120; 210; 330; 445), the second gain stage (140; 230; 370; 460) having a second gain setting, the second gain stage (140; 230; 370; 460) having an analog gain stage and the second gain setting having an analog gain setting; d. a controller (150; 250; 320; 420) for dynamically selecting the first gain setting to maximize the first gain setting without clipping the input signal and for selecting the second gain setting to achieve a desired signal path gain; and e. an output coupled to the second gain stage (140; 230; 370; 460) for transmitting an output signal (235) having the desired overall signal path gain.

Description

Field of the invention

[0001] The present invention relates to the field of integrated circuits. In particular, the invention relates to integrated circuits having a digital-to-analog signal path. Background of the invention

[0002] Dynamic range is an important metric in an integrated circuit or system that has a digital-to-analog signal path. An example of such a circuit or system is a digital audio playback device such as an MP3 player, CD player, or mobile phone. Such playback devices have facilities, described below, for converting digitally stored or transmitted data into a usable analog signal. Dynamic range (dB) is the ratio between the smallest and largest possible values ​​of a variable quantity, such as an audio signal amplitude. Dynamic range is typically measured as a ratio, such as a logarithmic value to base 10 (decibels) or a logarithmic value to base 2 (doubles, bits, or stops); in most electrical systems that include digital audio playback, the decibel measure is the standard.For example, a 16-bit audio CD has a theoretical dynamic range of approximately 96 dB. Digital audio with 20-bit digitization is capable of a dynamic range of approximately 120 dB; and similarly, 24-bit digital audio is designed for a dynamic range of approximately 144 dB. In audio playback systems, it is common practice to measure dynamic range dB as the total harmonic distortion plus noise (THD+N) relative to the full scale with a -60 dB input signal. Furthermore, approximate theoretical maximum dynamic range values ​​are sometimes calculated relative to a full Nyquist frequency-bandwidth measurement. In some measurement techniques, the measured bandwidths are reduced from the Nyquist rate to an audible bandwidth, resulting in an increase in the stated dynamic range value.The frequency spectrum of the measured output can also be modified using industry-standard filters that can alter the dynamic range. For example, some measurement techniques filter an output through an A-weighted filter that approximates the perceptual behavior of the human ear.

[0003] Traditionally, digital audio recording and playback chains include input and output converters and associated analog circuitry, which can result in extremely limiting practical dynamic range below the theoretical optimum. The observed dynamic range of 16-bit digital audio can be significantly lower, even 90 dB or less, if multiple circuits in the audio path each contribute integrated noise at the -96 dB level. Dynamic range measurement is a valuable indicator of signal quality when the desired signal level is low. In an audio example, quiet music or music played at room volume may suffer more from the effects of poor dynamic range than loud music.

[0004] Fig. Figure 1 shows a prior art digital-to-analog signal path 100 that may have limited dynamic range performance. Digital input data 110 is coupled to a digital gain block 120. The digital input data 110 may be a digital transmission received from an antenna, it may be stored digital data in a memory, or it may be any other digital input source. It is important to note that the digital source need not be limited to audio data, but may be any type of quantized or digital information. In practice, the digital input data 110 is modeled as a combination of the digital input data 110 and the inherent quantization noise 112 due to the quantized nature of the signal. Fig. 1, the quantization noise 112 is shown being added to the digital input data 110, but it is important to note that no physical adder 115 exists. Rather, the adder 115 simply represents the addition of unavoidable quantization noise 112. The digital gain 120 controls the gain of the overall signal while it is still in a digital state. Typical signal sources for providing digital input data 110 can come from a deserialized I2S (Inter-IC Sound) bus, can be a deframed SPDIF signal source, or can be a time-domain reconstituted signal from a source in a compressed MP3 format. The source data is typically interpolated to improve the quality of the transient signal.Digital gain 120 controls the gain of the entire signal while it is still in a digital state, typically by manipulation using a common digital multiplier. Excessive digital gain can cause overflow in the digital code, which would typically be clip-limited, and will undesirably degrade large-amplitude signals.

[0005] The amplified or attenuated digital signal from the digital gain block 120 is then passed to a digital-to-analog converter (DAC) 130 for conversion to an analog signal. Each DAC effectively introduces additional noise into the signal, where the noise may be input-related or output-related, depending on convenience and convention. Fig. 1, DAC input-referred noise 122 is shown added to the output of digital gain 120. Again, there is no physical adder 125; rather, this only serves to represent the noise that is introduced into the signal path. The output of DAC 130 is coupled to driver and analog gain 140, which also has some amount of input-referred noise 132. Adder 135 simply represents even more noise being introduced into the system. It is important to note that not all prior art includes both digital gain 120 and analog gain control 140. Some systems may simply include one or the other, or neither. It is also important to note that signal path 100 is highly simplified, and many other components orComponents required by specific applications can be placed along signal path 100. For example, analog mixers are often placed between DAC 130 and driver and analog amplification 140, and each additional component will necessarily add further noise to the system. The overall gain of the signal path is controlled by a gain control 150, which can control both digital gain 120 and analog gain 140. Gain control 150, in turn, is controlled by a user control 152. An important distinction should be made between the user of the integrated circuit and the user of a finished product.The user of the integrated circuit in which this signal path is found (for example, an audio codec or a processor) is most likely an audio device manufacturer, such as Apple® in the manufacture of its widely popular iPod®, or some other conceivable manufacturer. Such a user designs a system in which, for example, an end user or the iPod® user is able to manipulate the volume as desired. Generally, the manufacturer's system allows the end user to manipulate one or both of the gains with a single control input. Generally, an end user cannot manipulate the digital gain 120 and the driver and analog gain 140 separately because end users prefer a single gain control (gain knob) for simplicity and convenience.When an end user manipulates the volume control on their audio device, the gain control 150, as designed by the manufacturer, simply adds a gain in the digital domain to the digital gain 120 and / or in the analog domain to the audio gain 140. However, such a system does nothing to improve the dynamic range, especially for small signals (low-level signals). In prior art solutions, the noise contributions of the multiple modules in the signal path require better noise performance from each of the modules. But better-quality, lower-noise modules require larger chip size and more power. Chip size is the largest cost component in an integrated circuit, and increased power is undesirable for manufacturers of portable electronic devices, for whom battery life is of paramount concern.Furthermore, the integrated circuit industry as a whole is extremely cost-driven, and increased costs associated with larger chip sizes are undesirable. Relevant disclosures in this regard can be found in documents US 7,468,687 B2, US 6,956,919 B2, and US 7,659,707 B2. It is known from US 7,468,687 B2 that, in order to avoid an erroneous dynamic range due to error dispersion in a D / A and an A / D converter, a gain value is set such that the minimum error range of the D / A converter is greater than the maximum error range of the A / D converter. Furthermore, a signal is amplified such that it is recognized as the maximum value in a DSP before it is passed to a second amplifier unit for further amplification. US 6 956 919 B2 discloses methods and apparatus for receiving a DSD bit stream in phase-modulated mode using a single clock signal, optionally using a bit clock or a phase clock.The receiving circuit generates an internal signal that reliably indicates when the bits in the DSD data stream are stable and can be read. US Pat. No. 7,659,707 B2 discloses an RF detector with two outputs for determining the true RMS value and the normalized peak value of an RF input signal. The detector comprises a variable-gain detection system with a common detector or detector array. By selecting and averaging representations of the signal at different amplifications, a statement about the average power of the RF signal is made. Summary of the invention

[0006] A novel circuit and method for increasing dynamic range without significantly increasing power consumption or chip size is provided. A digital signal level detector determines when the digital gain should be adjusted to maximize digital gain for lower-amplitude input signals, while avoiding the aforementioned clipped condition that causes severe signal degradation when converting large-amplitude input signals. In addition to the digital signal level detector, a dynamic gain controller is introduced that automatically adjusts the gain settings of an analog gain and a digital gain with respect to each other.The dynamic gain control selectively minimizes the analog gain and thereby minimizes the associated noise for all blocks in the signal path, while simultaneously maximizing the digital gain so that the overall gain as set by an end user is not affected.

[0007] In one aspect of the invention, a circuit for maximizing dynamic range in a digital-to-analog signal path comprises an input for receiving an input signal; a first gain stage coupled to the input, the first gain stage having a first gain setting; a second gain stage coupled to the first gain stage, the second gain stage having a second gain setting; a controller for dynamically selecting the first gain setting to maximize the first gain setting without clipping the input signal and for selecting the second gain setting to achieve a desired signal path gain; and an output coupled to the second gain stage for transmitting an output signal having the desired overall signal path gain.Preferably, the first gain stage comprises a digital gain stage, and the first gain setting comprises a digital gain setting for use by a multiplier gain stage. In some embodiments, the first gain stage comprises a digital-to-analog converter, and the digital gain setting comprises a feedback change in the digital-to-analog converter. And, the second gain stage comprises an analog gain stage, and the second gain setting comprises an analog gain setting. The analog gain may be implemented in any number of different known, convenient, or application-specific ways, such as as discrete gain steps or as an analog matched gain.

[0008] The circuit for maximizing the dynamic range in a digital-to-analog signal path also includes an input signal detector for detecting a level of the input signal. The input signal detector can be any convenient or application-specific detector, such as an RMS level detector, a peak level detector, a clip detector, an average level detector, or the like. The circuit also includes a user gain setting coupled to the controller. The user gain will determine the signal path gain, which is the summation of the first and second gains. The dynamic gain control will maximize the digital gain and minimize the analog gain within the constraints of the signal path gain set by the user and will prevent signal clipping in the first gain stage.In some embodiments, the controller will delay the application of the second gain setting relative to the application of the first gain setting to compensate for signal path delays between the first gain stage and the second gain stage. The controller will adjust the first gain setting and the second gain setting only when an input signal level is below a specified threshold for a specified period of time.

[0009] In another aspect of the invention, a method for maximizing dynamic range in a digital-to-analog signal path comprises acquiring a digital input signal and a desired user gain level, applying a first gain to the digital input signal, converting the digital input signal to an analog signal, and applying a second gain to the analog signal, wherein the first gain and the second gain are selectively and inversely manipulated according to the digital input signal while maintaining the desired user gain level. Preferably, applying a first gain to the digital input signal can be performed with sufficiently small incremental changes such that immediate changes are imperceptible to the listener.In other embodiments, the method includes detecting a zero crossing in the digital signal such that the gain levels are adjusted when the signal is very small to minimize signal path disturbances caused by the gain changes. The second gain may be adjusted based on the digital zero crossing detection or an analog zero crossing detection circuit. In some embodiments, applying a first gain includes changing a gain setting of a feedback loop in a digital-to-analog converter. Dynamic volume control may include attack, decay, and hold controls to minimize the perceptibility of the gain change behavior. Short description of the drawings: Fig. Figure 1 shows a digital-to-analog signal path according to the prior art. Fig. 2 shows a digital-to-analog signal path according to an embodiment of the present disclosure. Fig. 3 shows a digital-to-analog signal path according to another embodiment of the present disclosure. Fig. 4 shows a digital-to-analog signal path according to another embodiment of the present disclosure. Fig. Figure 5 shows a method for maximizing the dynamic range in a digital-to-analog signal path. Detailed description of the drawings

[0010] Reference will now be made in detail to embodiments of a method and apparatus for dynamic range optimization according to the invention, examples of which are illustrated in the accompanying drawings. Although the invention will be described in connection with the embodiments set forth below, it will be understood that these are not intended to limit the invention to these embodiments and examples. On the contrary, the invention is intended to cover alternatives, modifications, and equivalents that may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the present invention, numerous specific details are set forth in order to more fully illustrate the present invention.However, it will be apparent to one of ordinary skill in the art that the present invention may be practiced without these specific details. In other instances, well-known methods and procedures, components, and processes have not been described in detail so as not to unnecessarily obscure aspects of the present invention. It will, of course, be appreciated that in developing any such actual implementation, numerous implementation-specific decisions must be made to achieve the developer's specific goals, such as meeting application and business constraints, and that these specific goals will vary from one implementation to another and from one developer to another.Furthermore, it will be appreciated that such a development effort may be complex and time-consuming, but would nonetheless be a routine technical undertaking for those of ordinary skill in the art having the benefit of the present disclosure.

[0011] Fig. 2 shows a digital-to-analog signal path 200 according to one embodiment of the present disclosure. The digital input data 201 is coupled to a first gain. In this embodiment, the first gain comprises a digital gain 210. The digital input data 201 may originate from memory, be obtained through an antenna, through a wired connection, or may originate from any other device. The digital input data 201 may originate, for example, from I2S-encoded data, AC97-encoded data, SPDIF-encoded data, or from any other known or application-specific digital encoding scheme. The quantization noise 202 is illustrated as being introduced into the signal path 200 by an adder 203. The adder 203 is merely a representation of the inherent quantization noise 202 and is not physically embodied as a module within the signal path 200.Digital gain 210 is capable of manipulating the signal level of digital input data 201. As mentioned above, adding gain to digital input data 201 does not simply involve electrically amplifying a digital signal. Rather, the actual digital representation of the signal is digitally manipulated. One means for achieving a digital gain change is a digital multiplier function within digital gain 201. Setting a gain within digital gain 201 that is too high can cause either overflow or clipping, both of which are undesirable.It's important to note that the application of digital gain 210 is dynamic and therefore different from volume control, which happens to be digital, such as an I2C gain control, which merely controls signal path gain through a digital interface, such as an up / down switch. The output of digital gain 210 is coupled to a DAC 220.

[0012] As mentioned above, every DAW introduces noise, which can be input-related or output-related, depending on the convention. Fig. In Figure 2, the DAC noise is illustrated as DAC input-referenced noise 211 introduced into signal path 200 by an adder 212. Similarly, no physical adder 212 exists here, but it is shown to illustrate the introduction of DAC input-referenced noise 211. DAC 220 can be any known or custom DAC, such as a pulse-width modulator, a sigma-delta modulator, a Nyquist DAC, a binary-weighted DAC, an R-2R ladder DAC, a thermometer-coded DAC, or any other DAC. DAC 220 converts the amplified digital input data from digital gain module 210 into an analog signal. The level of the analog output signal of the DAW 220 is determined by a combination of the amplified digital input data level and the conversion gain of the DAW 220.It is important to note that the input-referred quantization noise 202 and the DAC input-referred noise 211 do not depend on the gain of the digital input data 201. Rather, they are each determined by the quantization level or bit depth of the digital input data 201 and the quality of the DAC. The output of the DAC 220 is coupled to the input of a second gain stage.

[0013] In the embodiment shown, the second gain stage is an analog gain 230. The noise contribution of the analog gain 230 is represented as a driver input-referred noise 221 introduced by an adder 222. Generally, the analog gain 230 is an amplifier or driver optimized for the audio band of analog signals between 20 Hz and 20 KHz, and a volume control, such as an I2C control line or a volume control pin. Regardless of the type of driver used, the noise in the analog output signal 235 increases as the gain setting of the analog gain 230 is increased because the total noise contributions (i.e., the quantization noise 203, the DAC input-referred noise 212, and the driver input-referred noise 221) increase as the gain of the analog gain 230 is increased.Therefore, it is desirable to maximize the signal magnitude early in the signal path to allow lower gain at the end of the signal path.

[0014] For this purpose, a dynamic gain control 250 is introduced. The dynamic gain control 250 maximizes the digital gain 210 without clipping the digital signal and minimizes the analog gain 230 while maintaining the overall desired gain of the signal path. The digital gain 210 is maximized and the analog gain 230 is minimized in the sense that a largest value for the digital gain level and a smallest value for the analog gain level are used to achieve the overall desired gain while still allowing headroom to prevent clipping. As used herein, the terms "maximize" and "minimize" in this context apply to digital gain and analog gain, respectively.The analog gain level is determined when the digital gain level is maximized for a given total desired signal path gain.

[0015] Generally, the desired volume is set by a user through a user volume interface 260. To assist the dynamic gain controller 250 in determining the optimal gain settings for the digital gain 210 and the analog gain 230, a digital signal level detector 240 is provided. The digital signal level detector 240 receives the digital input data 201 and determines the level in any convenient manner, such as by detecting a peak level, an RMS level, an average level, or any other known or application-specific metric. The digital signal level detector 240 is coupled to the dynamic gain controller 250 and transmits a detected level to the dynamic gain controller 250.As mentioned above, it is highly undesirable to increase the gain setting in the digital gain 210 to the point where the encoded data overflows or is clipped, thereby severely distorting the signal. The dynamic gain controller 250 is configured to receive the level of the digital input data 201 from the digital signal level detector 240 so that when it dynamically determines a gain setting for the digital gain 210, the gain setting will not cause the digitally encoded information to overflow or be clipped. As the gain setting of the digital gain 210 is increased, the gain setting of the analog gain is reduced. As the analog gain is reduced, the input-referred noise 221 and the input-referred noise 211 do not experience as much amplification.Therefore, small signals are restored with much greater fidelity. As a result, the dynamic range of the signal path 200 is improved. In prior art solutions, correct restoration of small signals required either a larger current or a larger chip size in the analog amplifier 230 and / or the DAC 220.

[0016] Preferably, the dynamic gain control 240 also receives a user gain setting from a user volume control 260. The user volume control 260 may, for example, be the volume knob or toggle on an MP3 player having the digital-to-analog signal path 200. In an alternative embodiment, the user volume control 260 may be a volume control pin assigned and fixed for a given implementation. The dynamic gain control 250 is configured to, in turn, minimize the gain setting of the analog gain 230 and maximize the gain setting of the digital gain 210, while simultaneously maintaining the desired overall output volume set by the user via the user volume control 260.Changing a gain setting introduces a step response into a system, such as digital-to-analog signal path 200. A step response may cascade through signal path 200 and cause an audible pop or click. To minimize this pop or click caused by a change in gain, it is desirable to change the gain settings of digital gain 210 and analog gain 230 when the digital input signal 201 is near its minimum, such as when the instantaneous amplitude of the signal is zero. For this purpose, zero-crossing detection 270 is provided. In some embodiments, dynamic gain controller 250 updates the gain levels only when zero-crossing detection 270 detects a zero crossing, meaning that the instantaneous amplitude of the signal is at or near zero.Advantageously, this reduces the potential pop or click generally associated with volume control, especially when the digital input data 201 is oversampled at a higher rate to ensure that digital data samples exist that are close to the zero crossing point.

[0017] In some embodiments, the analog gain adjustment (second gain) is performed with a fixed time delay after the digital gain adjustment (first gain) to reduce interference caused by the signal path delay between the first and second gain stage blocks. This delay is implemented by the dynamic gain controller 250.

[0018] In some embodiments, the dynamic gain controller 250 includes so-called attack and release controls, so that the digital gain is not increased unless the detected signal level is below a specified threshold for a period of time defined by the "attack" control setting. Similarly, the digital volume adjustments would not be reduced unless the detected signal level is above another specified threshold for a period of time defined by the "release" control setting.

[0019] Fig. 3 shows an alternative embodiment of a digital-to-analog signal path 300 to the signal path of Fig. 2. A digital input signal 301 is received by a digital gain 330 and a signal level monitor 310. As an example, the digital gain 330 is a multiplier logic block. The signal level monitor 310 can be any convenient or application-specific level detector, as discussed in detail above. The dynamic gain controller 320 receives I2C settings 302 and an I2C gain 303. The I2C settings 302 are generally fixed or hard-programmed when the signal path 300 is designed into a device, such as an MP3 player.The I2C settings 302 may include the size of the gain steps, the adjustable delay between the two gain control adjustments, adjustments to the dynamic gain adjustment period / delay for the level capture, and / or a zero-crossing capture enable so that gain changes are only performed when the signal amplitude is zero to prevent clicks and pops. The I2C gain 303 is generally adjusted by the device's end user to set a desired gain or gain level. The dynamic gain control 320 controls the gain of the digital gain 320 and the gain of the analog gain 370.As discussed in detail above, the dynamic gain controller 320 automatically maximizes the gain of the digital gain 330 so that subsequent analog gain can be minimal, while also preventing clipping or overflow in the digital signal. Although reference is generally made herein to I2C control, it will be readily apparent to one of ordinary skill in the art having the benefit of the present disclosure that a wide variety of control options are available for gain adjustment, including, but not limited to, analog gain control, hard-coded gain steps, or the like. For brevity and clarity, I2C is discussed herein because I2C is an industry-accepted standard for control.

[0020] As discussed above, the manipulation of digital gain 330 is a digital process performed by logic circuits such as a digital multiplier or shift and add registers. Digital gain 330 is coupled to a sigma-delta DAC (ΣΔ) 350. Oversampling DACs or interpolating DACs, such as the sigma-delta DAC (ΣΔ) 350, have several advantages. Sigma-delta DACs use a pulse-shaped pulse density conversion technique. The oversampling technique internally allows the use of a lower-resolution DAC. Often, a simple 1-bit DAC is chosen because the oversampled result is inherently linear. The digital modulator includes feedback and filtering to shift most of the large 1-bit quantization noise out of the audio band.This results in an effective high-pass filter acting on the 1-bit quantization noise introduced by the sigma-delta DAC (ΣΔ) 350, thereby shifting this noise from the lower frequencies of interest to the higher frequencies of less interest, a process called noise shaping. The quantization noise at these high frequencies is removed or greatly attenuated by an analog low-pass filter 360. Some embodiments of the sigma-delta DAC (ΣΔ) 350 include a low-pass filter function as part of the sigma-delta DAC 350 block, rather than a separate block 360. Other embodiments do not have a dedicated low-pass filter if the application is not sensitive to large out-of-band noise. High-resolution DACs, or DACs larger than 14 bits, are typically of this type due to their high linearity and low cost.Higher oversampling rates can relax the specifications of the output low-pass filter and / or allow further rejection of in-band quantization noise.

[0021] In some embodiments, multiple higher-order topologies (such as MASH) may be used to achieve higher levels of noise shaping with a stable topology. Those of ordinary skill in the art having the benefit of the present disclosure will be familiar with the wide variety of DACs available, and for the sake of brevity and clarity, detailed operation of other types of DACs is omitted from the present disclosure. Low-pass filter 360 is coupled to analog gain 370, which is also manipulated by dynamic gain controller 320. As described in detail above, it is advantageous for the gain of analog gain 370 to be as small as possible while maintaining the user gain set by I2C gain 303.

[0022] Fig. Figure 4 shows an alternative digital-to-analog signal path 400 comprising a sigma-delta (ΣΔ) DAC 440, with the ΣΔ DAC 440 shown in more detail. A digital playback signal 401 is received by a clip limiter 430 and a signal level detector 410, both of which serve similar functions as described in Fig. 3 and need not be discussed in detail again. A ΣΔ DAC 440 receives the digital playback signal 441 that has been clip-limited by the clip limiter 430. The ΣΔ DAC 440 includes an input adder 441 that adds the input along with the output of a transfer function 442, which is fed back through a feedback path 447. In some embodiments, the transfer function consists of integrators and a comparator. The feedback path includes a gain 445. Generally, the gain 445 converts the 1-bit DAC output 447 into a scaled multi-bit output 443. By reducing the feedback gain 445, the result of the adder 441 is affected, and the digital output gain of the ΣΔ DAC 440 is increased. Furthermore, the amplitude-shaped noise of the output of the ΣΔ DAC 440 is reduced relative to the input signal level.This results in it being possible to achieve a higher dynamic range from a lower-order ΣΔ DAC modulator. The clip level of the clip limiter 430 is dynamically controlled to ensure that the signal introduced into the ΣΔ DAC 440 does not exceed the appropriate maximum input level as determined by the feedback gain 445. Preferably, any change in the gain 445 is made gradually, i.e., in steps, for example, by an up / down counter, to prevent any effects of immediate steps that could have negative signal quality consequences, such as causing the digital gain setting to wrap around a minimum setting. As indicated, the clip level shown in . Fig. 4 also advantageously contributes to noise shaping. As is well known, the shape or spectral density of the noise in the ΣΔ DAC 440 is dependent on the loop gain and, as a result, can be controlled to a desired level or shifted to high frequency by changing the gain 445. The output of the ΣΔ DAC 440 is filtered by a filter 450. The analog gain 460 is similarly controlled by the dynamic gain controller 420. The analog gain 460 is minimized while the digital gain is maximized by the gain 445 to maintain a user-supplied gain setting through the I2C gain 403. As mentioned above, the use of I2C for gain control is not intended to be limiting in any way.

[0023] Fig. 5 shows a method for optimizing the dynamic range in a digital-to-analog signal path. In a step 510, a digital input level is detected. As discussed above, the digital input level may be an RMS level, a peak level, or any other suitable level. In a step 520, a user gain setting is detected. The user gain setting sets an overall gain, or in the case of audio, a volume, for a digital-to-analog signal path. The user gain setting may be hard-programmed into a system, such as with an RF receiver or modem; or it may be adjustable by an end user, such as with an MP3 player. Preferably, steps 510 and 520 are performed concurrently.In a step 530, a digital gain setting of an early path in a digital gain stage is maximized according to the digital input level and the user gain setting. Preferably, the digital gain stage is clip-limited to prevent overflow of any registers in the digital gain stage. In some embodiments, the digital gain setting is maximized by changing the loop gain of a feedback loop of a digital-to-analog converter. In a step 540, an analog gain of a late path is minimized while maintaining the user gain setting. Preferably, steps 530 and 540 are performed concurrently. Steps 510 through 540 are performed continuously.In short, small signals experience high gain in the digital domain, where the higher signal level early in the signal path provides an improved signal-to-noise ratio from noise contributions later in the path. Therefore, less analog gain is required to achieve the same desired overall gain of the digital-to-analog signal path. Small signals are reproduced with greater fidelity, and as a result, there is a wider overall range of signal levels for the digital-to-analog signal path, significantly increasing the dynamic range.

[0024] In operation, a circuit and method for maximizing and optimizing the dynamic range of a digital-to-analog signal path at negligible cost are provided. As those of ordinary skill in the art having the benefit of the present disclosure will appreciate, the addition of a dynamic gain controller and a level detector incurs minimal power consumption and are located on a single semiconductor chip. In contrast, prior art solutions relied on high-end DAC or analog amplification and gain modules that required large increases in current and large increases in semiconductor chip size to reproduce small signals, adding unacceptable costs in an industry where fractions of cents make the difference between success and failure in the marketplace.The present invention has been described with reference to specific embodiments that include details to facilitate understanding of the principles of construction and operation of the invention. The specific configurations shown and the methodologies described with respect to the various modules and the interconnections therebetween are provided merely as examples. Such references herein to specific embodiments and details thereof are not intended to limit the scope of the claims appended hereto. For example, ΣΔ DACs have been described in detail. However, one of ordinary skill in the art, given the benefit of the present disclosure, will readily recognize that several types of DACs may be used, each having different capabilities for manipulating digital gain.Furthermore, although analog gain or volume has been shown as a discrete output module, it is also well known that some DAWs have integrated analog outputs that have gain settings that can be manipulated. And digital-to-analog audio playback paths have also been discussed. But the circuits and methods described above will be useful for any circuit or system that has a digital-to-analog signal path where dynamic range is a concern, such as RF receivers, modems, and the like. It will also be understood that the digital-to-analog signal paths 200, 300, and 400 of . Fig. 2 , Fig. 3 and Fig.4 are each greatly simplified to show their bare minimum components. Other components may be implemented within the signal paths as applications require, such as mixers, additional gain stages, digital signal processing, or any other useful known or application-specific modules. Alternatively, a single DAC may be connected to multiple analog gain stages, with each stage separately controlled by a dynamic gain controller. It will be further apparent to those skilled in the art having the benefit of the present disclosure that modifications may be made in the embodiment chosen for illustration without departing from the spirit and scope of the invention.

Claims

[1] Circuit for maximizing the dynamic range in a digital-to-analog signal path (100; 200; 300; 400), with: a. an input for receiving an input signal (110; 201; 301; 401); b. a first amplification stage (120; 210; 330; 445) coupled to the input, wherein the first amplification stage (120; 210; 330; 445) has a first gain setting; c. a second amplification stage (140; 230; 370; 460) coupled to the first amplification stage (120; 210; 330; 445), wherein the second amplification stage (140; 230; 370; 460) has a second gain setting, wherein the second amplification stage (140; 230; 370; 460) has an analog gain stage and the second gain setting has an analog gain setting; d. a controller (150; 250; 320; 420) for dynamically selecting the first gain setting to maximize the first gain setting without clipping the input signal, and for selecting the second gain setting to achieve a desired signal path gain; and e. an output coupled to the second amplification stage (140; 230; 370; 460) to transmit an output signal (235) that has the desired overall signal path gain. [2] Circuit according to claim 1, wherein the first amplification stage (120; 210; 330; 445) comprises a digital amplification stage and the first amplification setting comprises a digital amplification setting. [3] Circuit according to claim 1, wherein the first amplification stage (120; 210; 330; 445) comprises a sigma-delta digital-to-analog converter (130; 220; 350; 440) and the digital gain setting comprises a feedback gain change of the digital-to-analog converter (130; 220; 350; 440). [4] Circuit according to claim 1, wherein the first amplification stage (120; 210; 330; 445) comprises a digital amplification stage configured to adjust the first gain setting by modifying a feedback value. [5] Circuit according to claim 1, wherein a zero-crossing detection (270) is included to update gain settings when the transient signal is close to zero. [6] Circuit according to claim 1, which further comprises an input signal detector (240; 310; 410) for detecting a level of the input signal (110; 201; 301; 401). [7] Circuit according to claim 6, wherein the input signal detector (240; 310; 410) comprises an RMS level detector. [8] Circuit according to claim 6, wherein the input signal detector (240; 310; 410) has a peak level detector. [9] Circuit according to claim 6, wherein the input signal detector (240; 310; 410) has an average level detector. [10] Circuit according to claim 1, which further comprises a user gain control (260). [11] Circuit according to claim 10, wherein the user gain control (260) is coupled to the controller (150; 250; 320; 420). [12] Circuit according to claim 11, wherein the controller (150; 250; 320; 420) is further configured to adjust the first gain setting, the second gain setting or both the first gain setting and the second gain setting according to the user gain control (260). [13] Circuit according to claim 1, wherein the controller (150; 250; 320; 420) is configured to delay the application of the second gain setting relative to the application of the first gain setting in order to compensate for signal path delays between the first gain stage (120; 210; 330; 445) and the second gain stage (140; 230; 370; 460). [14] Circuit according to claim 1, wherein the controller (150; 250; 320; 420) is further configured to adjust the first gain setting and the second gain setting only when an input signal level is below a specified threshold for a specified period of time. [15] Method for maximizing the dynamic range in a digital-to-analog signal path (100; 200; 300; 400) comprising the following: a. Capturing a digital input signal level; b. Detecting a desired user gain level; c. Applying an initial amplification to the digital input signal (110; 201; 301; 401); d. Converting the digital input signal (110; 201; 301; 401) into an analog signal; and e. Applying a second amplification to the analog signal; f. wherein the first gain and the second gain are selectively and inversely manipulated according to the digital input signal (110; 201; 301; 401) while maintaining the desired user gain level. [16] Method according to claim 15, wherein a zero crossing is included to update the gain settings when the transient signal is close to zero. [17] Method according to claim 15, wherein applying a first gain comprises changing a gain setting of a feedback loop (447) in a sigma-delta digital-to-analog converter (130; 220; 350; 440). [18] Digital-to-analog signal path (100; 200; 300; 400) in an integrated circuit, wherein the digital-to-analog signal path (100; 200; 300; 400) has the following: a. an input for receiving a digital input signal (110; 201; 301; 401); b. an input for receiving a desired signal path gain level; c. a digital amplification stage for manipulating the digital gain level of the digital input signal (110; 201; 301; 401); d. a digital-to-analog converter (130; 220; 350; 440) coupled to the digital amplification stage for converting the manipulated digital input signal (110; 201; 301; 401) into an analog signal having an analog gain level; e. an analog amplification stage for manipulating the analog gain level of the analog signal; f. a dynamic gain control for selectively maximizing the digital gain level and minimizing the analog gain level according to the digital signal level while maintaining the desired signal path gain level. [19] Digital-to-analog signal path (100; 200; 300; 400) in an integrated circuit, wherein the digital-to-analog signal path (100; 200; 300; 400) has the following: a. an input for receiving a digital input signal (110; 201; 301; 401); b. an input for receiving a desired signal path gain level; c. a digital-to-analog converter (130; 220; 350; 440) coupled to the digital amplification stage for converting the digital input signal (110; 201; 301; 401) into an analog signal having an analog gain level, wherein the digital-to-analog converter (130; 220; 350; 440) has a digital gain level; d. an analog amplification stage for manipulating the analog gain level of the analog signal; e. a dynamic gain control for selectively maximizing the digital gain level and minimizing the analog gain level according to the digital gain level while maintaining the desired output gain level.

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