Semiconductor arrangement with a superjunction transistor and another component integrated into a common semiconductor body

Abstract

Semiconductor arrangement, comprising: a semiconductor body (100); a vertical power transistor arranged in a first component zone (110) of the semiconductor body (100) and comprising: at least one source zone (21), one drain zone (13), at least one body zone (22), at least one drift zone (11) of a first doping type and at least one compensation zone (12) of a second doping type complementary to the first doping type, and a gate electrode (23) arranged adjacent to the at least one body zone (22) and dielectrically insulated from the body zone (22) by a gate dielectric (24); and a lateral high-voltage transistor (50) arranged in a second component zone (120) of the semiconductor body (100), wherein the second component zone (120) has a trough-like structure (41) of the second doping type surrounding a first semiconductor zone (42) of the first doping type, wherein the lateral high-voltage transistor (50) has the following component zones arranged in the first semiconductor zone (42): a further source zone (51) and a further drain zone (52) arranged in the first semiconductor zone (42) and spaced apart from each other in a lateral direction of the semiconductor body (100); and at least one more drift zone (57) and one more body zone (53), wherein the further body zone (53) is arranged between the further source zone (51) and the at least one further drift zone (57), wherein at least one further drift zone (57) is arranged between the further body zone (53) and the further drain zone (52), wherein the further source zone (51), the further drain zone (52) and the further drift zone (57) are of the first doping type and the further body zone (53) is of the second doping type, wherein the lateral high-voltage transistor (50) further exhibits: a further gate electrode (54) which is arranged adjacent to the further body zone (53) and is dielectrically insulated from the further body zone (53) by a further gate dielectric (55), wherein a part of the first semiconductor zone (42) forms at least one further drift zone (57) and the further body zone (53) is arranged in this part of the first semiconductor zone (42).

Description

[0001] Embodiments of the present invention relate to a semiconductor arrangement, in particular a semiconductor arrangement with a power transistor and a further semiconductor component which is integrated into a common semiconductor body.

[0002] Power transistors such as power MOSFETs or power IGBTs are widely used as electronic switches for switching electrical loads such as motors, actuators, lamps, or the like. In many applications, the load paths of two power transistors are connected in series between terminals for a positive and a negative supply potential, forming a half-bridge circuit, with a load coupled to an output of the half-bridge. In a half-bridge circuit, the transistor connected between the output and a terminal for a negative supply potential is called a low-side transistor (low-side switch), whereas the transistor connected between a terminal for the positive supply potential and the output is called a high-side transistor (high-side switch).

[0003] A power transistor is a voltage-controlled component controlled by a control signal (a control voltage) supplied to a control terminal, which in the case of a MOSFET or an IGBT is formed by a gate terminal. While the low-side transistor can be controlled using a control signal referenced to the negative supply potential, controlling the high-side transistor requires a control signal referenced either to the positive supply potential or to the electrical potential of the output terminal. The electrical potential at the output terminal can vary between the negative supply potential and the positive supply potential depending on the switching state of the half-bridge.To control the high-side transistor and the low-side transistor, it is desirable to use a control circuit that generates control signals referenced to the negative supply potential. While the control signal for the low-side switch can be used directly to control the low-side transistor, a level shifter may be required to raise the control signal for the high-side transistor to a signal level suitable for driving the high-side transistor, or to a signal level that can be processed by a control circuit for the high-side transistor.

[0004] However, a level shifter may require another component, such as another transistor, that has a reverse voltage capability similar to the reverse voltage capability of the low-side transistor.

[0005] Superjunction transistors are a special type of transistor that has at least one drift zone of one conduction type and at least one compensation zone adjacent to the at least one drift zone and having the opposite conduction type.

[0006] WO 2011 / 158647 A1 describes a semiconductor device comprising a vertical n-type superjunction transistor and a lateral n-type transistor integrated in a common semiconductor body. The lateral transistor comprises a p-type body region in which an n-type source region and an n-type drain region are embedded. The body region is surrounded by an n-type region, with the n-type region being arranged between the body region and a lightly n-type region.

[0007] WO 2011 161 748 A1 describes a semiconductor device comprising CMOS transistors and a lateral DMOS transistor integrated in a common semiconductor body.

[0008] The object underlying the present invention is to realize a vertical power transistor and a lateral high-voltage transistor in a common semiconductor body.

[0009] This object is achieved by a semiconductor device according to claim 1 or claim 2. Particular embodiments are the subject of the subclaims.

[0010] Exemplary embodiments are explained below with reference to the accompanying figures. The figures serve to illustrate the basic principle of the invention; therefore, only those aspects necessary for understanding the basic principle are shown. The figures are not to scale. In the figures, like reference numerals designate similar features. Fig. 1 shows a vertical section of a semiconductor device including a power transistor implemented in a first device zone of a semiconductor body and a further semiconductor device implemented in a second device zone of the semiconductor body; Fig. 2 shows a horizontal section through the semiconductor device according to Fig. 1; Fig. 3 shows a horizontal section through a semiconductor body in the first component zone according to a further embodiment; Fig. 4 shows a horizontal section through a semiconductor device according to a further embodiment; Fig. 5 shows a vertical section through a control structure of the power transistor according to a first embodiment; Fig. 6 shows a vertical section through a control structure of the power transistor according to a second embodiment; Fig. 7 shows a vertical section through another semiconductor device implemented as a lateral transistor according to a first embodiment; Fig. 8 shows a vertical section through another semiconductor device implemented as a lateral transistor according to a second embodiment; Fig. 9 shows a horizontal section through another, in Fig. 7 shows a semiconductor component according to a first embodiment; Fig. 10 shows a horizontal section through another, in Fig. 7 shows a semiconductor component according to a second embodiment; Fig. 11 shows a horizontal section through another semiconductor device implemented as a lateral diode; Fig. 12 shows an electrical circuit diagram of the power transistor and another semiconductor component implemented as a transistor, which are integrated into the semiconductor body; Fig. 13 shows an electrical circuit diagram of the power transistor and two further semiconductor components implemented as a transistor and as a diode, which are integrated into the semiconductor body; Fig. 14 shows an embodiment of a half-bridge circuit having a low-side transistor and a high-side transistor, as well as a high-side drive circuit and a transistor of a level shifter; Fig. 15 shows the half-bridge circuit according to Fig. 14, wherein an embodiment of the high-side control circuit is shown in detail.

[0011] In the following detailed description, reference is made to the accompanying figures, which form a part of the specification and which, by way of illustration, show how the invention may be practiced. It is to be understood that the features of the various embodiments described herein may be combined with one another unless otherwise specified.

[0012] Fig. 1 shows a vertical section through a semiconductor device comprising a semiconductor body 100, as well as active zones of a power transistor, and a further semiconductor component implemented in the semiconductor body 100. Fig. 1 shows a vertical section through the semiconductor body 100, which shows a sectional view in a vertical section plane extending perpendicular to a first surface 101 and an opposite second surface 102 of the semiconductor body 100.

[0013] The semiconductor body 100 comprises a first component zone 110, in which active zones of a power transistor are implemented, and a second component zone 120, in which a further semiconductor component 50 is implemented. The power transistor is designed as a superjunction transistor and has at least one drift zone 11 of a first doping type and at least one compensation zone 12 of a second doping type complementary to the first doping type. Fig. The power transistor shown in Figure 1 comprises a plurality of drift zones 11 and a plurality of compensation zones 12, wherein the drift zones 11 and the compensation zones 12 are arranged alternately one after the other in a lateral direction of the semiconductor body 100. Furthermore, the power transistor is a vertical transistor, which means that in the power transistor, a main current direction corresponds to a vertical direction of the semiconductor body 100. Therefore, the drift zones 11 and the compensation zones 12 extend in the vertical direction of the semiconductor body 100.

[0014] The power transistor further comprises a drift zone 13, which is connected to a drain terminal D1 (which is only shown schematically), and a source zone, which is spaced apart from the drain zone 13 in the vertical direction of the semiconductor body 100. The source zone is in Fig. 1 is not explicitly shown. The source zone represents a part of the control structure 20 of the power transistor, this control structure 20, which is shown in Fig. 1 is shown only schematically, will be described in detail below. The control structure 20 is arranged in a region of the first surface 101 of the semiconductor body 100, whereas the drain zone 13 is arranged in the region of the second surface 102 of the semiconductor body 100.

[0015] According to one embodiment, the semiconductor body 100 comprises a first semiconductor layer or a semiconductor substrate that forms the drain zone 13 and that forms the second surface 102 of the semiconductor body 100. In this case, the semiconductor body 100 comprises at least one second semiconductor layer arranged above the first semiconductor layer or the substrate and comprising the drift zones 11, the compensation zones 12, and the active semiconductor zones of the control structure 20. The at least one second layer can be an epitaxial layer having a plurality of sublayers that are produced in successive process steps.

[0016] In Fig. 1, reference symbol S1 denotes a source terminal of the power transistor, and reference symbol G1 denotes a gate terminal of the power transistor. Examples of the control structure of the power transistor are described below with reference to Fig. 5 and Fig. 6 explained.

[0017] As in Fig. 1, the second component zone 120 has a well-like semiconductor structure 41 of the second doping type, which is determined by the doping type of the compensation zones 12 located in the first component zone 110. The well-like semiconductor structure 41, which is referred to simply as "well" below, has a bottom section 411 extending in a horizontal plane of the semiconductor body 100, and sidewall sections 412 extending from the bottom section 411, which is spaced from the first surface 101, to the first surface 101. In the case of the Fig. 1, the bottom section 411 extends substantially in a horizontal plane of the semiconductor body 100. However, this is merely an example. The bottom section 411 could also be curved, for example, like a bowl. Even if the configuration according to Fig. 1, the sidewall portions 412 of the well 41 extend substantially in a vertical direction of the semiconductor body 100, this is merely an example. The sidewall portions 412 could also extend up to the first surface 101 in a direction different from the vertical direction.

[0018] Optionally, the well may have a more highly doped zone 44 in the region of the second surface 101. In this context, "more highly doped" means that the semiconductor zone 44 has a higher doping concentration than the remaining sections of the well. The more heavily doped zone 44 is also of the second doping type. Fig. 1, the more heavily doped zone 44 extends as far as the first surface 101. The well-shaped structure 41 and therefore also the more heavily doped zone 44 may be floating, or they may be connected to an electrical potential, such as the electrical potential of a terminal of a semiconductor device implemented in the well 41. The implementation of devices in the well 41 will be described further below. According to an embodiment explained below, a transistor with a drain terminal D2 is implemented in the well 41. In this case, the well 41 and / or the more heavily doped zone 44 may be connected to the drain terminal D2. If the optional, more heavily doped zone 44 is not present, the sidewalls 412 and the well 41 may extend as far as the first surface 101.

[0019] The well 41 of the second doping type encloses or surrounds a first semiconductor zone 42 of the first doping type, which is determined by the doping type of the drift zone 11 located in the first component zone 110. Active component zones of a further semiconductor component 50 are implemented in this first semiconductor zone 42. The further semiconductor component 50 is in Fig. 1 is only shown schematically. Embodiments of this further semiconductor component 50 are described below with reference to Fig. 7 to 10 explained.

[0020] The semiconductor device 50 may be a high-voltage device, i.e., a semiconductor device that, depending on the particular implementation, has a blocking voltage capability of a few tens of V, or even a few hundreds of V. The blocking voltage capability of the high-voltage device may correspond to the blocking voltage capability of the power device. However, the high-voltage device may be implemented such that it has a much lower current-carrying capacity or a much higher on-resistance than the power transistor.

[0021] Optionally, a second semiconductor zone 43 of the first doping type is arranged between the well 41 and the first semiconductor zone 42. In the Fig. 1, this second semiconductor zone 43 adjoins the well 41 and extends along the bottom portion 411 and the sidewall portions 412 of the well 41. According to a further embodiment, the second semiconductor zone 43 extends only along the bottom portion 411 of the well 41.

[0022] The doping concentration of the well 41 can correspond to the doping concentration of the compensation zones 12. The doping concentration of these compensation zones 12 can, for example, be in the range between 10 13 cm -3 and 10 17 cm -3The doping concentration of the second semiconductor zone 43 may correspond to the doping concentration of the drift zones 11, wherein the doping concentration of the drift zones 11 may correspond to the doping concentration of the compensation zones 12. The doping concentration of the first semiconductor zone 42 is lower than the doping concentration of the second semiconductor zone 43. For example, the doping concentration of the second semiconductor zone 43 may be between intrinsic and 2 10 14 cm -3 or between 10 13 cm -3 and 2·10 14 cm -3 lay.

[0023] The drift zones 11 and the compensation zones 12 can be created using conventional process steps for producing the drift zones and compensation zones of a superjunction transistor. The well 41, the optional second semiconductor zone 43, and the first semiconductor zone 42 can be produced together with the drift zones 11 and the compensation zones 12 during the same process steps. This will be explained below. The method for producing the drift zones 11, the compensation zones 12, the well 41, the optional second semiconductor zone 43, and the first semiconductor zone 42 comprises epitaxially growing a number of epitaxial layers on a semiconductor substrate that forms the drain zone 13. These epitaxial layers form sublayers of the second semiconductor layer explained above.According to one embodiment, the individual epitaxial layers are grown with a basic doping concentration of the first doping type. To produce the drift zones 11 and the compensation zones 12, dopant atoms are implanted into the individual epitaxial layers, wherein sections of the individual drift zones 11 and sections of the individual compensation zones 12 are formed in each of the epitaxial layers. The well 41 can be produced in an identical manner by implanting dopant atoms into the individual epitaxial layers at the locations where sections of the well 41 are to be produced. According to one embodiment, the bottom section 411 of the well 41 is produced in one epitaxial layer, while the sidewall sections 412 have a plurality of superimposed sections, each of which is formed in one of the epitaxial layers.The optional second semiconductor zone 43 can be formed in the same way as the well 41. A bottom portion of the second semiconductor zone 43, defined by an adjacent portion of the bottom portion 411 of the well 41, is formed, for example, in an epitaxial layer formed immediately after the epitaxial layer in which the bottom portion 411 of the well 41 is formed.

[0024] The doping concentration of the first semiconductor zone 42 may correspond to the doping concentration of the epitaxial layers. In this case, the first semiconductor zone 42 is formed by the zones of those individual epitaxial layers into which no additional dopant atoms are implanted.

[0025] The bottom section 411 of the well 41 can be created in a first epitaxial layer grown on the substrate forming the drain zone 13. In this case, the well 41 adjoins the drain zone 13. The compensation zones 12 can adjoin the drain zone 13. In this case, sections of the compensation zones 13 are already formed in the first epitaxial layer grown on the substrate. According to a further embodiment, the compensation zones 12 are spaced from the drain zone 13 in the vertical direction of the semiconductor body 100. In this case, sections of the compensation zones 12 are created for the first time in the second epitaxial layer, for example. Optionally, a semiconductor zone 14 of the first doping type is arranged between the compensation zones 32 and the drain zone 13 in order to separate the compensation zones 32 from the drain zone 13.The doping concentration of this semiconductor zone 14 may correspond to the doping concentration of the drift zone 31, or it may be slightly lower (such as between 0 and 5% or between 0 and 10% lower) or slightly higher (such as between 0 and 5% or between 0 and 10% higher). Referring to . Fig. 1, the semiconductor zone 14 can be implemented as a horizontal semiconductor layer, which is also arranged between the drift zone 31 and the drain zone 13 and between the well 41 and the drain zone 13.

[0026] As in Fig. 1, the second device zone 120 is spaced apart from the first semiconductor zone 110 in a lateral direction of the semiconductor body 100. An intermediate zone 130 is formed between the first device zone 110 and the second device zone 120. The intermediate zone 130 can be considered as an edge zone of the power transistor and comprises first edge zones 31 of the first doping type and second edge zones 32 of the second doping type, wherein each first edge zone 31 adjoins at least one second edge zone 32. The doping concentrations of the first edge zones 31 can correspond to the doping concentrations of the drift zones 11, and the doping concentrations of the second edge zones 32 can correspond to the doping concentrations of the compensation zones 12.The edge zones 31, 32, like the well 41, the optional second semiconductor zone 43 and the first semiconductor zone 42, can be produced by the same method steps as the drift zone 11 and the compensation zones 12. Like the drift zones 11 and the compensation zones 12, the first and second edge zones 31, 32 extend in a vertical direction of the semiconductor body 100. In the embodiment shown in FIG. Fig. In the embodiment shown in Figure 1, these edge zones 31, 32 extend to the first surface 101 of the semiconductor body 100. In the vertical direction, the edge zones 31, 32 can extend just as deeply into the semiconductor body 100 as the drift zones 11 and the compensation zones 12.

[0027] Fig. 2 shows a horizontal section through the semiconductor body 100. In the Fig. In the embodiment shown in FIG. 2, the drift zones 11 and the compensation zones 12 have a strip-shaped (elongated) or well-shaped geometry, which means that they extend lengthwise in a lateral direction of the semiconductor body 100. Like the drift zones 11 and the compensation zones 12, the second edge zones 31, 32 also have a strip-shaped or well-shaped geometry. However, the implementation of the compensation zones 12 and the second edge zones 32 with a strip-shaped or well-shaped geometry merely represents an example.

[0028] According to another study in Fig. 3, the compensation zones 12 could also have a columnar geometry, wherein the individual columns extend in the vertical direction of the semiconductor body 100. Fig. Figure 3 shows a horizontal section through the semiconductor body 100 in the first component zone 110, showing horizontal sections of the individual compensation zones 12. It is also possible to have columnar and elongated compensation zones 12 in a semiconductor component.

[0029] Referring to Fig. 3, which also shows a section of the intermediate zone 130, the second edge zones 32 can be formed as columnar regions. However, the geometry of the second edge zones 32 can be independent of the geometry of the compensation zones 12. Therefore, elongated second edge zones 32 can be combined with columnar compensation zones 12, and columnar second edge zones 32 can be combined with elongated compensation zones 12. Elongated second edge zones 31 can extend from side walls 412 of the tub (as in Fig. 2) and extend parallel thereto, or they may be spaced from and perpendicular to the side walls 412 of the tub.

[0030] Fig. 4 shows a vertical section of the semiconductor arrangement according to a further embodiment. In this embodiment, the well 41 borders the drain zone 13, while the drift zones 11 and the compensation zones 12, as well as the edge zones 31, 32, are separated from the drain zone 13 by the semiconductor zone 14. This semiconductor zone 14 has a first doping type and a doping concentration that is equal to the doping concentration of the drift zones 11, or that can be slightly lower (e.g., between 0 and 5% or between 0 and 10% lower) or slightly higher (e.g., between 0 and 5% or between 0 and 10% higher) than the doping concentration of the drift zones 11. The doping concentration of the semiconductor zone 14 can correspond to the basic doping concentration of the epitaxial layer in which it is formed, or it can be higher than the basic doping. According to one embodiment, the doping concentration of the semiconductor zone 14 is approximately 2.10。15 cm -3 . A length (thickness) of the semiconductor zone 14, which is given by its dimension in the vertical direction of the semiconductor body 100, may correspond to the thickness of one of the epitaxial layers, namely the first epitaxial layer in which the semiconductor zone 14 is formed.

[0031] The well 41, which encloses or surrounds the first semiconductor zone 42 in which the further semiconductor component 50 is implemented, shields or protects the further semiconductor component from the electrical potential that may occur in the active semiconductor zones of the power transistor, wherein the active semiconductor zones of the power transistor are separated by the drain zones 13, the drift zones 11, the compensation zones 12 and the source and body zones (in the Fig. 1 and Fig. 4 not shown) in the control structure 20.

[0032] The shielding effect of the well 41 is explained below. For the purposes of explanation, it is assumed that the power transistor is an n-type transistor in which the drain zone 13 and the drift zones 11 are n-type or n-doped, while the compensation zones 12 are p-type or p-doped. Consequently, the well 41 is p-doped, while the first semiconductor zone 42 and the optional second semiconductor zone 43 are n-doped. For the purposes of explanation, it is further assumed that a positive voltage is applied between the drain and source terminals D1, S1 of the power transistor when the power transistor is in operation.This voltage is, for example, in the range of a few volts when the power transistor is in an on state (switched on), and it can be up to a few hundred volts when the power transistor is in an off state (switched off). The maximum voltage depends on the blocking voltage capability of the power transistor. For the purposes of explanation, it is further assumed that the electrical potential of the well 41 is equal to or less than the electrical potential of the drain region 13. The well 41 can be floating or it can be connected to the drain terminal D1, or to a terminal with a defined electrical potential, as explained previously.Between the well 41 and the semiconductor zones located outside the well 41 and adjacent to the well, a pn junction is formed, which is operated in the reverse direction in order to avoid an external current through the well 41 into the first semiconductor zone 42 when the electrical potential outside the well 41 is higher than the electrical potential of the well 41. Semiconductor zones that border the well 41 and form a pn junction are the drain zone 13 or the optional semiconductor zone 14 of the first doping type, which is located between the drain zone 13 and the bottom section 411 of the well (see . Fig. 1) are arranged, as well as first edge zones 31, which adjoin side walls 412 of the tub 41. Referring to the Fig. 1 and Fig. 4, a first edge zone 31 of the first doping type also borders the side of the sidewall 412 of the well 41 facing away from the power transistor. According to one embodiment, the first edge zone 31, which borders the well on a side facing away from the power transistor, borders an edge of the semiconductor body 100.

[0033] Fig. 5 shows a vertical section of a portion of the control structure 20 of the vertical power transistor according to a first embodiment. Referring to Fig. 5, the control structure 20 comprises a plurality of transistor cells, each transistor cell having a source zone 21 of the first doping type, which is determined by the doping type of the drift zones 11, and a body zone 22 of the second doping type, which is arranged between the source zone 21 and a drift zone 11. The transistor cells are connected in parallel in that their source zones 21 and their body zones 22 are electrically connected to a source electrode 25, which forms the source terminal S1 of the power transistor. A gate electrode 23 is arranged adjacent to the body zone 22 and is dielectrically insulated from the body zone 22 by a gate dielectric 24. The gate electrode 23 can be a continuous electrode, or it can have several gate electrode sections that are electrically connected to one another. In the Fig. In the embodiment shown in Figure 5, the gate electrode 23 is formed as a planar gate electrode arranged above the first surface 101 of the semiconductor body 100. The compensation zones 12 border the body zones 22 and are therefore electrically connected to the source terminal S1.

[0034] Fig. 6 shows a further embodiment of the gate structure. In this embodiment, the gate electrode 23 or the sections of the gate electrode 23 are arranged in trenches that extend from the first surface 101 into the semiconductor body 100. Each trench with a gate electrode 23 or a gate electrode section and a gate dielectric 24 extends through the source zone 21 and the body zone 22 to or into a drift zone 11. The compensation zones 12 border the body zone 22, which, together with the source zones 21, is electrically connected to the source electrode 25.

[0035] The individual transistor cells can be implemented as strip-like transistor cells. The geometry of the transistor cells is mainly determined by the geometry of the source and body zones 21, 22. Strip-like transistor cells have source zones and body zones 22 that extend lengthwise in a direction perpendicular to the direction shown in the Fig. 1 and Fig. 6. However, the individual transistor cells could also be implemented as hexagonal transistor cells or the like.

[0036] Fig. 7 shows a vertical section through the further semiconductor component 50 according to a first embodiment. Fig. In the embodiment shown in Figure 7, the further semiconductor component 50 is implemented as a lateral high-voltage transistor. The lateral power transistor comprises a source zone 51 and a drain zone 52, which are spaced apart from one another in a lateral direction of the semiconductor body 100. The lateral transistor further comprises a body zone 53 and a drift zone 57. The drift zone 57 adjoins the drain zone 52 and is arranged between the drain zone 52 and the body zone 53. The body zone 53 is arranged between the drift zone 57 and the source zone 51 and separates the source zone 51 from the drift zone 57. A gate electrode 54 is arranged adjacent to the body zone 53 and is dielectrically insulated from the body zone 53 by a gate dielectric 55.The drain region 52 of the power transistor is connected to another drain terminal D2, the gate electrode 54 is connected to another gate electrode G2, and the source electrode 56, which is electrically connected to the source region 51 and the body region 53, is connected to another source terminal S2. In the embodiment shown in . Fig. In the embodiment shown in Figure 7, the drift zone 57 is formed by a portion of the first semiconductor zone 42, so that the drift zone 57 has the same doping concentration as the first semiconductor zone 42. The doping type of the second drain zone 52 corresponds to the doping type of the first semiconductor zone 42, the doping type of the source zone 51 corresponds to the doping type of the first semiconductor zone 42, and the body zone 53 is complementarily doped. Since the doping type of the first semiconductor zone 42 corresponds to the doping type of the drift zones 11 of the power transistor, the conduction type of the lateral transistor corresponds to the doping type of the power transistor, so that the lateral transistor is an n-type transistor if the power transistor is an n-type transistor, and the lateral transistor is a p-type transistor if the power transistor is a p-type transistor.

[0037] The lateral transistor can be implemented as an enhancement-mode transistor. In this case, the body zone 53 borders the gate dielectric 55, so that an inversion channel must be created in the body zone 53 to turn on the lateral transistor. The lateral transistor could also be implemented as a depletion-mode transistor. In this case, a channel zone of the same conductivity type as the source zone 51 and the drift zone 57 is arranged between the body zone 53 on the gate dielectric 55 and extends from the source zone 51 to the drift zone 57. This channel zone is in Fig. 7 is illustrated by dashed lines.

[0038] According to one embodiment, the body zone 53 and the source zone 51 are arranged midway between two sections of the drain zone 52, both of which are connected to the drain terminal D2. Fig. In Figure 7, one of these sections of the drain zone is optional and is therefore depicted by dashed lines. According to a further embodiment, the drain zone 52 has the shape of a ring that surrounds the drift zone 57, the body zone 53, and the source zone 51 in the horizontal plane.

[0039] In the lateral transistor according to Fig. 7, the gate electrode 54 is implemented as a planar gate electrode arranged above the first surface 101 of the first semiconductor body. However, this is merely an example. Fig. Figure 8 shows a further embodiment of a lateral transistor arranged within the well 41. In this embodiment, the gate electrode 54 is implemented as a trench electrode arranged in a trench extending from the first surface 101 through the source zone 51 and the body zone 53 to or into the drift zone 57. The gate electrode 54 is dielectrically isolated from these device regions of the lateral power transistor by a gate dielectric 55.

[0040] Fig. 9 shows a horizontal section through an embodiment of the further semiconductor component 50, which, as in Fig. 7, is implemented as a lateral power transistor. Referring to Fig. 9, the lateral transistor has a channel width w which is mainly determined by a dimension of the drain region 52 and the source region 51 in a direction perpendicular to a current flow direction in the lateral power transistor.

[0041] At the Fig. 9, the drift zone 57 of the lateral power transistor has a doping concentration that corresponds to the doping concentration of the second semiconductor zone 43.

[0042] Fig. 10 shows a horizontal section of a lateral power transistor according to a further embodiment. In this embodiment, the lateral power transistor comprises a plurality of drift zones 57 extending between the drain zone 52 and the body zone 53, and compensation zones 58 of a doping type complementary to the doping type of the drift zones 57 and adjacent to the drift zones 57. The drift zones 57 can have a higher doping concentration than this first semiconductor zone 42. The second semiconductor zone 43 surrounds the active transistor zones of the lateral power transistor, so that the active transistor zones do not extend to the well 41.

[0043] Implementing the semiconductor component as a lateral transistor in the well 41 is just one of a multitude of different possibilities. According to another, in Fig. 11, the semiconductor component integrated into the well 41 is a lateral diode with a first emitter zone 91, a base zone 93 and a second emitter zone 92. In the embodiment shown in Fig. In the embodiment shown in Figure 11, the second emitter zone 92 is annular and encloses the base zone 93 and the first emitter zone 91 in the horizontal plane. The base zone 93 and the second emitter zone 92 have the same doping type as the second semiconductor zone 43, with the second emitter zone 92 being more heavily doped than the second semiconductor zone 43. The doping concentration of the base zone 93 can correspond to the doping concentration of the second semiconductor zone 43.

[0044] Fig. Figure 12 shows an electrical circuit diagram of a semiconductor device with the vertical power MOSFET and the lateral power transistor, as previously explained. The circuit diagram includes two transistors, namely a first transistor T1, which is the vertical power transistor, and a second transistor T2, which is the lateral power transistor. As shown in Fig. 6 using dashed lines, these two transistors are integrated into a common semiconductor body 100. Six terminals are present on the semiconductor body 100, namely the drain terminal D1, the source terminal S1, and the gate terminal G1 of the first transistor T1, and the drain terminal D2, the source terminal S2, and the gate terminal G2 of the lateral transistor T2. For illustrative purposes only, it is assumed that the two transistors T1, T2 are n-type enhancement transistors.

[0045] Fig. Figure 13 shows an electrical circuit diagram of a semiconductor device with a vertical power MOSFET T1, a lateral power transistor T2 and a lateral power diode D. The power diode can be designed as described with reference to Fig. 9. The lateral power transistor T2 and the lateral power diode D can be integrated into a well 41, or each of these components can be integrated into a separate well 41.

[0046] Fig. 14 shows a first embodiment of an application circuit in which the two transistors T1, T2 integrated in the semiconductor body 100 are implemented. In the circuit according to Fig. 14 is a half-bridge circuit with a low-side transistor formed by the first transistor T1, a high-side transistor T3, and a high-side control circuit 220, which has a level shifter with a transistor of a level shifter. The transistor of the level shifter is formed by the second transistor T2. Optionally, the level shifter includes a bootstrap diode, which can be implemented by the previously explained diode D. In the Fig. In the embodiment shown in Figure 12, the high-side transistor T3 and the low-side transistor T1 are both implemented as n-type enhancement MOSFETs. However, this is merely an example. These two transistors could also be implemented as p-type MOSFETs or as complementary MOSFETs. The high-side transistor T3 and the low-side transistor T1 each have a load path formed by the drain-source paths of the MOSFETs, as well as a control terminal formed by the gate terminal of the individual MOSFETs. In the embodiment shown in Fig. In the embodiment shown in Figure 12, the transistor T2 of the level shifter is also implemented as an n-type enhancement MOSFET. However, this is merely an example. The transistor of the level shifter could also be implemented as any other transistor type that can be implemented in the further dielectric well 50.

[0047] The load paths of the high-side transistor T3 and the low-side transistor T1 are connected in series between terminals for a positive supply potential +Voc and a negative supply potential or reference potential GND. A circuit node common to the load paths of the high-side transistor T3 and the low-side transistor T1 forms an output OUT of the half-bridge circuit.

[0048] The half-bridge circuit further comprises a control circuit 210 to which a first input signal S LS and a second input signal S HS The first input signal S LS defines a desired switching state of the low-side switch T1, and the second input signal S HS defines a desired switching state of the high-side transistor T3. The control circuit 210 is designed to derive from the first input signal S LS a first control signal S DRV1and from the second input signal S HS a second control signal S DRV2 Alternatively and not in Fig. 11, the first control signal S DRV1 and the second control signal S DRV2 from only a single input signal, for example, by using the inverted input signal and adding certain delay times to prevent the low-side switch T1 and the high-side switch T3 from being in a conducting state at the same time. While the first control signal S DRV1 is fed directly to the gate terminal of the low-side transistor T1, a level conversion of the signal level of the second control signal S DRV2 required to drive the high-side transistor T3. For the first and second drive signals S DRV1 , S DRV2These can be signals that are referenced to the reference potential GND. While the low-side transistor T1 uses the first control signal S DRV1 can be switched on and off, a third control signal S is required to switch the high-side transistor T3 on and off. DRV3 , which is related to the electrical potential at the output terminal OUT of the half-bridge circuit, is required. This control signal S DRV3 is generated by the high-side control circuit 220 using the transistor T2 of the level converter, which is connected between the high-side control circuit 220 and the reference potential GND. The second control signal S DRV2 is supplied to the transistor T2 of the level converter. The high-side control circuit 220 is designed to evaluate a switching state of a transistor T2 of a level converter and to supply the third control signal S DRV3depending on the detected switching state of the transistor T2 of the level converter. For example, if the transistor T2 of the level converter is switched on by the second control signal S DRV2 is switched on, the high-side control circuit 220 generates the third control signal S DRV3 to turn on the high-side transistor T3. The reverse voltage capability of the level converter's transistor T2 is approximately equal to the reverse voltage capability of the low-side transistor T1 because, depending on the switching state of the half-bridge circuit, the voltage across the load path of the level converter's transistor T2 is approximately the same as the voltage across the load path of the low-side transistor T1.

[0049] The diode D can be used, for example, as a bootstrap diode to generate a voltage from the supply voltage S Suppof the low-side control circuit 210 to generate a supply voltage of the high-side control circuit 220. When the transistor T1 is in the on state, the reference potential of the high-side control circuit 220 and the high-side transistor T3 is close to the reference potential GND. The lateral power diode D can therefore be in forward operation and form an energy storage device (see, for example, the capacitive storage element 222 in Fig. 11) of the high-side control circuit 220. When the transistor T1 is in the off state, the reference potential of the high-side control circuit 220 and the high-side transistor T3 is, for example, close to the positive supply potential +V DC In this operating state, the lateral diode D prevents the energy storage of the high-side circuit 220 from being discharged and therefore ensures the operation of the high-side circuit 220.

[0050] Fig. 15 shows the half-bridge circuit according to Fig. 14, wherein an embodiment of the high-side control circuit 220 is shown in more detail. In this embodiment, the high-side control circuit 220 comprises a control unit 221 with supply terminals connected to a voltage source 222, an output terminal coupled to the gate terminal of the high-side transistor T3, and an input terminal. Optionally, a gate resistor 224 is connected between the output of the control unit 221 and the gate terminal of the high-side transistor T3. In the specific embodiment according to Fig. 15, the voltage source 222 is implemented as an energy storage element, for example, as a capacitor. A first of the supply terminals of the control unit 221 is connected to a positive supply terminal of the voltage source 222, while a second supply terminal is connected to a negative supply terminal of the voltage source 222 and to the output OUT of the half-bridge circuit. Therefore, the electrical potential at the first supply terminal of the control unit 221 corresponds to the electrical potential of the output terminal OUT plus the supply voltage provided by the voltage source 222.

[0051] Voltage source 222 may also be a voltage source other than an energy storage element powered by a bootstrap diode. In this case, the bootstrap diode D may be omitted, or it may be used for other purposes in the circuit.

[0052] An impedance 223, for example a resistor, is connected between the first supply terminal and the input terminal of the control unit 221, and is also connected in series with the load path of the transistor T2 of the level converter, wherein the series circuit with the impedance 223 and the transistor T2 of the level converter is connected between the positive supply terminal of the voltage source 222 and the reference potential GND. The control unit 221 is designed to evaluate a voltage across the impedance 223 and, depending on the detected voltage across the impedance 223, to generate the third control signal S DRV3 This voltage depends on the switching state of the transistor T2 of the level converter. Alternatively and in Fig. 11 is not shown an additional impedance that can be placed between the impedance 223 and the terminal D2 of the transistor T2 of the level converter, for example to reduce current losses and power losses.

[0053] The working principle of the half-bridge circuit according to Fig. 15 has now been explained. For the purpose of explanation, it is assumed that both the low-side transistor T1 and the high-side transistor T3 are turned off and that in a next step it is desired to turn on the high-side transistor T3. It is further assumed that the electrical potential at the output OUT is somewhere between the reference potential GND and the positive supply potential +V DC This potential at the output OUT depends on the characteristics of a load (not shown) connected to the output OUT and can, for example, during the switching off of the transistor T1, exceed the positive supply potential +VDC For the purpose of explanation only, it is assumed that the electrical potential at the output is approximately 50% of the positive supply potential +V DC The supply potential +V DC is, for example, in the range between 300 V and 600 V.

[0054] When the transistor T2 of the level converter is turned off, the voltage across the impedance 223 is zero, and the voltage across the transistor T2 of the level converter corresponds to the electrical potential at the output OUT plus the supply voltage of the voltage source 222. Therefore, the blocking voltage capability of the transistor T2 of the level converter must be at least equal to the blocking voltage capability of the low-side transistor T1.

[0055] If the second control signal S DRV2When the transistor T2 of the level converter is switched on, a current flows through the impedance 223, so that the voltage across the impedance 223 rises, whereby the electrical potential at the input of the control unit 221 can even drop below the electrical potential at the output terminal OUT. According to one embodiment, the control unit 221 comprises a protection circuit that prevents the electrical potential at the input of the control unit 221 from falling significantly below the electrical potential at the output OUT. According to one embodiment, a diode or an avalanche or Zener diode (shown by dashed lines) or an arrangement comprising a plurality of diodes and / or avalanche or Zener diodes connected in series can be connected between the second supply terminal and the input terminal.The control unit 221 can either evaluate the voltage across the impedance 223, or it can detect a drop in the electrical potential at the input terminal to less than the electrical potential at the output OUT, which is determined by the electrical potential at the second supply terminal of the control unit 221. According to one embodiment, the control unit 221 generates a signal level of the control signal S. DRV3 , which switches on the high-side transistor T3 when the electrical potential at the input terminal of the control unit 221 falls below the electrical potential at the second supply terminal of the control unit 221.

[0056] In addition to a high blocking voltage capability, the transistor T2 of the level converter may also have a high on-resistance to prevent the transistor T2 of the level converter from discharging the voltage source 222 and changing the electrical potential at the output terminal OUT.

Claims

[1] Semiconductor device comprising: a semiconductor body (100); a vertical power transistor arranged in a first component zone (110) of the semiconductor body (100) and comprising: at least one source zone (21), a drain zone (13), at least one body zone (22), at least one drift zone (11) of a first doping type and at least one compensation zone (12) of a second doping type complementary to the first doping type, and a gate electrode (23) arranged adjacent to the at least one body zone (22) and dielectrically insulated from the body zone (22) by a gate dielectric (24); and a lateral high-voltage transistor (50) arranged in a second component zone (120) of the semiconductor body (100), wherein the second component zone (120) has a well-like structure (41) of the second doping type surrounding a first semiconductor zone (42) of the first doping type, wherein the lateral high-voltage transistor (50) has the following component zones arranged in the first semiconductor zone (42): a further source zone (51) and a further drain zone (52) arranged in the first semiconductor zone (42) and spaced apart from one another in a lateral direction of the semiconductor body (100); and at least one further drift zone (57) and one further body zone (53), wherein the further body zone (53) is arranged between the further source zone (51) and the at least one further drift zone (57), wherein the at least one further drift zone (57) is arranged between the further body zone (53) and the further drain zone (52), wherein the further source zone (51), the further drain zone (52) and the further drift zone (57) are of the first doping type and the further body zone (53) is of the second doping type, wherein the lateral high-voltage transistor (50) further comprises: a further gate electrode (54) arranged adjacent to the further body zone (53) and dielectrically insulated from the further body zone (53) by a further gate dielectric (55), wherein a part of the first semiconductor zone (42) forms the at least one further drift zone (57) and the further body zone (53) is arranged in this part of the first semiconductor zone (42). [2] Semiconductor device comprising: a semiconductor body (100); a vertical power transistor arranged in a first component zone (110) of the semiconductor body (100) and comprising: at least one source zone (21), a drain zone (13), at least one body zone (22), at least one drift zone (11) of a first doping type and at least one compensation zone (12) of a second doping type complementary to the first doping type, and a gate electrode (23) arranged adjacent to the at least one body zone (22) and dielectrically insulated from the body zone (22) by a gate dielectric (24); and a lateral high-voltage transistor (50) arranged in a second component zone (120) of the semiconductor body (100), wherein the second component zone (120) has a well-like structure (41) of the second doping type surrounding a first semiconductor zone (42) of the first doping type, wherein the lateral high-voltage transistor (50) has the following component zones arranged in the first semiconductor zone (42): a further source zone (51) and a further drain zone (52) arranged in the first semiconductor zone (42) and spaced apart from one another in a lateral direction of the semiconductor body (100); at least one further drift zone (57) and one further body zone (53); a further compensation zone (58) adjacent to the at least one further drift zone (57), wherein the further body zone (53) is arranged between the further source zone (51) and the at least one further drift zone (57), wherein the at least one further drift zone (57) is arranged between the further body zone (53) and the further drain zone (52), wherein the further source zone (51), the further drain zone (52) and the further drift zone (57) are of the first doping type and the further body zone (53) and the further compensation zone (58) are of the second doping type; and wherein the lateral high-voltage transistor (50) further comprises: a further gate electrode (54) arranged adjacent to the further body zone (53) and dielectrically insulated from the further body zone (53) by a further gate dielectric (55). [3] Semiconductor device according to claim 2, wherein the at least one further compensation zone (58) of the lateral high-voltage transistor is connected to the further body zone (53) or the further source zone (51). [4] Semiconductor device according to claim 2, wherein the at least one further drift zone (57) has the same doping type as the first semiconductor zone (42) and has a higher doping concentration. [5] Semiconductor device according to claim 1 or 2, wherein the second component zone (120) is arranged between the first component zone (110) and an edge of the semiconductor body (100), and wherein the further drain zone (52) is arranged closer to the edge of the semiconductor body (100) than the further source zone (51). [6] Semiconductor device according to claim 1 or 2, wherein a blocking voltage withstand capability of the lateral high-voltage transistor (50) corresponds to a blocking voltage withstand capability of the power transistor. [7] Semiconductor device according to claim 1 or 2, wherein the further source zone (51) and the further body zone (53) are each arranged in the middle between two sections of the further drain zone (52). [8] A semiconductor device according to claim 1 or 2, further comprising a second semiconductor region (43) of the first doping type, which has a higher doping concentration than the first semiconductor region (42) and which is arranged between the well-like structure (41) and the first semiconductor region (42). [9] A semiconductor device according to claim 8, wherein the well-like structure (41) has a bottom portion (411) and sidewall portions (412), and wherein the second semiconductor zone (43) is arranged only between the bottom portion (411) of the well-like structure (41) and the first semiconductor zone (42). [10] Semiconductor arrangement according to one of the preceding claims, wherein the second component zone (120) is spaced from the first component zone (110) in a lateral direction of the semiconductor body (100). [11] Semiconductor device according to claim 10, wherein an edge zone (130) is arranged between the first component zone (110) and the second component zone (120), wherein the edge zone (130) has a plurality of first edge zones (31) of the first doping type extending in a vertical direction of the semiconductor body (100), and a plurality of second edge zones (32) of the second doping type extending in a vertical direction of the semiconductor body (100), wherein each first edge zone (31) adjoins at least one second edge zone (32). [12] Semiconductor arrangement according to one of the preceding claims, wherein the semiconductor body (100) has a first surface (101), and wherein the well-like structure (41) extends to the first surface (101) and has in the region of the first surface (101) a section (44) which is more highly doped than remaining sections of the well-like structure (41). [13] Semiconductor device according to one of the preceding claims, wherein the power transistor comprises a plurality of transistor cells, each of which comprises a source zone (21), a body zone (22), a drift zone (11) and a compensation zone (12), and which have the drain zone (13) as a common drain zone (13). [14] Semiconductor device according to one of the preceding claims, wherein the semiconductor body (100) comprises: a first semiconductor layer forming the drain region (13); and a second semiconductor layer arranged above the first semiconductor layer, wherein the second semiconductor layer comprises the second component zone (120), the at least one drift zone (11), as well as the at least one compensation zone (12), the at least one source zone (21) and the at least one body zone (22) of the power transistor. [15] A semiconductor device according to claim 14, comprising: a semiconductor zone (14) of the first conduction type arranged between the compensation zones (12) and the drain zone (13). [16] Semiconductor device according to claim 15, wherein the semiconductor region (14) of the first conductivity type is further arranged between the well-like structure (41) and the drain region (13) [17] Semiconductor device according to one of claims 14 to 15, wherein the bottom portion (411) of the well-like structure (41) adjoins the drain zone (13). [18] Semiconductor device according to claim 16, wherein the bottom portion (411) of the well-like structure (41) adjoins the semiconductor zone (14) of the first conductivity type.

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