Photodetector

Abstract

To provide a photodetector having a new structure.SOLUTION: A photodetector includes: a compound semiconductor substrate including a first main surface and a second main surface located opposite the first main surface; a sensor array including a plurality of light-receiving elements arranged two-dimensionally on the first main surface; a readout circuit including a silicon substrate including a third main surface connected to the first main surface of the compound semiconductor substrate and a fourth main surface located opposite the third main surface; an adhesive layer provided on the fourth main surface; and a ceramic substrate connected to the fourth main surface of the silicon substrate by the adhesive layer. The silicon substrate has a thickness smaller than that of the compound semiconductor substrate.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to a light detection device. [Background technology]

[0002] Patent Document 1 discloses a photodetector in which a two-dimensional array type photodetector and a readout circuit are connected by In bumps. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-34644 Summary of the Invention [Problem to be solved by the invention]

[0004] The two-dimensional array-type light-receiving element includes a compound semiconductor substrate. The readout circuit includes a silicon substrate. Due to the difference between the thermal expansion coefficients of the compound semiconductor and silicon, the compound semiconductor substrate and the silicon substrate may warp due to temperature changes. Because the thermal expansion coefficient of the compound semiconductor is greater than that of silicon, for example, when the photodetector is cooled, the compound semiconductor substrate shrinks more than the silicon substrate. As a result, the compound semiconductor substrate and the silicon substrate warp. If the warpage becomes too great, cracks may occur in the compound semiconductor substrate or the silicon substrate. Typically, the thickness of the compound semiconductor substrate is set smaller than the thickness of the silicon substrate, taking into account the difference in thermal expansion coefficients.

[0005] The present disclosure provides a photodetector device having a new structure. [Means for solving the problem]

[0006] A photodetector according to one aspect of the present disclosure includes a compound semiconductor substrate including a first main surface and a second main surface opposite the first main surface, a sensor array including a plurality of light-receiving elements arranged two-dimensionally on the first main surface, a readout circuit including a silicon substrate including a third main surface connected to the first main surface of the compound semiconductor substrate and a fourth main surface opposite the third main surface, an adhesive layer provided on the fourth main surface, and a ceramic substrate connected to the fourth main surface of the silicon substrate by the adhesive layer, wherein the silicon substrate has a thickness smaller than that of the compound semiconductor substrate. [Effects of the Invention]

[0007] According to the present disclosure, a photodetector device having a new structure is provided. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a plan view schematically showing a photodetector according to an embodiment. [Figure 2] FIG. 2 is a cross-sectional view taken along line II-II in FIG. [Figure 3] FIG. 3 is an enlarged view of a part of FIG. DETAILED DESCRIPTION OF THE INVENTION

[0009] [Description of the embodiments of the present disclosure] First, embodiments of the present disclosure will be listed and described.

[0010] (1) A photodetector device includes a compound semiconductor substrate including a first main surface and a second main surface opposite the first main surface, a sensor array including a plurality of light-receiving elements arranged two-dimensionally on the first main surface, a readout circuit including a silicon substrate including a third main surface connected to the first main surface of the compound semiconductor substrate and a fourth main surface opposite the third main surface, an adhesive layer provided on the fourth main surface, and a ceramic substrate connected to the fourth main surface of the silicon substrate by the adhesive layer, wherein the silicon substrate has a thickness smaller than that of the compound semiconductor substrate.

[0011] The photodetector of this embodiment has a novel structure in which the silicon substrate has a thickness smaller than that of a compound semiconductor substrate.

[0012] (2) In the above (1), the sensor array may include an insulating film provided on the second main surface, and the insulating film may have a thickness of 0.5 μm or less.

[0013] (3) In the above (1) or (2), the area of ​​the first main surface is 3 cm 2 It may be more than that.

[0014] (4) In any one of the above (1) to (3), the adhesive layer may contain a silicone resin.

[0015] (5) In any one of the above (1) to (4), the compound semiconductor substrate may have a thickness of 250 μm or more and 350 μm or less.

[0016] (6) In any one of the above (1) to (5), the silicon substrate may have a thickness of 150 μm or more and 250 μm or less.

[0017] [Details of the embodiments of the present disclosure] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same or equivalent elements are designated by the same reference numerals, and redundant explanations will be omitted. The drawings show X-axis, Y-axis, and Z-axis directions that intersect with each other. The X-axis, Y-axis, and Z-axis directions are, for example, perpendicular to each other.

[0018] FIG. 1 is a plan view schematically illustrating a photodetector according to one embodiment. FIG. 2 is a cross-sectional view taken along line II-II in FIG. 1. As shown in FIGS. 1 and 2, the photodetector 10 includes a sensor array 20, a readout integrated circuit (ROIC) 30, an adhesive layer 40, and a ceramic substrate 50. The photodetector 10 may be an image sensor capable of detecting light L. The light L may have a wavelength of 4 μm or more and 15 μm or less.

[0019] The sensor array 20 may include a compound semiconductor substrate 22, a plurality of light receiving elements PD, and an insulating film 24. The sensor array 20 may not include the insulating film 24. The compound semiconductor substrate 22 includes a first main surface 22a and a second main surface 22b opposite to the first main surface 22a. The second main surface 22b is an incident surface onto which light L is incident. Each of the first main surface 22a and the second main surface 22b may have a rectangular shape. The area of ​​each of the first main surface 22a and the second main surface 22b is 3 cm 2 May be more than 4cm 2 It may be more than that.

[0020] The compound semiconductor substrate 22 may include a compound semiconductor such as a III-V compound semiconductor. An example of a III-V compound semiconductor includes gallium antimonide (GaSb). The compound semiconductor included in the compound semiconductor substrate 22 may have a Young's modulus smaller than that of silicon. The Young's modulus of GaSb is 63.1 GPa. The Young's modulus of silicon is 163 GPa. The compound semiconductor substrate 22 may have a thickness of 200 μm or more and 500 μm or less. The compound semiconductor substrate 22 may have a thickness of 250 μm or more and 400 μm or less. The compound semiconductor substrate 22 may have a thickness of 350 μm or less. The compound semiconductor substrate 22 may have a thickness of 600 μm or less. In this embodiment, the compound semiconductor substrate 22 has a thickness of 300 μm.

[0021] The plurality of light receiving elements PD are arranged on the first main surface 22a. As shown in Fig. 1, the plurality of light receiving elements PD may be arranged two-dimensionally on the first main surface 22a. Each light receiving element PD may be a photodiode.

[0022] The insulating film 24 is provided on the second main surface 22b of the compound semiconductor substrate 22. The insulating film 24 may be provided over the entire second main surface 22b. The insulating film 24 may be formed by plasma CVD (Chemical Vapor Deposition). The insulating film 24 may have a transmittance of 90% or more for light L.

[0023] The insulating film 24 includes an insulating material. The thermal expansion coefficient of the insulating material included in the insulating film 24 may be smaller than the thermal expansion coefficient of the compound semiconductor included in the compound semiconductor substrate 22. The thermal expansion coefficient of the insulating material included in the insulating film 24 may be 2.5×10 -6 [ / K]Super 5×10 -6 [ / K] or less. An example of the insulating material contained in the insulating film 24 is silicon nitride (SiN x ), silicon oxide (SiO2), and silicon oxynitride (SiO x N y ) including SiN x The thermal expansion coefficient of is 2.9 x 10 -6 [ / K]

[0024] The insulating material contained in the insulating film 24 may have a Young's modulus greater than that of the compound semiconductor contained in the compound semiconductor substrate 22. x The Young's modulus of SiO is between 97 GPa and 168 GPa. x N y The Young's modulus of SiN is between 67GPa and 94GPa. x or SiO x N y The Young's modulus can be adjusted by the flow rate of silane gas when forming the insulating film 24.

[0025] The insulating film 24 may have a thickness of 0.5 μm or less. In this embodiment, the insulating film 24 has a thickness of 0.3 μm. The insulating film 24 includes a lower surface 24a located on the second main surface 22b and an upper surface 24b located opposite the lower surface 24a. In this embodiment, the insulating film 24 has a substantially uniform thickness throughout the entire insulating film 24. That is, in this embodiment, the lower surface 24a and the upper surface 24b are parallel to each other and are flat. Here, "the insulating film 24 has substantially the same thickness" does not necessarily mean that the insulating film 24 has the same thickness at all positions. The insulating film 24 may have a substantially uniform thickness even if it includes slight differences, manufacturing errors, or measurement errors within a predetermined range.

[0026] The readout circuit 30 receives an electrical signal from the sensor array 20. The readout circuit 30 may include a multiplexer using CMOS (Complementary Metal Oxide Semiconductor). The readout circuit 30 includes a silicon substrate 32. The silicon substrate 32 includes a third main surface 32a connected to the first main surface 22a of the compound semiconductor substrate 22 and a fourth main surface 32b opposite to the third main surface 32a. The third main surface 32a includes a circuit. Each of the third main surface 32a and the fourth main surface 32b may have a rectangular shape. The area of ​​each of the third main surface 32a and the fourth main surface 32b is 4 cm 2May be more than 4.5cm 2 The area of ​​each of the third major surface 32a and the fourth major surface 32b may be larger than the area of ​​each of the first major surface 22a and the second major surface 22b, or may be smaller than the area of ​​each of the first major surface 22a and the second major surface 22b.

[0027] The silicon substrate 32 may have a thickness of 150 μm or more and 400 μm or less. The silicon substrate 32 may have a thickness of 200 μm or more and 300 μm or less. The silicon substrate 32 may have a thickness of 250 μm or less. In this embodiment, the silicon substrate 32 has a thickness of 200 μm. The thermal expansion coefficient of silicon contained in the silicon substrate 32 may be smaller than the thermal expansion coefficient of the compound semiconductor contained in the compound semiconductor substrate 22. The thermal expansion coefficient of silicon is 1.6×10 -6 As described above, an example of a III-V group compound semiconductor included in the compound semiconductor substrate 22 is GaSb, and the thermal expansion coefficient of GaSb is 5.4×10 -6 [ / K]

[0028] The adhesive layer 40 is provided on the fourth main surface 32b of the silicon substrate 32. The adhesive layer 40 may include at least one of a silicone resin and a cured product of a silver paste. In this embodiment, the adhesive layer 40 includes a silicone resin. The adhesive layer 40 may have a thickness of 100 μm or more and 400 μm or less. In this embodiment, the adhesive layer 40 has a thickness of 300 μm.

[0029] The ceramic substrate 50 is connected to the fourth main surface 32b of the silicon substrate by an adhesive layer 40. That is, in the photodetector 10, the adhesive layer 40 is disposed between the fourth main surface 32b and the ceramic substrate 50. The ceramic substrate 50 may include aluminum nitride (AlN). The ceramic substrate 50 may have a thickness greater than that of the compound semiconductor substrate 22. The ceramic substrate 50 may have a thickness of 600 μm or more and 900 μm or less. In this embodiment, the ceramic substrate 50 has a thickness of 750 μm. The thermal expansion coefficient of the ceramic material contained in the ceramic substrate 50 may be smaller than that of the compound semiconductor contained in the compound semiconductor substrate 22. The thermal expansion coefficient of the ceramic material contained in the ceramic substrate 50 may be larger than that of silicon. The thermal expansion coefficient of AlN is 2.8×10 -6 [ / K]

[0030] Here, the relationship between the thicknesses of the compound semiconductor substrate 22, the silicon substrate 32, and the ceramic substrate 50 in the photodetector 10 will be described. The silicon substrate 32 has a thickness smaller than that of the compound semiconductor substrate 22. The thickness of the compound semiconductor substrate 22 may be 1.25 to 4 times the thickness of the silicon substrate 32. The silicon substrate 32 may have a thickness smaller than that of the ceramic substrate 50. In this case, the thickness of the silicon substrate 32 may be 0.2 to 0.55 times the thickness of the ceramic substrate 50. The thickness of the ceramic substrate 50 may be larger than that of the compound semiconductor substrate 22. The thickness of the ceramic substrate 50 may be 1.5 to 4 times the thickness of the compound semiconductor substrate 22. When the thicknesses of the compound semiconductor substrate 22, the silicon substrate 32, and the ceramic substrate 50 are T1, T2, and T3, respectively, the magnitude relationship among the thicknesses T1, T2, and T3 may satisfy T3>T1>T2.

[0031] The photodetector 10 may further include at least one conductor 60. The at least one conductor 60 may be disposed between the third main surface 32a of the silicon substrate 32 and the first main surface 22a of the compound semiconductor substrate 22. The at least one conductor 60 may be a plurality of conductors 60 arranged two-dimensionally on the first main surface 22a or the third main surface 32a. In this case, the plurality of conductors 60 may be spaced apart from one another. Each conductor 60 connects the third main surface 32a of the silicon substrate 32 to the first main surface 22a of the compound semiconductor substrate 22. Each conductor 60 is a bump containing a metal such as indium. Each conductor 60 electrically connects the second electrode E2 (see FIG. 3 ) of each light-receiving element PD to an electrode provided on the third main surface 32a of the silicon substrate 32. Each conductor 60 may have a thickness of 4 μm to 6 μm. In this embodiment, a resin portion 70 may be disposed between adjacent conductors 60. That is, the photodetector 10 may further include a resin part 70.

[0032] Next, the configuration of the multiple light receiving elements PD will be described in more detail with reference to FIG. 3. FIG. 3 is an enlarged view of a portion of FIG. 2. As shown in FIG. 3, each of the multiple light receiving elements PD may include an n-type semiconductor layer 22n, a light absorbing layer 22i, and a p-type semiconductor layer 22p. The n-type semiconductor layer 22n is provided on the first main surface 22a of the compound semiconductor substrate 22. The light absorbing layer 22i is provided on the n-type semiconductor layer 22n. The p-type semiconductor layer 22p is provided on the light absorbing layer 22i. A first electrode E1 is connected to the n-type semiconductor layer 22n. A second electrode E2 is connected to the p-type semiconductor layer 22p. The light absorbing layer 22i and the p-type semiconductor layer 22p are included in a mesa MS provided on the n-type semiconductor layer 22n. The first electrode E1 is spaced apart from the mesa MS.

[0033] Each of the n-type semiconductor layer 22n and the p-type semiconductor layer 22p may include a III-V compound semiconductor. A first barrier layer may be disposed between the n-type semiconductor layer 22n and the light absorbing layer 22i. A second barrier layer may be disposed between the p-type semiconductor layer 22p and the light absorbing layer 22i. That is, each of the plurality of light receiving elements PD may include a first barrier layer and a second barrier layer. Each of the first barrier layer and the second barrier layer may include a III-V compound semiconductor.

[0034] The light-absorbing layer 22i is sensitive to light L. The light-absorbing layer 22i may include a III-V compound semiconductor. The III-V compound semiconductor may be a ternary compound or a quaternary compound. In this case, the composition of the III-V compound semiconductor can be changed. An example of a ternary compound is indium gallium arsenide (InGaAs). An example of a quaternary compound is indium gallium arsenide phosphide (InGaAsP). The light-absorbing layer 22i may have a type-II superlattice structure. In this case, each light-receiving element PD can detect long-wavelength infrared light. The type-II superlattice structure may include multiple InGaAs layers and multiple GaAsSb layers. The InGaAs layers and GaAsSb layers are alternately stacked. The light-absorbing layer 22i may be a bulk layer of a III-V compound semiconductor.

[0035] The photodetector device 10 has a novel structure in which the silicon substrate 32 has a thickness smaller than that of the compound semiconductor substrate 22 .

[0036] The photodetector 10 can prevent the occurrence of cracks that can occur in the compound semiconductor substrate 22 and the silicon substrate 32 due to temperature changes. For example, when the photodetector 10 is cooled, the compound semiconductor substrate 22 and the silicon substrate 32 may warp due to temperature changes due to the difference between the thermal expansion coefficient of the compound semiconductor and that of silicon. Because the thermal expansion coefficient of the compound semiconductor is greater than that of silicon, when the photodetector 10 is cooled, for example, the compound semiconductor substrate 22 shrinks more than the silicon substrate 32. As a result, the compound semiconductor substrate 22 and the silicon substrate 32 warp. In the photodetector 10, although the thickness of the silicon substrate 32 is smaller than the thickness of the compound semiconductor substrate 22, the occurrence of cracks can be prevented.

[0037] When the adhesive layer 40 contains a silicone resin, the occurrence of cracks can be further prevented.

[0038] Although the preferred embodiments of the present disclosure have been described in detail above, the present disclosure is not limited to the above embodiments. The components of the respective embodiments may be combined in any manner.

[0039] The following describes experiments conducted to evaluate the photodetector 10. The experiments described below do not limit the present disclosure.

[0040] (First experiment) In the first experiment, a photodetector, which is an example of the photodetector 10 shown in FIGS. 1 to 3, was first prepared. The photodetector included a sensor array including a compound semiconductor substrate and a plurality of light-receiving elements, a readout circuit including a silicon substrate, an adhesive layer, and a ceramic substrate. The compound semiconductor substrate included a first main surface and a second main surface located opposite the first main surface. The compound semiconductor substrate included GaSb as a III-V compound semiconductor. The plurality of light-receiving elements were two-dimensionally arranged on the first main surface. The silicon substrate included a third main surface connected to the first main surface of the compound semiconductor substrate and a fourth main surface located opposite the third main surface. An adhesive layer was provided on the fourth main surface and included a silicone resin. The ceramic substrate was connected to the fourth main surface of the silicon substrate by the adhesive layer.

[0041] The compound semiconductor substrate had a thickness of 300 μm. The silicon substrate had a thickness of 200 μm. The ceramic substrate had a thickness of 750 μm. In other words, in this experiment, the silicon substrate had a thickness smaller than the compound semiconductor substrate and the ceramic substrate. The prepared photodetector was then cooled from 300 K to 77 K.

[0042] (First experiment results) In the first experiment, we checked whether cracks had occurred in the compound semiconductor substrate and silicon substrate of the photodetector cooled from 300 K to 77 K. As a result, we confirmed that no cracks had occurred in the compound semiconductor substrate and silicon substrate.

[0043] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined by the claims, not by the above meaning, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0044] 10...Photodetector 20...Sensor array 22...Compound semiconductor substrate 22a...First principal surface 22b…Second main surface 22i...light absorbing layer 22n...n-type semiconductor layer 22p...p-type semiconductor layer 24...Insulating film 24a…Bottom surface 24b…Top surface 30...Readout circuit 32...Silicon substrate 32a...Third principal surface 32b…4th principal surface 40...adhesive layer 50...Ceramic substrate 60...Conductor 70...Resin part E1…1st electrode E2…Second electrode L…Light MS…Mesa PD...photodetector

Claims

1. a compound semiconductor substrate including a first main surface and a second main surface located opposite to the first main surface; and a sensor array including a plurality of light receiving elements arranged two-dimensionally on the first main surface; a readout circuit including a silicon substrate including a third main surface connected to the first main surface of the compound semiconductor substrate and a fourth main surface located on the opposite side to the third main surface; an adhesive layer provided on the fourth main surface; a ceramic substrate connected to the fourth main surface of the silicon substrate by the adhesive layer; The silicon substrate has a thickness smaller than that of the compound semiconductor substrate.

2. the sensor array includes an insulating film provided on the second main surface, The photodetector device according to claim 1 , wherein the insulating film has a thickness of 0.5 μm or less.

3. The area of ​​the first main surface is 3 cm ２ 3. The photodetector according to claim 1 or 2, wherein:

4. The light detection device according to claim 1 or 2, wherein the adhesive layer contains a silicone resin.

5. 3. The photodetector according to claim 1, wherein the compound semiconductor substrate has a thickness of 250 [mu]m or more and 350 [mu]m or less.

6. 3. The photodetector according to claim 1, wherein the silicon substrate has a thickness of 150 μm or more and 250 μm or less.

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