Constant voltage circuit

Abstract

To realize a circuit with a small circuit area that prevents oscillations due to repeated mode transitions even when an output capacitor of a constant voltage circuit is large.SOLUTION: A constant voltage circuit controls an output current based on an error voltage between a reference voltage and an output voltage divided voltage. A mode switching circuit outputs a mode switching signal indicating a high speed mode when a first current proportional to an output current is equal to or more than a first threshold value. A switching oscillation prevention circuit generates a time integral value by integrating a second current proportional to the output current with time, outputs an output voltage based on the time integral value, and when the second current is equal to or more than a second threshold value, changes an increase rate of the output voltage so that the increase rate becomes greater with an increase in the time integral value. Based on the mode switching signal indicating the high speed mode of the mode switching circuit, a control circuit performs control so as to increase a bias current of the current source when the output voltage of the switching oscillation prevention circuit is equal to or more than a predetermined third threshold value.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a constant voltage circuit having a low current consumption operation mode in which it operates with low current consumption, and a high-speed operation mode in which it consumes a large current but is capable of high-speed response operation. [Background technology]

[0002] As systems become increasingly power-efficient year by year, constant voltage circuits have also become equipped with mode switching circuits to reduce power consumption and achieve both low current consumption and high-speed response (see Patent Documents 1 to 3). Such constant voltage circuits are, for example, LDOs (Low Dropout), and are widely used as linear regulators that can operate even with a relatively low input-output potential difference. Note that field-effect transistors will be referred to as "transistors" below.

[0003] For example, a constant-voltage power supply disclosed in Patent Document 1 has the following configuration for controlling the current consumed by a voltage regulator (VR) according to the load state. The constant-voltage power supply includes a high-speed voltage stabilization unit having a first operational amplifier with a large current consumption and a low-speed voltage stabilization unit having a second operational amplifier with a small current consumption. The output terminal of the first operational amplifier is connected to the gate electrode of an output transistor via a first switching means, and the output terminal of the second operational amplifier is connected to the gate electrode of the output transistor via a second switching means. The first and second switching means are controlled by a switching logic circuit, and the high-speed voltage stabilization unit is turned on when the load is in active mode, and the low-speed voltage stabilization unit is turned on when the load is in sleep mode. The switching logic circuit generates a period during which the high-speed voltage stabilization unit 29a and the low-speed voltage stabilization unit are simultaneously turned on during mode switching.

[0004] Furthermore, for example, the constant voltage circuit disclosed in Patent Document 2 has the following configuration to suppress fluctuations in output voltage that occur when the operation of the high-speed error amplifier circuit is stopped and switching is made to operation only with the low-speed error amplifier circuit: In this constant voltage circuit, the bias current control circuit increases the bias current of the second error amplifier circuit while the first error amplifier circuit capable of high-speed operation is in operation, and after the first error amplifier circuit stops operating, keeps the bias current of the second error amplifier circuit large during the period when fluctuations in output voltage are expected, while gradually switching the bias current of the second error amplifier circuit over time.

[0005] Furthermore, for example, the power supply device disclosed in Patent Document 3 has the following configuration in order to achieve both low current consumption and high-speed response: The power supply device includes a first transistor that outputs an output voltage according to an input voltage, a first amplifier that feedback-controls the output voltage, a second transistor that outputs a current according to the output current of the first transistor, a first current source that supplies a current flowing to the first amplifier, and a second current source that increases the current flowing to the first amplifier when the output current of the second transistor exceeds a predetermined threshold. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Patent No. 3394509 [Patent Document 2] Patent No. 5068631 [Patent Document 3] Japanese Patent Application Laid-Open No. 2017-126259 Summary of the Invention [Problem to be solved by the invention]

[0007] In order to solve the problems of the power supply device disclosed in Patent Document 3, for example, in a constant voltage circuit that provides a delay time when transitioning from high-speed mode to low-power mode, the time it takes for the output voltage to drop from overshoot to the set value is determined depending on the output capacitor and the load current, so if the output capacitor is large, a long delay is required, which leads to the problem of an increase in the circuit area of ​​the delay generation section.

[0008] An object of the present invention is to solve the above problems and to provide a constant voltage circuit that can be realized with a small circuit area and that prevents oscillations that cause repeated transitions between modes even when the output capacitor of the constant voltage circuit is large. [Means for solving the problem]

[0009] A constant voltage circuit according to one aspect of the present invention comprises: an output transistor that controls an output current based on the error voltage and outputs an output voltage; an error amplifier that compares a divided voltage of the output voltage with a predetermined reference voltage and outputs the error voltage to the output transistor; a mode switching circuit that compares a first current proportional to the output current with a predetermined first threshold value, and outputs a mode switching signal indicating a high-speed mode when the first current is equal to or greater than the first threshold value; a current source that increases a bias current of the error amplifier based on a mode switching signal that indicates the high-speed mode, the constant voltage circuit is a switching oscillation prevention circuit that generates a time integral value by integrating a second current proportional to the output current with respect to time, and outputs an output voltage based on the time integral value, and when the second current is equal to or greater than a predetermined second threshold value, changes the rate of increase of the output voltage so that the rate of increase increases as the time integral value increases; a control circuit that controls the bias current of the current source to increase when the output voltage of the switching oscillation prevention circuit is equal to or greater than a predetermined third threshold value, based on a mode switching signal that indicates the high-speed mode of the mode switching circuit; Equipped with. [Effects of the Invention]

[0010] Therefore, a constant voltage circuit according to one embodiment of the present invention includes a switching oscillation prevention circuit that, when the load current changes from heavy to light and the LDO switches from low-power mode to high-speed mode, determines whether the increase in output current is due to a change in load current or an increase due to charging current to the output capacitor, and masks the change so as not to switch modes if it is due to charging current to the output capacitor. This prevents transition to high-speed mode even if the output current momentarily exceeds the high-speed mode threshold due to charging current to the output capacitor when the load current is small, thereby realizing a circuit that prevents oscillation due to repeated mode transitions in a small area without using a circuit that generates long delays. [Brief explanation of the drawings]

[0011] [Figure 1] FIG. 1 is a circuit diagram showing a configuration of a constant voltage circuit 1 according to a comparative example. [Figure 2] 1 is a circuit diagram showing an example of the configuration of a constant voltage circuit 1A according to a first embodiment. [Figure 3] 3 is a timing chart of each voltage and each current showing an example of operation of the constant voltage circuit 1A of FIG. 2. [Figure 4] FIG. 10 is a circuit diagram showing a configuration example of a constant voltage circuit 1B according to a second embodiment. [Figure 5] 10 is a circuit diagram showing a configuration example of a constant voltage circuit 1C according to a third embodiment. FIG. [Figure 6] FIG. 10 is a circuit diagram showing a configuration example of a constant voltage circuit 1D according to a fourth embodiment. [Figure 7] 7 is a timing chart of each voltage and each current showing an example of operation of the constant voltage circuit 1D of FIG. 6. [Figure 8] FIG. 10 is a circuit diagram showing a configuration example of a constant voltage circuit 1E according to a fifth embodiment. [Figure 9] FIG. 10 is a circuit diagram showing an example of the configuration of a constant voltage circuit 1F according to a sixth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, embodiments and modifications of the present invention will be described with reference to the drawings, in which the same or similar components are designated by the same reference numerals.

[0013] (Inventor's Knowledge) First, the configuration, operation, and problems of constant voltage circuits of comparative examples will be described, and then embodiments and modifications of the present invention will be described below.

[0014] The constant voltage circuit disclosed in Patent Document 3 has two operation modes: a low current consumption operation mode (hereinafter referred to as the low consumption mode) and a high-speed response operation mode (hereinafter referred to as the high-speed mode). Here, the low consumption mode is an operation mode used under light loads (load current smaller than a predetermined value), and reduces current consumption by reducing the current consumption (bias current) of the error amplifier that controls the output transistor. On the other hand, the high-speed mode is an operation mode used under heavy loads (load current larger than a predetermined value), and achieves high-speed response by increasing the current consumption (bias current) of the error amplifier that controls the output transistor.

[0015] The constant voltage circuit disclosed in Patent Document 3 has a threshold for switching to a high-speed mode and a threshold for switching to a low-power mode. The circuit switches to the high-speed mode when the output current exceeds the high-speed mode threshold, and to the low-power mode when the output current falls below the low-power mode threshold. In the low-power mode, the constant voltage circuit consumes less current, but the response speed for returning the output voltage of the constant voltage circuit to the set value when it deviates from the set value is slow. In the high-speed mode, the constant voltage circuit consumes more current, but the response speed for returning the output voltage to the set value when it deviates from the set value is fast. A constant voltage circuit with this mode switching function has a problem: after the load current changes from a heavy load to a light load, the constant voltage circuit switches to the high-speed mode, even though the load current is still in the light load state. Then, the circuit enters an oscillation state in which it repeatedly transitions between the low-power mode and the high-speed mode.

[0016] In order to solve the above problem, a comparative example of a constant voltage circuit can be considered in which a delay time is provided to maintain high-speed mode until the output voltage recovers from overshoot and converges to the set value, thereby preventing charging current from flowing to the output capacitor after switching to low-power mode, and thus not switching to high-speed mode.

[0017] 1 is a circuit diagram showing the configuration of a constant voltage circuit 1 according to a comparative example. The constant voltage circuit of FIG. 1 differs from the constant voltage circuit disclosed in Patent Document 3 in the following respects. (1) A delay generating unit 60 is further provided for when the high-speed mode is switched to the low-power mode. (2) The delay generation unit 60 includes a constant current source 24 that supplies a constant current I50, an inverter INV51, a capacitor C50, and an inverter INV52. Here, the inverter INV51 includes a P-channel transistor M51 and an N-channel transistor M52.

[0018] In the constant voltage circuit 1 of FIG. 1, the output transistor M0 controls the power supply current from the power supply voltage VDD in accordance with the error voltage from the error amplifier 11, thereby outputting the output current Io to the feedback circuit 13, the output capacitor Co, and the load 15. The feedback circuit 13 is composed of two voltage-dividing resistors connected in series, divides the output voltage Vo induced by the output current Io, and outputs the divided feedback voltage Vf to the non-inverting input terminal of the error amplifier 11. A bias current is supplied to the error amplifier 11 by connecting a constant current source 21 of a constant current Ib1 and a series circuit of a switch S1 and a constant current source 22 of a constant current Ib2. Turning on the switch S1 increases the bias current, setting the high-speed mode, while turning off the switch S1 reduces the bias current, setting the low-power mode.

[0019] An error amplifier 11 generates an error voltage between a feedback voltage Vf and a reference voltage Vref from a reference voltage source 10, and outputs the error voltage to the gates of the output transistor M0 and the current detection transistor M3. The current detection transistor M3 detects the error voltage as a current I3 proportional to the output current Io and inputs it to the non-inverting input terminal of a current comparator 12. The current comparator 12 compares the constant current I4 from a constant current source 23 with the current I3, and inputs the resulting signal (mode switching signal) to the switch S1 via a delay generation unit 60, thereby delaying the detection timing of the transition from the high-speed mode to the low-power mode (the transition of the switch S1 from on to off).

[0020] In the constant voltage circuit 1 of FIG. 1, which includes a delay generator 60 that provides a delay time when transitioning from high-speed mode to low-power mode as described above, the time it takes for the output voltage to drop from overshoot to the set value depends on the output capacitor and the load current, so a large output capacitor requires a long delay, which leads to an increase in the circuit area of ​​the delay generator. In the following, we describe constant voltage circuits 1A-1F that solve the above problem and can realize a circuit with a small circuit area that prevents oscillations that repeatedly transition between modes, even when the output capacitor of the constant voltage circuit is large. The constant voltage circuits 1A-1F according to each embodiment are, for example, LDOs.

[0021] (Embodiment 1) Fig. 2 is a circuit diagram showing an example of the configuration of a constant voltage circuit 1A according to embodiment 1. Compared to the constant voltage circuit 1 in Fig. 1, the constant voltage circuit 1A in Fig. 2 is characterized in that it further includes a switching oscillation prevention circuit 32. The following description will focus on this difference.

[0022] In FIG. 2, the mode switching circuit 31 corresponds to the constant current source 23 and the error amplifier 12, which is, for example, an operational amplifier, shown in FIG. 1. A current I3 proportional to the output current Io flowing from the output transistor M0, which is, for example, a P-channel transistor, is detected by a current detection transistor M3, which is, for example, a P-channel transistor. The mode switching circuit 31 detects an increase or decrease in the output current Io based on the detected current I3. When the current I3 is equal to or greater than a predetermined threshold current I31h, the mode switching circuit 31 outputs an output voltage V1, which is a high-level mode switching signal indicating high-speed mode. When the current I3 is equal to or less than a predetermined low-power mode threshold current I31l, the mode switching circuit 31 outputs an output voltage V1, which is a low-level mode switching signal indicating low-power mode. The threshold current I31h of the mode switching circuit 31 corresponds to the high-speed mode threshold current Ioh for the output current Io, where I31h = a3 · Ioh. The threshold current I31l of the mode switching circuit 31 corresponds to the low-power mode threshold current Iol for the output current Io, where I31l = a3 · Iol.

[0023] A current I1 proportional to the output current Io flowing from the output transistor M0 is detected by a current detection transistor M1, which may be a P-channel transistor, and the current I1 is input to a switching oscillation prevention circuit 32. The switching oscillation prevention circuit 32 includes a current comparison circuit having a predetermined current threshold I32th and a charging circuit (time integration circuit). The switching oscillation prevention circuit 32 detects an increase or decrease in the output current Io based on the current I1 proportional to the current Io of the transistor M0. Specifically, when the current I1 exceeds the current threshold I32th, the switching oscillation prevention circuit 32 changes the output voltage V2 according to the time integral of the current I1, as shown in the following equation:

[0024] V2=∫(I1(t)+b1)dt×b2

[0025] Here, b1 and b2 are constants determined by the circuitry of the switching oscillation prevention circuit 32.

[0026] Here, the switching oscillation prevention circuit 32 operates as follows. (1) When the load current Il increases and the output current Io also increases, since the time integral value of the current I1 is relatively large, the output voltage V2 rises steeply. (2) When the load current Il is small and the charging current Ic to the output capacitor Co increases and the output current Io increases, since the charging current Ic flows only for a short time until the output voltage Vo returns, the time integral value of the current I1 is relatively small, and the output voltage V2 rises gently. (3) That is, according to the magnitude of the time integral value of the current I1, the increase rate of the output voltage V2 is changed so that the increase rate increases as the time integral value increases. (4) When the current I1 does not exceed a predetermined threshold value, the output voltage V2 becomes the ground level.

[0027] The AND gate 33 has a predetermined threshold value and outputs a high-level or low-level output voltage V33, which is the logical product of the output voltage V1 of the mode switching circuit 31 and the output voltage V2 of the switching oscillation prevention circuit 32, to the control terminal of the switch S1. The switch S1 is turned on based on the high-level output voltage V33 and turned off based on the low-level output voltage V33. The AND gate 33 is an example of the control circuit of the present invention.

[0028] The constant voltage circuit 1A configured as described above operates as follows when shifting from the low power consumption mode to the high speed mode. (1) The output current Io becomes equal to or greater than the high speed mode threshold current Ioh, and the current I3 (= a3·Io; 0 < a3 < 1) becomes equal to or greater than the threshold current I31h. At this time, the mode switching circuit 31 outputs a high-level output voltage V1. (2) On the other hand, the output voltage V2 of the switching oscillation prevention circuit 32 rises according to the current I1 (= a1·Io; 0 < a1 < 1) and becomes high level when it becomes equal to or greater than a predetermined threshold value. When both of the two voltages V1 and V2 applied to the AND gate 33 are at the high level, the AND gate 33 outputs a high-level output voltage V33 to the control terminal of the switch S1 to turn on the switch S1. As a result, the bias current of the error amplifier 11 increases, and the constant voltage circuit 1A operates in the high-speed mode.

[0029] Also, when the constant voltage circuit 1A shifts from the high-speed mode to the low-power consumption mode, it operates as follows. (1) When the output current Io becomes less than or equal to the low-power consumption mode threshold current Iol and the current I3 (= a3·Io; 0 < a3 < 1) becomes less than or equal to the threshold current I31l, the mode switching circuit 31 outputs a low-level output voltage V1. (2) On the other hand, when the current I1 becomes less than or equal to a predetermined threshold, the output voltage V2 of the switching oscillation prevention circuit 32 drops to the ground level. (3) When either of the output voltages V1 and V2 becomes low level, the switch S1 is turned off, the bias current of the error amplifier 11 decreases, and the constant voltage circuit 1A enters the low-power consumption mode.

[0030] FIG. 3 is a timing chart of each voltage and each current showing an operation example of the constant voltage circuit 1A in FIG. 2.

[0031] At time t1 in FIG. 3, the constant voltage circuit 1A is operating in the low-power consumption mode. As the load 15 changes from a light load to a heavy load, the load current Il increases. Due to the response delay of the constant voltage circuit 1A, the output voltage Vo undershoots and reaches the lower limit (201). Next, the output transistor M0 supplies a charging current Ic to the output capacitor Co to return the load current Il and the output voltage Vo to a predetermined set voltage value Vos, and the output current Io increases and becomes greater than or equal to the high-speed mode threshold (202). At this time, the current I3 corresponding to the output current Io also increases and becomes greater than or equal to the threshold current I31h, and the mode switching circuit 31 outputs a high-level output voltage V1.

[0032] On the other hand, the load current Il increases, causing the output current Io to increase rapidly, and the current I1 also increases rapidly in a short time, exceeding the threshold current I32th (203). At this time, the time integral value of the current I1 also increases, causing the output voltage V2 of the switching oscillation prevention circuit 32 to rise in a short time, and when it exceeds the threshold voltage V33th of the AND gate 33, the switching oscillation prevention circuit 32 outputs a high-level output voltage V2 (204).

[0033] The two voltages V1 and V2 input to the AND gate 33 both become high level, and the AND gate 33 outputs a high level output voltage V33 to the switch S1, turning on the switch S1. As a result, the bias current of the error amplifier 11 increases from current Ib1 to current (Ib1+Ib2), and the constant voltage circuit 1A transitions to the high-speed mode. Then, at time t1', charging of the output capacitor Co is completed, the charging current Ic disappears, and the output current Io becomes only the load current Il.

[0034] At time t2, the load 15 changes from a heavy load to a light load, causing the load current Il to decrease, and a delayed response from the constant voltage circuit 1A causes the output current Io to charge the output capacitor Co, at which point the output voltage Vo overshoots, and the response of the constant voltage circuit 1A causes the charging of the output capacitor Co from the output current Io to stop. The output current Io then decreases and becomes equal to or less than the low consumption mode threshold value Iol, and therefore equal to or less than the threshold current I31l of the mode switching circuit 31, causing the mode switching circuit 31 to output a low-level output voltage V1 (205).

[0035] Meanwhile, the output voltage V2 of the switching oscillation prevention circuit drops and becomes equal to or lower than the threshold voltage V33th of the AND gate 33 (206). When either of the two voltages V1, V2 to the AND gate 33 goes low, the output voltage V33 to the switch S1 goes low, and the switch S1 is turned off. At this time, the bias current of the error amplifier 11 decreases from the current (Ib1+Ib2) to the current Ib1, and the constant voltage circuit 1A transitions to the low consumption mode.

[0036] Next, the operation in the low consumption mode from time t3 to time t7 will be described below.

[0037] At time t3, the load current Il remains below the low-power mode threshold current, and the output voltage Vo drops to the set voltage value Vos of the constant voltage circuit 1A due to discharge from the output capacitor Co. Here, the constant voltage circuit 1A has a slow response because it has transitioned to the low-power mode, and the output voltage Vo undershoots below the set voltage value Vos.

[0038] At time t4, in order to return the output voltage Vo from the undershoot to the set voltage value Vos of the constant voltage circuit 1A, a charging current Ic flows from the output transistor M0 to the output capacitor Co, and the output current Io increases due to the charging current Ic. When the output current Io becomes equal to or greater than the high-speed mode threshold value Ioh, the current I3 also increases and becomes equal to or greater than the threshold current I31h, causing the mode switching circuit 31 to output a high-level output voltage V1 (208).

[0039] Meanwhile, the charging current Ic increases, causing the output current Io to increase, and the current I1 also increases. At this time, the time integral of the current I1 also increases, and the current I1 becomes equal to or greater than the threshold current I32th (209). The load current Il is equal to or less than the low-consumption mode threshold current Iol. The output current Io is dominated by the charging current Ic to the output capacitor Co, and is smaller than when the load current Il increases. Therefore, the time integral of the current I1 is relatively small. Here, the output voltage V2 of the switching oscillation prevention circuit 32 increases, but the time integral of the current I1 is relatively small, so it hardly increases at all. Furthermore, because the output voltage V2 does not reach the threshold V33th of the AND gate 33, the AND gate 33 maintains the output voltage V33 at a low level. At this time, the switch S1 is not turned on, so even though the mode switching circuit 31 outputs a high-level output voltage V1, the high-speed mode is not selected, and the low-consumption mode is maintained.

[0040] The output voltage Vo rises above the set voltage value Vos, and the output current Io stops charging the output capacitor Co and decreases, becoming below the low-consumption mode threshold current Iol (210). The current I3 also decreases and becomes below the threshold current I31l of the mode switching circuit 31. At this time, the mode switching circuit 31 outputs a low-level output voltage V31. Meanwhile, the current I1 also decreases and becomes below the threshold current I32th of the switching oscillation prevention circuit 32 (211), and the output voltage V2 drops (221). At this time, the switch S1 is not turned on, so the constant voltage circuit 1A remains in the low-consumption mode at time t5.

[0041] At time t6, ringing occurs until the output voltage Vo converges. From time t6 to t7, the same operation as from time t4 to t5 is performed (212, 213, 214, 215), and the mode switching circuit 31 outputs a high-level output voltage V1. Here, the output current Io increases, but the increase is smaller than the output current Io from time t4 to t5. Also, although the current I1 flows, the time integral value from time t6 to t7 is smaller than the time integral value from time t4 to t5. Furthermore, the output voltage V2 increases as in time t4 to t5, but the time integral value from time t6 to t7 is smaller than the time integral value from time t4 to t5. Therefore, the increase in the output voltage V2 of the switching oscillation prevention circuit 32 is also smaller than that from time t4 to t5. Even though the current I1 increases, the output voltage V2 does not rise to the threshold value V33th of the AND gate 33 but drops (222). Therefore, as in time t4 to t5, the ringing subsides while maintaining the low-power consumption mode.

[0042] As explained above, when the output current Io is equal to or greater than the high-speed mode threshold current Ioh due to the charging current Ic, as in the time periods t4 to t7, the mode switching circuit 31 outputs a high-level output voltage V1 indicating the high-speed mode, but the switching oscillation prevention circuit 32 and the AND gate 33 mask this to prevent the constant voltage circuit 1A from transitioning to the high-speed mode.

[0043] Although the operation of the constant voltage circuit 1A in FIG. 3 shows a case where the output voltage V1 reaches a high level before the output voltage V2, there may be a case where the output voltage V2 reaches a high level before the output voltage V1.

[0044] As described above, according to this embodiment, after the load 15 changes from a heavy load to a light load, when the load current Il is relatively small and below the low-consumption mode threshold, the output current Io does not transition to the high-speed mode even if the charging current Ic to the output capacitor Co momentarily exceeds the high-speed mode threshold current Ioh. Therefore, it is possible to prevent oscillations that repeatedly transition between modes, as in the comparative example. Furthermore, the constant voltage circuit 1A according to this embodiment does not require a long delay like the comparative example, and can therefore be implemented with a small circuit area.

[0045] (Embodiment 2) Fig. 4 is a circuit diagram showing an example of the configuration of a constant voltage circuit 1B according to embodiment 2. The constant voltage circuit of Fig. 4 differs from the constant voltage circuit 1 of Fig. 2 in the following points. (1) The switching oscillation prevention circuit 32 is composed of a parallel circuit of a constant current source 24 that supplies a constant current I2 and a capacitor C1. One end of the capacitor C1 is connected to the constant current source 24, and the other end is grounded. The differences will be explained below.

[0046] In Figure 4, the drain of current detection transistor M1 is grounded via the parallel circuit. When current I1 flowing through transistor M1 becomes equal to or greater than current I2 of constant current source 24, the difference between current I1 and current I2 charges capacitor C1, causing voltage V2 to rise. When current I1 does not exceed current I2, current I2 discharges from capacitor C1, causing voltage V2 to reach ground level. Note that constant current source 24 may be replaced with a resistor.

[0047] The constant voltage circuit 1B according to the second embodiment configured as described above operates in the same manner as the constant voltage circuit 1A according to the first embodiment shown in FIG. 2, and has the same effects.

[0048] (Embodiment 3) Fig. 5 is a circuit diagram showing an example of the configuration of a constant voltage circuit 1C according to embodiment 3. The constant voltage circuit 1C in Fig. 5 differs from the constant voltage circuit 1B in Fig. 4 in the following respects. (1) The mode switching circuit 31 is composed of a constant current source 25 that supplies a constant current I4. The differences will be explained below.

[0049] 5, the drain of the current detection transistor M3 is grounded via the constant current source 25. Here, the output voltage V1 of the mode switching circuit 31 is determined by the current I4 of the current source 25 and the current I3 of the current detection transistor M3, as follows: (1) When the differential current (I3-I4) between the current I3 flowing through the output transistor M1 and the current I4 flowing from the constant current source 25 is ≧0, the output voltage V1 of the mode switching circuit 31 becomes equal to or greater than the threshold value V33th of the AND gate 33 and becomes high level. (2) When the differential current (I3-I4) between the current I3 flowing through the current detection transistor M1 and the current I4 of the constant current source 25 is less than 0, the output voltage V1 of the mode switching circuit 31 becomes less than the threshold V33th of the AND gate 33 and becomes low level.

[0050] The constant voltage circuit 1C according to the third embodiment configured as above operates in the same manner as the constant voltage circuits 1A and 1B according to the first and second embodiments shown in FIGS. 2 and 4, and has the same effects.

[0051] 5, the constant current source 25 may have a hysteresis characteristic, and may be replaced with a resistor.

[0052] (Embodiment 4) 6 is a circuit diagram showing an example of the configuration of a constant voltage circuit 1D according to embodiment 4. The constant voltage circuit 1D according to embodiment 4 in FIG. 6 differs from the constant voltage circuit 1A according to embodiment 1 in FIG. 2 in the following respects. (1) Instead of the switching oscillation prevention circuit 32, a switching oscillation prevention circuit 32A is provided. (2) The switch S1 is controlled to be on or off based on the output voltage V2 from the switching oscillation prevention circuit 32A. The differences will be explained below.

[0053] In FIG. 6, a switching oscillation prevention circuit 32A generates an output voltage V2 based on an output voltage V1 of a mode switching circuit 31 and a current I1 detected by a current detection transistor M1.

[0054] When the output voltage V1 of the mode switching circuit 31 is at a high level, the switching oscillation prevention circuit 32A becomes active and detects the current I1 proportional to the output current Io detected by the current detection transistor M1 and its increase. Specifically, the output voltage V2 is changed according to the time integral value of the current I1, which is expressed by the following equation:

[0055] V2=∫I1(t)dt×b3

[0056] Here, b3 is a circuit constant determined by the switching oscillation prevention circuit 32A.

[0057] When the load current Il increases and the output current Io also increases, the time integral value is relatively large, so the output voltage V2 rises sharply. On the other hand, when the charging current Ic increases and the output current Io also increases, the charging current Ic does not continue to flow for a long time, so the time integral value is small and the output voltage V2 rises gradually.

[0058] On the other hand, when the output voltage V1 of the mode switching circuit 31 is at a low level, the switching oscillation prevention circuit 32A enters a standby state and outputs a low-level output voltage V2 regardless of the current I1. At this time, the switch S1 is turned off, and the low-power consumption mode is maintained.

[0059] Here, the switching oscillation prevention circuit 32A generating the output voltage V2 based on the output voltage V1 of the mode switching circuit 31 and controlling the switch S1 is an example of a control circuit of the present invention, and here the switching oscillation prevention circuit 32A includes this control circuit.

[0060] Figure 7 is a timing chart of each voltage and each current showing an operation example of the constant voltage circuit 1D in FIG. 6. The operation example in FIG. 7 is different from the operation example in FIG. 3 in the following points.

[0061] (1) The operation of the output voltage V1 is different from the operation in FIG. 3 as follows. (1a) Even when the output current Io increases, current I1 does not flow while the output voltage V1 is at the low level, and current I1 starts to flow when the output voltage V1 becomes high level (203, 208, 212). Here, since the output current Io has already increased, in order to catch up with current I1 (= a1·Io (0 < a1 < 0)), it first increases steeply and then increases at the same slope as the output current Io. (1b) Current I3 decreases at the same slope as the output current Io, and current I1 stops flowing when the output voltage V1 becomes low level (205, 210, 214). (1c) When the output voltage V1 is at the low level, different from the operation in FIG. 3, current I1 (226) does not flow. (2) The operations of current I1 and the output voltage V2 are different from the operations in FIG. 3 as follows. (2a) The output voltage V2 does not follow the current a1·Io (dotted line in 227), and starts to rise and increase at the timing when current I1 starts to flow (228). When the output voltage V1 becomes low level and current I1 stops flowing (230), the output voltage V2 starts to decrease (206). Note that the slope of the decrease of the output voltage V2 is not steep (221, 222).

[0062] In the constant voltage circuit 1D configured as described above, as shown in the operation example from time t4 to t7, when the output current Io is above the high-speed mode threshold current Ioh due to the charging current Ic, the mode switching circuit 31 outputs a high-level output voltage V1 indicating the high-speed mode, but is masked by the switching oscillation prevention circuit 32A so that the constant voltage circuit 1D does not shift to the high-speed mode.

[0063] As described above, according to this embodiment, after the load 15 changes from a heavy load to a light load, when the load current Il is relatively small and equal to or less than the low-consumption mode threshold, the mode does not transition to the high-speed mode even if the charging current Ic to the output capacitor Co causes the output current Io to momentarily exceed the high-speed mode threshold current Ioh. Therefore, it is possible to stop oscillation that repeatedly transitions between modes.

[0064] The constant voltage circuit 1D according to this embodiment does not require a long delay as in the comparative example, and therefore can be implemented with a small circuit area. Furthermore, because the time integral value of the current I1 is small at the timing when it is desired to mask the transition to high-speed mode, the capacitor of the charging circuit in the switching oscillation prevention circuit 32A can also be configured with a relatively small capacitor. Therefore, since it can be implemented with a capacitor with a smaller area than the capacitor used for the long delay in the comparative example, the circuit can be implemented with a small overall area.

[0065] (Embodiment 5) 8 is a circuit diagram showing a configuration example of a constant voltage circuit 1E according to embodiment 5. The constant voltage circuit 1E according to embodiment 5 in FIG. 8 differs from the constant voltage circuit 1D according to embodiment 4 in FIG. 6 in the following respects. (1) The switching oscillation prevention circuit 32A includes an inverter INV1, an inverter INV2, a constant current source 24 that supplies a constant current I2, and a capacitor C1. The differences will be explained below.

[0066] 8, inverter INV2 is configured by connecting a P-channel transistor and an N-channel transistor in parallel between their gates and drains. The drain of current detection transistor M1 is grounded via the source and drain of transistor M11, the drain and source of transistor M12, and constant current source 24. The threshold of inverter INV2 is determined depending on current I1 and constant current I2. One end of capacitor C1 is connected to the output terminal of inverter INV2, and the other end is grounded.

[0067] 8, the output voltage V1 of the mode switching circuit 31 is input to the capacitor C1 via the inverters INV1 and INV2. The capacitor C1 is charged with the current I1 flowing through the inverter INV2 and outputs the voltage V2 across the capacitor C1 to the control terminal of the switch S1. That is, the capacitor C1 outputs the output voltage V2, which has a value obtained by integrating the current I1 over time, to the control terminal of the switch S1.

[0068] The constant voltage circuit 1E configured as above operates in the same manner as the constant voltage circuit 1D of FIG. 6, and has the same effects.

[0069] 8, the constant current source 24 may have a hysteresis characteristic, and may be replaced with a resistor.

[0070] (Embodiment 6) 9 is a circuit diagram showing an example of the configuration of a constant voltage circuit 1F according to embodiment 6. The constant voltage circuit 1F according to embodiment 6 in FIG. 9 differs from the constant voltage circuit 1E according to embodiment 5 in FIG. 8 in the following respects. (1) The mode switching circuit 31 is configured in the same manner as the mode switching circuit of Fig. 5. However, the output voltage V1 of the constant current source 25 is output to the input terminal of the inverter INV1 of the switching oscillation prevention circuit 32A.

[0071] The constant voltage circuit 1F configured as above operates in the same manner as the constant voltage circuits 1D and 1E in FIGS. 6 and 8, and has the same effects.

[0072] (Variation) In the above embodiment, the mode switching circuit 31 is configured to perform the hysteresis operation described above with reference to embodiment 1, but the present invention is not limited to this. The mode switching circuit 31 may be configured not to perform hysteresis operation, but to output a high-level mode switching signal V1 indicating the high-speed mode when the current I3 is equal to or greater than a predetermined threshold current I3th, and to output a low-level mode switching signal V1 indicating the low-consumption mode when the current I3 is less than the threshold current I3th.

[0073] Furthermore, the transistors M1 and M3 may be replaced with variable current sources, provided that they are elements that pass a current that is a constant multiple of the output current Io.

[0074] Furthermore, the high-speed mode and the low-power mode are switched by switching the current value of the bias current of one error amplifier 11, but the present invention is not limited to this, and the configuration may be such that an error amplifier for the high-speed mode and an error amplifier for the low-power mode are switched.

[0075] Furthermore, in the mode switching circuit 31, the high-level output voltage V31 is a signal voltage indicating the high-speed mode, and the low-level output voltage V31 is a signal voltage indicating the low-consumption mode, but the output voltage V31 may be configured to have opposite levels. [Industrial Applicability]

[0076] As described above in detail, a constant voltage circuit according to one embodiment of the present invention includes a switching oscillation prevention circuit that, when the load current changes from heavy to light and the LDO switches from low-power mode to high-speed mode, determines whether the increase in output current is due to a change in load current or an increase due to charging current to the output capacitance, and masks the change so as not to switch modes if it is due to charging current to the output capacitance. This prevents transition to high-speed mode even if the output current momentarily exceeds the high-speed mode threshold current due to charging current to the output capacitance when the load current is small, thereby realizing a circuit that prevents oscillation due to repeated mode transitions in a small area without using a circuit that generates long delays. [Explanation of symbols]

[0077] 1,1A~1F Constant voltage circuit 10 Reference Voltage Source 11 Error amplifier 12 Current comparator 13 Feedback Circuit 15 Load 21,22,23,24,25 Constant current source 31 Mode switching circuit 32,32A switching oscillation prevention circuit 33 And Gate 60 Delay generation unit Co, C1, C50 capacitors INV1, INV2, INV51, INV52 inverters M0, M1, M2, M3, M11, M12, M51, M52 field effect transistors (transistors) S1 Switch

Claims

1. an output transistor that controls an output current based on the error voltage and outputs an output voltage; an error amplifier that compares a divided voltage of the output voltage with a predetermined reference voltage and outputs the error voltage to the output transistor; a mode switching circuit that compares a first current proportional to the output current with a predetermined first threshold value, and outputs a mode switching signal indicating a high-speed mode when the first current is equal to or greater than the first threshold value; a current source that increases a bias current of the error amplifier based on a mode switching signal that indicates the high-speed mode, The constant voltage circuit is a switching oscillation prevention circuit that generates a time integral value by integrating a second current proportional to the output current with respect to time, and outputs an output voltage based on the time integral value, and that changes an increase rate of the output voltage so that the increase rate increases as the time integral value increases when the second current is equal to or greater than a predetermined second threshold value; a control circuit that controls the bias current of the current source to increase when the output voltage of the switching oscillation prevention circuit is equal to or greater than a predetermined third threshold value, based on a mode switching signal that indicates the high-speed mode of the mode switching circuit; A constant voltage circuit comprising:

2. the mode switching circuit outputs a mode switching signal indicating a low-consumption mode when the first current is less than the first threshold value; 2. The constant voltage circuit according to claim 1.

3. the mode switching circuit outputs a mode switching signal indicating a low-consumption mode when the first current is less than a threshold value that is smaller than the first threshold value; 2. The constant voltage circuit according to claim 1.

4. the control circuit includes a logical product gate that calculates a logical product of a mode switching signal indicating the high-speed mode of the mode switching circuit and an output voltage of the switching oscillation prevention circuit, and controls the bias current of the current source to increase based on a calculation result of the logical product.

2. The constant voltage circuit according to claim 1.

5. the switching oscillation prevention circuit includes the control circuit; 2. The constant voltage circuit according to claim 1.

6. the mode switching circuit includes a first constant current source that supplies a predetermined first constant current, and generates a mode switching signal indicating a high-speed mode based on the first current and the first constant current; 5. The constant voltage circuit according to claim 1.

7. The switching oscillation prevention circuit includes: a second constant current source that supplies a predetermined second constant current; a first capacitor that integrates a difference current between the second current and the second constant current over time to generate the time integral value; 5. The constant voltage circuit according to claim 1.

8. The switching oscillation prevention circuit includes: a first inverter that inverts the output voltage of the mode switching circuit; a third constant current source that supplies a predetermined third constant current; a second inverter having a threshold that varies depending on the second current and a third constant current, and that inverts the inverted output voltage from the first inverter; a second capacitor that integrates over time the second current flowing through the second inverter to generate the time integral value; 5. The constant voltage circuit according to claim 1.

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