Semiconductor device and electronic system including the same

Abstract

To provide a semiconductor device functioning as a Zenerdiode, and an electronic system including the same.SOLUTION: A semiconductor device of the present invention includes a substrate, a reverse diode, and a forward diode. The reverse diode includes a first channel layer, a first barrier layer, a first gate electrode, and a first source electrode and a first drain electrode located on both sides of the first gate electrode. The forward diode includes a second channel layer, a second barrier layer, a second gate electrode, and a second source electrode and a second drain electrode located on both sides of the second gate electrode. The second source electrode is connected to the second gate electrode, and the first drain electrode of the reverse diode is connected to the second source electrode of the forward diode. The first channel layer has a different energy band gap than the first barrier layer.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present invention relates to semiconductor devices and electronic systems including the same. [Background technology]

[0002] Power semiconductor devices are becoming increasingly important in various fields, including transportation (e.g., electric vehicles, railways, and electric trams), renewable energy systems (e.g., solar power generation and wind power generation), and mobile devices. Power semiconductor devices are semiconductor devices used to handle high voltages and high currents, performing functions such as power conversion and control in large-scale power systems and high-power electronic devices. Power semiconductor devices have the capability and durability to handle high power, handle large amounts of current, and withstand high voltages. For example, power semiconductor devices can handle voltages ranging from hundreds to thousands of volts and currents ranging from tens to thousands of amperes. Power semiconductor devices can minimize power loss and improve electrical energy efficiency. Furthermore, power semiconductor devices can operate stably even in high-temperature environments.

[0003] These power semiconductor devices are classified by material, such as SiC power semiconductor devices and GaN power semiconductor devices. By manufacturing power semiconductor devices using SiC or GaN instead of existing silicon (Si), it is possible to compensate for the disadvantage of silicon, which has unstable properties at high temperatures. SiC power semiconductor devices are resistant to high temperatures and have low power loss, making them suitable for electric vehicles and renewable energy systems. GaN power semiconductor devices are expensive but efficient in terms of speed, making them suitable for fast charging of mobile devices. Summary of the Invention [Problem to be solved by the invention]

[0004] The present invention has been made in view of the above-mentioned conventional techniques, and an object of the present invention is to provide a semiconductor device that functions as a Zener diode and an electronic system including the same. [Means for solving the problem]

[0005] According to one aspect of the present invention, there is provided a semiconductor device comprising: a substrate; a plurality of reverse diodes located on the substrate and connected to each other; and at least one forward diode connected to any one of the plurality of reverse diodes, wherein each of the plurality of reverse diodes comprises: a first channel layer located on the substrate; a first barrier layer located on the first channel layer and including a material having an energy bandgap different from that of the first channel layer; a first gate electrode located on the first barrier layer; a first gate semiconductor layer located between the first barrier layer and the first gate electrode; and a first source electrode and a first drain electrode located on both sides of the first gate electrode and connected to the first channel layer; a source electrode connected to the first gate electrode, and the at least one forward diode includes: a second channel layer located on the substrate; a second barrier layer located on the second channel layer and including a material having a different energy bandgap from that of the second channel layer; a second gate electrode located on the second barrier layer; a second gate semiconductor layer located between the second barrier layer and the second gate electrode; and second source and drain electrodes located on both sides of the second gate electrode and connected to the second channel layer, wherein the second source electrode is connected to the second gate electrode, and a first drain electrode of any one of the plurality of reverse diodes is connected to a second source electrode of any one of the at least one forward diode.

[0006] According to another aspect of the present invention, which has been made to achieve the above object, a semiconductor device includes a substrate, a first electrode, a second electrode, and a third electrode spaced apart on the substrate, a plurality of reverse diodes connecting the first electrode and the second electrode, and at least one forward diode connecting the second electrode and the third electrode, wherein each of the plurality of reverse diodes includes a first channel layer located on the substrate, a first barrier layer located on the first channel layer and including a material having an energy bandgap different from that of the first channel layer, a first gate electrode located on the first barrier layer, a first gate semiconductor layer located between the first barrier layer and the first gate electrode, and first source and drain electrodes located on both sides of the first gate electrode and connected to the first channel layer, wherein the first source electrode is connected to the first gate, and each of the at least one forward diode includes a first gate electrode and a first barrier layer located on the first channel layer and including a material having an energy bandgap different from that of the first channel layer, and the first gate electrode and a first drain electrode are located on both sides of the first gate electrode and connected to the first channel layer, and the first source electrode is connected to the first gate, and ... gate electrode and the first barrier layer are connected to the first gate, and the at least one forward diode includes a first gate electrode and a first gate electrode. a second channel layer located on the substrate and including the same material as the first channel layer; a second barrier layer located on the second channel layer and including the same material as the first barrier layer; a second gate electrode located on the second barrier layer; a second gate semiconductor layer located between the second barrier layer and the second gate electrode and including the same material as the first gate semiconductor layer; and second source and drain electrodes located on both sides of the second gate electrode and connected to the second channel layer, wherein the second source electrode is connected to the second gate electrode, a first source electrode of one of the plurality of reverse diodes is connected to the first electrode, a first drain electrode of another of the plurality of reverse diodes is connected to the second electrode and a second source electrode of one of the at least one forward diode, and a second drain electrode of one of the at least one forward diode is connected to the third electrode.

[0007] In order to achieve the above object, according to one aspect of the present invention, an electronic system including a semiconductor device includes: a substrate; a semiconductor device including a plurality of reverse diodes located on the substrate and connected to each other, and at least one forward diode connected to any one of the plurality of reverse diodes; and a main transistor element electrically connected to the semiconductor device on the substrate, wherein each of the plurality of reverse diodes includes: a first channel layer located on the substrate and including GaN; a first barrier layer located on the first channel layer and including AlGaN; a first gate electrode located on the first barrier layer; a first gate semiconductor layer located between the first barrier layer and the first gate electrode and including GaN doped with p-type impurities; and a first source electrode and a first drain electrode located on both sides of the first gate electrode and connected to the first channel layer, wherein the first source electrode is connected to the first gate electrode, and each of the at least one forward diode includes a second channel layer located on the substrate and including GaN; a second gate electrode located on the second barrier layer; a second gate semiconductor layer located between the second barrier layer and the second gate electrode, the second gate semiconductor layer including GaN doped with p-type impurities; and second source and drain electrodes located on both sides of the second gate electrode and connected to the second channel layer, wherein the second source electrode is connected to the second gate electrode, and a first drain electrode of any one of the plurality of reverse diodes is connected to a second source electrode of any one of the at least one forward diode. The main transistor element includes: a main channel layer located on the substrate and including the same material as the first channel layer; a main barrier layer located on the main channel layer and including the same material as the first barrier layer; a main gate electrode located on the main barrier layer; a main gate semiconductor layer located between the main barrier layer and the main gate electrode; and main source and drain electrodes located on both sides of the main gate electrode, connected to the main channel layer, and including the same material as the first source and first drain electrodes. [Effects of the Invention]

[0008] According to the semiconductor element of the present invention, by using a diode unit to form a plurality of reverse diodes and at least one forward diode, it is possible to make it function as a Zener diode, and it is possible to easily design a Zener diode having a desired breakdown voltage. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a plan view showing a first example of a semiconductor device according to an embodiment. [Figure 2] 1 is a cross-sectional view illustrating a diode unit of a semiconductor device according to an embodiment. [Figure 3] 1 is a cross-sectional view illustrating a diode unit of a semiconductor device according to an embodiment. [Figure 4] FIG. 2 is a cross-sectional view of the first example taken along line AA' in FIG. [Figure 5] 2 is a cross-sectional view of a first example corresponding to AA' in FIG. 1 showing a current flow in a semiconductor device according to an embodiment. [Figure 6] 1 is a graph illustrating a change in current magnitude with respect to voltage in a semiconductor device according to an embodiment. [Figure 7] 2 is a cross-sectional view of a second example of a semiconductor device according to an embodiment, corresponding to AA' in FIG. 1. FIG. [Figure 8] 2 is a cross-sectional view of a third example of a semiconductor device according to an embodiment, corresponding to AA' in FIG. 1. FIG. [Figure 9] 2 is a cross-sectional view of a fourth example of a semiconductor device according to an embodiment, corresponding to AA' in FIG. 1. FIG. [Figure 10] 1. FIG. 5 is a cross-sectional view of a fifth example of a semiconductor device according to an embodiment, corresponding to AA' in FIG. [Figure 11] FIG. 2 is a plan view illustrating a second example of a semiconductor device according to an embodiment. [Figure 12] FIG. 10 is a plan view illustrating a third example of a semiconductor device according to an embodiment. [Figure 13] FIG. 10 is a plan view illustrating a fourth example of a semiconductor device according to an embodiment. [Figure 14] FIG. 10 is a plan view illustrating a fifth example of a semiconductor device according to an embodiment. [Figure 15] 1 is a plan view illustrating an electronic system including a semiconductor device according to an embodiment. [Figure 16] FIG. 16 is a cross-sectional view taken along the line BB' in FIG. [Figure 17] FIG. 16 is a cross-sectional view taken along the line BB' in FIG. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, specific examples of embodiments of the present invention will be described in detail with reference to the drawings.

[0011] In order to clearly describe the present invention, parts that are not relevant to the description will be omitted and the same reference numerals will be used throughout the specification to refer to the same or similar components.

[0012] Furthermore, the size and thickness of each component shown in the drawings are arbitrarily shown for the sake of convenience, and the present invention is not necessarily limited to those shown in the drawings. In the drawings, the thicknesses of some layers and regions are exaggerated to clearly show them. In the drawings, the thicknesses of some layers and regions are exaggerated for the sake of convenience.

[0013] Furthermore, when a layer, film, region, plate, or other part is said to be "on" or "above" another part, this does not only mean that it is "directly above" that part, but also includes cases where there is another part in between. Conversely, when a part is said to be "directly above" another part, it means that there is no other part in between. Furthermore, being "on" or "above" a reference part means being located above or below the reference part, and does not necessarily mean being located "on" or "above" in the opposite direction of gravity.

[0014] Also, throughout the specification, "on a plane" means a view of the subject part from above, and "on a cross section" means a view of the subject part taken along a vertical cross section from the side.

[0015] Hereinafter, a circuit structure of a semiconductor device according to an embodiment will be described with reference to FIGS.

[0016] Fig. 1 is a plan view showing a first example of a semiconductor device according to an embodiment. Figs. 2 and 3 are cross-sectional views showing a diode unit of the semiconductor device according to an embodiment. Fig. 4 is a cross-sectional view of the first example taken along line A-A' in Fig. 1. Fig. 2 shows a case where the diode unit of the semiconductor device according to an embodiment is in an off state, and Fig. 3 shows a case where the diode unit of the semiconductor device according to an embodiment is in an on state.

[0017] Referring to FIG. 1, the semiconductor device 100 according to this embodiment is a normally-off high electron mobility transistor (HEMT). However, the semiconductor device 100 is not limited thereto, and may be a normally-on high electron mobility transistor. The semiconductor device 100 according to this embodiment functions as a Zener diode. Here, a Zener diode refers to a device that has the same characteristics as a general diode device in a forward voltage and allows current to flow, but in a reverse voltage, allows reverse current to flow at a lower voltage (breakdown voltage) than a general diode device.

[0018] The semiconductor device 100 according to this embodiment includes a plurality of diode elements. For example, the semiconductor device 100 includes a plurality of reverse diodes BT and at least one forward diode FT. The plurality of reverse diodes BT and the at least one forward diode FT each have the same structure. That is, each of the plurality of reverse diodes BT and the at least one forward diode FT is composed of at least one diode unit (TU in FIG. 2).

[0019] Hereinafter, a diode unit constituting a semiconductor device according to an embodiment will be described with reference to FIGS.

[0020] FIG. 2 shows one diode unit TU among a plurality of diode units as the semiconductor device according to this embodiment.

[0021] The diode unit TU of the semiconductor device according to this embodiment includes a substrate 110, a channel layer 132 located on the substrate 110, a barrier layer 136 located on the channel layer 132, a gate electrode 155 located on the barrier layer 136, a gate semiconductor layer 152 located between the barrier layer 136 and the gate electrode 155, a source electrode 170 and a drain electrode 190 spaced apart from each other on the barrier layer 136, and a connecting wire 210 connecting the source electrode 170 and the gate electrode 155. The terms "source electrode" and "drain electrode" in the embodiments of the present invention are understood to mean the source terminal region and the drain terminal region of each transistor, for example, any one of the semiconductor device 100.

[0022] The channel layer 132 forms a channel between the source electrode 170 and the drain electrode 190, and a two-dimensional electron gas (2DEG) 134 is located within the channel layer 132. The two-dimensional electron gas 134 is a charge transport model used in solid state physics, and refers to a group of electrons that can move freely in two dimensions (e.g., the xy plane) but cannot move in another dimension (e.g., the z direction) and are tightly confined within the two dimensions. That is, the two-dimensional electron gas 134 exists in a three-dimensional space in a two-dimensional, paper-like form. Such two-dimensional electron gas 134 primarily appears in semiconductor heterojunction structures, and in the diode unit TU of the semiconductor device according to this embodiment, it is generated at the interface between the channel layer 132 and the barrier layer 136. For example, the two-dimensional electron gas 134 is generated in a portion of the channel layer 132 adjacent to the barrier layer 136.

[0023] The channel layer 132 includes one or more materials selected from III-V group materials, such as nitrides containing Al, Ga, In, B, or a combination thereof. The channel layer 132 may be a single layer or multiple layers. The channel layer 132 may be AlxInyGa1-x-yN (0≦x≦1, 0≦y≦1, x+y≦1). For example, the channel layer 132 may include AlN, GaN, InN, InGaN, AlGaN, AlInN, AlInGaN, or a combination thereof. The channel layer 132 may be a layer doped with impurities or an undoped layer. The thickness of the channel layer 132 is approximately several hundred nanometers or less.

[0024] The channel layer 132 is located on the substrate 110, and a seed layer 121 and a buffer layer 120 are located between the substrate 110 and the channel layer 132. The substrate 110, the seed layer 121, and the buffer layer 120 are layers necessary for forming the channel layer 132 and may be omitted in some cases. For example, when a GaN substrate is used as the channel layer 132, at least one of the substrate 110, the seed layer 121, and the buffer layer 120 is omitted. In consideration of the relatively high cost of GaN substrates, the GaN-containing channel layer 132 is grown using a Si substrate 110. However, since the lattice structures of Si and GaN are different, it is difficult to grow the channel layer 132 directly on the substrate 110. Therefore, in this embodiment, the seed layer 121 and the buffer layer 120 are first grown on the substrate 110, and then the channel layer 132 is grown on the buffer layer 120. Also, at least one of the substrate 110, the seed layer 121, and the buffer layer 120 may be used in the manufacturing process and then removed in the final structure of the diode unit TU of the semiconductor device.

[0025] The substrate 110 includes a semiconductor material. For example, the substrate 110 includes sapphire, Si, SiC, AlN, GaN, or a combination thereof. The substrate 110 is an SOI (Silicon on Insulator) substrate. However, the material of the substrate 110 is not limited thereto, and any commonly used substrate may be used. In some cases, the substrate 110 may include an insulating material. For example, various layers, including the channel layer 132, are first formed on a semiconductor substrate, and then the semiconductor substrate is removed and replaced with an insulating substrate.

[0026] The seed layer 121 is located directly on the substrate 110. However, without being limited thereto, other predetermined layers may be located between the substrate 110 and the seed layer 121. The seed layer 121 is a layer that serves as a seed for growing the buffer layer 120 and has a crystal lattice structure that serves as a seed for the buffer layer 120. The buffer layer 120 is located directly on the seed layer 121. However, without being limited thereto, other predetermined layers may be located between the seed layer 121 and the buffer layer 120. The seed layer 121 includes one or more materials selected from III-V group materials, for example, nitrides containing Al, Ga, In, B, or combinations thereof. The seed layer 121 is AlxInyGa1-x-yN (0≦x≦1, 0≦y≦1, x+y≦1). For example, the seed layer 121 includes AlN, GaN, InN, InGaN, AlGaN, AlInN, AlInGaN, or combinations thereof.

[0027] The buffer layer 120 is located on the seed layer 121. The buffer layer 120 is located between the seed layer 121 and the channel layer 132. The buffer layer 120 is a layer for reducing the difference in lattice constant and thermal expansion coefficient between the seed layer 121 and the channel layer 132 or for preventing a leakage current from flowing through the channel layer 132. The buffer layer 120 includes one or more materials selected from III-V group materials, such as nitrides containing Al, Ga, In, B, or a combination thereof. The buffer layer 120 is AlxInyGa1-x-yN (0≦x≦1, 0≦y≦1, x+y≦1). For example, the buffer layer 120 includes AlN, GaN, InN, InGaN, AlGaN, AlInN, AlInGaN, or a combination thereof.

[0028] The buffer layer 120 of the diode unit TU of the semiconductor device according to this embodiment includes a superlattice layer 124 located on the seed layer 121, and a high-resistance layer 126 located on the superlattice layer 124. The superlattice layer 124 and the high-resistance layer 126 are sequentially located on the substrate 110.

[0029] The superlattice layer 124 is disposed on the seed layer 121. The superlattice layer 124 is disposed directly on the seed layer 121. However, without being limited thereto, other layers may be disposed between the seed layer 121 and the superlattice layer 124. The superlattice layer 124 reduces the difference in lattice constant and thermal expansion coefficient between the substrate 110 and the channel layer 132, thereby reducing tensile and compressive stresses generated between the substrate 110 and the channel layer 132, and thus reducing stresses between all layers formed by growth in the final structure of the diode unit TU of the semiconductor device according to this embodiment. The superlattice layer 124 includes one or more materials selected from III-V group materials, such as nitrides containing Al, Ga, In, B, or combinations thereof. The superlattice layer 124 is AlxInyGa1-x-yN (0≦x≦1, 0≦y≦1, x+y≦1). For example, the superlattice layer 124 may include AlN, GaN, InN, InGaN, AlGaN, AlInN, AlInGaN, or a combination thereof.

[0030] In this embodiment, the superlattice layer 124 is formed of multiple layers in which layers containing different materials are alternately stacked. For example, the superlattice layer 124 has a structure in which layers made of AlGaN and layers made of AlN are repeatedly stacked. That is, AlGaN / AlN / AlGaN / AlN / AlGaN / AlN are sequentially stacked to form the superlattice layer. The number of AlGaN layers and GaN constituting the superlattice layer 124 may vary, and the materials constituting the superlattice layer 124 may vary. As another example, the superlattice layer 124 may have a structure in which layers made of AlGaN and layers made of GaN are repeatedly stacked. That is, AlGaN / GaN / AlGaN / GaN / AlGaN / GaN are sequentially stacked to form the superlattice layer. In an exemplary embodiment, when the superlattice layer 124 includes GaN, InN, AlGaN, AlInN, InGaN, AlN, AlInGaN, or a combination thereof, the superlattice layer 124 has n-type semiconductor characteristics in which the electron concentration is greater than the hole concentration, but is not limited thereto.

[0031] The high-resistivity layer 126 is located on the superlattice layer 124. The high-resistivity layer 126 is located directly on the superlattice layer 124. However, without being limited thereto, a predetermined other layer may be located between the superlattice layer 124 and the high-resistivity layer 126. The high-resistivity layer 126 is located between the superlattice layer 124 and the channel layer 132. The high-resistivity layer 126 is a layer for preventing degradation of the diode unit TU of the semiconductor device according to this embodiment by preventing leakage current from flowing through the channel layer 132. The high-resistivity layer 126 is made of a material with low conductivity to electrically insulate the substrate 110 from the channel layer 132. The high-resistivity layer includes one or more materials selected from III-V group materials, such as nitrides containing Al, Ga, In, B, or combinations thereof. The high-resistivity layer 126 is AlxInyGa1-x-yN (0≦x≦1, 0≦y≦1, x+y≦1). For example, the high-resistivity layer 126 may include AlN, GaN, InN, InGaN, AlGaN, AlInN, AlInGaN, or a combination thereof. The high-resistivity layer 126 may be a single layer or multiple layers.

[0032] The barrier layer 136 is located on the channel layer 132. The barrier layer 136 is located directly above the channel layer 132. However, without being limited thereto, other layers may be located between the channel layer 132 and the barrier layer 136. The region of the channel layer 132 that overlaps with the barrier layer 136 between the source electrode 170 and the drain electrode 190 becomes a main drift region DTRm. The drift region DTR is located between the source electrode 170 and the drain electrode 190. The drift region DTR refers to a region where carriers move when a potential difference occurs between the source electrode 170 and the drain electrode 190.

[0033] The diode unit TU of the semiconductor device according to this embodiment is turned on / off depending on whether a voltage is applied to the gate electrode 155 and / or the magnitude of the voltage applied to the gate electrode 155, thereby allowing or blocking the movement of carriers in the drift region DTR.

[0034] The barrier layer 136 includes one or more materials selected from III-V group materials, such as nitrides containing Al, Ga, In, B, or a combination thereof. The barrier layer 136 is AlxInyGa1-x-yN (0≦x≦1, 0≦y≦1, x+y≦1). The barrier layer 136 includes GaN, InN, AlGaN, AlInN, InGaN, AlN, AlInGaN, or a combination thereof. The energy bandgap of the barrier layer 136 is adjusted by the composition ratio of Al and / or In. The barrier layer 136 is doped with a predetermined impurity. The impurity doped into the barrier layer 136 is a p-type dopant that provides holes. For example, the impurity doped into the barrier layer 136 is magnesium (Mg). The threshold voltage, on-resistance, etc. of the diode unit TU of the semiconductor device according to this embodiment can be adjusted by increasing or decreasing the impurity doping concentration of the barrier layer 136.

[0035] The barrier layer 136 includes a semiconductor material having different properties from the channel layer 132. The barrier layer 136 differs from the channel layer 132 in at least one of polarization characteristics, energy band gap, and lattice constant. For example, the barrier layer 136 includes a material having a different energy band gap from the channel layer 132. In this case, the barrier layer 136 has a higher energy band gap and a higher electric polarizability than the channel layer 132. The barrier layer 136 induces a two-dimensional electron gas 134 in the channel layer 132, which has a relatively low electric polarizability. In this respect, the barrier layer 136 is referred to as a channel supply layer or a two-dimensional electron gas supply layer. The two-dimensional electron gas 134 is formed in a portion of the channel layer 132 located below the interface between the channel layer 132 and the barrier layer 136. The two-dimensional electron gas 134 has very high electron mobility.

[0036] The barrier layer 136 may be a single layer or multiple layers. When the barrier layer 136 is multiple layers, the materials of the layers constituting the multiple layers have different energy bandgaps. In this case, the various layers constituting the barrier layer 136 are arranged so that the energy bandgaps are larger the closer they are to the channel layer 132.

[0037] The gate electrode 155 is located on the barrier layer 136. The gate electrode 155 overlaps a portion of the barrier layer 136 in the third direction (Z direction). The gate electrode 155 overlaps a portion of the drift region DTR of the channel layer 132 in the third direction (Z direction). The gate electrode 155 is located between the source electrode 170 and the drain electrode 190. The gate electrode 155 is spaced apart from the source electrode 170 and the drain electrode 190. For example, the gate electrode 155 is located closer to the source electrode 170 than to the drain electrode 190. That is, the distance between the gate electrode 155 and the source electrode 170 is smaller than the distance between the gate electrode 155 and the drain electrode 190, but is not limited thereto. Here, the third direction (Z direction) refers to the thickness direction of the channel layer 132.

[0038] The gate electrode 155 includes a conductive material. For example, the gate electrode 155 includes a metal, a metal alloy, a conductive metal nitride, a metal silicide, a doped semiconductor material, a conductive metal oxide, or a conductive metal oxynitride. For example, the gate electrode 155 includes titanium nitride (TiN), tantalum carbide (TaC), tantalum nitride (TaN), titanium silicon nitride (TiSiN), tantalum silicon nitride (TaSiN), tantalum titanium nitride (TaTiN), titanium aluminum nitride (TiAlN), tantalum aluminum nitride (TaAlN), tungsten nitride (WN), ruthenium (Ru), titanium aluminum (TiAl), titanium aluminum carbonitride (TiAlC-N), titanium aluminum carbide (TiAlC), titanium carbide (TiC), tantalum carbonitride (TaCN). The gate electrode 155 may be made of, but is not limited to, tungsten (W), aluminum (Al), copper (Cu), cobalt (Co), titanium (Ti), tantalum (Ta), nickel (Ni), platinum (Pt), nickel platinum (Ni-Pt), niobium (Nb), niobium nitride (NbN), niobium carbide (NbC), molybdenum (Mo), molybdenum nitride (MoN), molybdenum carbide (MoC), tungsten carbide (WC), rhodium (Rh), palladium (Pd), iridium (Ir), osmium (Os), silver (Ag), gold (Au), zinc (Zn), vanadium (V), or a combination thereof. The gate electrode 155 may be made of a single layer or multiple layers.

[0039] In an exemplary embodiment, the gate electrode 155 may further include a hard mask layer positioned on the gate electrode 155. The hard mask layer is a hard mask used when patterning the gate electrode material layer or the gate semiconductor layer in the process of forming the gate electrode 155. However, the hard mask layer may be removed depending on etching conditions during etching of the gate electrode material layer or the gate semiconductor layer or depending on cleaning conditions after etching. For example, the hard mask layer may include silicon oxide, silicon nitride, silicon oxynitride, or a combination thereof.

[0040] The gate semiconductor layer 152 is located between the barrier layer 136 and the gate electrode 155. That is, the gate semiconductor layer 152 is located on the barrier layer 136, and the gate electrode 155 is located on the gate semiconductor layer 152. The gate electrode 155 makes a Schottky contact or an ohmic contact with the gate semiconductor layer 152. The gate semiconductor layer 152 overlaps the gate electrode 155 in the third direction (Z direction). In this case, the gate semiconductor layer 152 completely overlaps the gate electrode 155 in the third direction (Z direction), and the entire upper surface of the gate semiconductor layer 152 is covered by the gate electrode 155. That is, the gate semiconductor layer 152 has substantially the same planar shape as the gate electrode 155. However, the present invention is not limited thereto, and the gate electrode 155 may be located to cover at least a portion of the gate semiconductor layer 152.

[0041] The gate semiconductor layer 152 is located between the source electrode 170 and the drain electrode 190. The gate semiconductor layer 152 is spaced apart from the source electrode 170 and the drain electrode 190. The gate semiconductor layer 152 is located closer to the source electrode 170 than to the drain electrode 190. That is, the distance between the gate semiconductor layer 152 and the source electrode 170 is smaller than the distance between the gate semiconductor layer 152 and the drain electrode 190, but is not limited to this.

[0042] In this embodiment, the gate semiconductor layer 152 overlaps the gate electrode 155 in the third direction (Z direction). For example, the gate semiconductor layer 152 completely overlaps the gate electrode 155 in the third direction (Z direction). That is, the side surfaces of the gate semiconductor layer 152 are aligned with the side surfaces of the gate electrode 155. However, this is not limiting, and the gate semiconductor layer 152 may also partially overlap the gate electrode 155.

[0043] The gate semiconductor layer 152 includes one or more materials selected from III-V group materials, such as nitrides containing Al, Ga, In, B, or a combination thereof. The gate semiconductor layer 152 is AlxInyGa1-x-yN (0≦x≦1, 0≦y≦1, x+y≦1). For example, the gate semiconductor layer 152 includes AlN, GaN, InN, InGaN, AlGaN, AlInN, AlInGaN, or a combination thereof. The gate semiconductor layer 152 includes a material having an energy bandgap different from that of the barrier layer 136. For example, the gate semiconductor layer 152 includes GaN, and the barrier layer 136 includes AlGaN. The gate semiconductor layer 152 is doped with a predetermined impurity. In this case, the impurity doped into the gate semiconductor layer 152 is a p-type dopant that provides holes. For example, the gate semiconductor layer 152 includes GaN doped with p-type impurities. That is, the gate semiconductor layer 152 is a p-GaN layer. However, the gate semiconductor layer 152 is not limited to this and may be a p-AlGaN layer.

[0044] The gate semiconductor layer 152 forms a depletion region DPR in the channel layer 132. The depletion region DPR is located within the drift region DTR and has a width narrower than that of the drift region DTR. The gate semiconductor layer 152, which has a different energy bandgap from that of the barrier layer 136, is located on the barrier layer 136, raising the energy band level of the portion of the barrier layer 136 overlapping the gate semiconductor layer 152. This results in the formation of a depletion region DPR in the region of the channel layer 132 overlapping the gate semiconductor layer 152. The depletion region DPR is a region of the channel path of the channel layer 132 where no two-dimensional electron gas 134 is formed or where the electron concentration is lower than that of the remaining region. In other words, the depletion region DPR refers to a region in the drift region DTR where the flow of the two-dimensional electron gas 134 is cut off. The generation of the depletion region DPR prevents current from flowing between the source electrode 170 and the drain electrode 190, blocking the channel path. As a result, the diode unit TU of the semiconductor device according to this embodiment has normally-off characteristics.

[0045] That is, the diode unit TU of the semiconductor device according to this embodiment is a normally-off high electron mobility transistor (HEMT). As shown in FIG. 2, in a normal state where no voltage is applied to the gate electrode 155, a depletion region DPR exists, and the diode unit TU of the semiconductor device according to this embodiment is in an off state. As shown in FIG. 3, when a voltage equal to or greater than a threshold voltage is applied to the gate electrode 155, the depletion region DPR disappears, and the two-dimensional electron gas 134 is continuously connected within the drift region DTR. That is, the two-dimensional electron gas 134 is formed throughout the entire channel path between the source electrode 170 and the drain electrode 190, and the diode unit TU of the semiconductor device according to this embodiment is in an on state. The threshold voltage of the diode unit TU of the semiconductor device according to this embodiment is 1V to 1.3V, but is not limited thereto.

[0046] In summary, the diode unit TU of the semiconductor device according to this embodiment includes semiconductor layers with different electrical polarization characteristics, and a semiconductor layer with a relatively large polarizability induces two-dimensional electron gas 134 in another semiconductor layer heterojunction with it. This two-dimensional electron gas 134 serves as a channel between the source electrode 170 and the drain electrode 190, and the continuation and interruption of the flow of this two-dimensional electron gas 134 is controlled by the bias voltage applied to the gate electrode 155. In the gate-off state, the flow of the two-dimensional electron gas 134 is interrupted, and no current flows between the source electrode 170 and the drain electrode 190. In the gate-on state, the flow of the two-dimensional electron gas 134 continues, allowing current to flow between the source electrode 170 and the drain electrode 190.

[0047] Although the diode unit TU of the semiconductor device according to the above embodiment is a normally-off high electron mobility transistor (HEM), the present invention is not limited thereto. For example, the diode unit TU of the semiconductor device according to an embodiment may be a normally-on high electron mobility transistor (HEM). In the case of a normally-on high electron mobility transistor, the gate semiconductor layer 152 is omitted, and the gate electrode 155 is located directly above the barrier layer 136. That is, the gate electrode 155 contacts the barrier layer 136. In this structure, when no voltage is applied to the gate electrode 155, the two-dimensional electron gas 134 serves as a channel, generating a current flow between the source electrode 170 and the drain electrode 190. Furthermore, when a negative voltage is applied to the gate electrode 155, a depletion region DPR is generated below the gate electrode 155, where the flow of the two-dimensional electron gas 134 is cut off.

[0048] The seed layer 121, superlattice layer 124, high-resistance layer 126, channel layer 132, barrier layer 136, and gate semiconductor layer 152 described above are sequentially stacked on the substrate 110. In the diode unit TU of the semiconductor device according to this embodiment, at least one of the seed layer 121, superlattice layer 124, high-resistance layer 126, channel layer 132, barrier layer 136, and gate semiconductor layer 152 may be omitted. The seed layer 121, superlattice layer 124, high-resistance layer 126, channel layer 132, barrier layer 136, and gate semiconductor layer 152 are made of the same semiconductor material, and the material composition ratios of the layers are different depending on the role of each layer and the performance required for the diode unit TU of the semiconductor device.

[0049] The diode unit TU of the semiconductor device according to this embodiment further includes a first protective layer 140 and a second protective layer 180 sequentially positioned on the barrier layer 136 .

[0050] The first protective layer 140 is positioned on the barrier layer 136 and the gate electrode 155. The first protective layer 140 covers the top and side surfaces of the gate electrode 155 and the side surfaces of the gate semiconductor layer 152. The bottom surface of the first protective layer 140 contacts the barrier layer 136 and the gate electrode 155. Thus, the barrier layer 136, the gate semiconductor layer 152, and the gate electrode 155 are protected by the first protective layer 140. However, the present invention is not limited thereto. The gate electrode 155 may be connected to the gate semiconductor layer 152 through the first protective layer 140, and the first protective layer 140 may not cover the top surface of the gate electrode 155. Alternatively, the bottom surface of the first protective layer 140 may contact the gate semiconductor layer 152. The first protective layer 140 includes an insulating material. For example, the first protective layer 140 includes an oxide such as SiO2 or Al2O3. As another example, the first protective layer 140 can include a nitride such as SiN or an oxynitride such as SiON.

[0051] The second protective layer 180 covers the top surface of the first protective layer 140, the top and side surfaces of the field spreading layer, and the top surfaces of the source electrode 170 and the drain electrode 190. The second protective layer 180 includes an insulating material. The second protective layer 180 may include the same material as the first protective layer 140, but is not limited to this. For example, the second protective layer 180 may include an oxide such as SiO2 or Al2O3. As another example, the second protective layer 180 may include a nitride such as SiN or an oxynitride such as SiON.

[0052] Although the first protective layer 140 and the second protective layer 180 are shown to be composed of a single layer in FIGS. 2 and 3, the first protective layer 140 and the second protective layer 180 may be composed of multiple layers containing different materials.

[0053] The source electrode 170 and the drain electrode 190 are located on the channel layer 132. The source electrode 170 and the drain electrode 190 are in direct contact with the channel layer 132 and are electrically connected to the channel layer 132.

[0054] The source electrode 170 and the drain electrode 190 extend in the second direction (Y direction). The source electrode 170 and the drain electrode 190 are spaced apart from each other, and the gate electrode 155 and the gate semiconductor layer 152 are located between the source electrode 170 and the drain electrode 190. The gate electrode 155 and the gate semiconductor layer 152 are spaced apart from the source electrode 170 and the drain electrode 190. For example, the source electrode 170 is electrically connected to the channel layer 132 on one side of the gate electrode 155, and the drain electrode 190 is electrically connected to the channel layer 132 on the other side of the gate electrode 155. The source electrode 170 and the drain electrode 190 are located outside the drift region DTR of the channel layer 132. The interface between the source electrode 170 and the channel layer 132 is one edge of the drift region DTR. Similarly, the interface between the drain electrode 190 and the channel layer 132 is the other edge of the drift region DTR.

[0055] However, the present invention is not limited thereto. The channel layer 132 may not be recessed, and the source electrode 170 and the drain electrode 190 may be located on the upper surface of the channel layer 132. In this case, the bottom surfaces of the source electrode 170 and the drain electrode 190 contact the upper surface of the channel layer 132. The portions of the channel layer 132 in contact with the source electrode 170 and the drain electrode 190 are heavily doped. In this case, carriers passing through the two-dimensional electron gas 134 pass through the heavily doped portion of the channel layer 132, i.e., the top of the two-dimensional electron gas 134, and are transferred to the source electrode 170 and the drain electrode 190. The source electrode 170 and the drain electrode 190 do not directly contact the two-dimensional electron gas 134 in the horizontal direction. Here, the horizontal direction refers to the direction parallel to the upper surface of the channel layer 132 or the barrier layer 136.

[0056] Specifically, trenches recessing the top surface of the channel layer 132 through the first passivation layer 140 and the barrier layer 136 are positioned spaced apart on both sides of the gate electrode 155. A source electrode 170 and a drain electrode 190 are positioned in the trenches on both sides of the gate electrode 155, respectively. The source electrode 170 and the drain electrode 190 are formed to fill the trenches. Within the trenches, the source electrode 170 and the drain electrode 190 contact the channel layer 132 and the barrier layer 136. The channel layer 132 forms the bottom and sidewalls of the trench, and the barrier layer 136 forms the sidewalls of the trench. Therefore, the source electrode 170 and the drain electrode 190 contact the top surface and side surfaces of the channel layer 132. The source electrode 170 and the drain electrode 190 also contact the side surfaces of the barrier layer 136. That is, the source electrode 170 and the drain electrode 190 cover the side surfaces of the channel layer 132 and the barrier layer 136.

[0057] In the present embodiment, the source electrode 170 and the drain electrode 190 cover at least a portion of the side surface of the first protective layer 140. For example, the source electrode 170 and the drain electrode 190 cover the side surface of the first protective layer 140. The top surfaces of the source electrode 170 and the drain electrode 190 protrude beyond the top surface of the first protective layer 140. Furthermore, at least one of the source electrode 170 and the drain electrode 190 covers at least a portion of the top surface of the first protective layer 140. However, without being limited thereto, the source electrode 170 and the drain electrode 190 may cover at least a portion of the side surface of the first protective layer 140, but may not cover the remaining portion of the side surface of the first protective layer 140. In this case, the remaining portion of the first protective layer 140 is located on the top surfaces of the source electrode 170 and the drain electrode 190.

[0058] The diode unit TU of the semiconductor device according to this embodiment further includes an upper source electrode 175 located on the source electrode 170 and an upper drain electrode 195 located on the drain electrode 190. Here, the upper source electrode 175 is formed as a part of a connecting wire 210, which will be described later.

[0059] The upper source electrode 175 is located on the source electrode 170. The upper source electrode 175 is formed of a part of the connecting wire 210, which will be described later. A part of the connecting wire 210 located in the source via SV penetrating the second passivation layer 180 serves as the upper source electrode 175. In other words, the upper source electrode 175 is connected to the source electrode 170 through the second passivation layer 180. The upper source electrode 175 may include the same material as the source electrode 170, but is not limited to this, and may also include a different material. The upper drain electrode 195 is located on the drain electrode 190. The upper drain electrode 195 is connected to the drain electrode 190 through the second passivation layer 180. The upper drain electrode 195 may include the same material as the drain electrode 190, but is not limited to this, and may also include a different material.

[0060] The source electrode 170 and the drain electrode 190 include a conductive material. For example, the source electrode 170 and the drain electrode 190 include a metal, a metal alloy, a conductive metal nitride, a metal silicide, a doped semiconductor material, a conductive metal oxide, a conductive metal oxynitride, etc. For example, the source electrode 170 and the drain electrode 190 may include titanium nitride (TiN), tantalum carbide (TaC), tantalum nitride (TaN), titanium silicon nitride (TiSiN), tantalum silicon nitride (TaSiN), tantalum titanium nitride (TaTiN), titanium aluminum nitride (TiAlN), tantalum aluminum nitride (TaAlN), tungsten nitride (WN), ruthenium (Ru), titanium aluminum (TiAl), titanium aluminum carbonitride (TiAlC-N), titanium aluminum carbide (TiAlC), titanium carbide (TiC), tantalum carbonitride The source electrode 170 and the drain electrode 190 may be made of, but are not limited to, a single layer or multiple layers. The source electrode 170 and the drain electrode 190 make ohmic contact with the channel layer 132. The regions of the channel layer 132 that contact the source electrode 170 and the drain electrode 190 are doped at a relatively higher concentration than other regions.

[0061] 2 and 3, the diode unit TU of the semiconductor device according to this embodiment includes the source electrode 170, the upper source electrode 175, the drain electrode 190, and the upper drain electrode 195. However, the number of the source electrodes 170 and the drain electrodes 190 is not limited thereto. For example, the source electrode 170 may include two or more source electrodes sequentially stacked in the third direction (Z direction) on the channel layer 132, and the drain electrode 190 may include two or more drain electrodes sequentially stacked in the third direction (Z direction) on the channel layer 132. In this case, the source electrode located at the top may also function as the connecting wire 210 connected to the gate electrode 155.

[0062] The connecting wire 210 is located on the second protective layer 180. The connecting wire 210 connects the source electrode 170 and the gate electrode 155. Specifically, the connecting wire 210 includes a portion located in a source via SV penetrating the second protective layer 180 on the source electrode 170, a portion located in a gate via GV penetrating the second protective layer 180 and the first protective layer 140, and a portion located on the second protective layer 180. The connecting wire 210 is located in the source via SV and connected to the source electrode 170. The connecting wire 210 completely fills the source via SV. The connecting wire 210 is located in the gate via GV and connected to the gate electrode 155. The connecting wire 210 completely fills the gate via GV. The connecting wire 210 overlaps the source electrode 170 and the gate electrode 155 in the third direction (Z direction).

[0063] 2 and 3, the connecting wire 210 is shown positioned on the second passivation layer 180, but the present invention is not limited thereto. For example, the connecting wire 210 may be positioned directly above the top surface of the first passivation layer 140 and connect the source electrode 170 and the gate electrode 155. As another example, a passivation layer may be further positioned between the connecting wire 210 and the second passivation layer 180 and connect the source electrode 170 and the gate electrode 155.

[0064] The connecting wire 210 includes a conductive material, which may be the same material as the source electrode 170 and the drain electrode 190, but is not limited to this. For example, the connecting wire 210 may include a metal, a metal alloy, a conductive metal nitride, a metal silicide, a doped semiconductor material, a conductive metal oxide, a conductive metal oxynitride, etc.

[0065] In one embodiment, the diode unit TU is turned on when a voltage equal to or greater than a threshold voltage is applied to the gate electrode 155. The threshold voltage of the diode unit TU of the semiconductor device according to this embodiment is, but is not limited to, 1 V to 1.3 V. In this range, the depletion region DPR of the normally-off high electron mobility transistor (HEMT) disappears, and the two-dimensional electron gas 134 is connected in the drift region DTR.

[0066] In this embodiment, the source electrode 170 and the gate electrode 155 are electrically connected via the connecting wire 210, and therefore signals having the same voltage are applied to the source electrode 170 and the gate electrode 155. For example, as shown in FIG. 3, a first voltage V1 is applied to the drain electrode 190, and a second voltage V2 is applied to the source electrode 170 and the gate electrode 155. At this time, a current flows through the diode unit TU depending on whether a value obtained by subtracting the first voltage V1 applied to the drain electrode 190 from the second voltage V2 applied to the source electrode 170 and the gate electrode 155 (V2-V1, hereinafter referred to as the "reference voltage") is larger than a threshold voltage Vth of the diode unit TU.

[0067] For example, if the reference voltage is smaller than the threshold voltage Vth (V2-V1 <V th ), a voltage smaller than the voltage for turning on the diode unit TU is applied to the gate electrode 155. This is the case where a reverse voltage is applied to the diode unit TU, and no current flows through the diode unit TU.

[0068] On the other hand, when the reference voltage is greater than the threshold voltage Vth (V2-V1>V th ), a voltage for turning on the diode unit TU is applied to the gate electrode 155. In this case, as shown in FIG. 3, the depletion region DPR disappears, and the two-dimensional electron gas 134 in the drift region DTR is connected without being cut off, allowing a current to flow. This is the case where a forward voltage is applied to the diode unit TU, and a current flows through the diode unit TU. As a result, the diode unit TU of the semiconductor device according to this embodiment has diode element characteristics in which a current flows when a forward voltage is applied, but no current flows when a reverse voltage is applied.

[0069] The diode unit TU of the semiconductor device according to this embodiment further includes a field dispersion layer located on the first passivation layer 140 .

[0070] The field distribution layer is located between the gate electrode 155 and the drain electrode 190. The field distribution layer is located between the source electrode 170 and the drain electrode 190. The field distribution layer is located on the first protective layer 140. The field distribution layer overlaps the channel layer 132 in the third direction (Z direction).

[0071] The field distribution layer is integral with the source electrode 170. The field distribution layer extends from one side of the source electrode 170 to cover the gate electrode 155. The field distribution layer overlaps the gate electrode 155 in the third direction (Z direction).

[0072] The field dispersion layer includes the same material as the source electrode 170. The field dispersion layer is formed simultaneously with the source electrode 170 in the same process. However, the field dispersion layer is not limited to this, and may be located in a different layer from the source electrode 170 or formed in a different process.

[0073] The field dispersion layer serves to disperse an electric field concentrated around the gate electrode 155. Specifically, in the gate-off state, a very high concentration of two-dimensional electron gas 134 is located in a portion of the channel layer 132 located between the gate electrode 155 and the source electrode 170 and a portion of the channel layer 132 located between the gate electrode 155 and the drain electrode 190. In this case, an electric field is concentrated in the gate electrode 155 or the gate semiconductor layer 152. Meanwhile, the gate electrode 155 and the gate semiconductor layer 152 are vulnerable to an electric field, and when the electric field is concentrated, a leakage current increases and the breakdown voltage of the diode unit TU decreases. In this case, the field dispersion layer according to this embodiment disperses the electric field concentrated around the gate electrode 155 or the gate semiconductor layer 152, thereby reducing the leakage current and increasing the breakdown voltage.

[0074] In an exemplary embodiment, the number of field dispersion layers is not limited thereto. For example, the field dispersion layer may include multiple field dispersion layers positioned on the first protective layer 140. As another example, a field dispersion layer may be further positioned on the second protective layer 180.

[0075] Hereinafter, a first example of a semiconductor device according to an embodiment will be described with further reference to FIG.

[0076] 4, the semiconductor device according to this embodiment includes a plurality of diode elements located on a substrate 110. Each of the plurality of diode elements is configured as a diode unit (TU in FIG. 2) in the embodiment of FIGS.

[0077] In this embodiment, the semiconductor device includes a plurality of reverse diodes BT and at least one forward diode FT located on a substrate 110. For example, as shown in Fig. 4, the plurality of reverse diodes BT include first to third reverse diodes (BT1 to BT3), and the at least one forward diode FT includes a first forward diode FT1. In this embodiment, each of the plurality of reverse diodes BT and the at least one forward diode FT is configured with the diode unit (TU in Fig. 2) of the embodiment of Figs. 2 and 3.

[0078] In this case, the threshold voltages of the plurality of reverse diodes BT and the at least one forward diode FT are the same. For example, the threshold voltages of the plurality of reverse diodes BT and the at least one forward diode FT are 1 V to 1.3 V, but are not limited thereto. In this range, the depletion region DPR of the normally-off high electron mobility transistor (HEMT) disappears, and two-dimensional electron gas 134 is connected in the drift region DTR.

[0079] In this embodiment, the multiple reverse diodes BT are connected to each other. The multiple reverse diodes BT are connected in series. For example, the first reverse diode BT1 is electrically connected to the second reverse diode BT2, and the second reverse diode BT2 is electrically connected to the third reverse diode BT3. In addition, at least one forward diode FT is connected to any one of the multiple reverse diodes BT. For example, the first forward diode FT1 is electrically connected to the third reverse diode BT3. As a result, the multiple reverse diodes BT and the at least one forward diode FT are connected to each other and operate in reverse, thus functioning as a Zener diode. A method for operating the multiple reverse diodes BT and the at least one forward diode FT will be described below with reference to FIGS. 5 and 6.

[0080] The semiconductor device according to this embodiment further includes first to third electrodes (250, 270, 290) connected to the plurality of reverse diodes BT and at least one forward diode FT.

[0081] The first to third electrodes (250, 270, 290) are located on the substrate 110. The first to third electrodes (250, 270, 290) are located spaced apart from each other. The first to third electrodes (250, 270, 290) extend in one direction. For example, the first to third electrodes (250, 270, 290) extend in the second direction (Y direction), but are not limited thereto. The first to third electrodes (250, 270, 290) are located in the same layer. For example, the first to third electrodes (250, 270, 290) are located directly above the upper surfaces of the first connecting wires (211_1, 211_2, 211_3) and the upper surface of the second connecting wire 212_1. In this embodiment, the third electrode 290 is electrically connected to the first electrode 250. For example, the third electrode 290 is an electrode to which the same signal as that applied to the first electrode 250 is applied, but is not limited to this.

[0082] The first to third electrodes (250, 270, 290) are electrically connected to one another by a plurality of reverse diodes BT and / or at least one forward diode FT. For example, a plurality of reverse diodes BT connect the first electrode 250 and the second electrode 270, and at least one forward diode FT connects the second electrode 270 and the third electrode 290. In this embodiment, the third electrode 290 is electrically connected to the first electrode 250 via an external wiring or the like. A signal having the same voltage is applied to the third electrode 290 and the first electrode 250, but this is not limiting. Hereinafter, for convenience of explanation, a diode unit connecting the first electrode 250 and the second electrode 270 will be referred to as a plurality of reverse diodes BT, and a diode unit connecting the second electrode 270 and the third electrode 290 will be referred to as a forward diode FT.

[0083] Each of the plurality of reverse diodes BT of the semiconductor device according to this embodiment includes a first channel layer 1321 located on the substrate 110, a first barrier layer 1361 located on the first channel layer 1321 and including a material having a different energy bandgap than the first channel layer 1321, a first gate electrode 156 located on the first barrier layer 1361, a first gate semiconductor layer 153 located between the first barrier layer 1361 and the first gate electrode 156, a first source electrode 171 and a first drain electrode 191 located on both sides of the first gate electrode 156 and connected to the first channel layer 1321, and first connecting wires (211_1, 211_2, 211_3) connecting the first source electrode 171 and the first gate electrode 156.

[0084] In addition, at least one forward diode FT of the semiconductor device according to this embodiment includes a second channel layer 1322 located on the substrate 110, a second barrier layer 1362 located on the second channel layer 1322 and including a material having a different energy bandgap than the second channel layer 1322, a second gate electrode 157_1 located on the second barrier layer 1362, a second gate semiconductor layer 154_1 located between the second barrier layer 1362 and the second gate electrode 157_1, a second source electrode 172_1 and a second drain electrode 192_1 located on both sides of the second gate electrode 157_1 and connected to the second channel layer 1322, and a second connecting wire 212_1 connecting between the second source electrode 172_1 and the second gate electrode 157_1.

[0085] In this embodiment, the components of the plurality of reverse diodes BT and at least one forward diode FT correspond to the components of the diode unit TU in the embodiment of Figures 2 and 3. The components of the plurality of reverse diodes BT and the components of the at least one forward diode FT are formed simultaneously in the same process.

[0086] Specifically, the first channel layer 1321 and the second channel layer 1322 correspond to the channel layer (132 in FIG. 2) in the embodiment of FIG. 2. The first channel layer 1321 is integral with the second channel layer 1322. That is, the first channel layer 1321 is integrally formed using the same process as the second channel layer 1322. The first channel layer 1321 includes the same material as the second channel layer 1322 and is located in the same layer. For example, the bottom surface of the first channel layer 1321 is located at the same level as the bottom surface of the second channel layer 1322, and the top surface of the first channel layer 1321 is located at the same level as the top surface of the second channel layer 1322. That is, the bottom surface of the first channel layer 1321 is located at the same distance from the bottom surface of the second channel layer 1322 and the top surface of the substrate 110. The thickness of the first channel layer 1321 along the third direction (Z direction) is substantially the same as the thickness of the second channel layer 1322 along the third direction (Z direction), but is not limited to this.

[0087] The first barrier layer 1361 and the second barrier layer 1362 correspond to the barrier layer (136 in FIG. 2) in the embodiment of FIG. 2. The first barrier layer 1361 is integral with the second barrier layer 1362. That is, the first barrier layer 1361 is integrally formed by the same process as the second barrier layer 1362. The first barrier layer 1361 includes the same material as the second barrier layer 1362 and is located in the same layer. For example, the bottom surface of the first barrier layer 1361 is located at the same level as the bottom surface of the second barrier layer 1362, and the top surface of the first barrier layer 1361 is located at the same level as the top surface of the second barrier layer 1362. That is, the bottom surface of the first barrier layer 1361 is located the same distance from the bottom surface of the second barrier layer 1362 and the top surface of the substrate 110. The thickness of the first barrier layer 1361 along the third direction (Z direction) is substantially the same as the thickness of the second barrier layer 1362 along the third direction (Z direction), but is not limited to this.

[0088] As a result, a drift region is formed in the first channel layer 1321 overlapping the first barrier layer 1361 between the first source electrode 171 and the first drain electrode 191 of each of the multiple reverse diodes BT. For example, the first reverse diode BT1 includes a first drift region DTR1 located between the first source electrode 171_1 and the first drain electrode 191_1, the second reverse diode BT2 includes a third drift region DTR3 located between the first source electrode 171_2 and the first drain electrode 191_2, and the third reverse diode BT3 includes a fifth drift region DTR5 located between the first source electrode 171_3 and the first drain electrode 191_3.

[0089] Additionally, a drift region is formed in the second channel layer 1322 overlapping the second barrier layer 1362 between the second source electrode 172_1 and the second drain electrode 192_1 of at least one forward diode FT. For example, the first forward diode FT1 includes a second drift region DTR2 located between the second source electrode 172_1 and the second drain electrode 192_1.

[0090] The first gate electrode 156 and the second gate electrode 157_1 correspond to the gate electrode (155 in FIG. 2) in the embodiment of FIG. 2. The first gate electrode 156 includes the same material as the second gate electrode 157_1 and is located in the same layer. For example, the bottom surface of the first gate electrode 156 is located at the same level as the bottom surface of the second gate electrode 157_1, and the top surface of the first gate electrode 156 is located at the same level as the top surface of the second gate electrode 157_1, but is not limited thereto.

[0091] The first gate semiconductor layer 153 and the second gate semiconductor layer 154_1 correspond to the gate semiconductor layer (152 in FIG. 2) in the embodiment of FIG. 2. The first gate semiconductor layer 153 includes the same material as the second gate semiconductor layer 154_1 and is located in the same layer. For example, the bottom surface of the first gate semiconductor layer 153 is located at the same level as the bottom surface of the second gate semiconductor layer 154_1, and the top surface of the first gate semiconductor layer 153 is located at the same level as the top surface of the second gate semiconductor layer 154_1, but is not limited thereto.

[0092] The first source electrode 171 and the second source electrode 172_1 correspond to the source electrode (170 in FIG. 2) in the embodiment of FIG. 2. The first source electrode 171 includes the same material as the second source electrode 172_1 and is located in the same layer. For example, the bottom surface of the first source electrode 171 is located at the same level as the bottom surface of the second source electrode 172_1, and the top surface of the first source electrode 171 is located at the same level as the top surface of the second source electrode 172_1, but this is not limiting.

[0093] The first drain electrode 191 and the second drain electrode 192_1 correspond to the drain electrode (190 in FIG. 2) in the embodiment of FIG. 2. The first drain electrode 191 includes the same material as the second drain electrode 192_1 and is located in the same layer. For example, the bottom surface of the first drain electrode 191 is located at the same level as the bottom surface of the second drain electrode 192_1, and the top surface of the first drain electrode 191 is located at the same level as the top surface of the second drain electrode 192_1, but is not limited thereto.

[0094] The first connecting wires (211_1, 211_2, 211_3) and the second connecting wire 212_1 correspond to the connecting wire (210 in FIG. 2) in the embodiment of FIG. 2. The first connecting wires (211_1, 211_2, 211_3) and the second connecting wire 212_1 are located on the second passivation layer 180. The first connecting wires (211_1, 211_2, 211_3) include the same material as the second connecting wire 212_1 and are located in the same layer. For example, the bottom surfaces of the first connecting wires (211_1, 211_2, 211_3) are located at the same level as the bottom surface of the second connecting wire 212_1, and the top surfaces of the first connecting wires (211_1, 211_2, 211_3) are located at the same level as the top surface of the second connecting wire 212_1, but are not limited thereto.

[0095] The description of the components of the plurality of reverse diodes BT and at least one forward diode FT is almost the same as or similar to the description of the components of the corresponding diode unit TU, and therefore, hereinafter, redundant description will be omitted and differences will be mainly described.

[0096] In this embodiment, the multiple reverse diodes BT and at least one forward diode FT are arranged in one direction. The multiple reverse diodes BT and at least one forward diode FT have the same width in the first direction (X direction), but this is not limiting. For example, the first reverse diode BT1, the second reverse diode BT2, the third reverse diode BT3, and the first forward diode FT1 are sequentially arranged in the first direction (X direction). The first reverse diode BT1, the second reverse diode BT2, the third reverse diode BT3, and the first forward diode FT1 extend in the second direction (Y direction), but this is not limiting.

[0097] As a result, the first gate electrode 156 and the second gate electrode 157_1 extend in the same direction. For example, the first gate electrode 156_1 of the first reverse diode BT1, the first gate electrode 156_2 of the second reverse diode BT2, the first gate electrode 156_3 of the third reverse diode BT3, and the second gate electrode 157_1 of the first forward diode FT1 extend along the second direction (Y direction). The first gate electrode 156 and the second gate electrode 157_1 are spaced apart from each other. The first gate electrode 156_1 of the first reverse diode BT1, the first gate electrode 156_2 of the second reverse diode BT2, the first gate electrode 156_3 of the third reverse diode BT3, and the second gate electrode 157_1 of the first forward diode FT1 are sequentially arranged along the first direction (X direction). The widths along the first direction (X direction) of the first gate electrode 156_1 of the first reverse diode BT1, the first gate electrode 156_2 of the second reverse diode BT2, the first gate electrode 156_3 of the third reverse diode BT3, and the second gate electrode 157_1 of the first forward diode FT1 are all the same, but are not limited to this. The distances between the first gate electrode 156_1 of the first reverse diode BT1 and the first gate electrode 156_2 of the second reverse diode BT2, between the first gate electrode 156_2 of the second reverse diode BT2 and the first gate electrode 156_3 of the third reverse diode BT3, and between the first gate electrode 156_3 of the third reverse diode BT3 and the second gate electrode 157_1 of the first forward diode FT1 are all the same, but are not limited to this.

[0098] The first source electrode 171 and the second source electrode 172_1 extend in the same direction. For example, the first source electrode 171_1 of the first reverse diode BT1, the first source electrode 171_2 of the second reverse diode BT2, the first source electrode 171_3 of the third reverse diode BT3, and the second source electrode 172_1 of the first forward diode FT1 extend in the second direction (Y direction). The first source electrode 171 and the second source electrode 172_1 are spaced apart from each other. The first source electrode 171_1 of the first reverse diode BT1, the first source electrode 171_2 of the second reverse diode BT2, the first source electrode 171_3 of the third reverse diode BT3, and the second source electrode 172_1 of the first forward diode FT1 are sequentially arranged in the first direction (X direction). In this case, the widths of the first source electrode 171_1 of the first reverse diode BT1, the first source electrode 171_2 of the second reverse diode BT2, the first source electrode 171_3 of the third reverse diode BT3, and the second source electrode 172_1 of the first forward diode FT1 along the first direction (X direction) are the same, but are not limited to this. Also, the first drain electrode 191 and the second drain electrode 192_1 extend in the same direction.

[0099] In this embodiment, the first source vias (SV_1, SV_3, SV_5) and the second source via SV_2 penetrate the second protective layer 180. The first source vias (SV_1, SV_3, SV_5) are located on the first source electrodes 171, and the first connecting wires (211_1, 211_2, 211_3) are located within the first source vias (SV_1, SV_3, SV_5). The second source via SV_2 is located on the second source electrode 172_1, and the second connecting wire 212_1 is located within the second source via SV_2. In this embodiment, the first source vias (SV_1, SV_3, SV_5) and the second source via SV_2 extend in the second direction (Y direction). In this case, the lengths of the first source vias (SV_1, SV_3, SV_5) and the second source via SV_2 along the second direction (Y direction) are substantially the same as the lengths of the first source electrode 171 and the second source electrode 172_1 along the second direction (Y direction), but are not limited to this.

[0100] The first gate vias (GV_1, GV_3, GV_5) and the second gate via GV_2 penetrate the second protective layer 180 and the first protective layer 140. The first gate vias (GV_1, GV_3, GV_5) are located on the first gate electrode 156, and the first connecting wires (211_1, 211_2, 211_3) are located within the first gate vias (GV_1, GV_3, GV_5). The second gate via GV_2 is located on the second gate electrode 157_1, and the second connecting wire 212_1 is located within the second gate via GV_2. The first gate vias (GV_1, GV_3, GV_5) and the second gate via GV_2 extend in the second direction (Y direction). In this case, the lengths of the first gate vias (GV_1, GV_3, GV_5) and the second gate via GV_2 in the second direction (Y direction) are almost similar to the lengths of the first gate electrode 156 and the second gate electrode 157_1 in the second direction (Y direction), but are not limited thereto. This will be described later with reference to FIGS. 11 and 12.

[0101] In this embodiment, the reverse diodes BT are connected to each other. The reverse diodes BT are connected in series to each other. For example, the first drain electrode 191_1 of the first reverse diode BT1 is electrically connected to the first source electrode 171_2 of the second reverse diode BT2, and the first drain electrode 191_2 of the second reverse diode BT2 is electrically connected to the first source electrode 171_3 of the third reverse diode BT3. In this case, the first drain electrode 191_1 of the first reverse diode BT1 and the first source electrode 171_2 of the second reverse diode BT2 are integrally formed. That is, the first drain electrode 191_1 of the first reverse diode BT1 and the first source electrode 171_2 of the second reverse diode BT2 are integrally formed in the same process. Therefore, the first drain electrode 191_1 of the first reverse diode BT1 and the first source electrode 171_2 of the second reverse diode BT2 include the same material and are located in the same layer.

[0102] In addition, the first drain electrode 191_2 of the second reverse diode BT2 and the first source electrode 171_3 of the third reverse diode BT3 are integrally formed. That is, the first drain electrode 191_2 of the second reverse diode BT2 and the first source electrode 171_3 of the third reverse diode BT3 are integrally formed in the same process. As a result, the first drain electrode 191_2 of the second reverse diode BT2 and the first source electrode 171_3 of the third reverse diode BT3 include the same material and are located in the same layer.

[0103] In this embodiment, any one of the plurality of reverse diodes BT is connected to at least one forward diode FT. For example, as shown in FIG. 4, the first drain electrode 191_3 of the third reverse diode BT3 is electrically connected to the second source electrode 172_1 of the first forward diode FT1. In this case, the first drain electrode 191_3 of the third reverse diode BT3 and the second source electrode 172_1 of the first forward diode FT1 are integrally formed. That is, the first drain electrode 191_3 of the third reverse diode BT3 and the second source electrode 172_1 of the first forward diode FT1 are integrally formed in the same process. As a result, the first drain electrode 191_3 of the third reverse diode BT3 and the second source electrode 172_1 of the first forward diode FT1 include the same material and are located in the same layer.

[0104] As a result, the first connecting wire (211_1, 211_2, 211_3) of any one of the plurality of reverse diodes BT is connected to the first drain electrode 191 of another of the plurality of reverse diodes BT. For example, the first connecting wire 211_2 of the second reverse diode BT2 is connected to the first drain electrode 191_1 of the first reverse diode BT1. The first connecting wire 211_2 of the second reverse diode BT2 is located in the first source via SV_3 that penetrates the first passivation layer 140 and is located on the first drain electrode 191_1 of the first reverse diode BT1. The first connecting wire 211_2 of the second reverse diode BT2 overlaps the first drain electrode 191_1 of the first reverse diode BT1 in the third direction (Z direction). The first connecting wire 211_2 of the second reverse diode BT2 contacts the top surface of the first drain electrode 191_1 of the first reverse diode BT1, but is not limited thereto.

[0105] In addition, the first connecting wire 211_3 of the third reverse diode BT3 is connected to the first drain electrode 191_2 of the second reverse diode BT2. The first connecting wire 211_3 of the third reverse diode BT3 is located in a first source via SV_5 that penetrates the first protective layer 140 and is located on the first drain electrode 191_2 of the second reverse diode BT2. The first connecting wire 211_3 of the third reverse diode BT3 overlaps the first drain electrode 191_2 of the second reverse diode BT2 in the third direction (Z direction). The first connecting wire 211_3 of the third reverse diode BT3 contacts the top surface of the first drain electrode 191_2 of the second reverse diode BT2, but is not limited thereto.

[0106] In addition, the second connecting wire 212_1 of one of the at least one forward diode FT is connected to the first drain electrode 191 of one of the reverse diodes BT. For example, the second connecting wire 212_1 of the first forward diode FT1 is connected to the first drain electrode 191_3 of the third reverse diode BT3. The second connecting wire 212_1 of the first forward diode FT1 is located on the second source via SV_2 penetrating the first passivation layer 140 and on the first drain electrode 191_3 of the third reverse diode BT3. The second connecting wire 212_1 of the first forward diode FT1 overlaps the first drain electrode 191_3 of the third reverse diode BT3 in the third direction (Z direction). The second connecting wire 212_1 of the first forward diode FT1 contacts the top surface of the first drain electrode 191_3 of the third reverse diode BT3, but is not limited thereto.

[0107] In this embodiment, the first to third electrodes 250, 270, and 290 are electrically connected to a plurality of reverse diodes BT and / or at least one forward diode FT.

[0108] For example, the first electrode 250 is electrically connected to the first connecting wire 211_1 of the first reverse diode BT1. Thus, the first electrode 250 is electrically connected to the first source electrode 171_1 of the first reverse diode BT1 via the first connecting wire 211_1. The first electrode 250 contacts, but is not limited to, an upper surface of the first connecting wire 211_1 of the first reverse diode BT1. The second electrode 270 is electrically connected to the second connecting wire 212_1 of the first forward diode FT1. Thus, the second electrode 270 is electrically connected to the first drain electrode 191_3 of the third reverse diode BT3 and the second source electrode 172_1 of the first forward diode FT1 via the second connecting wire 212_1. The second electrode 270 contacts, but is not limited to, an upper surface of the second connecting wire 212_1 of the first forward diode FT1. The third electrode 290 is electrically connected to the second drain electrode 192_1 of the first forward diode FT1.

[0109] Meanwhile, the third electrode 290 is electrically connected to the first electrode 250. Thus, the second drain electrode 192_1 of the first forward diode FT1 is electrically connected to the first source electrode 171_1 of the first reverse diode BT1 via the third electrode 290 and the first electrode 250. The same signal is applied to the second drain electrode 192_1 of the first forward diode FT1 and the first source electrode 171_1 of the first reverse diode BT1. In other words, the second source electrode 172_1 of the first forward diode FT1 is electrically connected to the first drain electrode 191 of one of the reverse diodes BT, and the second drain electrode 192_1 is electrically connected to the first source electrode 171 of the other reverse diode BT.

[0110] Since the multiple reverse diodes BT of the semiconductor device 100 according to this embodiment are connected in series, the total threshold voltage of the multiple reverse diodes BT is the sum of the respective threshold voltages of the connected reverse diodes. For example, as in the embodiment of FIG. 4, the total threshold voltage of the first to third reverse diodes (BT1 to BT3) is the sum of the respective threshold voltages of the first to third reverse diodes (BT1 to BT3). Meanwhile, each of the multiple reverse diodes BT has substantially the same threshold voltage. Therefore, the total threshold voltage of the first to third reverse diodes (BT1 to BT3) is substantially equal to the product of the threshold voltage of any one reverse diode and the number of reverse diodes connected in series. Furthermore, each of the multiple reverse diodes BT has a threshold voltage substantially the same as that of at least one forward diode FT. For example, the threshold voltage of each of the multiple reverse diodes BT and at least one forward diode FT is 1V to 1.3V.

[0111] Hereinafter, for convenience of explanation, the threshold voltage of at least one forward diode FT is referred to as a first threshold voltage (V F ), and the overall threshold voltage of the multiple reverse diodes BT is referred to as the second threshold voltage (V B ) For example, the first threshold voltage (V F) is 1V to 1.3V, and the second threshold voltage (V B The magnitude of the voltage ) is 3V to 3.9V, but is not limited to this.

[0112] 4, the first source electrode 171 and the first drain electrode 191 are shown as being integral with each other, and the first drain electrode 191_3 and the second source electrode 172_1 are shown as being integral with each other, but this is not necessarily limited to this. The first source electrode 171, the first drain electrode 191 and the first drain electrode 191_3, and the second source electrode 172_1 may be separate components that are separated from each other, in which case the first source electrode 171, the first drain electrode 191 and the first drain electrode 191_3, and the second source electrode 172_1 are connected by other components.

[0113] 4, the first to third electrodes (250, 270, 290) are shown as being connected to the source and drain electrodes via the first and second connecting wires (211_11, 211_2, 211_3, 212_1), but this is not limiting. For example, the first to third electrodes (250, 270, 290) may be in direct contact with the source and drain electrodes. As another example, the first to third electrodes (250, 270, 290) may be electrically connected to the source and drain electrodes via wires located above the first and second connecting wires (211_11, 211_2, 211_3, 212_1).

[0114] 4 illustrates that the semiconductor device according to the present embodiment includes three reverse diodes BT and one forward diode FT, the number of reverse diodes BT and forward diodes FT is not limited thereto. For example, the semiconductor device according to an embodiment may include two or more reverse diodes BT and one or more forward diodes FT.

[0115] The semiconductor device according to this embodiment further includes a capping layer 185 located on the first connecting wires 211_1, 211_2, and 211_3 and the second connecting wire 212_1.

[0116] The capping layer 185 covers the first connecting wires (211_1, 211_2, 211_3) and the second connecting wire 212_1. The capping layer 185 is located on the second passivation layer 180. The first to third electrodes (250, 270, 290) are connected to the first connecting wires (211_1, 211_2, 211_3) or the second connecting wire 212_1 through the capping layer 185. The capping layer 185 includes an insulating material. The capping layer 185 may include the same material as the first passivation layer 140 and the second passivation layer 180, but is not limited thereto. For example, the capping layer 185 may include an oxide such as SiO2 or Al2O3. As another example, the capping layer 185 may include a nitride such as SiN or an oxynitride such as SiON.

[0117] Hereinafter, a method for driving a semiconductor device according to an embodiment will be described with further reference to FIGS.

[0118] 5 is a cross-sectional view of a first example corresponding to A-A' in FIG. 1 showing a current flow in a semiconductor device according to an embodiment. FIG. 6 is a graph showing a change in current magnitude with respect to voltage in a semiconductor device according to an embodiment. FIG. 6 shows the current magnitude in the semiconductor device with respect to a voltage difference applied to the semiconductor device.

[0119] Hereinafter, a case where the semiconductor device includes three reverse diodes and one forward diode, as in the embodiment of FIGS. 4 and 5, will be described.

[0120] 5 and 6, a first voltage V1 is applied to the first electrode 250 and the third electrode 290 of the semiconductor device according to this embodiment, and a second voltage V2 is applied to the second electrode 270. In this embodiment, the third electrode 290 is electrically connected to the first electrode 250.

[0121] In this embodiment, the first drain electrodes 191 of the plurality of reverse diodes BT are electrically connected to the second electrode 270, and the second source electrode 172_1 of at least one forward diode FT is electrically connected to the second electrode 270. That is, the voltage applied to the first source electrode 171 and the first drain electrode 191 of the reverse diode BT is opposite to the voltage applied to the second source electrode 172_1 and the second drain electrode 192_1 of the forward diode FT. As a result, the plurality of reverse diodes BT and the at least one forward diode FT operate inversely to each other.

[0122] Hereinafter, for convenience of explanation, the value (V2-V1) obtained by subtracting the magnitude of the first voltage V1 applied to the second drain electrode 192_1 of the first forward diode FT1 from the magnitude of the second voltage V2 applied to the second source electrode 172_1 of the first forward diode FT1 will be referred to as the reference voltage Va. Meanwhile, since the multiple reverse diodes BT and the at least one forward diode FT operate inversely to each other, the second threshold voltage V B For example, the first threshold voltage V F is 1V to 1.3V, and the second threshold voltage V B is -3V to -3.9V, but is not limited to this.

[0123] In this embodiment, the reference voltage Va is equal to the first threshold voltage V F If V2-V1>V F ), the forward diode FT is turned on. As a result, a current flows along the second path I2 from the second electrode 270 through the second source electrode 172_1 and the second drain electrode 192_1 to the third electrode 290. At this time, the reference voltage Va is equal to or lower than the second threshold voltage V B Since the reverse diode BT does not operate,

[0124] Also, the reference voltage Va is equal to the first threshold voltage V F and the second threshold voltage V B In the case between (V B <(V2-V1) <V F), the reference voltage Va is equal to the second threshold voltage V B Since the reverse diode BT is turned off, the reference voltage Va reaches the first threshold voltage V F Since the forward diode FT is turned off, no current flows in the semiconductor device 100 in the first voltage section BP and the second voltage section FP.

[0125] On the other hand, the reference voltage Va is equal to the second threshold voltage V B If V2-V1 is less than <V B ), the reverse diode BT is turned on. As a result, a current flows from the first electrode 250 along the first path I1 through the first source electrode 171_1 and the first drain electrode 191_3 to the second electrode 270. At this time, as shown in FIG. 6, even if the magnitude of the current flowing along the first path I1 increases, the reference voltage Va does not exceed the second threshold voltage V B At this time, the forward diode FT is turned off and no current flows along the second path I2.

[0126] In summary, the semiconductor device 100 according to this embodiment has a forward voltage (for example, a reference voltage Va) that is greater than or equal to the first threshold voltage V F If V2-V1>V F When a reverse voltage (V a ) is applied, a current flows from the second electrode 270 to the third electrode 290 along the second path I2, and a reverse voltage (e.g., a reference voltage V a ) is applied to the first threshold voltage V a . F The second threshold voltage V B If it is greater than (V B <(V2-V1) <V F )) is applied, no current flows.

[0127] Meanwhile, in the semiconductor device 100 according to the present embodiment, when a reverse voltage equal to or greater than a predetermined magnitude is applied, a current flows from the first electrode 250 to the second electrode 270 along the first path I1. As a result, the semiconductor device 100 according to the present embodiment generates a second threshold voltage V BAs a result, even when a reverse voltage of a predetermined magnitude or greater is applied between the first electrode 250 and the second electrode 270, the voltage between the first electrode 250 and the second electrode 270 does not exceed the second threshold voltage V B The voltage is maintained at a similar level.

[0128] Furthermore, in the semiconductor device 100 according to the present embodiment, the reverse diode BT and the forward diode FT are configured using the diode unit (TU in FIG. 2), so that a Zener diode having a desired breakdown voltage can be easily designed.

[0129] Hereinafter, various examples of a semiconductor device according to an embodiment will be described with reference to FIGS.

[0130] 7 to 10 are cross-sectional views of various examples of a semiconductor device according to an embodiment, corresponding to AA' in FIG. 1. FIGS. 11 to 14 are plan views of various examples of a semiconductor device according to an embodiment.

[0131] Figures 7 to 14 show various modified examples of the semiconductor device according to the embodiment shown in Figures 1 to 6. The embodiments shown in Figures 7 to 14 correspond to the same parts as the embodiment shown in Figures 1 to 6, so a description thereof will be omitted and the description will focus on the differences. Also, the same reference numerals will be used for the same components as the previous embodiment.

[0132] Referring to FIG. 7, the first connecting wires (211_1, 211_2, 211_3) of the semiconductor device according to this embodiment are integral with the first source electrode 171, and the second connecting wire 212_1 is integral with the second source electrode 172_1.

[0133] In this embodiment, the first connecting wires (211_1, 211_2, 211_3) are located between the first protective layer 140 and the second protective layer 180. The first connecting wires (211_1, 211_2, 211_3) are integral with the first source electrode 171. For example, the first connecting wires (211_1, 211_2, 211_3) are formed in the same process as the first source electrode 171. The first connecting wires (211_1, 211_2, 211_3) include the same material as the first source electrode 171. The first connecting wires (211_1, 211_2, 211_3) are connected to the first gate electrode 156 through first gate vias (GV_1, GV_3, GV_5) that penetrate the first protective layer 140. The first connecting wires 211_1, 211_2, and 211_3 contact the top surface of the first gate electrode 156, but are not limited thereto.

[0134] In this embodiment, the second connecting wire 212_1 is located between the first protective layer 140 and the second protective layer 180. The second connecting wire 212_1 is integral with the second source electrode 172_1. For example, the second connecting wire 212_1 is formed in the same process as the second source electrode 172_1. The second connecting wire 212_1 includes the same material as the second source electrode 172_1. The second connecting wire 212_1 is connected to the second gate electrode 157_1 through a second gate via GV_2 that penetrates the first protective layer 140. The second connecting wire 212_1 contacts an upper surface of the second gate electrode 157_1, but is not limited thereto.

[0135] Referring to FIG. 8, the semiconductor device according to this embodiment further includes an isolation structure 160 penetrating the barrier layers (1361, 1362) and the channel layers (1321, 1322).

[0136] For example, the isolation structure 160 recesses at least a portion of the substrate 110 through the barrier layers 1361 and 1362, the channel layers 1321 and 1322, the seed layer 121, and the buffer layer 120. The first channel layers 1321 of the respective reverse diodes BT are separated from one another. However, without being limited thereto, as another example, the isolation structure 160 may penetrate only the barrier layers 1361 and 1362 and be positioned on the channel layers 1321 and 1322. As another example, the isolation structure 160 may penetrate only the barrier layers 1361 and 1362 and the channel layers 1321 and 1322. As another example, the isolation structure 160 may penetrate the barrier layers 1361 and 1362 and the channel layers 1321 and 1322 and recess at least a portion of the buffer layer 120.

[0137] The isolation structure 160 overlaps the source electrodes 171 and 172_1 and the drain electrodes 191 and 192_1 in the third direction (Z direction). The isolation structure 160 contacts the bottom surfaces of the source electrodes 171 and 172_1 and the drain electrodes 191 and 192_1, but is not limited thereto.

[0138] In this embodiment, the isolation structure 160 is formed by forming barrier layers 1361 and 1362 on the channel layers 1321 and 1322 and performing an ion implantation process in the barrier layers 1361 and 1362. As another example, the gate semiconductor layers 153 and 154_1 may be formed on the barrier layers 1361 and 1362, performing an ion implantation process on the upper ends of the gate semiconductor layers 153 and 154_1, and then patterning the gate semiconductor layers 153 and 154_1. As a result, the exposed barrier layers 1361 and 1362, the channel layers 1321 and 1322, and the ion-implanted regions of the buffer layer 120 correspond to the isolation structure 160. For example, two-dimensional electron gas is not formed or is hardly formed in the regions of the barrier layers 1361 and 1362 where the ion implantation process is performed and the regions of the channel layers 1321 and 1322 overlapping in the third direction (Z direction). In this case, the ion implantation regions of the barrier layers 1361 and 1362 and the corresponding regions of the channel layers 1321 and 1322 correspond to the isolation structure 160. As another example, the isolation structure 160 can be formed by performing an ion implantation process in the channel layers 1321 and 1322. The regions of the channel layers 1321 and 1322 where the ion implantation process is performed correspond to the isolation structure 160. Two-dimensional electron gas is not formed or is hardly formed in the regions of the channel layers 1321 and 1322 where the ion implantation process is performed. The material used in the ion implantation process is argon (Ar) ions. However, without being limited thereto, the isolation structure 160 may be formed by forming barrier layers (1361, 1362) on the channel layers (1321, 1322), forming trenches penetrating the barrier layers (1361, 1362), and then filling the trenches with an insulating material. The insulating material constituting the isolation structure 160 may include the same material as the first protective layer 140 and / or the second protective layer 180. For example, the insulating material constituting the isolation structure 160 may include an oxide such as SiO2 or Al2O3. As another example, the insulating material constituting the isolation structure 160 may include a nitride such as SiN or an oxynitride such as SiON.However, the insulating material forming the isolation structure 160 may include a material different from that of the first passivation layer 140.

[0139] 9, the number of reverse diodes BT of the semiconductor device according to this embodiment may be changed in various ways. For example, as shown in FIG. 9, the semiconductor device according to this embodiment includes four reverse diodes BT and one forward diode FT. The first to fourth reverse diodes BT1 to BT4 are connected in series.

[0140] In this case, the second electrode 270 is electrically connected to the second connecting wire 212_1 of the first forward diode FT1. The second electrode 270 is electrically connected to the first drain electrode 191_4 of the fourth reverse diode BT4 and the second source electrode 172_1 of the first forward diode FT1 via the second connecting wire 212_1. The second electrode 270 contacts an upper surface of the second connecting wire 212_1, but is not limited thereto.

[0141] The first source electrode 171_4 of the fourth reverse diode BT4 is integral with the first drain electrode 191_3 of the third reverse diode BT3. The first drain electrode 191_4 of the fourth reverse diode BT4 is integral with the second source electrode 172_1 of the first forward diode FT1. The description of this is substantially the same as the description of the reverse diode BT and forward diode FT in the embodiment of FIGS. 1 to 6, so will be omitted.

[0142] Referring to FIG. 10, the number of reverse diodes BT and the number of forward diodes FT in the semiconductor device according to this embodiment are the same.

[0143] 10, the semiconductor device according to this embodiment includes first to third reverse diodes (BT1 to BT3) and first to third forward diodes (FT1 to FT3). The first to third reverse diodes (BT1 to BT3) and the first to third forward diodes (FT1 to FT3) are configured by the diode unit (TU in FIG. 2) of the embodiment in FIGS. 2 and 3.

[0144] The explanation of the components of the first to third reverse diodes (BT1 to BT3) and the first to third forward diodes (FT1 to FT3) is almost the same as or similar to the explanation of the components of the corresponding diode unit (TU in FIG. 2), so hereinafter, overlapping explanations will be omitted and differences will be mainly described.

[0145] The first to third forward diodes FT1 to FT3 are connected in series. For example, the second drain electrode 192_1 of the first forward diode FT1 is integral with the second source electrode 172_2 of the second forward diode FT2, and the second drain electrode 192_2 of the second forward diode FT2 is integral with the second source electrode 172_3 of the third forward diode FT3. The third electrode 290 is electrically connected to the second drain electrode 192_3 of the third forward diode FT3.

[0146] Therefore, the total threshold voltage of the multiple forward diodes FT is the sum of the respective threshold voltages of the connected forward diodes. For example, the total threshold voltage of the first to third forward diodes (FT1 to FT3) is the sum of the respective threshold voltages of the first to third forward diodes (FT1 to FT3). Meanwhile, each of the multiple forward diodes FT has substantially the same threshold voltage. Therefore, the total threshold voltage of the first to third forward diodes (FT1 to FT3) is substantially the same as the product of the threshold voltage of any one forward diode and the number of forward diodes connected in series. For example, the magnitude of the total threshold voltage of the first to third forward diodes (FT1 to FT3) is 3V to 3.9V, but is not limited to this.

[0147] In an embodiment of the present invention, the total threshold voltage of the plurality of forward diodes FT is substantially the same as the total threshold voltage of the plurality of reverse diodes BT, so that the semiconductor device according to the embodiment of the present invention functions as a bidirectional diode element having a breakdown voltage not only at a predetermined reverse voltage or more but also at a predetermined forward voltage or more.

[0148] 11 and 12, the gate vias (GV_1, GV_3, GV_5, GV_2) of the semiconductor device according to this embodiment have various shapes.

[0149] The gate vias (GV_1, GV_3, GV_5, GV_2) are arranged along the first direction (X direction). The gate vias (GV_1, GV_3, GV_5, GV_2) overlap the gate electrodes (156, 157_1) in the third direction (Z direction). The first connecting wires (211_1, 211_2, 211_3) are located within the first gate vias (GV_1, GV_3, GV_5), and the second connecting wire 212_1 is located within the second gate via GV_2.

[0150] For example, as shown in FIG. 11, the lengths of the gate vias (GV_1, GV_3, GV_5, GV_2) along the second direction (Y direction) are shorter than the lengths of the first and second gate electrodes (156, 157_1) along the second direction (Y direction). Furthermore, the lengths of the gate vias (GV_1, GV_3, GV_5, GV_2) along the second direction (Y direction) are shorter than the lengths of the source vias (SV_1, SV_3, SV_5, SV_2) along the second direction (Y direction). Furthermore, the lengths of the gate vias (GV_1, GV_3, GV_5, GV_2) along the second direction (Y direction) are shorter than the lengths of the first and second source electrodes (171, 172_1) along the second direction (Y direction).

[0151] As another example, as shown in FIG. 12, the semiconductor device 100 according to this embodiment may further include a dummy region DA located on one side of the first and second source electrodes 171, 172_1, and the gate vias GV_1, GV_3, GV_5, and GV_2 may be located in the dummy region DA.

[0152] The first and second gate electrodes 156, 157_1 and the first and second connecting wires 211, 212_1 are located in the dummy region DA. That is, the first and second gate electrodes 156, 157_1 and the first and second connecting wires 211, 212_1 extend further into the dummy region DA. In the dummy region DA, the first connecting wire 211 fills the first gate vias GV_1, GV_3, and GV_5. In the dummy region DA, the first connecting wire 211 is electrically connected to the first gate electrode 156 through the first gate vias GV_1, GV_3, and GV_5. In addition, in the dummy region DA, the second connecting wire 212_1 fills the second gate via GV_2. In the dummy region DA, the second connecting wire 212_1 is electrically connected to the second gate electrode 157_1 through the second gate via GV_2.

[0153] 13 and 14, the arrangement of the plurality of reverse diodes BT and at least one forward diode FT of the semiconductor device according to this embodiment can be modified in various ways.

[0154] 13, the first reverse diode BT1 is located on one side of the second reverse diode BT2 in the first direction (X direction), and the third reverse diode BT3 is located on the other side of the second reverse diode BT2 in the first direction (X direction). In this case, the length of the third reverse diode BT3 in the second direction (Y direction) is shorter than the length of the first reverse diode BT1 in the second direction (Y direction), but this is not limited to this.

[0155] The first forward diode FT1 is located on one side of the third reverse diode BT3 in the second direction (Y direction). That is, the first forward diode FT1 is located on the other side of the second reverse diode BT2 in the first direction (X direction). The first forward diode FT1 and the second reverse diode BT2 are spaced apart from each other. An isolation structure 160 is located between the first forward diode FT1 and the second reverse diode BT2.

[0156] 1 to 6, the second source electrode 172_1 of the first forward diode FT1 is spaced apart from the first drain electrode 191_3 of the third reverse diode BT3. An isolation structure 160 is located between the second source electrode 172_1 of the first forward diode FT1 and the first drain electrode 191_3 of the third reverse diode BT3. The second source electrode 172_1 of the first forward diode FT1 and the first drain electrode 191_3 of the third reverse diode BT3 are separated by the isolation structure 160. The remaining description of the isolation structure 160 is substantially the same as that of the isolation structure 160 of the embodiment of FIG. 8, and therefore will be omitted.

[0157] In this embodiment, the second electrode 270 is electrically connected to the second connecting wire 212_1 of the first forward diode FT1 and the first drain electrode 191_3 of the third reverse diode BT3.

[0158] 14, the semiconductor device 100 according to this embodiment includes first to third reverse diodes (BT1 to BT3) and first to third forward diodes (FT1 to FT3), and the first to third reverse diodes (BT1 to BT3) and the first to third forward diodes (FT1 to FT3) are positioned adjacent to each other in the second direction (Y direction). As an example, the first reverse diode BT1 and the first forward diode FT1 are positioned adjacent to each other in the second direction (Y direction), the second reverse diode BT2 and the second forward diode FT2 are positioned adjacent to each other in the second direction (Y direction), and the third reverse diode BT3 and the third forward diode FT3 are positioned adjacent to each other in the second direction (Y direction). In this case, an isolation structure 160 is positioned between the first to third reverse diodes (BT1 to BT3) and the first to third forward diodes (FT1 to FT3). The isolation structure 160 separates the first to third reverse diodes (BT1 to BT3) from the first to third forward diodes (FT1 to FT3).

[0159] 10, the semiconductor device 100 according to this embodiment does not include a third electrode 290. Specifically, the first electrode 250 extends in the second direction (Y direction) and is electrically connected to the first connecting wire 211_1 of the first reverse diode BT1 and the second drain electrode 192_3 of the first forward diode FT1. The second electrode 270 is electrically connected to the second connecting wire 212_1 of the first forward diode FT1 and the first drain electrode 191_3 of the third reverse diode BT3.

[0160] Hereinafter, an electronic system including a semiconductor device according to an embodiment will be described with reference to FIGS.

[0161] Figure 15 is a plan view illustrating an electronic system including a semiconductor device according to an embodiment. Figures 16 and 17 are cross-sectional views taken along line BB' in Figure 15. Figure 16 illustrates a semiconductor device according to an embodiment in which a main transistor device is in an off state, and Figure 17 illustrates a semiconductor device according to an embodiment in which a main transistor device is in an on state.

[0162] 15 and 16, the electronic system according to this embodiment includes a main device region MA including a main transistor device 400, and a peripheral circuit region PA including the semiconductor device 100 according to the embodiment of FIGS.

[0163] The main transistor element 400 is located within the main element region MA. For example, the main transistor element 400 of the electronic system according to this embodiment is a normally-off high electron mobility transistor (HEMT). However, the main transistor element 400 of the electronic system according to this embodiment is not limited thereto and may be a normally-on high electron mobility transistor. That is, the main element region MA in this embodiment refers to a region where the main transistor element 400 is located.

[0164] In the peripheral circuit region PA of the electronic system according to this embodiment, devices electrically connected to the main transistor device 400 are located. In this embodiment, the semiconductor device 100 of the embodiment of FIGS. 1 to 14 is located in the peripheral circuit region PA. The semiconductor device 100 is electrically connected to the main transistor device 400, but is not limited to this. The semiconductor device 100 functions as a Zener diode that prevents a sudden increase in voltage at one end of the main transistor device 400. Alternatively, the semiconductor device 100 may be configured with other devices to clip the voltage at one end of the main transistor device 400, but is not limited to this.

[0165] In this embodiment, the peripheral circuit area PA may further include passive elements such as capacitors or inductors, or may further include active elements such as an IC (integrated circuit) chip, in addition to the semiconductor device 100. As another example, the peripheral circuit area PA may further include a current divider, a voltage divider, a voltage clipper, a protection element for the main transistor device 400, etc. In this embodiment, the peripheral circuit area PA refers to an area in which the semiconductor device 100 is disposed.

[0166] The peripheral circuit region PA of the electronic system according to this embodiment is located apart from the main device region MA. For example, the peripheral circuit region PA is located apart from the main device region MA in the second direction (Y direction), but is not limited thereto. As another example, the peripheral circuit region PA may be located apart from the main device region MA in the first direction (X direction) or may surround the side of the main device region MA. Of course, various other modifications are possible. A main transistor element 400 is located within the main device region MA, and the peripheral circuit region PA includes a semiconductor element 100 electrically connected to one end of the main transistor element 400.

[0167] The main transistor element 400 of the electronic system according to this embodiment includes a main channel layer 132m, a main barrier layer 136m located on the main channel layer 132m, a main gate electrode 155m located on the main barrier layer 136m, a main gate semiconductor layer 152m located between the main barrier layer 136m and the main gate electrode 155m, and a main source electrode 170m and a main drain electrode 190m located on both sides of the main gate electrode 155m and connected to the main channel layer 132m.

[0168] In this embodiment, the components of the main transistor element 400 are configured with at least some of the components of the semiconductor element 100. The components of the main transistor element 400 correspond to at least some of the components of the semiconductor element 100. That is, the components of the main transistor element 400 are configured with at least some of the components of the diode unit (TU in FIG. 2) in the embodiment of FIGS. 2 and 3. Therefore, the components of the main transistor element 400 correspond to at least some of the components of the reverse diode BT and the forward diode FT in the embodiment of FIGS. 1 to 14.

[0169] The description of the components of the main transistor device 400 is almost the same as or similar to the description of the corresponding components of the semiconductor device 100, so the following description will be omitted and differences will be mainly described.

[0170] The main channel layer 132m corresponds to the channel layer (132 in FIG. 2) in the embodiment of FIG. 2 and FIG. 3. The main channel layer 132m is a layer that forms a channel between the main source electrode 170m and the main drain electrode 190m, and a two-dimensional electron gas (2DEG) 134 is located inside the main channel layer 132m.

[0171] In this embodiment, the main channel layer 132m includes the same material as the first channel layer 1321 and the second channel layer 1322 and is located in the same layer. For example, the main channel layer 132m includes one or more materials selected from III-V group materials, such as nitrides containing Al, Ga, In, B, or combinations thereof. The main channel layer 132m, the first channel layer 1321, and the second channel layer 1322 are located directly above the upper surface of the buffer layer 120, but are not limited thereto.

[0172] The main channel layer 132m is located on the substrate 110, and the seed layer 121 and the buffer layer 120 are located between the substrate 110 and the main channel layer 132m. The description of the substrate 110, the seed layer 121, and the buffer layer 120 is omitted because they are substantially the same as the description of the substrate 110, the seed layer 121, and the buffer layer 120 in the embodiment of FIGS.

[0173] The main barrier layer 136m corresponds to the barrier layer (136 in FIG. 2) in the embodiment of FIGS. 2 and 3. The main barrier layer 136m is located on the main channel layer 132m. The region of the main channel layer 132m that overlaps the main barrier layer 136m between the main source electrode 170m and the main drain electrode 190m is the main drift region DTRm. The main drift region DTRm is located between the main source electrode 170m and the main drain electrode 190m. The main drift region DTRm refers to the region through which carriers move when a potential difference occurs between the main source electrode 170m and the main drain electrode 190m. The electronic system according to this embodiment is turned on / off depending on whether a voltage is applied to the main gate electrode 155m and / or the magnitude of the voltage applied to the main gate electrode 155m, thereby allowing or blocking carrier movement in the main drift region DTRm.

[0174] In this embodiment, the main barrier layer 136m includes the same material as the first barrier layer 1361 and the second barrier layer 1362 and is located in the same layer. The main barrier layer 136m is located apart from the first barrier layer 1361 and the second barrier layer 1362, but is not limited thereto, and may be integral with at least a portion of the first barrier layer 1361 and the second barrier layer 1362.

[0175] The main gate electrode 155m corresponds to the gate electrode (155 in FIG. 2) in the embodiment of FIGS. 2 and 3. The main gate electrode 155m is located on the main barrier layer 136m. The main gate electrode 155m overlaps a partial region of the main barrier layer 136m in the third direction (Z direction).

[0176] The main gate electrode 155m may include the same material as the first gate electrode 156 and the second gate electrode 157_1 and be located in the same layer. The main gate electrode 155m may be located apart from the first gate electrode 156 and the second gate electrode 157_1, but is not limited thereto. For example, the main gate electrode 155m may be integral with at least a portion of the first gate electrode 156 and the second gate electrode 157_1. In this case, the integral gate electrode may overlap the isolation structure 160 in the third direction (Z direction), but is not limited thereto.

[0177] In an exemplary embodiment, the gate electrode 155m may further include a hard mask layer located on the gate electrode 155m. The hard mask layer is a hard mask used to pattern the gate electrode material layer or the gate semiconductor layer during the process of forming the main gate electrode 155m. However, the hard mask layer may be removed depending on the etching conditions during etching of the gate electrode material layer or the gate semiconductor layer or the cleaning conditions after etching. For example, the hard mask layer may include silicon oxide, silicon nitride, silicon oxynitride, or a combination thereof.

[0178] The main gate semiconductor layer 152m corresponds to the gate semiconductor layer (152 in FIG. 2) in the embodiment of FIGS. 2 and 3. The main gate semiconductor layer 152m is located between the main barrier layer 136m and the main gate electrode 155m. The main gate semiconductor layer 152m forms a depletion region DPR in the main channel layer 132m. The occurrence of the depletion region DPR prevents current from flowing between the main source electrode 170m and the main drain electrode 190m, blocking the channel path. As a result, the main transistor element 400 of the electronic system according to this embodiment has normally-off characteristics.

[0179] That is, the main transistor element 400 of the electronic system according to this embodiment is a normally-off high electron mobility transistor (HEMT). As shown in FIG. 16, in a normal state where no voltage is applied to the main gate electrode 155m, a depletion region DPR exists, and the main transistor element 400 is in an off state. As shown in FIG. 17, when a voltage equal to or greater than a threshold voltage is applied to the main gate electrode 155m, the depletion region DPR disappears, and the two-dimensional electron gas 134 in the main drift region DTRm is connected without being cut off. That is, the main transistor element 400 is in an on state.

[0180] The main gate semiconductor layer 152m may include the same material as the first gate semiconductor layer 153 and the second gate semiconductor layer 154_1 and be located in the same layer. The main gate semiconductor layer 152m may be located apart from the first gate semiconductor layer 153 and the second gate semiconductor layer 154_1, but is not limited thereto. For example, the main gate semiconductor layer 152m may be integral with at least a portion of the first gate semiconductor layer 153 and the second gate semiconductor layer 154_1. In this case, the integral gate semiconductor layer may overlap the isolation structure 160 in the third direction (Z direction), but is not limited thereto.

[0181] The electronic system according to this embodiment further includes a first protective layer 140 located on the main barrier layer 136m and a second protective layer 180 located on the first protective layer 140. The first protective layer 140 corresponds to the first protective layer (140 in FIG. 2) in the embodiment of FIGS. 2 and 3, and the second protective layer 180 corresponds to the second protective layer (180 in FIG. 2) in the embodiment of FIGS. 2 and 3.

[0182] The main source electrode 170m and the main drain electrode 190m are located on the main channel layer 132m and are in direct contact with the main channel layer 132m and electrically connected to the main channel layer 132m.

[0183] In this embodiment, the main source electrode 170m includes a first main source electrode 171m and a second main source electrode 172m sequentially positioned on the main channel layer 132m, and the main drain electrode 190m includes a first main drain electrode 191m and a second main drain electrode 192m sequentially positioned on the main channel layer 132m.

[0184] The first main source electrode 171m and the first main drain electrode 191m are in contact with the upper surface of the main channel layer 132m and correspond to the source electrode (170 in FIG. 2) and the drain electrode (190 in FIG. 2) in the embodiment of FIGS. 2 and 3.

[0185] The first main source electrode 171m includes the same material as the first source electrode 171 and the second source electrode 172_1 and is located in the same layer. The first main source electrode 171m is located spaced apart from the first source electrode 171 and the second source electrode 172_1, but is not limited thereto. For example, the first main source electrode 171m may be integral with at least a portion of the first source electrode 171 and the second source electrode 172_1. In this case, the integral source electrode overlaps the isolation structure 160 in the third direction (Z direction), but is not limited thereto.

[0186] The first main drain electrode 191m includes the same material as the first drain electrode 191 and the second drain electrode 192_1 and is located in the same layer. The first main drain electrode 191m is located spaced apart from the first drain electrode 191 and the second drain electrode 192_1, but is not limited thereto. For example, the first main drain electrode 191m may be integral with at least a portion of the first drain electrode 191 and the second drain electrode 192_1. In this case, the integral drain electrode overlaps the isolation structure 160 in the third direction (Z direction), but is not limited thereto.

[0187] The second main source electrode 172m is located on the first main source electrode 171m. The second main source electrode 172m corresponds to the upper source electrode (175 in FIG. 2) in the embodiment of FIGS. 2 and 3. The second main source electrode 172m is made of the same material as the first connecting wires (211_1, 211_2, 211_3) and the second connecting wires 212_1 and is located in the same layer. The second main source electrode 172m is located spaced apart from the first connecting wires (211_1, 211_2, 211_3) and the second connecting wires 212_1, but is not limited thereto. For example, the second main source electrode 172m may be integral with at least a portion of the first connecting wires (211_1, 211_2, 211_3) and the second connecting wires 212_1.

[0188] The second main drain electrode 192m is located on the first main drain electrode 191m. The second main drain electrode 192m corresponds to the upper drain electrode (195 in FIG. 2) in the embodiment of FIGS. 2 and 3. The second main drain electrode 192m is made of the same material as the first connecting wires (211_1, 211_2, 211_3) and the second connecting wires 212_1 and is located in the same layer. The second main drain electrode 192m is located spaced apart from the first connecting wires (211_1, 211_2, 211_3) and the second connecting wires 212_1, but is not limited thereto. For example, the second main drain electrode 192m may be integral with at least a portion of the first connecting wires (211_1, 211_2, 211_3) and the second connecting wires 212_1.

[0189] The electronic system according to this embodiment further includes an isolation structure located between the semiconductor device 100 and the main transistor device 400 .

[0190] In this embodiment, the semiconductor device 100 is separated from the main transistor device 400 by an isolation structure 160. For example, as shown in FIG. 15, the main transistor device 400 and the semiconductor device 100 are spaced apart in the second direction (Y direction) by the isolation structure, but this is not limiting. The isolation structure in this embodiment corresponds to the isolation structure (160 in FIG. 8) in the embodiment of FIG.

[0191] The isolation structure in this embodiment penetrates the main barrier layer 136m. For example, the isolation structure penetrates the main barrier layer 136m, the main channel layer 132m, the seed layer 121, and the buffer layer 120 to recess at least a portion of the substrate 110. However, without being limited thereto, as another example, the isolation structure may penetrate only the main barrier layer 136m and be positioned on the main channel layer 132m. As another example, the isolation structure may penetrate the main barrier layer 136m. As another example, the isolation structure may penetrate the barrier layer 136m and the channel layer 132m and recess at least a portion of the buffer layer 120. The remaining description of the isolation structure is substantially the same as the description of the isolation structure 160 in the embodiment of FIG. 8 and will therefore be omitted.

[0192] The main transistor element 400 of the electronic system according to this embodiment further includes a first electrode 250 located on the main source electrode 170 and a second electrode 270 located on the main drain electrode 190 .

[0193] The first electrode 250 is electrically connected to the main source electrode 170, and the second electrode 270 is electrically connected to the main drain electrode 190. The first electrode 250 corresponds to the first electrode (250 in FIG. 4) in the embodiment of FIG. 4, and the second electrode 270 corresponds to the second electrode (270 in FIG. 4) in the embodiment of FIG. 4. However, the present invention is not limited thereto, and the arrangement of the first electrode 250 and the second electrode 270 may be variously changed. For example, the first electrode 250 may be electrically connected to the main drain electrode 190, and the second electrode 270 may be electrically connected to the main source electrode 170.

[0194] Although the embodiments of the present invention have been described in detail above with reference to the drawings, the present invention is not limited to the above-described embodiments and can be modified in various ways without departing from the technical concept of the present invention. [Explanation of symbols]

[0195] 100 Semiconductor element 110 Substrate 120 buffer layer 121 seed layer 124 Superlattice layer 126 High resistance layer 132 Channel Layer 132m main channel layer 134 Two-dimensional electron gas (2DEG) 136 Barrier Layer 136m Main Barrier Layer 140, 180 1st and 2nd protective layer 152 Gate semiconductor layer 152m Main gate semiconductor layer 153, 153_1 to 153_4 First gate semiconductor layer 154_1 Second gate semiconductor layer 155 gate electrode 155m Main gate electrode 156, 156_1 to 156_4 First gate electrode 157_1~157_3 Second gate electrode 160 Separation Structure 170 Source electrode 170m Main Source Electrode 171, 171_1 to 171_4 First source electrode 171m, 172m First and second main source electrodes 172_1~172_3 Second source electrode 175 Upper source electrode 185 Capping Layer 190, 190m Main drain electrode 191, 191_1 to 191_4 First drain electrode 191m, 192m First and second main drain electrodes 192_1~192_3 Second drain electrode 195 Upper drain electrode 210 Connecting Wiring 211_1~211_3 1st connection wiring 212_1~212_3 2nd connection wiring 250, 270, 290 1st to 3rd electrode 400 Main transistor element 1321, 1322 1st and 2nd channel layers 1361, 1362 First and second barrier layers BT reverse diode BT1~BT4 1st to 4th reverse diodes DA Dummy area DTR Drift Area DTRm Main Drift Region DTR1, DTR3, DTR5 1st, 3rd, 5th drift regions DTR2 Second Drift Region DPR depletion region FT forward diode FT1~FT3 1st~3rd forward diodes GV Gate Via GV_1, GV3, GV5 First gate via GV_2 Second gate via MA Main element area PA peripheral circuit area SV Source Beer SV_1, SV_3, SV_5 First source via SV_2 Second source via TU Diode Unit V1, V2 First and second voltages

Claims

1. A substrate; a plurality of reverse diodes and at least one forward diode located on the substrate; The plurality of reverse diodes are a first channel layer located on the substrate; a first barrier layer positioned on the first channel layer and having a different energy bandgap than the first channel layer; a first gate electrode located on the first barrier layer; a first gate semiconductor layer located between the first barrier layer and the first gate electrode; a first source electrode and a first drain electrode located on both sides of the first gate electrode and connected to the first channel layer; the first source electrode is connected to the first gate electrode; The at least one forward diode is a second channel layer located on the substrate; a second barrier layer positioned on the second channel layer and having a different energy bandgap than the second channel layer; a second gate electrode located on the second barrier layer; a second gate semiconductor layer located between the second barrier layer and the second gate electrode; a second source electrode and a second drain electrode located on both sides of the second gate electrode and connected to the second channel layer; the second source electrode is connected to the second gate electrode; a first drain electrode of one of the plurality of reverse diodes connected to a second source electrode of one of the at least one forward diode.

2. 2. The semiconductor device of claim 1, wherein a first source electrode of another of the plurality of reverse diodes is electrically connected to a second drain electrode of any one of the at least one forward diode.

3. the plurality of reverse diodes include a first reverse diode and a second reverse diode; the at least one forward diode includes a first forward diode; a first drain electrode of the first reverse diode is connected to a first source electrode of the second reverse diode; 2. The semiconductor device of claim 1, wherein a first drain electrode of the second reverse diode is connected to a second source electrode of the first forward diode.

4. a first drain electrode of the first reverse diode includes the same material as a first source electrode of the second reverse diode and is integral with the first source electrode; 4. The semiconductor device of claim 3, wherein the first drain electrode of the second reverse diode is integral with the second source electrode of the first forward diode, and the first drain electrode contains the same material as the second source electrode of the first forward diode.

5. a first electrode connected to a first source electrode of the first reverse diode; a second electrode connected to the first drain electrode of the second reverse diode; The semiconductor device of claim 3 , wherein the first electrode is connected to a second drain electrode of the first forward diode.

6. a first protective layer covering the first barrier layer, the first gate electrode, the second barrier layer, and the second gate electrode; the first source electrode and the first drain electrode are connected to the first channel layer through the first protection layer and the first barrier layer; The semiconductor device of claim 1 , wherein the second source electrode and the second drain electrode are connected to the second channel layer through the first passivation layer and the second barrier layer.

7. a first connecting electrode located on the first passivation layer and connecting the first source electrode and the first gate electrode; a second connection electrode located on the first protection layer and connecting the second source electrode and the second gate electrode, The semiconductor device of claim 6 , wherein the first connecting electrode and the second connecting electrode are located in the same layer and include the same material.

8. further comprising a second protective layer positioned on the first protective layer; The semiconductor device of claim 7 , wherein the first and second connecting electrodes are located on the second passivation layer.

9. the first connecting electrode is connected to the first source electrode through the second passivation layer and is connected to the first gate electrode through the second passivation layer and the first passivation layer; 9. The semiconductor device of claim 8, wherein the second connection electrode is connected to the second source electrode through the second passivation layer and is connected to the second gate electrode through the second passivation layer and the first passivation layer.

10. the first source electrode and the first connection electrode are integrally formed, The semiconductor device of claim 7 , wherein the second source electrode and the second connection electrode are integrally formed.

11. the first channel layer and the second channel layer are integral with each other, The semiconductor device according to claim 1 , wherein the first barrier layer and the second barrier layer are integrally formed.

12. The semiconductor device of claim 11 , wherein the first source electrode, the first drain electrode, the second source electrode, and the second drain electrode are located in the same layer and include the same material.

13. 2. The semiconductor device according to claim 1, wherein the threshold voltage of each of the plurality of reverse diodes and the threshold voltage of each of the at least one forward diode are the same.

14. 14. The semiconductor device of claim 13, wherein the threshold voltage of each of the plurality of reverse diodes is 1V to 1.3V.

15. The semiconductor device according to claim 1 , wherein the number of the plurality of reverse diodes is the same as the number of the at least one forward diode.

16. A substrate; a first electrode, a second electrode, and a third electrode located on the substrate; a plurality of reverse diodes connected to the first electrode and the second electrode; at least one forward diode connected to the second electrode and the third electrode; The plurality of reverse diodes are a first channel layer located on the substrate; a first barrier layer positioned on the first channel layer and including a material having a different energy bandgap than the first channel layer; a first gate electrode located on the first barrier layer; a first gate semiconductor layer located between the first barrier layer and the first gate electrode; a first source electrode and a first drain electrode located on both sides of the first gate electrode and connected to the first channel layer; the first source electrode is connected to the first gate electrode; The at least one forward diode is a second channel layer positioned on the substrate and including the same material as the first channel layer; a second barrier layer located on the second channel layer and including the same material as the first barrier layer; a second gate electrode located on the second barrier layer; a second gate semiconductor layer located between the second barrier layer and the second gate electrode and including the same material as the first gate semiconductor layer; a second source electrode and a second drain electrode located on both sides of the second gate electrode and connected to the second channel layer; the second source electrode is connected to the second gate electrode; a first source electrode of any one of the plurality of reverse diodes is connected to the first electrode; a first drain electrode of another of the plurality of reverse diodes is connected to the second electrode and a second source electrode of any one of the at least one forward diode; The semiconductor device, wherein a second drain electrode of any one of the at least one forward diode is connected to the third electrode.

17. The semiconductor device of claim 16 , wherein the first electrode and the third electrode are connected to each other.

18. a first protective layer covering the first barrier layer; a first connecting wire located on the first passivation layer and connecting the first source electrode and the first gate electrode, 17. The semiconductor device of claim 16, wherein a first source electrode of one of the plurality of reverse diodes is connected to the first electrode via the first connecting wire.

19. The semiconductor device of claim 18 , wherein the first electrode, the second electrode, and the third electrode are located in the same layer.

20. A substrate; a semiconductor device including: a plurality of reverse diodes disposed on the substrate and connected to each other; and at least one forward diode connected to any one of the plurality of reverse diodes; a main transistor element on the substrate coupled to the semiconductor element, The plurality of reverse diodes are a first channel layer located on the substrate and including GaN; a first barrier layer located on the first channel layer and including AlGaN; a first gate electrode located on the first barrier layer; a first gate semiconductor layer located between the first barrier layer and the first gate electrode, the first gate semiconductor layer including GaN doped with p-type impurities; a first source electrode and a first drain electrode located on both sides of the first gate electrode and connected to the first channel layer; the first source electrode is connected to the first gate electrode; The at least one forward diode is a second channel layer located on the substrate and comprising GaN; a second barrier layer located on the second channel layer and including AlGaN; a second gate electrode located on the second barrier layer; a second gate semiconductor layer located between the second barrier layer and the second gate electrode, the second gate semiconductor layer including GaN doped with p-type impurities; a second source electrode and a second drain electrode located on both sides of the second gate electrode and connected to the second channel layer; the second source electrode is connected to the second gate electrode; a first drain electrode of one of the plurality of reverse diodes is connected to a second source electrode of one of the at least one forward diode; The main transistor element is a main channel layer located on the substrate and containing the same material as the first channel layer; a main barrier layer located on the main channel layer and containing the same material as the first barrier layer; a main gate electrode located on the main barrier layer; a main gate semiconductor layer located between the main barrier layer and the main gate electrode; a main source electrode and a main drain electrode located on both sides of the main gate electrode and connected to the main channel layer, the main source electrode and the main drain electrode being made of the same material as the first source electrode and the first drain electrode.

Images