Electronic equipment, control methods, and programs

Abstract

To suppress the decrease in the continuous operating time of electronic devices. [Solution] The electronic device (calculator 10) includes a control unit (CPU 11) that, when the electric double layer capacitor 162 is charged by a first charging mode in which the amount of self-discharge of the electric double layer capacitor 162 per unit time after the start of self-discharge following the voltage reaching a predetermined voltage due to charging of the electric double layer capacitor 162 is less than a predetermined threshold, executes a predetermined process using the power supplied from the electric double layer capacitor 162 in the first mode; and when the electric double layer capacitor 162 is charged by a second charging mode in which the amount of self-discharge of the electric double layer capacitor 162 per unit time after the start of self-discharge following the voltage reaching a predetermined voltage due to charging of the electric double layer capacitor 162 is greater than or equal to the threshold, executes a predetermined process using the power supplied from the electric double layer capacitor 162 in the second mode in which the current consumption when executing the predetermined process is smaller than that in the first mode.

Description

Technical Field

[0001] The present invention relates to an electronic device, a control method, and a program.

Background Art

[0002] Conventionally, there is known a technique for suppressing self-discharge of an electric double layer capacitor used as a power source replacing a primary battery in an electronic device (see Patent Documents 1 and 2).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, even with the inventions described in Patent Documents 1 and 2, the self-discharge of the electric double layer capacitor cannot be completely suppressed, and electronic devices using the electric double layer capacitor as a power source have a problem that the continuous usable time is reduced due to the self-discharge of the electric double layer capacitor.

[0005] An object of the present invention is to provide an electronic device, a control method, and a program capable of suppressing a reduction in continuous usable time.

Means for Solving the Problems

[0006] To solve the above problems, the present invention provides an electronic device equipped with an electric double layer capacitor as a battery, wherein when the electric double layer capacitor is charged by a first charging mode in which the amount of self-discharge of the electric double layer capacitor per unit time after the start of self-discharge following the voltage of the electric double layer capacitor reaching a predetermined voltage is less than a predetermined threshold, the device causes a predetermined process to be executed using the power supplied from the electric double layer capacitor in the first mode; and when the electric double layer capacitor is charged by a second charging mode in which the amount of self-discharge of the electric double layer capacitor per unit time after the start of self-discharge following the voltage of the electric double layer capacitor reaching the predetermined voltage is greater than or equal to the threshold, the device causes the predetermined process to be executed using the power supplied from the electric double layer capacitor in the second mode in which the current consumption when executing the predetermined process is smaller than that in the first mode. [Effects of the Invention]

[0007] According to the present invention, it is possible to suppress the decrease in the continuous operating time of electronic devices. [Brief explanation of the drawing]

[0008] [Figure 1] This is a plan view showing the external configuration of a calculator (electronic device) according to an embodiment of the present invention. [Figure 2] This is a block diagram showing the functional configuration of a calculator. [Figure 3] This is a schematic circuit diagram showing the general configuration of the power supply unit. [Figure 4] This is a flowchart showing the mode determination process. [Figure 5] This figure shows an example of voltage change due to self-discharge of an electric double-layer capacitor over time. [Figure 6] This is a flowchart showing the mode control process. [Modes for carrying out the invention]

[0009] Hereinafter, embodiments of the electronic device according to the present invention will be described with reference to the drawings. While the embodiments described below are subject to various technically preferred limitations for carrying out the present invention, the scope of the present invention is not limited to the following embodiments and illustrated examples.

[0010] As shown in Figure 1, the calculator 10 is a so-called scientific calculator capable of performing calculations on mathematical formulas (mathematical expressions) that include functions. As shown in Figure 1, the calculator 10 comprises a key input unit 12 having various key groups, a display unit 13, and a solar cell 161. The key input unit 12 is a group of keys that receive input operations from the user for components of mathematical formulas such as numbers and operators, and instructions for various processes, and comprises multiple keys, each assigned a unique function. The display unit 13 comprises a liquid crystal display 131 or the like. The display unit 13 displays various data such as numbers, characters, signs, symbols, mathematical formulas, and calculation results in response to the operation of the key input unit 12. The solar cell 161 generates electromotive force by the photoelectric effect in response to incident ambient light such as sunlight, fluorescent light, or incandescent light. The solar cell 161 is located in the calculator 10 at a position where ambient light is incident, for example, on the front where the key input unit 12 and the display unit 13 are located. The electromotive force generated by the solar cell 161 increases as the brightness of the incident ambient light increases.

[0011] As shown in Figure 2, the calculator 10 comprises a CPU (Central Processing Unit) 11, the aforementioned key input unit 12, the aforementioned display unit 13, a ROM (Read Only Memory) 14, a RAM (Random Access Memory) 15, and a power supply unit 16. The CPU 11 is a control unit that controls each part of the calculator 10 and executes predetermined processes according to user operations. The CPU 11 reads a specified program from among the various programs stored in the ROM 14, expands it into the RAM 15, and executes various processes in cooperation with the expanded program. The key input unit 12 has various keys and accepts user input by pressing these keys and outputs operation signals to the CPU 11. The CPU 11 performs various processes based on the operation signals corresponding to the user's operation input to the key input unit 12. The display unit 13 displays various information on the display screen according to the control from the CPU 11. The ROM 14 stores various programs, data used for various processes, etc. The ROM 14 stores programs corresponding to the various functions of the calculator 10. RAM15 is a volatile semiconductor memory that can read and write information. RAM15 provides a work area for the CPU11 and temporarily stores data generated by predetermined processes executed in response to user operations in the various functions of the calculator10, making it writable by the CPU11.

[0012] As shown in Figure 3, the power supply unit 16 includes the aforementioned solar cell 161, an electric double-layer capacitor 162, a voltage detection unit 163, an FET (Field Effect Transistor) 164, and a diode 165. The power generated by the solar cell 161 is input to the CPU 11 from the power supply voltage input terminal VDDSO via the FET 164, which is in the ON state. The power output by the electric double-layer capacitor 162 is input to the CPU 11 from the power supply voltage input terminal VDDBO. The CPU 11 supplies the power generated by the solar cell 161 or the power output by the electric double-layer capacitor 162 to each part of the calculator 10 to operate each part of the calculator 10.

[0013] The voltage detection unit 163 is connected to the solar cell 161 and detects the voltage of the power generated by the solar cell 161, outputting the detection result to the CPU 11. The FET 164 is switched between an ON state and an OFF state by an instruction signal output from the CPU 11. When the FET 164 is in the ON state, the power generated by the solar cell 161 is supplied to the CPU 11 via the FET 164, and the power generated by the solar cell 161 is also supplied to the electric double-layer capacitor 162 via the FET 164 and diode 165, thereby charging the electric double-layer capacitor 162. On the other hand, when the FET 164 is in the OFF state, no power is supplied from the solar cell 161 to the CPU 11 or the electric double-layer capacitor 162. The diode 165 is connected between the solar cell 161 and the electric double-layer capacitor 162 and functions as a reverse current prevention element that prevents current from flowing from the electric double-layer capacitor 162 to the solar cell 161. As a result, when power is being generated in the solar cell 161, the electric double-layer capacitor 162 is charged by the power generated by the solar cell 161, and when power is not being generated in the solar cell 161, current is prevented from flowing from the electric double-layer capacitor 162 to the solar cell 161.

[0014] Next, the operation of the calculator 10 will be described. The calculator 10 can take on two power modes: a first mode, which is the normal mode, and a second mode, which is the low-power mode. The low-power mode is a mode in which the operating frequency of the CPU 11 is lowered compared to the normal mode in order to reduce the current consumption of the calculator 10, and the speed of calculation processing in response to user operations via the key input unit 12 is lowered compared to the normal mode, or a mode in which the liquid crystal display 131 displays with fewer grayscale levels (for example, 2 grayscale levels) than the normal mode. The normal mode is a mode in which the speed of calculation processing is higher than the low-power mode, and the liquid crystal display 131 displays with more grayscale levels (for example, 4 grayscale levels) than the low-power mode.

[0015] The CPU 11 of the calculator 10 executes the mode determination process shown in Figure 4 when the calculator 10 is powered on. By executing the mode determination process, the CPU 11 determines the power mode of the calculator 10 when the CPU 11 performs a predetermined process. This predetermined process includes, for example, calculation processing in response to user operation via the key input unit 12 and display processing on the liquid crystal display 131. At the start of the mode determination process, the FET 164 is in the ON state.

[0016] In the mode determination process, first, the CPU 11 detects the voltage of the power generated by the solar cell 161 using the voltage detection unit 163 (step S1). Next, the CPU 11 determines whether the voltage of the power generated by the solar cell 161 detected by the voltage detection unit 163 in step S1 is above a predetermined voltage, in other words, whether power is being supplied from the solar cell 161 (step S2). If power is being supplied from the solar cell 161 (step S2; YES), the CPU 11 turns off the FET 164 by outputting an instruction signal to the FET 164 and measures the voltage at the power supply voltage input terminal VDDBO. As a result, the CPU 11 measures the voltage of the electric double-layer capacitor 162 (step S3). Next, the CPU 11 determines whether the voltage of the electric double-layer capacitor 162 measured in step S3 is above a predetermined voltage threshold (for example, the voltage of the electric double-layer capacitor 162 when fully charged) (step S4). If the voltage of the electric double-layer capacitor 162 is below the voltage threshold (step S4; NO), the CPU 11 outputs an instruction signal to the FET 164 to turn on the FET 164, supplies the power generated by the solar cell 161 to the electric double-layer capacitor 162 to charge the electric double-layer capacitor 162 for a predetermined time (step S5), and returns the mode determination process to step S3.

[0017] On the other hand, if the voltage of the electric double layer capacitor 162 is equal to or higher than the voltage threshold (Step S4; YES), the CPU 11 outputs an instruction signal to the FET 164 to turn the FET 164 into an ON state, supplies the power generated by the solar cell 161 to the electric double layer capacitor 162, and continues to further apply a voltage to the electric double layer capacitor 162 in a state where the voltage of the electric double layer capacitor 162 is equal to or higher than the voltage threshold (Step S6). Then, the CPU 11 starts measuring the full charge duration time of the electric double layer capacitor 162 (Step S7). The full charge duration time of the electric double layer capacitor 162 is the time during which voltage continues to be further applied to the electric double layer capacitor 162 in a state where the voltage of the electric double layer capacitor 162 is equal to or higher than the voltage threshold.

[0018] Next, the CPU 11 executes Steps S8 and S9 which are similar to Steps S1 and S2. If it is determined that power is being supplied from the solar cell 161 based on the detection result of the voltage detection unit 163 in Step S8 (Step S9; YES), the CPU 11 returns the mode determination processing to Step S8.

[0019] On the other hand, when the state transitions from a state where power is supplied from the solar cell 161 to a state where power is not supplied (Step S9; NO), that is, when the state transitions from a state where voltage is applied to the electric double layer capacitor 162 to a state where no voltage is applied. In this case, the CPU 11 stops the measurement of the full charge duration time that was started in Step S7, and determines whether or not the measured full charge duration time is equal to or longer than a predetermined first time (for example, 1 hour) (Step S10). If the full charge duration time is less than the predetermined first time (Step S10; NO), the CPU 11 determines the power supply mode of the calculator 10 when executing predetermined processing to be a low power consumption mode (Step S11), and terminates the mode determination processing.

[0020] FIG. 5 shows an example of voltage change due to self-discharge of the electric double layer capacitor 162 over time, for cases where the full charge duration of the electric double layer capacitor 162 is 24 hours and 5 minutes. When the full charge duration is 5 minutes, compared to the case where the full charge duration is 24 hours, the self-discharge amount of the electric double layer capacitor 162 immediately after the start of self-discharge is larger, so the voltage drops sharply. As described above, when the full charge duration of the electric double layer capacitor 162 is less than the predetermined first time, the self-discharge amount becomes larger immediately after the start of self-discharge due to the characteristics of the electric double layer capacitor 162, than in the case where the full charge duration is equal to or longer than the first time. Therefore, in this case, the continuous usable time of the calculator 10 may decrease. However, in the present embodiment, in this case, by setting the power supply mode of the calculator 10 to the low power consumption mode to reduce the current consumption in the calculator 10, the decrease in the continuous usable time of the calculator 10 can be suppressed.

[0021] As described above, when the full charge duration is less than the predetermined first time (step S10; NO), the self-discharge amount per unit time of the electric double layer capacitor 162 after the start of self-discharge after the voltage of the electric double layer capacitor 162 reaches a predetermined voltage (voltage threshold) due to charging of the electric double layer capacitor 162 is equal to or greater than a predetermined threshold, which is the case where the electric double layer capacitor 162 is charged in the second charging mode. The second charging mode is a charging mode in which the self-discharge amount of the electric double layer capacitor 162 at the timing when a predetermined time has elapsed from the start of self-discharge after the voltage of the electric double layer capacitor 162 reaches a predetermined voltage (voltage threshold) due to charging of the electric double layer capacitor 162 is equal to or greater than a predetermined first value.

[0022] On the other hand, if the duration of full charge is longer than a predetermined first hour (step S10; YES), the CPU 11 outputs an instruction signal to the FET 164 to turn it OFF and measures the voltage at the power supply voltage input terminal VDDBO. As a result, the CPU 11 measures the self-discharge voltage of the electric double-layer capacitor 162 (step S12). Next, the CPU 11 calculates a self-discharge profile showing the voltage change of the electric double-layer capacitor 162 over time, based on the duration of full charge of the electric double-layer capacitor 162, the self-discharge voltage of the electric double-layer capacitor 162 measured in step S12, and the average value of the power consumption in the calculator 10 (step S13).

[0023] Next, the CPU 11 determines, based on the self-discharge profile of the electric double-layer capacitor 162 calculated in step S13, whether the amount of self-discharge of the electric double-layer capacitor 162 at a predetermined time after the start of self-discharge is less than a predetermined discharge threshold (step S14). If the amount of self-discharge of the electric double-layer capacitor 162 is less than the predetermined discharge threshold (step S14; YES), the CPU 11 determines the power mode of the calculator 10 to normal mode when executing a predetermined process (step S15), and terminates the mode determination process.

[0024] As described above, if the duration of full charge is longer than a predetermined first hour (step S10; YES), it means that the electric double layer capacitor 162 was charged by a first charging mode in which the amount of self-discharge of the electric double layer capacitor 162 per unit time after the start of self-discharge following the charging of the electric double layer capacitor 162 to a predetermined voltage (voltage threshold) is smaller than a predetermined threshold. The first charging mode is a charging mode in which the amount of self-discharge of the electric double layer capacitor 162 at a predetermined time elapsed from the start of self-discharge following the charging of the electric double layer capacitor 162 to a predetermined voltage (voltage threshold) is smaller than a predetermined first value.

[0025] On the other hand, if the self-discharge amount of the electric double-layer capacitor 162 is greater than or equal to a predetermined discharge threshold (step S14; NO), the CPU 11 proceeds to step S11 for mode determination processing and determines the power mode of the calculator 10 to low power consumption mode when executing the predetermined processing.

[0026] Furthermore, if the CPU 11 determines, based on the detection result of the voltage detection unit 163 in step S1, that power is not being supplied from the solar cell 161 (step S2; NO), the CPU 11 proceeds to step S12 for mode determination processing. In step S13, the CPU 11 calculates a self-discharge profile showing the voltage change of the electric double-layer capacitor 162 over time, based on the duration of full charge when the voltage of the electric double-layer capacitor 162 was last charged to a voltage threshold or higher, the self-discharge voltage of the electric double-layer capacitor 162 measured in step S12, and the average value of the power consumption in the calculator 10.

[0027] Next, we will explain the mode control process shown in Figure 6, which is executed by the CPU 11 of the calculator 10 when the calculator 10 is powered on. By executing the mode control process, the CPU 11 sets the power mode of the calculator 10 to normal mode or low power mode and executes predetermined processes. The mode control process is a control step. The CPU 11 of the calculator 10 functions as a control unit in the mode control process.

[0028] In the mode control process, first, the CPU 11 executes steps A1 and A2, which are the same as steps S1 and S2 of the mode determination process. If, based on the detection result of the voltage detection unit 163 in step A1, it determines that power is being supplied from the solar cell 161 (step A2; YES), the CPU 11 sets the power mode of the calculator 10 to normal mode and executes a predetermined process (step A3), and then terminates the mode control process.

[0029] On the other hand, if the CPU 11 determines, based on the detection result of the voltage detection unit 163 in step A1, that no power is being supplied from the solar cell 161 (step A2; NO), then in the mode determination process, the CPU 11 determines whether the power mode of the calculator 10 when executing a predetermined process has been determined to be normal mode (step A4). If the CPU 11 determines in the mode determination process that the power mode of the calculator 10 when executing a predetermined process has been determined to be normal mode (step A4; YES), then the CPU 11 proceeds to step A3 for mode control processing. On the other hand, in the mode determination process, if it is determined that the power mode of the calculator 10 is not set to normal mode when executing a predetermined process (step A4; YES), that is, if it is determined that the power mode of the calculator 10 is set to low power consumption mode, the CPU 11 sets the power mode of the calculator 10 to low power consumption mode and executes the predetermined process (step A5), and then terminates the mode control process.

[0030] As described above, the electronic device (calculator 10) of this embodiment is an electronic device equipped with an electric double-layer capacitor 162 as a battery. The electronic device of this embodiment is equipped with a control unit (CPU 11) that, when the electric double-layer capacitor 162 is charged by a first charging mode in which the amount of self-discharge of the electric double-layer capacitor 162 per unit time after the start of self-discharge following the voltage of the electric double-layer capacitor 162 has reached a predetermined voltage (voltage threshold) due to charging of the electric double-layer capacitor 162 is less than a predetermined threshold, executes a predetermined process using the power supplied from the electric double-layer capacitor 162 in a first mode (normal mode). On the other hand, when the electric double-layer capacitor 162 is charged by a second charging mode in which the amount of self-discharge of the electric double-layer capacitor 162 per unit time after the start of self-discharge following the voltage of the electric double-layer capacitor 162 has reached a predetermined voltage (voltage threshold) due to charging of the electric double-layer capacitor 162 is greater than or equal to the threshold, executes a predetermined process using the power supplied from the electric double-layer capacitor 162 in a second mode (low-power mode) in which the current consumption when executing the predetermined process is less than that in the first mode. Therefore, even when the electric double-layer capacitor 162 is charged using a second charging method in which the continuous full-charge time of the electric double-layer capacitor 162 is less than a predetermined first hour, the power mode of the calculator 10 can be set to a low-power mode to reduce the current consumption of the calculator 10. This makes it possible to suppress a decrease in the continuous usable time of the electronic device (calculator 10).

[0031] In the electronic device (calculator 10) of this embodiment, the first charging mode is a charging mode in which the amount of self-discharge of the electric double-layer capacitor 162 at a predetermined time elapsed from the start of self-discharge after the voltage of the electric double-layer capacitor 162 reaches a predetermined voltage (voltage threshold) due to charging of the electric double-layer capacitor 162 is less than a predetermined first value. The second charging mode is a charging mode in which the amount of self-discharge of the electric double-layer capacitor 162 at a predetermined time elapsed from the start of self-discharge after the voltage of the electric double-layer capacitor 162 reaches a predetermined voltage (voltage threshold) due to charging of the electric double-layer capacitor 162 is greater than or equal to a predetermined first value. Therefore, even when the electric double-layer capacitor 162 is charged using the second charging mode in which the duration of full charge of the electric double-layer capacitor 162 is less than a predetermined first hour, the power mode of the calculator 10 can be set to a low power consumption mode to reduce the current consumption of the calculator 10.

[0032] In the electronic device (calculator 10) of this embodiment, the predetermined process includes calculation processing and display processing in the display unit 13. Therefore, the current consumption when performing calculation processing and display processing in the display unit 13 can be reduced in the calculator 10.

[0033] In the electronic device (calculator 10) of this embodiment, the control unit (CPU 11) reduces the calculation processing speed in the second mode compared to the first mode. Therefore, the current consumption when performing calculation processing in the calculator 10 can be reduced.

[0034] In the electronic device (calculator 10) of this embodiment, the control unit (CPU 11) causes the display unit 13 to perform display processing with fewer gradations than in the first mode in the second mode. Therefore, the current consumption when the display unit 13 performs display processing in the calculator 10 can be reduced.

[0035] The above description of the embodiment is merely an example of an electronic device according to the present invention and is not limited thereto. The detailed configuration and operation of each part constituting the device can also be modified as appropriate without departing from the spirit of the present invention. For example, in the above embodiment, the electronic device is a calculator 10, but it is not limited thereto and may be other electronic devices. For example, it may be applied to a clock or radio that operates on power supplied from a solar cell 161 or an electric double-layer capacitor 162.

[0036] In the above description, ROM 14 was used as an example of a computer-readable medium storing the program according to the present invention, but the invention is not limited to this. Other computer-readable media that can be used include non-volatile memory such as flash memory, HDD (Hard Disk Drive), and portable recording media such as CD-ROM. Furthermore, carrier waves can also be used in the present invention as a medium for providing program data via a communication line. [Explanation of symbols]

[0037] 10 Calculator (electronic device), 11 CPU (control unit), 162 Electric double-layer capacitor

Claims

1. An electronic device equipped with an electric double-layer capacitor as a battery, An electronic device comprising a control unit that, when the electric double layer capacitor is charged by a first charging mode in which the amount of self-discharge of the electric double layer capacitor per unit time after the start of self-discharge following the voltage of the electric double layer capacitor reaching a predetermined voltage is less than a predetermined threshold, the control unit performs a predetermined process using the power supplied from the electric double layer capacitor in the first mode; and when the electric double layer capacitor is charged by a second charging mode in which the amount of self-discharge of the electric double layer capacitor per unit time after the start of self-discharge following the voltage of the electric double layer capacitor reaching the predetermined voltage is greater than or equal to the threshold, the control unit performs the predetermined process using the power supplied from the electric double layer capacitor in the second mode in which the current consumption when performing the predetermined process is smaller than that of the first mode.

2. The first charging mode is a charging mode in which the amount of self-discharge of the electric double layer capacitor at a predetermined time elapsed from the start of self-discharge after the voltage of the electric double layer capacitor reaches the predetermined voltage due to charging of the electric double layer capacitor is less than a predetermined first value, The electronic device according to claim 1, wherein the second charging mode is a charging mode in which the self-discharge amount of the electric double-layer capacitor at the timing is equal to or greater than the first value.

3. The electronic device according to claim 1, wherein the predetermined processing includes calculation processing and display processing in the display unit.

4. The electronic device according to claim 3, wherein the control unit reduces the speed of the calculation process in the second mode compared to the first mode.

5. The electronic device according to claim 3, wherein the control unit causes the display processing to be performed with fewer gradations than in the first mode in the second mode.

6. A control method performed by an electronic device equipped with an electric double-layer capacitor as a battery, A control method comprising a control step in which, when the electric double layer capacitor is charged by a first charging mode in which the amount of self-discharge of the electric double layer capacitor per unit time after the start of self-discharge following the voltage of the electric double layer capacitor reaching a predetermined voltage is less than a predetermined threshold, a predetermined process is executed using the power supplied from the electric double layer capacitor in the first mode; and when the electric double layer capacitor is charged by a second charging mode in which the amount of self-discharge of the electric double layer capacitor per unit time after the start of self-discharge following the voltage of the electric double layer capacitor reaching the predetermined voltage is greater than or equal to the threshold, the predetermined process is executed using the power supplied from the electric double layer capacitor in the second mode in which the current consumption when executing the predetermined process is smaller than that of the first mode.

7. A computer in electronic equipment that uses an electric double-layer capacitor as a battery, A program that, when the electric double layer capacitor is charged by a first charging mode in which the amount of self-discharge of the electric double layer capacitor per unit time after the start of self-discharge following the voltage of the electric double layer capacitor reaching a predetermined voltage is less than a predetermined threshold, causes the program to execute a predetermined process using the power supplied from the electric double layer capacitor in the first mode. On the other hand, when the electric double layer capacitor is charged by a second charging mode in which the amount of self-discharge of the electric double layer capacitor per unit time after the start of self-discharge following the voltage of the electric double layer capacitor reaching the predetermined voltage is greater than or equal to the threshold, causes the program to function as a control unit that executes the predetermined process using the power supplied from the electric double layer capacitor in the second mode in which the current consumption when executing the predetermined process is smaller than that of the first mode.

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