Signal Transmission System

Abstract

To suppress an increase in mode conversion loss due to component variations.SOLUTION: A signal transmission system includes first signal wiring 6 and second signal wiring 7 each constituting differential wiring, a first capacitive load mechanism portion 18 P arranged in a first region over the first signal wiring 6 and having a first capacitance value, and a second capacitive load mechanism portion 18N arranged in a second region extending from the second signal wiring to the ground potential wiring and having a capacitance value asymmetrical to the first capacitance value.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a signal transmission system. [Background technology]

[0002] In recent years, the speed of signal transmission between devices installed in vehicles using twisted pair cables has been increasing. For example, in-vehicle Ethernet is being standardized from 100BASE-T1, which was the mainstream standard for transmitting 100Mbps, to 1000BASE-T1, which enables transmission of 1Gbps or more, and from multi-gigabit to 25G BASE-T1.

[0003] The challenge of increasing the speed of in-vehicle cable transmission is maintaining EMC performance as frequencies increase. Because the current spectrum used in signal transmission is large and extends beyond the GHz band, it is necessary to suppress radiation in this high-frequency band. At the same time, because the communication LSI has the sensitivity to transmit and receive signals up to the GHz band, it is also necessary to suppress the intrusion of GHz-band noise.

[0004] However, in the pair of signal wiring (positive, negative) that constitutes a differential transmission line, the differential balance can be disturbed due to variations in electrical characteristics caused by various factors, making it impossible to enjoy the benefits of differential transmission and resulting in deterioration of EMC performance. The degree of variation in this differential line is defined as mode conversion loss, and is used as a criterion for judging EMC performance, especially in the high frequency range of 100 MHz or higher.

[0005] This represents the amount of differential mode converted to common mode, or the amount of common mode converted to differential mode, in differential wiring. If this mode conversion loss is large, it can lead to an increase in radiation noise due to the generation of unintended common mode components, or a deterioration in noise resistance due to the conversion of common mode components to differential components. In the following explanation, the transmission line on the positive (P) side that constitutes the differential transmission line is called P, and the transmission line on the negative (N) side is called N.

[0006] Patent Document 1 discloses a system that connects electronic devices with a twisted pair cable and transmits a differential signal and a power supply by superimposing them on the twisted pair cable. In this system, a DC blocking capacitor is placed on the signal line, and a filter element such as a common mode choke coil or inductor is inserted as a PoDL filter on the power supply line. This separates the signal and the power supply according to the frequency range of the filter element.

[0007] In differential signal transmission, ideally the P-side transmission line and the N-side transmission line that make up the differential transmission line are symmetrical, so that the magnetic field generated when current flows through each wiring due to the opposite phase current can be cancelled, and radiation can be suppressed. Also, if common noise (common mode noise) is superimposed on both signal wirings, it can be cancelled by the differential receiver, improving resistance to external noise. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] U.S. Pat. No. 1,059,4519 Summary of the Invention [Problem to be solved by the invention]

[0009] The technology described in Patent Document 1 can reduce the leakage of common mode noise from the circuit on the wiring board to the twisted pair cable by placing a filter element between the communication circuit and the twisted pair cable. Furthermore, the technology described in Patent Document 1 can prevent the common mode noise picked up by the twisted pair cable from propagating to the circuit on the wiring board.

[0010] However, in such differential transmission lines, when the characteristics of the components that make up the transmission system vary and an imbalance in the electrical characteristics occurs between P and N, the mode conversion loss in the transmission line increases, causing a problem of degraded EMC performance. Particularly at high frequencies, the variation in the parasitic capacitance of the components contributes to an increase in mode conversion loss, further degrading EMC performance. Mode conversion loss is expressed by the Scd term in the Mixed Mode S-Parameter.

[0011] An object of the present invention is to provide a signal transmission system capable of suppressing an increase in mode conversion loss caused by component variations. [Means for solving the problem]

[0012] In order to solve the above problems, for example, the configurations described in the claims are adopted. The present application includes multiple means for solving the above problems. To cite one example, a signal transmission system of the present invention comprises a first signal wiring and a second signal wiring each constituting a differential wiring, a first capacitive load mechanism part having a first capacitance value that is arranged in a first region over the first signal wiring, and a second capacitive load mechanism part having a second capacitance value that is asymmetric with the first capacitance value that is arranged in a second region over the second signal wiring. Here, the first signal wiring is connected to a first cable connector electrode, the second signal wiring is connected to a second cable connector electrode, and further, a third capacitive load mechanism is provided between the first cable connector electrode and the wiring of ground potential, and a fourth capacitive load mechanism is provided between the second cable connector electrode and the wiring of ground potential. Effect of the Invention

[0013] According to the present invention, it is possible to suppress an increase in mode conversion loss caused by variations in parts. Problems, configurations and effects other than those described above will become apparent from the following description of the embodiments. [Brief description of the drawings]

[0014] [Figure 1] 1 is a configuration diagram showing an electronic device of a signal transmission system according to a first embodiment of the present invention. [Diagram 2] FIG. 4 is a characteristic diagram showing the effect of the first embodiment of the present invention. [Diagram 3] 1 is a configuration diagram showing an example of an entire signal transmission system according to a first embodiment of the present invention. [Figure 4] FIG. 2 is a top view showing an example of a mounting pattern according to the first embodiment of the present invention. [Diagram 5] 11 is a circuit diagram according to a second embodiment of the present invention. [Figure 6] FIG. 11 is a top view showing a mounting pattern according to a second embodiment of the present invention. [Figure 7] FIG. 11 is an explanatory diagram showing an example of adjusting the balance according to the second embodiment of the present invention. [Figure 8] FIG. 11 is a characteristic diagram showing the effect of the second embodiment of the present invention. [Figure 9] 13A and 13B are a top view and a cross-sectional view showing a mounting pattern according to a third embodiment of the present invention. [Figure 10] 13A to 13C are diagrams showing a mounting pattern and a manufacturing method thereof according to a fourth embodiment of the present invention. [Figure 11] FIG. 13 is a top view showing another example of a mounting pattern according to the fourth embodiment of the present invention. [Figure 12] FIG. 13 is a top view showing a mounting pattern according to a fifth embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] Hereinafter, a signal transmission system according to an embodiment of the present invention will be described with reference to the drawings. The following description and drawings are illustrative for explaining each embodiment of the present invention, and some omissions and simplifications are made for clarity of explanation. The present invention can also be implemented in various other forms. Furthermore, unless otherwise specified, each component may be singular or plural.

[0016] In addition, the position, size, shape, range, etc. of each component shown in the drawings are simplified to facilitate understanding of the embodiment of the invention, and may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings. In addition, the same reference numerals are attached to the same parts in each embodiment, and duplicated explanations in each embodiment are omitted.

[0017] [First embodiment] FIG. 1 shows a configuration of an electronic device 1 equipped with a signal transmission system according to a first embodiment of the present invention. An electronic device 1 shown in FIG. 1 includes a communication LSI 2 for communicating with other external electronic devices. The electronic device 1 is connected to an external electronic device via a cable (not shown) connected to a cable connector 16. Signal transmission is then performed between a communication LSI (Large Scale Integration) 2 and the external electronic device.

[0018] The communication LSI 2 and the cable connector 16 are connected by differential wiring 5 laid out on a printed circuit board. The differential wiring 5 is composed of a pair of P-side signal wiring 6 and N-side signal wiring 7. Between the communication LSI 2 and the cable connector 16, AC coupling capacitors 14P, 14N for cutting DC potential, a common mode choke coil (CMCC) 15 for reducing common mode noise flowing into the communication LSI 2, and electrostatic protection elements 17P, 17N for avoiding electrostatic breakdown are arranged. The electrostatic protection elements 17P, 17N are connected between the P-side and N-side signal wirings 6, 7 and a location of ground potential (hereinafter referred to as "GND"). The addition of P or N to the end of each symbol indicates that it is connected to the P-side signal wiring 6 or the N-side signal wiring 7, respectively.

[0019] 1 connected between the communication LSI 2 and the cable connector 16 is a typical circuit configuration, and other components may be added, and some of the components described here may not be included in the components. Examples of components other than the components shown in FIG. 1 include common mode termination components, filter components, and power supply superposition filter components.

[0020] In the electronic device 1 of this embodiment, the P-side signal wiring 6 and the N-side signal wiring 7 have capacitive load mechanism parts 18P and 18N between them and GND in the differential transmission path 5 connecting the cable connector 16 and the CMCC 15. However, connecting the capacitive load mechanism parts 18P and 18N to GND is just one example, and there are also cases where the capacitive load mechanism parts 18P and 18N are connected only to the P-side signal wiring 6 and the N-side signal wiring 7, as in the example of Fig. 4 described later. The capacity load mechanisms 18P and 18N have asymmetric capacities, i.e., different capacities. Specific examples of the capacity load mechanisms 18P and 18N will be described later.

[0021] Mode conversion loss is a representative value that indicates the EMC performance of the electronic device 1. By checking whether the Scd value measured from the cable connector 16 using a network analyzer is smaller than a target value, it is possible to judge whether the EMC performance is acceptable or not. An example of such an electronic device is an automatic driving electronic control unit (AD-ECU) for an automobile.

[0022] Figure 2 shows an example of mode conversion loss performance. The horizontal axis of Figure 2 shows frequency [MHz], and the vertical axis shows mode conversion loss [dB]. A target value Xa is determined for this mode conversion loss for each frequency, and here, the design mode conversion loss of a certain electronic device is set so that the characteristic Xd without component variation is equal to or less than the target value Xa in any frequency band. Here, for example, let us consider a case where the parasitic capacitance of the electrostatic protection elements 17P and 17N among the components connected to the differential transmission line varies. When such component variation occurs, the mode conversion loss increases, and the characteristic Xc with component variation may exceed the target value Xa at a specific frequency α or higher.

[0023] Therefore, in this embodiment, the mode conversion loss is reduced by using the capacitive load mechanisms 18P and 18N connected to the P-side signal wiring 6 and the N-side signal wiring 7. For example, when the parasitic capacitance of the electrostatic protection element 17P is larger than the parasitic capacitance of the electrostatic protection element 17N, the capacitances of 18P and 18N are asymmetrically provided to cancel the parasitic capacitance difference corresponding to the difference. As a result, as shown in Fig. 2, the characteristic Xc with component variations is corrected to the adjusted characteristic Xb, and the mode conversion loss is suppressed, making it possible to satisfy the characteristic of the target value Xa.

[0024] FIG. 3 shows an example of the overall configuration of a signal transmission system including the electronic device 1 shown in FIG. In the transmission system shown in FIG. 3, the electronic device 1-2 on the right side corresponds to the electronic device 1 shown in FIG. 1, and this electronic device 1-2 is connected to another external electronic device 1-1 via a twisted pair cable 8. The electronic devices 1-1 and 1-2 have cable connectors 16-1 and 16-2 connected to twisted pair cables 8, respectively.

[0025] Each of the electronic devices 1-1 and 1-2 includes therein a communication LSI 2-1 and 2-2, AC coupling capacitors 14P-1, 14P-2, 14N-1 and 14N-2, common mode choke coils (CMCC) 15-1 and 15-2, and electrostatic protection elements 17P-1, 17P-2, 17N-1 and 17N-2. Furthermore, the electronic device 1-2 has the capacity load mechanisms 18P and 18N described with reference to FIG.

[0026] The configuration shown in Fig. 3 is characterized in that it is possible to improve noise resistance of the electronic device 1-2 against radiation during cable transmission originating from the electronic device 1-2 and against external common mode noise by adjusting the capacitive load mechanism parts 18P, 18N. Note that, although the capacitive load mechanism is provided only in the electronic device 1-2 in the configuration shown in Fig. 3, the EMC performance of the entire system can be further improved by providing the capacitive load mechanism parts 18P, 18N in the electronic device 1-1 as well.

[0027] FIG. 4 is a top view showing an example of mounting the capacity load mechanisms 18P and 18N. In the example shown in FIG. 4, a wider wiring area is partially provided in each of the P-side signal wiring 6 and the N-side signal wiring N that make up the differential wiring 5 on the printed circuit board, and these wider wiring areas are used as capacitive load mechanism portions 18P·18N.

[0028] In the example of Fig. 4, the P-side capacitive load mechanism 18P is larger than the N-side capacitive load mechanism 18N, resulting in an asymmetrical structure. This asymmetrical structure is adjusted to reduce mode conversion loss in electronic devices. As shown in Fig. 4, the capacitive load mechanisms 18P, 18N, which have a simple configuration and are provided on the P-side signal wiring 6 and the N-side signal wiring 7, can improve noise resistance against external common mode noise. Note that the size ratio of the capacitive load mechanisms and the magnitude relationship of P·N do not necessarily have to be as specified, and are adjusted according to the amount of mode conversion loss in the actual transmission system.

[0029] [Second embodiment] FIG. 5 shows the configuration of an electronic device 1 equipped with a signal transmission system according to a second embodiment of the present invention. The electronic device 1 shown in Fig. 5 is connected to a cable via a cable connector 16 and connected to other external electronic devices for signal transmission, similar to the electronic device 1 shown in Fig. 1. A communication LSI 2 for communication is connected to the cable connector 16 by differential wiring 5 laid out on a printed circuit board, and the differential wiring 5 is composed of a pair of P-side signal wiring 6 and N-side signal wiring 7, similar to the electronic device 1 shown in Fig. 1.

[0030] Furthermore, like the electronic device 1 shown in FIG. 1, it has AC coupling capacitors 14P, 14N for cutting DC potential, a common mode choke coil 15 for reducing common mode noise flowing into the communication LSI, and electrostatic protection elements 17P, 17N for preventing electrostatic breakdown, between the communication LSI 2 and the cable connector 16.

[0031] Electrostatic protection elements 17P, 17N shown in FIG. 5 are mounted on component mounting electrodes 19P, 19N on the signal wiring side and component mounting electrodes 20P, 20N on the GND side. In this configuration, one of the factors that has a large influence on the mode conversion loss observed from the cable connector 16 is the variation in the parasitic capacitance of the electrostatic protection elements 17P and 17N. Therefore, in this embodiment, the capacitive load mechanism parts 18P and 18N are provided adjacent to the component electrodes of the electrostatic protection elements 17P and 17N, which are located in the vicinity of the signal wirings 6 and 7 of the differential wiring 5. The capacitive load mechanism portions 18P and 18N here are connected between the signal wiring side electrodes of the electrostatic protection elements 17P and 17N and the ground by drawing out wiring.

[0032] The higher the signal frequency, the more important it is to place the balance adjustment points of the transmission path close to each other. For this reason, as shown in Figure 5, placing the capacitive load mechanisms 18P, 18N on the component electrodes is highly effective in improving performance in the high frequency band. A good guide for the distance to be placed close to each other is about 1 / 20 of the signal wavelength. For example, in the case of a 10 GHz signal frequency component, the wavelength on the printed circuit board is about 15 mm, so 1 / 20 of that is 0.75 mm. This increases the necessity of placing the capacitive load mechanisms 18P, 18N next to the component electrodes.

[0033] FIG. 6 is a top view of a printed circuit board showing a mounting pattern of the capacity load mechanism parts 18P and 18N of this embodiment. 6, component mounting electrodes 19P, 19N are connected to the P-side signal wiring 6 and the N-side signal wiring 7 constituting the differential wiring 5. In addition, component mounting electrodes 20P, 20N are provided on the ground side and are connected to the ground wiring layer via 21P, 21N, which are VIAs for GND connection.

[0034] In this configuration, the capacitance load mechanism 18P, 18N is configured by drawing out wiring from the signal side electrode through the drawing wiring 22P, 22N, and partially forming a parallel plate capacitance between the wiring 23P, 23N drawn out from the ground connection VIA. In this case, a method is adopted in which the balance is adjusted by removing part or all of the drawing wiring 22P, 22N that forms the parallel plate. Therefore, the capacitance of the capacitance load mechanism 18P, 18N before adjustment does not need to be asymmetric.

[0035] Figures 7 and 8 show an example of the reduction effect of mode conversion loss when adjustment is made to the configuration shown in Figure 6. Figure 7 shows an example of the adjusted state of the capacitive load mechanism parts 18P, 18N by enlarging the board pattern. Figure 7(a) shows a state where there is no capacitive load mechanism part, and Figure 7(b) shows a state where the capacitive load mechanism parts 18P, 18N are still formed. Also, Figure 7(c) shows a state where, after adjustment work, the N-side capacitive load mechanism part 18N has been removed and the P-side capacitive load mechanism part 18P remains.

[0036] The effect of such adjustment is shown in Figure 8. The vertical axis of Figure 8 is the mode conversion loss, and the horizontal axis is the frequency. For example, consider a case where the parasitic capacitance of the electrostatic protection element 17P is +5% of the standard value, and the parasitic capacitance of the electrostatic protection element 17N varies to -5% of the standard value. In this case, the variation in the electrostatic protection elements increases the mode conversion loss, and the characteristic X1 before adjustment may exceed the target value Xa at a certain frequency or higher. This characteristic X1 before adjustment corresponds to the characteristic in a state without the capacitive load mechanism shown in FIG. 7(a).

[0037] Currently, the parasitic capacitance of the components is larger on the P side at +5%, so to balance the P / N ratio, the capacitance on the P side can be reduced. Therefore, as shown in Fig. 7(c), a portion Z corresponding to the N-side capacitive load mechanism 18N is cut out from the board to provide an asymmetrical board pattern. Note that, here, the portion Z to be cut out is the entire portion corresponding to the N-side capacitive load mechanism 18N, but it is also possible to adjust the capacitance by adjusting the area of ​​the portion Z to be cut out, thereby making more detailed adjustments.

[0038] FIG. 8 shows the characteristics of the mode conversion loss before and after the adjustment shown in FIG. A characteristic X2 of the mode conversion loss before the capacitance adjustment (the state in FIG. 7(b)) exhibits a characteristic value similar to the original characteristic X1 in FIG. 7(a) without the capacity load mechanism. On the other hand, as shown in FIG. 7(c), the mode conversion loss characteristic X3 after capacitance adjustment achieves a mode conversion loss improvement Da of about 6 dB compared to the characteristic X2, and satisfies the target value Xa. The characteristics shown in Fig. 8 were modeled by electromagnetic field analysis of the board pattern, and verified that this effect can be obtained with a pattern size equivalent to the actual component electrodes.

[0039] [Third embodiment] FIG. 9(a) is a top view and FIG. 9(b) is a cross-sectional view showing a mounting pattern of a printed circuit board of an electronic device 1 including a signal transmission system according to a third embodiment of the present invention. Like the second embodiment, the third embodiment also has a configuration in which a capacitive load mechanism is provided in addition to the electrode of the electrostatic protection element, but the configuration is different from that of the second embodiment.

[0040] In order to simplify the explanation, Fig. 9 shows the configuration of the capacitive load mechanism in the N-side wiring, but a capacitive load mechanism with a similar configuration is also provided on the P-side. Also, in Fig. 9, the capacitance is formed by a parallel plate between the wiring patterns on the L1 layer and the L2 layer of the printed circuit board, but the wiring layer of the wiring that constitutes the parallel plate is arbitrary.

[0041] 9(a), in this embodiment, a component mounting electrode 19N is connected to the N-side signal wiring 7. A ground-side component mounting electrode 20N is also provided and connected to the ground wiring layer through a GND connecting VIA 21N. In this configuration, a parallel plate capacitance is partially formed between the signal wiring 18N-L1 on the L1 layer and the wiring 23N drawn out from the ground connecting VIA 21N, thereby forming a capacitive load mechanism 18N.

[0042] In the configuration shown in Fig. 9, the wiring 18N-L1 of the L1 layer of the capacitance load mechanism 18N, which forms a parallel plate with the mounting electrode 19N, is not connected from the beginning. Then, as shown in the cross section of Fig. 9(b), a metal connection part 25 such as solder is used to connect between the protrusion 22N from the electrode 19N and the L1 layer wiring part 18N-L1 of the capacitance load mechanism 18N, thereby making it possible to add capacitance and adjust the capacitance.

[0043] For this reason, as shown in Fig. 9(a), the resist on the surface of the protrusion of the electrode 19N and the wiring 18N-L1 of the L1 layer of the capacitive load mechanism 18N has an opening 24. Then, the protrusion of the electrode 19N and the L1 layer of the capacitive load mechanism 18N are electrically connected through this opening 24 by a metal connection part 25 shown in Fig. 9(b). The advantage of this method is that since there is no need to connect a capacitive load mechanism in the initial state, it is possible to prevent deterioration of high frequency performance due to connecting an excess load capacitance.

[0044] [Fourth embodiment] FIG. 10(a) is a top view showing a mounting pattern of a printed circuit board of an electronic device 1 including a signal transmission system according to a fourth embodiment of the present invention, and FIG. 10(b) is a cross-sectional view showing the manufacturing process thereof. The mounting pattern of this embodiment is an advanced version of the mounting pattern of the fourth embodiment (FIG. 9), in which a capacitive load mechanism is provided adjacent to the electrode of the electrostatic protection element.

[0045] In the mounting pattern of this embodiment shown in Fig. 10(a), the capacity load mechanism 18N is formed in a comb shape, and the capacity adjustment amount can be finely adjusted by the number of connections and the connection points of the comb teeth. Specifically, in the case of the configuration of Fig. 10(a), the number of connections of the comb teeth is three, and the area of ​​the wiring pattern is increased or decreased by adjusting the connection or non-connection of the three points, thereby making it possible to finely adjust the capacity adjustment amount. Even if the number of connection points is the same, the capacity adjustment amount can be finely adjusted by selecting the connection position. The number of connections of the comb teeth is three is just an example, and it may be two or four or more. The mounting pattern of this embodiment is a method in which the degree of imbalance is measured by measuring the transmission path, etc., and then the amount of fine adjustment required to eliminate the imbalance is determined, and the number of pattern connections and the connection points are determined. Other parts of the mounting pattern shown in FIG. 10(a) are configured similarly to the mounting pattern shown in FIG.

[0046] FIG. 10(b) shows the manufacturing process for changing the connect / disconnect pattern in cross section of the substrate. The upper side of FIG. 10(b) shows the manufacturing state of the connection portion of the capacitive load mechanism 18N. When making the connection, the surface wiring layer T op Solder is transferred to the areas where there is no conductive pattern 3-1, and electrical continuity is achieved with solder 25. In this case, an opening for transferring the solder is provided in the mask 11 at the solder transfer position.

[0047] The lower side of FIG. 10(b) shows the manufacturing state of the non-connected portion of the capacitive load mechanism 18N. In the case of non-connection, the surface wiring layer T op In order to prevent solder transfer from being performed in areas where the conductive pattern 3-1 does not exist, the mask 12 has no openings. By such a manufacturing process, the amount of capacitance adjustment can be finely adjusted.

[0048] FIG. 11 is a top view showing another example of a mounting pattern of a printed circuit board of an electronic device 1 including a signal transmission system according to this embodiment. 11, a component mounting electrode 19N is connected to the N-side signal wiring 7. On the ground side, a component mounting electrode 20N is also connected to the ground wiring layer through a VIA 21N for GND connection, and an electrostatic protection element 17N is connected to the component mounting electrode 19N and the ground-side component mounting electrode 20N, which is the same as the example of FIG. 10(a).

[0049] A wiring 23N drawn from the ground connection VIA 21N is formed with a relatively large area on the L2 layer of the substrate, and a capacitive load mechanism 18N is formed on the L1 layer of the substrate overlapping with the large-area ground wiring 23N. The capacitive load mechanism 18N in the example of Fig. 11 includes a large number of independent conductive patterns 27-1 to 27-6 arranged on the L1 layer, and one of the conductive patterns 27-1 is connected to a protrusion 22N from an electrode 19N. The conductive patterns 27-2 to 27-6 are not directly connected to the electrode 19N. The conductive patterns 27-1 to 27-6 have different sizes, and the other conductive patterns 27-2 to 27-6 are arranged around the conductive pattern 27-1 connected to the electrode 19N. Each of the conductive patterns 27-1 to 27-6 has at least one opening 24, and the conductive pattern 27-1 connected to the electrode 19N has a plurality of openings 24.

[0050] With this configuration, when adjusting the capacity of the capacity load mechanism 18N, solder 25 (FIG. 10) is transferred to any one of the openings 24, so that a desired capacity adjustment value can be obtained. As shown in FIG. 11, by forming the capacitance load mechanism 18N in a shape having a large number of conductive patterns 27-1 to 27-6, a more appropriate capacitance adjustment value can be obtained. The shape of the capacity loading mechanism 18N is not limited to that shown in FIG. 10(a) or FIG. 11, so long as the shape allows the capacitance value to be adjusted by soldering or other operations.

[0051] [Fifth embodiment] FIG. 12 is a top view showing a mounting pattern of a printed circuit board of an electronic device 1 including a signal transmission system according to a fifth embodiment of the present invention. The mounting pattern of this embodiment is configured to provide a capacitive load mechanism adjacent to the electrodes of the electrostatic protection element described in the second embodiment, and is also configured to enable fine adjustment of the P·N characteristic difference in the cable connector portion 16.

[0052] That is, as explained in Fig. 6, component mounting electrodes 19P, 19N are connected to the P-side signal wiring 6 and the N-side signal wiring 7 constituting the differential wiring 5, respectively, and component mounting electrodes 20P, 20N are also prepared on the ground side. Then, lead-out wiring 22P, 22N is led out from the signal side electrodes 19P, 19N, and capacitance load mechanism parts 18P, 18N that partially form parallel plate capacitance are formed between the lead-out wiring 22P, 22N led out from the ground connection VIAs 21P, 21N. The above is the configuration explained in Fig. 6.

[0053] In this embodiment, as shown in Fig. 12, the capacitive load mechanism 18P, 18N is provided adjacent to the electrode portion of the connection hole 26P, 26N of the board to which the cable connector 16 (Fig. 1) is connected. Here, the cable connector is mounted on the printed board using a press-fit connector type. In the case of a press-fit connector, the P-side signal terminal and the N-side terminal are inserted into the connection hole 26P, 26N of the board, respectively, to establish an electrical connection. This improves the characteristics against external common mode noise at the capacitive load mechanism 18P, 18N provided in the middle of the P-side signal wiring 6 and the N-side signal wiring 7, and also improves the characteristics against external common mode noise at the capacitive load mechanism 18P, 18N at the connection point of the cable connector 16, thereby achieving better characteristics.

[0054] Lead wires 22P, 22N are connected to the electrodes of the connection holes 26P, 26N, and capacitance load mechanisms 18P, 18N partially forming parallel plate capacitance are formed between the lead wires 23P, 23N drawn from the ground connection VIAs 21P, 21N. In this case, the balance is adjusted by removing part or all of the lead wires 22P, 22N that form the parallel plate. The two lead wires 22P, 22N that constitute the two capacitance load mechanisms 18P, 18N can be adjusted independently, and by adjusting them independently, it is possible to adjust the capacitance values ​​to have an appropriate asymmetry.

[0055] 12, the capacitive load mechanism 18P, 18N is provided in the middle of the P-side signal wiring 6 and the N-side signal wiring 7, and the capacitive load mechanism 18P, 18N is provided at the connection point of the cable connector 16. Alternatively, the capacitive load mechanism 18P, 18N may be provided at the connection point of the cable connector 16, and the capacitive load mechanism 18P, 18N in the middle of the P-side signal wiring 6 and the N-side signal wiring 7 may be omitted. Even if the capacitive load mechanism 18P, 18N in the middle of the P-side signal wiring 6 and the N-side signal wiring 7 is omitted, the capacitive load mechanism 18P, 18N adjacent to the electrode parts of the connection holes 26P, 26N for connecting the cable connector 16 can be independently adjusted to have an appropriately asymmetric capacitance value, thereby improving noise resistance against external common mode noise.

[0056] [Regarding the range of capacitance values ​​of the capacity load mechanism in each embodiment] Here, an example of the range of capacitance values ​​of the capacitance load mechanism parts 18P, 18N described above will be described. First, in high-speed transmission systems, the load capacitance is the source of attenuation of high-frequency signals, so it is desirable for the capacitance value to be small. For example, the parasitic capacitance of components used for signal transmission at 1 Gbps or higher is often 3 pF or less, and the parasitic capacitance of an oscilloscope for waveform evaluation is similarly kept to 1 to 3 pF or less.

[0057] Moreover, in signal transmission of over 10 Gbps, the limit value of the parasitic capacitance is about 0.1 pF to 0.05 pF. Assuming the capacitance variation that causes the mode conversion loss, it is assumed that it is about ±10% of the parasitic component of the component. As a result, the parasitic capacitance variation of the component for signal transmission of over 1 Gbps is about 3 pF × + / - 10% = + / - 0.3 pF, so in the transmission system in question, it is sufficient if the capacitance can be adjusted up to + / - 0.3 pF. Assuming signal transmission of 10 Gbps class, it is about 0.05 pF × + / - 10% = + / - 0.005 pF, so it is effective to cover up to + / - 0.005 pF as a fine adjustment amount. In summary, it is preferable that the capacitance adjustment range of the capacitance load mechanism parts 18N, 18P is in the range of 0.005 pF to 0.3 pF. [Explanation of symbols]

[0058] 1-1, 1-2... Electronic device, 2, 2-1, 2-2... Communication LSI, 5... Differential wiring, 6... P-side signal wiring, 7... N-side signal wiring, 8... Twisted pair cable, 11, 12... Mask, 14N, 14P, 14N-1, 14N-2, 14P-1, 14P-2... AC coupling capacitor, 15... Common mode choke coil, 15-1... Common mode choke coil, 16, 16-1, 16-2... Cable connector connector, 17N, 17P, 17N-1, 17N-2, 17P-1, 17P-2...electrostatic protection element, 18N, 18P...capacitive load mechanism, 19N, 19P...electrode, 20N, 20P...component mounting electrode, 21N, 21P...ground connection VIA, 22N...projection, 23N, 22P...wiring, 23P...wiring, 24...opening, 25...metal connection portion (solder), 26P...connection hole, 27-1 to 27-6...conductive pattern

Claims

1. a first signal wiring and a second signal wiring each constituting a differential wiring; a first capacitive load mechanism having a first capacitance value, the first capacitive load mechanism being disposed in a first region across the first signal wiring; a second capacitance load mechanism portion that is disposed in a second region that spans the second signal wiring and has a second capacitance value that is asymmetric with the first capacitance value; the first signal wiring is connected to a first cable connector electrode; the second signal wiring is connected to a second cable connector electrode; a third capacitive load mechanism is provided between the first cable connector electrode and a wiring of a ground potential, A fourth capacitive load mechanism is provided between the second cable connector electrode and a wiring of a ground potential. Signal transmission system.

2. the first capacitive load mechanism is provided on the first signal wiring, The second capacitive load mechanism is provided on the second signal wiring.

2. A signal transmission system according to claim 1.

3. The first capacitance value and the second capacitance value are determined by adjusting the width of a local wide wiring portion provided in a part of the first signal wiring and the second signal wiring.

3. A signal transmission system according to claim 2.

4. the first capacitive load mechanism is disposed in the vicinity of the first signal wiring, The second capacitive load mechanism is disposed in the vicinity of the second signal wiring.

2. A signal transmission system according to claim 1.

5. the first capacitive load mechanism is a first electrode portion that is electrically connected to the first signal wiring and is formed by a wiring pattern on a printed circuit board; The second capacitive load mechanism is a second electrode portion that is electrically connected to the second signal wiring and is formed by a wiring pattern on a printed circuit board.

2. A signal transmission system according to claim 1.

6. the first electrode portion is a first electrode pattern additionally formed on a mounting electrode of a first component connected between the first signal wiring and a wiring of a ground potential, The second electrode portion is a second electrode pattern additionally formed on a mounting electrode of a second component connected between the second signal wiring and a wiring of a ground potential.

6. A signal transmission system according to claim 5.

7. The first capacitance value and the second capacitance value are adjustable by increasing or decreasing the area of ​​the wiring pattern.

7. A signal transmission system according to claim 6.

8. The capacitance adjustment range of the capacitive load mechanism is 0.005 pF to 0.3 pF.

2. A signal transmission system according to claim 1.

9. The connection portion between the first electrode pattern and the first electrode portion has an opening.

7. A signal transmission system according to claim 6.

10. The first electrode pattern and / or the second electrode pattern are comb-shaped.

7. A signal transmission system according to claim 6.

11. The third capacity load mechanism and the fourth capacity load mechanism are independently adjustable.

2. A signal transmission system according to claim 1.

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