Virtual machine for virtualizing graphics functions

By intercepting and redirecting graphics function calls from a target system to a host GPU within a virtual machine, the method enhances computing performance and fidelity in complex systems like avionics and healthcare computing systems, addressing the limitations of traditional GPU virtualization methods.

JP7773327B2Active Publication Date: 2025-11-19THE BOEING CO
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Patent Information

Application Number
JP2021143436
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-09-15
Filing Date
2021-09-02
Publication Date
2025-11-19
Estimated Expiration
2041-09-02

AI Technical Summary

Technical Problem

Traditional methods of virtualizing graphics processing units (GPUs) often require detailed knowledge of the target hardware, are computationally expensive, and result in reduced performance and fidelity, especially in complex systems like avionics and healthcare computing systems.

Method used

A host computer with a virtual machine (VM) intercepts and redirects graphics function calls from a target system to a host GPU without emulating the target GPU, maintaining high fidelity and reducing computational load.

Benefits of technology

This approach improves computing performance and reduces CPU load by allowing high-fidelity emulation of graphics functions without virtualizing the target GPU, suitable for complex systems like avionics and healthcare computing systems.

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Abstract

To visualize graphics functions in a host computer emulating a target system.SOLUTION: A host computer 200 includes a memory 208, a CPU 202, and a GPU 206. The memory 208 stores a library 218 of graphics functions, and a VM 216. The VM 216: executes a target code 124 configured to operate on a target system; intercepts a graphics function call in the target code 124; and redirects the graphics function call to a corresponding graphics function in the library 218 of the graphics functions stored in the memory 208. The GPU 206 executes the corresponding graphics function, for determining at least one feature to be rendered in a display 212.SELECTED DRAWING: Figure 2
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Description

[Technical Field]

[0001] The present disclosure relates to a virtual machine for visualizing graphics functions, and more particularly, to a method and system for emulating a target system. [Background technology]

[0002] Some aspects of system simulation aim to use, test, or run software for a given target system without using the actual hardware itself. This simulation can be achieved by modifying, or "retargeting," the software (i.e., target code) to compile on the native hardware and operating system (OS) of a host computer, or "host." The retargeted code includes application programming interfaces (APIs) that interface between the code and the native hardware and OS. Generally, software retargeting is tedious and reduces the fidelity of the simulation.

[0003] Alternatively, the simulation can be achieved by virtualizing the embedded system, or "target hardware," (e.g., on a virtual machine, or VM) to execute one or more portions of the target code, with the VM running on a host computer, or host, via a hypervisor. A VM may also run without a hypervisor. Virtualization refers to the emulation of a given piece of hardware by a software program, such as a VM, running on a local or host computer. For example, virtualization of target hardware such as a single-board computer (SBC) or data bus controller generally requires detailed knowledge of the specific target hardware to build a VM that mimics or emulates the target system with performance comparable to the real hardware. For purposes of this disclosure, the terms "virtualization" and "emulation" are used interchangeably to refer to a VM that emulates any aspect of the target hardware. Note that the host computer may also use one or more other aspects of the target hardware.

[0004] This section is intended to introduce the reader to various aspects of the prior art that may be relevant to various aspects of the present disclosure that are described below and / or claimed. The statements in this section are believed to be helpful in providing the reader with background information to aid in understanding the various aspects of the present disclosure. As such, they should be read in this light, and not construed as admissions of prior art. Summary of the Invention

[0005] One aspect relates to a host computer for emulating a target system. The host computer includes a host memory, a central processing unit (CPU), and a host GPU. The host memory is configured to store a library of graphics functions and a virtual machine (VM). The VM includes a section of emulation memory that stores target code configured to run on the target system. The CPU is configured to execute the VM to emulate the target system. The VM is configured to execute the target code and intercept graphics function calls in the target code. The VM is further configured to redirect the graphics function calls to corresponding graphics functions in the library of graphics functions stored in the host memory. The host GPU is configured to execute the corresponding graphics functions to determine at least one feature to be rendered on a display coupled to the host GPU.

[0006] Another aspect relates to a method for executing graphics function calls in a VM emulating a target system. The method includes executing the VM on a host computer including a host GPU. The method includes executing target code for the target system in the VM, the target code including a first graphics function call to a first graphics function assigned a first address in an emulation memory of the VM. The method includes mapping the first address to a first graphics intercept function, the first graphics intercept function including a call to at least one corresponding graphics function in a library of graphics functions stored in a host memory of the host computer and targeted to the host GPU. The method includes intercepting the first graphics function call at the first address in the emulation memory of the VM. The method includes executing the at least one corresponding graphics function based on the mapping to determine at least one feature to be rendered on a display coupled to the host GPU.

[0007] Yet another aspect relates to a computer-readable memory coupled to a CPU, a host GPU, and a RAM of a host computer. The computer-readable memory includes a target code section storing target code to be executed by a target system. The computer-readable memory includes a library of graphics functions targeted for the host GPU. The computer-readable memory includes a VM section storing a VM, which, when executed by the CPU, allocates a plurality of address spaces in the RAM corresponding to the graphics functions called by the target code. The VM section includes a plurality of graphics intercept functions, each of which includes a call to at least one corresponding graphics function in the library of graphics functions targeted for the host GPU. The VM section also includes a mapping of the graphics functions called by the target code to the plurality of graphics intercept functions. When the target code is executed in the VM, calls to graphics functions in the target code are intercepted and the calls are redirected to at least one corresponding graphics function targeted to the host GPU, thereby determining at least one feature to be drawn on a display coupled to the host GPU.

[0008] The features described in connection with the above-described embodiments may be modified in various ways. Furthermore, additional features may be incorporated into the above-described embodiments. Such modifications and additional features may exist individually or in any combination. For example, the various features described in connection with the following examples may be incorporated into any of the above-described embodiments, either alone or in combination. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a block diagram illustrating an exemplary embedded system, according to one embodiment. [Figure 2] FIG. 2 is a block diagram illustrating an exemplary host computer for emulating the embedded system shown in FIG. 1, according to one embodiment. [Figure 3] FIG. 2 is a block diagram illustrating an exemplary virtual machine for emulating the embedded system shown in FIG. 1, according to one embodiment. [Figure 4] 3 is a block diagram illustrating an exemplary computer-readable memory for the host computer shown in FIG. 2, according to one embodiment. [Figure 5] 2 is a flow diagram illustrating an exemplary method for executing graphics function calls of target code running in a virtual machine emulating the embedded system shown in FIG. 1, according to one embodiment.

[0010] Like reference numerals are used throughout the drawings to refer to like parts. It should be noted that, although particular features of various embodiments may be shown in some drawings and not in others, this is for convenience only. Any feature in any drawing may be referenced and / or claimed in combination with features shown in other drawings. DETAILED DESCRIPTION OF THE INVENTION

[0011] Traditionally, virtualization of at least some target systems or hardware, such as graphics processing units (GPUs), may be impossible without sacrificing fidelity if the specific target hardware details are insufficient, its operation is complex, or its processing demands are high. For example, documentation of hardware registers within GPUs is generally insufficient, so virtualizing a GPU generally requires reverse engineering. However, reverse engineering may not be feasible for GPUs. Furthermore, emulation of graphics data processing may need to be performed at the register level, or target GPU registers may need to be mapped to host GPU registers, which may not be a one-to-one match, and calls to target GPU registers may not be compatible with calls to host GPU registers. Furthermore, virtualized GPUs may operate relatively slowly, which may result in reduced overall performance of the VM. Furthermore, traditional methods of emulating GPUs are computationally expensive and often burden the VM.

[0012] The embodiments described herein take these conventional problems and other factors into consideration. A technical effect of the embodiments described herein is improved computing performance by reducing the load on the VM. Another technical effect of the embodiments described herein is improved computer operation by reducing the load on the CPU via the VM.

[0013] The host computer and virtual machine (VM) of the present disclosure can virtualize the graphics functions of a target system with high fidelity without virtualizing the target system's GPU. GPUs in embedded systems with display capabilities, such as avionics equipment or other land or marine vehicle computing systems, or healthcare computing systems and medical devices, particularly controllers for multifunction displays (MFDs), i.e., target GPUs, are often complex, perform high-bandwidth computations, and incorporate proprietary technology, making virtualization impractical. The host computer of the present disclosure acts as a host for a VM that virtualizes or emulates particular hardware in the target system, executes target code, and intercepts graphics function calls (e.g., calls to OpenGL, DirectX, or Metal, or calls for other graphics libraries, interfaces, or standards originally intended for the target GPU of the target system) before, during, or during execution of the target code, and redirects these graphics function calls for execution by the host GPU of the host computer. In alternative embodiments, the host computer may act as a host for other VMs that virtualize other computing systems with different OSs and / or graphics libraries, execute target code, intercept graphics function calls, and redirect these graphics function calls for execution by the host GPU of the host computer. Interception can be achieved in the VM by identifying the addresses of graphics functions called in the target code (e.g., binary code or assembly code) and registering or mapping each of them to a graphics interception function in the VM that targets the host GPU.Thus, the VM can redirect each graphics function call to the host GPU without modifying the target code and without compromising the fidelity of the simulation and the graphics output.

[0014] Generally, in embodiments of the present disclosure, the host GPU of the host computer is different from the target GPU of the target system, but the host implementations of the graphics library are sufficiently compatible that the fidelity of the simulation and the graphics output are not significantly affected.

[0015] FIG. 1 is a block diagram illustrating an exemplary target system 99. In the illustrated example, target system 99 is an embedded system 100. Embedded system 100 primarily operates a display 102 via a graphics interface 104. Embedded system 100 includes one or more single-board computers (SBCs) 106, each of which includes one or more peripheral hardware devices connected to the SBC 106 via a data bus 108. Peripheral devices include, for example, a target GPU 110, a communications interface 112, and a discrete input / output (I / O) interface 114. Embedded system 100 may also include, for example, persistent and non-persistent memory, sensors, a bus controller, or an interrupt controller (not shown). In other embodiments, other configurations, such as multi-board computers, are contemplated.

[0016] The SBC 106 is a computing system implemented on a single printed circuit board and is often used in compact embedded systems such as avionics, in computing systems in ships, heavy machinery, land vehicles such as automobiles, armored vehicles, and tanks, and in high-density computing systems such as servers and other “blade” computing systems. The SBC 106 typically includes a central processing unit (CPU) 116, random access memory (RAM) 118, and memory 120. In alternative embodiments, some aspects of the SBC 106 may be “off-board.” For example, the CPU 116, RAM 118, and memory 120 may be integrated on the SBC 106, while the target GPU 110, communications interface 112, and discrete I / O interface 114 may be implemented separately on one or more different circuit boards, daughterboards, or mezzanine cards.

[0017] Memory 120 includes multiple sections, including at least a graphics library 122 and a section storing target code 124. In operation, SBC 106, and more specifically CPU 116, accesses memory 120 to retrieve and execute target code 124. Target code 124 includes, for example, executable binary code for operating display 102. Accordingly, target code 124 includes graphics function calls to various graphics functions in graphics library 122. When such calls are executed by CPU 116, CPU 116 sends the calls to target GPU 110 to execute the graphics functions, ultimately determining one or more features that can be or will be drawn on display 102.

[0018] Additionally, target code 124 includes instructions for CPU 116 to interact with one or more peripheral hardware, such as communications interface 112 and discrete I / O interface 114 .

[0019] 2 is a block diagram illustrating an exemplary host computer 200 for emulating the embedded system 100 shown in FIG. 1. The host computer 200 includes a host CPU 202, a RAM 204, a host GPU 206, and a computer-readable host memory 208. The host computer 200 primarily operates the host GPU 206 and a display 210 via a graphics interface 212 extending between the display 210 and the host GPU 206. The display 210 may be a general-purpose display device such as an LCD or LED display, a wearable display such as virtual reality or augmented reality glasses, goggles, or a visor, or a true display such as display 102. The host CPU 202, RAM 204, host GPU 206, and host memory 208 are connected within the host computer 200 by a data bus 214.

[0020] The host memory 208 includes a section that stores the VM 216, a section that stores a graphics library 218 for various graphics functions intended for the host GPU 206, a section that stores the target code 124 from the embedded system 100, and a section that stores a host process 224 or host program that directs the emulation of various hardware components of the embedded system 100. The host process 224 may include, for example, an application stored in the host memory 208 that is loaded into RAM 204 and executed by the host CPU 202. The graphics library 218 may include, for example, OpenGL, DirectX, or Metal functions, or other graphics libraries having an implementation operable on a host computer, such as the host computer 200. In some embodiments, the host memory 208 may include a section that stores at least a portion of the target graphics library 122 intended for the host GPU 206. In alternative embodiments, one or more sections of the host memory 208 may be omitted, with data stored in a remote location. For example, in some embodiments, the target code 124 may be stored on a remote server or mass storage device and available to the host CPU 202 over a network.

[0021] 3 is a block diagram illustrating a VM 216 for emulating the embedded system 100 shown in FIG. 1 . The host CPU 202 accesses the host memory 208 to execute the VM 216. The VM 216 includes an emulation memory 222, which stores, for example, the target code 124. A host process 224 running on the host CPU 202 directs the execution of the VM 216 and the target code 124. For example, the host process 224 directs or monitors memory accesses and instruction execution to intercept calls in the target code 124 to the graphics library 122 and direct calls to the target GPU 110. The host process 224 may be separate from the VM 216 in some embodiments, or may be integrated into the VM 216 in alternative embodiments. The execution of the target code 124 interacts with a hardware emulation of the embedded system 100 within the VM 216. However, the host GPU 206 of the host computer 200 is often different from the target GPU 110 of the embedded system 100. Furthermore, the target GPU 110 is typically too complex and too high bandwidth to be emulated within the VM 216 and the host process 224.

[0022] Target code 124 includes at least one graphics function call to a graphics function in graphics library 122 that is directed to target GPU 110 of embedded system 100 (shown in FIG. 1 ). However, given that target GPU 110 is not emulated in VM 216, the graphics function call is intercepted in VM 216 and redirected for execution by host GPU 206 of host computer 200. More specifically, target code 124 is analyzed either statically before execution, i.e., before runtime, or dynamically during execution, i.e., during runtime, to identify graphics function calls and corresponding addresses in emulation memory for VM 216 that are allocated to the graphics function (in graphics library 122). Note that the emulation memory may be in emulation memory 222, part of emulation RAM, or located on the target code stack. A plurality of graphics intercept functions 226 are defined in emulation memory 222 and include calls to corresponding graphics functions located in graphics library 218 and targeted to host GPU 206. Corresponding addresses in the emulation memory of VM 216 are mapped to the plurality of graphics intercept functions 226. This mapping may be stored, for example, in emulation memory 222 of VM 216. This mapping may also be in the form of a table mapping corresponding addresses to the plurality of graphics intercept functions. The mapping table may be implemented in host process 224 and stored in host memory 208 or RAM 204. Alternatively, the mapping table may be implemented in VM 216 and stored in emulation memory 222.Thus, graphics function calls in target code 124 are intercepted by a graphics interception function, either statically before or at startup of target code 124, or dynamically during execution, i.e., at run-time, and redirected to corresponding graphics functions in graphics library 218 in host memory 208 of host computer 200. As functions in graphics library 218 are directed to host GPU 206, the redirected graphics function calls are executed by host GPU 206 to determine at least one feature to be drawn on display 210.

[0023] 4 is a block diagram illustrating a computer-readable host memory 208 for the host computer 200 shown in FIG. The host memory 208 is a non-volatile memory, such as a disk memory, coupled to the host CPU 202, the host GPU 206, and the RAM 204 of the host computer 200. The host memory 208 includes a section for storing the target code 124, a section for storing a graphics library 218 targeting the host GPU 206, and a section for storing the VM 216. When executed by the host CPU 202, the VM 216 allocates multiple address spaces in the RAM 204 corresponding to, for example, graphics functions called by the target code 124. The VM 216 includes, for example, a graphics intercept function 226 and multiple address space mappings 228 for the graphics intercept function 226 in the emulation memory 222. The VM 216 also includes a hardware emulation 230 for virtualizing hardware components of the embedded system 100. Thus, when the target code 124 executes, calls to graphics functions are intercepted at these instruction codes and redirected by the graphics interception function 226 to graphics functions in the graphics library 218 that target the host GPU 206. Execution of the graphics functions by the host GPU 206 determines at least one feature to be drawn on the display 210.

[0024] As described above, the graphics intercept function 226 includes one or more calls to corresponding graphics functions located in the graphics library 218 in the host memory 208 and targeted to the host GPU 206. For example, the graphics library 218 may include an OpenGL library, a DirectX library, or a Metal library.

[0025] 5 is a flow diagram illustrating an example method 500 for executing graphics function calls of target code running in a virtual machine, such as target code 124 running on VM 216 that emulates a target system 99, such as embedded system 100 shown in FIG. 1. At 502, VM 216 runs on host computer 200, which includes host CPU 202, RAM 204, host GPU 206, and host memory 208. At 504, VM ​​216, and more specifically host CPU 202, accesses and executes target code 124 for embedded system 100. Execution of target code 124 using VM 216 includes emulating certain hardware components of embedded system 100. Generally, in method 500, target GPU 110 is not emulated.

[0026] The target code includes a first graphics function call to a first graphics function in the graphics library 122 targeted for the target GPU 110 of the embedded system 100. The first graphics function call generally includes instructions for both the target CPU 116 and the target GPU 110 during execution. The first graphics function is assigned a first address in the emulation memory of the VM 216. The target code 124 is parsed for multiple graphics function calls, including the first graphics function call to multiple corresponding graphics functions in the graphics library 122 targeted for the target GPU 110. The host computer 200 also identifies corresponding addresses in the emulation memory of the VM 216 assigned to the corresponding graphics functions. At 506, the first address is mapped to a first graphics intercept function 226 defined in the emulation memory 222 of the VM 216. A plurality of graphics intercept functions 226 are defined within the emulation memory 222, and each of the graphics intercept functions 226 includes at least one graphics function call to a corresponding graphics function located in the graphics library 218 within the host memory 208 of the host computer 200 and targeted to the host GPU 206. For example, a first graphics intercept function includes a call to at least one corresponding graphics function in the graphics library 218 stored in the host memory 208 of the host computer 200 and targeted to the host GPU 206. The graphics intercept function 226 also includes instructions for the emulation of the target CPU 116 in the VM 216, such as a return opcode for the target code 124.

[0027] When target code 124 is executed by VM 216, a first graphics function call is intercepted at 508 at a first address in the VM's emulation memory, either statically before execution or at startup of target code 124, or dynamically during execution, i.e., at run-time, and redirected to first graphics interception function 226 according to mapping 228. Accordingly, host GPU 206 executes a corresponding graphics function in graphics library 218 according to instructions by the first graphics interception function, thereby determining at least one feature to be drawn on display 210.

[0028] In some embodiments, the target code may include direct calls to the target GPU 110 that are independent of calls to the graphics library 122. In such embodiments, the direct calls to the target GPU 110 are also intercepted and redirected to the host GPU 206.

[0029] In some embodiments, mapping 506 corresponding addresses in the emulation memory of the VM 216 to the graphics intercept functions 226 includes a table that maps corresponding addresses in the emulation memory of the VM 216 to the multiple graphics intercept functions 226, the table being assigned to multiple corresponding graphics functions.

[0030] Technical effects of the methods, systems, and apparatus described herein include, for example, at least one of the following: (a) a target system can be emulated using a VM that includes graphics function calls without emulating the target GPU or rehosting the target code; (b) the fidelity of virtualized display capabilities of embedded systems can be improved; (c) graphics function calls in target code within a VM can be intercepted statically before or at launch time or dynamically during execution of the target code; and (d) graphics function calls can be redirected to a host graphics library and host GPU on the host computer.

[0031] In some embodiments, one or more electronic processing or computing devices are used. As used herein, the terms "processor," "computer," and related terms, such as "processing device," "computing device," and "controller," are not limited to integrated circuits commonly referred to in the art as computers. These terms are broad terms that include processors, processing devices, controllers, general-purpose central processing units (CPUs), graphics processing units (GPUs), microcontrollers, microcomputers, programmable logic controllers (PLCs), reduced instruction set computer (RISC) processors, field programmable gate arrays (FPGAs), digital signal processing (DSP) devices, application-specific integrated circuits (ASICs), and other programmable circuits or processing devices capable of performing the functions described herein, and these terms are used interchangeably. These processing devices are generally "configured" to perform functions by being programmed or given instructions to execute. The above examples are not intended to limit in any way the definition or meaning of processor, processing device, and related terms.

[0032] In the embodiments described herein, memory may include non-transitory computer-readable media such as, but not limited to, flash memory, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), and non-volatile RAM (NVRAM). As used herein, the term "non-transitory computer-readable medium" refers to any tangible computer-readable medium and hereafter developed digital means, with the sole exception of a transitory propagating signal. Tangible computer-readable media includes, but is not limited to, non-transitory computer storage devices, including, but not limited to, volatile and non-volatile media, firmware, physical and virtual storage, removable or non-removable media such as CD-ROMs, DVDs, and any other digital source such as a network or the Internet. Alternatively, a floppy disk, compact disk, e.g., a read-only memory (CD-ROM), a magneto-optical disk (MOD), a digital versatile disk (DVD), or any other computer-based device implemented with any method or technology for short-term or long-term storage of information, such as computer-readable instructions, data structures, program modules and sub-modules, or any other data, may be used. Accordingly, the methods described herein may be coded as executable instructions and implemented, for example, as "software" and "firmware" on a non-transitory computer-readable medium. Furthermore, the terms "software" and "firmware" are used interchangeably herein and include any computer program stored in memory and executed by personal computers, workstations, client devices, and server devices. When executed by a processor, these instructions cause the processor to perform at least a portion of the methods described herein.

[0033] Additionally, in the embodiments described herein, additional input channels may include computer peripherals associated with an operator interface, such as, but not limited to, a mouse and keyboard. Alternatively, other computer peripherals may be used, such as, but not limited to, a scanner. Furthermore, in some embodiments, additional output channels may be used, such as, but not limited to, an operator interface monitor.

[0034] The systems and methods described herein are not limited to the specific embodiments described above, and the components of the systems and / or steps of the methods may be used independently and separately from other components and / or steps described herein.

[0035] It should be noted that although particular features of various embodiments of the present disclosure may be shown in some drawings and not in others, this is for reasons of convenience only, and in accordance with the principles of the present disclosure, any feature shown in one drawing may be referenced and / or claimed in combination with any feature shown in any other drawing.

[0036] In this specification, the use of the singular "a," "an," or "an" does not exclude a plurality of such elements or steps unless specifically stated otherwise. Furthermore, references to "one embodiment" or "an exemplary embodiment" of the present invention do not exclude the existence of other embodiments that incorporate features recited in the embodiment.

[0037] Further exemplary, non-limiting examples according to the present disclosure include those set forth in the appendix below.

[0038] In one embodiment according to the present disclosure, a host computer for emulating a target system is provided, the host computer including a host memory, a central processing unit (CPU), and a host graphics processing unit (GPU); the host memory storing a library of graphics functions and a virtual machine (VM), the VM including a section of emulation memory storing target code configured to run on the target system; The CPU is configured to execute the VM to emulate the target system, the VM comprising: Execute the target code; Intercepting graphics function calls in the target code; configured to redirect the graphics function calls to corresponding graphics functions in the library of graphics functions stored in the host memory; The host GPU is configured to execute the corresponding graphics function to determine at least one feature to be rendered on a display coupled to the host GPU.

[0039] In an alternative configuration of the host computer described in the above appendix, the target code includes binary code, the binary code including a plurality of graphics function calls targeted to a target GPU of the target system.

[0040] In an alternative configuration of the host computer described in the above appendix, the VM includes a second section of emulation memory, the second section storing a mapping of addresses corresponding to the plurality of graphics function calls in the target code to a plurality of graphics intercept functions, the plurality of graphics intercept functions including calls to at least one corresponding graphics function in a library of graphics functions stored in the host memory and targeted to the host GPU.

[0041] In an alternative configuration of the host computer described in the above appendix, the host memory stores a map of addresses corresponding to the plurality of graphics function calls in the target code to a plurality of graphics intercept functions, the plurality of graphics intercept functions including a call to at least one corresponding graphics function in a library of graphics functions stored in the host memory and targeted to the host GPU.

[0042] In an optional configuration of the host computer described in the above appendix, the host memory stores a library of OpenGL functions targeted to the host GPU.

[0043] The host computer according to the above appendix, in an optional configuration, further includes a graphics interface coupled to the host GPU and configured to couple the host GPU to the display.

[0044] The host computer according to the above appended claims, in an optional configuration, further includes an avionics display device coupled to the graphics interface.

[0045] A method is provided for executing graphics function calls in a virtual machine (VM) that emulates a target system, the method comprising: executing the VM on a host computer that includes a host graphics processing unit (GPU); executing target code of the target system within the VM, wherein the target code includes a first graphics function call to a first graphics function assigned a first address in an emulation memory of the VM; mapping the first address to a first graphics intercept function, wherein the first graphics intercept function includes a call to at least one corresponding graphics function in a library of graphics functions stored in a host memory of the host computer and targeted to the host GPU; intercepting the first graphics function call at the first address in an emulation memory of the VM; Based on the mapping, the at least one corresponding graphics function is executed to determine at least one feature to be rendered on a display coupled to the host GPU.

[0046] The method according to the above appendix, in an optional configuration, further includes analyzing the target code for a plurality of graphics function calls to a plurality of corresponding graphics functions, including the first graphics function call to the first graphics function, and identifying corresponding addresses in an emulation memory of the VM allocated to the plurality of corresponding graphics functions.

[0047] The method according to the above appendix further includes, in a selective configuration, defining a plurality of graphics intercept functions corresponding to the plurality of corresponding graphics functions, and mapping the corresponding addresses in an emulation memory of the VM to the plurality of graphics intercept functions.

[0048] The method according to the above appendix, in an optional configuration, further includes storing a table in an emulation memory of the VM, the table mapping the corresponding addresses in the emulation memory of the VM assigned to the corresponding graphics functions to the plurality of graphics intercept functions.

[0049] In an optional configuration of the method described in the appended note, executing the VM on the host computer includes emulating hardware components of the target system other than a target GPU.

[0050] A computer-readable memory is provided coupled to a central processing unit (CPU), a host graphics processing unit (GPU), and a random access memory (RAM) of a host computer, the computer-readable memory comprising: a target code section for storing target code to be executed by the target system; a library of graphics functions targeted to the host GPU; a VM section that stores a virtual machine (VM), which when executed by the CPU allocates a plurality of address spaces in the RAM corresponding to graphics functions called by the target code, the VM section comprising: a plurality of graphics intercept functions including a call to at least one corresponding graphics function in the library of graphics functions targeted to the host GPU; and mapping the graphics functions called by the target code to the plurality of graphics intercept functions, wherein when the target code is executed in the VM, calls to graphics functions in the target code are intercepted and the calls are redirected to at least one corresponding graphics function targeted to the host GPU, thereby determining at least one feature to be drawn on a display coupled to the host GPU.

[0051] In an optional configuration of the computer-readable memory as set forth in the appended claims, the VM section stores an emulation of hardware components of the target system.

[0052] In an optional configuration of the computer-readable memory as described in the preceding paragraph, intercepting calls to graphics functions in the target code occurs statically before execution of the target code.

[0053] In an optional configuration of the computer-readable memory as described in the preceding paragraph, intercepting calls to graphics functions in the target code occurs at launch of the target code.

[0054] In the optional configuration of the computer-readable memory described in the above appendix, intercepting calls to graphics functions in the target code occurs dynamically during execution of the target code.

[0055] In an optional configuration of the computer-readable memory as set forth in the above appendix, the library of graphics functions includes the OpenGL library.

[0056] In an optional configuration of the computer-readable memory as set forth in the preceding paragraph, the library of graphics functions includes a DirectX library.

[0057] In an optional configuration of the computer-readable memory as set forth in the preceding paragraph, the library of graphics functions includes a Metal library.

[0058] A virtual machine (VM) is provided to emulate the target system. This VM: an emulation memory for storing target code configured to run on the target system; an emulation central processing unit (CPU), said CPU comprising: Execute the target code; Intercepting graphics function calls in the target code; It is configured to redirect the graphics function calls to corresponding graphics functions in a library of graphics functions for a host graphics processing unit (GPU).

[0059] In the selective configuration of the VM described in the appendix above, the target code includes binary code, the binary code including a plurality of graphics function calls targeted to a target GPU of an avionics device.

[0060] In the optional configuration of the VM described in the above appendix, the VM includes a second section of emulation memory, the second section storing a mapping of addresses corresponding to a plurality of graphics function calls in the target code to a plurality of graphics intercept functions, the plurality of graphics intercept functions including a call to at least one corresponding graphics function in the library of graphics functions targeted to the host GPU.

[0061] In the optional configuration of the VM described in the appendix above, the emulation CPU is further configured to intercept the graphics function calls in the target code before executing the target code.

[0062] In the optional configuration of the VM described in the appendix above, the emulation CPU is further configured to intercept the graphics function calls in the target code when the target code is launched.

[0063] In the optional configuration of the VM described in the appendix above, the emulation CPU is further configured to intercept the graphics function calls in the target code during execution of the target code.

[0064] This description uses examples to disclose various embodiments, including the best mode, and also enables those skilled in the art to practice various embodiments, including making and using any devices or systems, and performing the incorporated methods. The patentable scope of this disclosure is defined by the claims, and may include other examples that occur to those skilled in the art. Such other examples should be considered within the scope of the claims if they contain elements that do not differ from the literal language of the claims, or if they contain equivalent elements that have only insubstantial differences from the literal language of the claims.

Claims

1. A host computer for emulating a target system, comprising: a host memory, a central processing unit (CPU), and a host graphics processing unit (GPU); the host memory storing a library of graphics functions and a virtual machine (VM), the VM including a section of emulation memory storing target code configured to run on the target system; The CPU is configured to execute the VM to emulate the target system, the VM comprising: Execute the target code; Intercepting graphics function calls in the target code; configured to redirect the graphics function calls to corresponding graphics functions in the library of graphics functions stored in the host memory; the host GPU is configured to execute the corresponding graphics function to determine at least one feature to be rendered on a display coupled to the host GPU; the target code includes binary code, the binary code including a plurality of graphics function calls targeted to a target GPU of the target system; The VM includes a second section of emulation memory, the second section storing a mapping of addresses corresponding to the plurality of graphics function calls in the target code to a plurality of graphics intercept functions, the plurality of graphics intercept functions including calls to at least one corresponding graphics function in a library of graphics functions stored in the host memory and targeted to the host GPU.

2. A host computer for emulating a target system, comprising: a host memory, a central processing unit (CPU), and a host graphics processing unit (GPU); the host memory storing a library of graphics functions and a virtual machine (VM), the VM including a section of emulation memory storing target code configured to run on the target system; The CPU is configured to execute the VM to emulate the target system, the VM comprising: Execute the target code; Intercepting graphics function calls in the target code; configured to redirect the graphics function calls to corresponding graphics functions in the library of graphics functions stored in the host memory; the host GPU is configured to execute the corresponding graphics function to determine at least one feature to be rendered on a display coupled to the host GPU; the target code includes binary code, the binary code including a plurality of graphics function calls targeted to a target GPU of the target system; a host computer, wherein the host memory stores a map of addresses corresponding to the plurality of graphics function calls in the target code to a plurality of graphics intercept functions, the plurality of graphics intercept functions including a call to at least one corresponding graphics function in a library of graphics functions stored in the host memory and targeted to the host GPU;

3. 3. The host computer of claim 1, wherein the host memory stores a library of OpenGL functions targeted at the host GPU.

4. The host computer of any one of claims 1 to 3, further comprising a graphics interface coupled to the host GPU and configured to couple the host GPU to the display.

5. 5. The host computer of claim 4, further comprising an avionics display device coupled to said graphics interface.

6. 1. A method for executing graphics function calls in a virtual machine (VM) that emulates a target system, comprising: executing the VM on a host computer including a host graphics processing unit (GPU); executing target code of the target system within the VM, wherein the target code includes a first graphics function call to a first graphics function assigned a first address in an emulation memory of the VM; mapping the first address to a first graphics intercept function, wherein the first graphics intercept function includes a call to at least one corresponding graphics function in a library of graphics functions stored in a host memory of the host computer and targeted to the host GPU; intercepting the first graphics function call at the first address in an emulation memory of the VM; and executing the at least one corresponding graphics function based on the mapping to determine at least one feature to be rendered on a display coupled to the host GPU.

7. 7. The method of claim 6, further comprising: analyzing the target code for a plurality of graphics function calls to a plurality of corresponding graphics functions, including the first graphics function call to the first graphics function; and identifying corresponding addresses in an emulation memory of the VM allocated to the plurality of corresponding graphics functions.

8. 8. The method of claim 7, further comprising: defining a plurality of graphics intercept functions corresponding to the plurality of corresponding graphics functions; and mapping the corresponding addresses in the emulation memory of the VM to the plurality of graphics intercept functions.

9. 9. The method of claim 8, further comprising storing a table in an emulation memory of the VM, the table mapping the corresponding addresses in the emulation memory of the VM assigned to the corresponding graphics functions to the plurality of graphics intercept functions.

10. The method of any one of claims 6 to 9, wherein executing the VM on the host computer includes emulating hardware components of the target system other than a target GPU.

11. a virtual machine (VM) for emulating a target system, an emulation memory for storing target code configured to run on the target system; an emulation central processing unit (CPU), said CPU comprising: Execute the target code; Intercepting graphics function calls in the target code; configured to redirect the graphics function call to a corresponding graphics function in a library of graphics functions directed to a host graphics processing unit (GPU); The VM includes a second section of emulation memory, the second section comprising: , storing a mapping of addresses corresponding to a plurality of graphics function calls in the target code to a plurality of graphics intercept functions, the plurality of graphics intercept functions including a call to at least one corresponding graphics function in the library of graphics functions targeted to the host GPU.

12. The VM of claim 10 , wherein the target code comprises binary code, the binary code comprising a plurality of graphics function calls targeted to a target GPU of an avionics device.

Citation Information

Patent Citations

  • Method and equipment for emulation of circuit in computer system

    JP1995073046A

  • One-step address translation for virtualized graphics addresses

    JP2008527508A

  • Application-specific virtualized graphics processing

    US20170132744A1

  • 3D API Redirection for Virtual Desktop Infrastructure

    US20190361718A1