Amplification equipment
Patent Information
- Application Number
- JP2024561562
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2023-05-25
- Publication Date
- 2025-04-30
- Estimated Expiration
- 2043-05-25
AI Technical Summary
The efficiency of existing amplifiers is reduced when the power supply voltage is modulated to follow the amplitude of the signal, especially when the output impedance of the combining circuit does not change, leading to lower performance compared to fixed power supply voltage scenarios.
An amplifier device that includes a signal splitter to distribute the signal into two input signals based on amplitude, a two-input amplifier with discrete variable power supply to switch power supply voltage across different amplitude ranges, and a synthesis circuit to combine the amplified signals, allowing for expanded amplitude ranges with changing output impedance.
The amplifier device achieves higher efficiency by expanding the amplitude range where output impedance changes, improving performance beyond existing technologies by optimizing power supply voltage switching based on amplitude thresholds.
Smart Images

Figure 00000016_0000 
Figure 00000016_0001 
Figure 00000017_0000
Abstract
Description
[Technical field]
[0001] The present disclosure relates to an amplification device. [Background technology]
[0002] There is an amplifier device that includes a carrier amplifier, a peak amplifier, and a combiner circuit. As such an amplifier device, for example, Patent Document 1 discloses an amplifier device including a variable power supply that applies a power supply voltage to the output side of each of a carrier amplifier and a peak amplifier. In this amplifier, when the output impedance of a combiner circuit that combines the signal amplified by the carrier amplifier and the signal amplified by the peak amplifier changes in accordance with a change in the amplitude of the signal to be amplified that is provided to each of the carrier amplifier and the peak amplifier, the power supply voltage output from the variable power supply is fixed. The change in the output impedance of the combiner circuit is load modulation, and the efficiency of the amplifier is increased by the load modulation. On the other hand, when the output impedance of the combining circuit does not change in accordance with the change in the amplitude of the signal to be amplified, the power supply voltage output from the variable power supply is modulated so as to follow the amplitude of the signal to be amplified. By modulating the power supply voltage, the efficiency of the amplifier device is improved. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] International Publication No. 2022-038695 Summary of the Invention [Problem to be solved by the invention]
[0004] When the power supply voltage output from a variable power supply is modulated so as to follow the amplitude of the signal to be amplified, the efficiency of the variable power supply decreases compared to when the power supply voltage is fixed. The efficiency of the amplifier disclosed in Patent Document 1 is increased by modulating the power supply voltage when the output impedance of the combiner circuit does not change, compared to when the power supply voltage is fixed when the output impedance of the combiner circuit does not change, but it decreases by the amount of decrease in the efficiency of the variable power supply. As a result, there is a problem that when the output impedance of the combiner circuit does not change, the efficiency of the amplifier may be lower than when the output impedance of the combiner circuit changes.
[0005] The present disclosure has been made to solve the above-mentioned problems, and aims to obtain an amplification device that can change the output impedance of the combining circuit and expand the amplitude range of the signal to be amplified more than the amplification device disclosed in Patent Document 1. [Means for solving the problem]
[0006] The amplification device according to the present disclosure includes a signal divider that divides a signal to be amplified into a first input signal and a second input signal in accordance with the amplitude of the signal to be amplified, a first amplifier that amplifies the first input signal, a second amplifier that amplifies the second input signal, a synthesis circuit that synthesizes the signal amplified by the first amplifier and the signal amplified by the second amplifier, and a discrete variable power supply that switches a power supply voltage to be applied to each of the output sides of the first amplifier and the second amplifier in accordance with an amplitude range that includes the amplitude of the signal to be amplified. The amplifier includes a comparison circuit that has a plurality of mutually different amplitude ranges, compares a threshold value indicating a lower limit value of each amplitude range with the amplitude of the signal to be amplified, and outputs a comparison result between each threshold value and the amplitude, the discrete variable power supply switches the power supply voltage based on the comparison result output from the comparison circuit, and the signal distributor distributes the signal to be amplified into a first input signal and a second input signal based on the amplitude of the signal to be amplified and the comparison result output from the comparison circuit. It is something. Effect of the Invention
[0007] According to the present disclosure, it is possible to widen the amplitude range of the signal to be amplified, in which the output impedance of the combiner circuit changes, as compared to the amplifying device disclosed in Patent Document 1. [Brief description of the drawings]
[0008] [Figure 1] 1 is a configuration diagram showing an amplifier device according to a first embodiment. [Diagram 2] 2 is an explanatory diagram showing a power supply voltage output from a discrete variable power supply 5. FIG. [Diagram 3] 4 is an explanatory diagram showing an amplitude ratio between a first input signal and a second input signal and a phase difference between the first input signal and the second input signal. FIG. [Figure 4] 4 is an explanatory diagram showing the relationship between the back-off amount of a two-input amplifier 4 and the efficiency of the two-input amplifier 4. FIG. [Diagram 5] 1A and 1B are explanatory diagrams showing the back-off of the dual-input amplifier 4 and the saturation of the dual-input amplifier 4 in each operation mode. [Figure 6] FIG. 11 is a configuration diagram showing an amplifier device according to a third embodiment. [Figure 7] 4 is an explanatory diagram showing an amplitude ratio between a first input signal and a second input signal and a phase difference between the first input signal and the second input signal. FIG. [Figure 8] 4 is an explanatory diagram showing an amplitude ratio between a first input signal and a second input signal and a phase difference between the first input signal and the second input signal. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0009] In order to describe the present disclosure in more detail, embodiments of the present disclosure will be described below with reference to the accompanying drawings.
[0010] Embodiment 1 FIG. 1 is a configuration diagram showing an amplifying device according to a first embodiment. The amplifying device shown in FIG. 1 includes an input terminal 1, a comparator circuit 2, a signal distributor 3, a two-input amplifier 4, a discrete variable power supply 5, an output terminal 6, and a gate bias circuit 7. 1 includes a gate bias circuit 7. However, this is merely an example, and the gate bias circuit 7 may be provided outside the amplifying device shown in FIG. A signal to be amplified is applied to an input terminal 1. The signal to be amplified applied to the input terminal 1 is applied to a comparison circuit 2 and a signal distributor 3, respectively. 1, for convenience of explanation, the amplitude E of the signal to be amplified will be described as being equal to or greater than 0 and equal to or less than 1, i.e., 0≦E≦1.
[0011] The comparator circuit 2 has an internal memory that stores one or more threshold values that are different from each other. Specifically, if the number of amplitude ranges that may include the amplitude E of the signal to be amplified is N (N is an integer greater than or equal to 2), then (N-1) different threshold values are stored in the internal memory of the comparison circuit 2. In the amplifier shown in FIG. 1, there are three amplitude ranges that may include the amplitude E of the signal to be amplified. Therefore, two thresholds Th 1 ,Th 2 is stored in the internal memory of the comparison circuit 2. 1 ,Th 2 indicates the lower limit of each amplitude range. When the signal to be amplified is a digital signal, the comparison circuit 2 is realized by, for example, a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC). When the signal to be amplified is an analog signal, the comparison circuit 2 is realized by, for example, a detector and a comparator. The comparator circuit 2 has a threshold value Th 1 ,Th 2 and the amplitude E of the signal to be amplified. The comparator circuit 2 has a threshold value Th 1 ,Th 2 The comparison result between the amplitude E and the amplitude E is output to the signal distributor 3 and the discrete variable power source 5, respectively. In the amplifier shown in FIG. 1, two thresholds Th 1 ,Th 2 is stored in the internal memory of the comparison circuit 2.
[0012] A signal to be amplified is applied from an input terminal 1 to the signal distributor 3 . When the signal to be amplified is a digital signal, the signal distributor 3 is realized by, for example, a quadrature modulator. The quadrature modulator is realized by, for example, an FPGA or an ASIC, and an RF Digital-to-Analog Converter (RFDAC) or a DAC. When the signal to be amplified is an analog signal, the signal distributor 3 is realized by, for example, an attenuator or a variable gain amplifier and a phase shifter. The signal distributor 3 distributes the signal to be amplified into a first input signal and a second input signal according to the amplitude E of the signal to be amplified. Specifically, the signal distributor 3 distributes the signal to be amplified into a first input signal and a second input signal based on the amplitude E of the signal to be amplified and the comparison result output from the comparator circuit 2. The signal distributor 3 outputs the first input signal to a first amplifier 4 a in the two-input amplifier 4 . The signal distributor 3 outputs the second input signal to the second amplifier 4 b in the two-input amplifier 4 .
[0013] The two-input amplifier 4 includes a first amplifier 4a, a second amplifier 4b, and a combiner circuit 4c. In the amplifying device shown in FIG. 1, the two-input amplifier 4 operates as a Doherty amplifier. The first amplifier 4a may be a carrier amplifier and the second amplifier 4b may be a peak amplifier, or the first amplifier 4a may be a peak amplifier and the second amplifier 4b may be a carrier amplifier.
[0014] The first amplifier 4a is realized by, for example, a field effect transistor (FET), a heterojunction bipolar transistor (HBT), or a high electron mobility transistor (HEMT). The gate terminal of the first amplifier 4a is biased to class B by the gate bias circuit 7. When the first amplifier 4a operates in class B, the output load at which the output power of the first amplifier 4a saturates is, for example, 50Ω. The first amplifier 4a amplifies the first input signal output from the signal distributor 3, and outputs the amplified signal to the combiner circuit 4c.
[0015] The second amplifier 4b is realized by, for example, a FET, an HBT, or a HEMT. The gate terminal of the second amplifier 4b is biased to class B by the gate bias circuit 7. When the second amplifier 4b operates in class B, the output load at which the output power of the second amplifier 4b is saturated is, for example, 50Ω. The second amplifier 4b amplifies the second input signal output from the signal distributor 3, and outputs the amplified signal to the combiner circuit 4c.
[0016] The combining circuit 4c is realized by, for example, a circuit using lumped constant elements, a circuit using distributed constant lines, a circuit combining lumped constants and distributed constants, an LC (coil-capacitor) matching circuit, or a transmission line. The combining circuit 4c includes a first line 4c-1 and a second line 4c-2. One end of the first line 4c-1 is connected to the output side of the first amplifier 4a. The other end of the first line 4c-1 is connected to the other end of the second line 4c-2. The first line 4c-1 is, for example, a line whose electrical length is 90 degrees at the center frequency of the signal to be amplified. One end of the second line 4c-2 is connected to the output side of the second amplifier 4b. The other end of the second line 4c-2 is connected to the other end of the first line 4c-1. The second line 4c-2 is, for example, a line whose electrical length is 180 degrees at the center frequency of the signal to be amplified. The combiner circuit 4c combines the signal amplified by the first amplifier 4a and the signal amplified by the second amplifier 4b. The combining circuit 4c outputs to the output terminal 6 a combined signal of the amplified signal and the amplified signal.
[0017] In the amplifying device shown in Fig. 1, the first line 4c-1 is a line with an electrical length of 90 degrees, and the second line 4c-2 is a line with an electrical length of 180 degrees. However, this is merely an example, and the first line 4c-1 may be a line with an electrical length of 90 degrees, and the second line 4c-2 may be a line with an electrical length equivalent to 0 degrees. Furthermore, when an arbitrary phase is α, the first line 4c-1 may be a line with an electrical length of (90+α) degrees, and the second line 4c-2 may be a line with an electrical length of (90-α) degrees.
[0018] The discrete variable power supply 5 is realized by, for example, a DC (direct current)-DC converter, a buck converter, an envelope amplifier, or a digital amplifier. The discrete variable power supply 5 switches the power supply voltage applied to the output side of each of the first amplifier 4a and the second amplifier 4b according to the amplitude range that includes the amplitude of the signal to be amplified. The output sides of the first amplifier 4a and the second amplifier 4b are, for example, the drain terminals of the first amplifier 4a and the second amplifier 4b. Specifically, the discrete variable power supply 5 switches the power supply voltages applied to the output sides of the first amplifier 4a and the second amplifier 4b based on the comparison result output from the comparison circuit 2.
[0019] The output terminal 6 is connected to the other end of the first line 4c-1 and the other end of the second line 4c-2. The output terminal 6 is a terminal for outputting the composite signal output from the composite circuit 4c to the outside. The gate bias circuit 7 biases the first amplifier 4a to class B. Biasing the first amplifier 4a to class B means applying a voltage close to the threshold voltage of the first amplifier 4a to the gate terminal of the first amplifier 4a. Moreover, the gate bias circuit 7 biases the second amplifier 4b to class B. Biasing the second amplifier 4b to class B means applying a voltage close to the threshold voltage of the second amplifier 4b to the gate terminal of the second amplifier 4b.
[0020] Next, the operation of the amplifying device shown in FIG. 1 will be described. The internal memory of the comparison circuit 2 stores two threshold values Th 1 ,Th 2 is stored. Threshold Th 1 is the output power P of the two-input amplifier 4 when the power supply voltage applied to the output side of each of the first amplifier 4a and the second amplifier 4b by the discrete variable power supply 5 is X(V). OUT is the power at the backoff point P BOFF,X In other words, the threshold value Th 1 indicates the lower limit of the amplitude range of the signal to be amplified at which load modulation occurs in the two-input amplifier 4 when the power supply voltage is X (V). BOFF,X is the saturation power P of the 2-input amplifier 4 s,X The power is, for example, 6 dB lower than that of the When the power supply voltage is X(V), the output power P of the two-input amplifier 4 is OUT is the saturation power P of the 2-input amplifier 4. s,X and the power at the backoff point P BOFF,X When it is within the range of (P BOFF,X ≦P OUT ≦P s,X ), load modulation occurs in the two-input amplifier 4. When load modulation occurs in the two-input amplifier 4, the two-input amplifier 4 operates with high efficiency.
[0021] Threshold Th 2 is the output power P of the two-input amplifier 4 when the power supply voltage applied to the output side of each of the first amplifier 4a and the second amplifier 4b by the discrete variable power supply 5 is 0.5X (V). OUT is the power at the backoff point P BOFF,0.5X In other words, the threshold value Th 2 indicates the lower limit of the amplitude range of the signal to be amplified at which load modulation occurs in the two-input amplifier 4 when the power supply voltage is 0.5X (V). When the power supply voltage is 0.5X (V), the threshold value Th 1indicates the upper limit of the amplitude range of the signal to be amplified, at which load modulation occurs in the two-input amplifier 4. BOFF,0.5X is the saturation power P of the two-input amplifier 4 when the power supply voltage is 0.5X (V). s,0.5X The power is, for example, 6 dB lower than that of the When the power supply voltage is 0.5X (V), the output power P of the 2-input amplifier 4 is OUT is the saturation power P of the 2-input amplifier 4. s,0.5X and the power at the backoff point P BOFF,0.5X When it is within the range of (P BOFF,0.5X ≦P OUT ≦P s,0.5X ), load modulation occurs in the two-input amplifier 4. When load modulation occurs in the two-input amplifier 4, the two-input amplifier 4 operates with high efficiency. In addition, when the power supply voltage is 0.25X (V), the output power P OUT is the saturation power P of the 2-input amplifier 4. s,0.25X and the power at the backoff point P BOFF,0.25X When it is within the range of (P BOFF,0.25X ≦P OUT ≦P s,0.25X ), load modulation occurs in the 2-input amplifier 4. The power P BOFF,0.25X is the saturation power P of the two-input amplifier 4 when the power supply voltage is 0.25X (V). s,0.25X When load modulation occurs in the two-input amplifier 4, the two-input amplifier 4 operates with high efficiency.
[0022] The comparator circuit 2 receives from the input terminal 1 a signal to be amplified. The comparator circuit 2 has a threshold value Th 1 ,Th 2 and the amplitude E of the signal to be amplified. The comparator circuit 2 has a threshold value Th 1 ,Th 2 The comparison result between the amplitude E and the amplitude E is output to the signal distributor 3 and the discrete variable power source 5, respectively. In the amplifier shown in FIG. 1, the amplitude E of the signal to be amplified is equal to or smaller than a threshold Th 1If it is greater than , the operation mode of the two-input amplifier 4 is determined to be the first operation mode. The amplitude E of the signal to be amplified is equal to the threshold Th 1 and the amplitude E of the signal to be amplified is equal to or less than the threshold Th 2 If it is greater than , the operation mode of the two-input amplifier 4 is determined to be the second operation mode. The amplitude E of the signal to be amplified is equal to the threshold Th 2 If it is equal to or lower, the operation mode of the two-input amplifier 4 is determined to be the third operation mode.
[0023] The discrete variable power supply 5 obtains the comparison result of the comparison circuit 2 . The discrete variable power supply 5 refers to the comparison result of the comparator circuit 2 to recognize the operation mode of the two-input amplifier 4 . FIG. 2 is an explanatory diagram showing the power supply voltage output from the discrete variable power supply 5. As shown in FIG. In FIG. 2, the horizontal axis indicates time, and the vertical axis indicates the power supply voltage output from the discrete variable power supply 5 and the amplitude E of the signal to be amplified. When the operation mode of the two-input amplifier 4 is the first operation mode, the discrete variable power supply 5 applies a power supply voltage X(V) to the output side of each of the first amplifier 4a and the second amplifier 4b, as shown in Fig. 2. X(V) is the maximum power supply voltage output from the discrete variable power supply 5. When the operation mode of the two-input amplifier 4 is the second operation mode, the discrete variable power supply 5 applies a power supply voltage of 0.5X (V) to the output side of each of the first amplifier 4a and the second amplifier 4b as shown in Fig. 2. 0.5X (V) is half the maximum power supply voltage output from the discrete variable power supply 5. When the operation mode of the two-input amplifier 4 is the third operation mode, the discrete variable power supply 5 applies a power supply voltage of 0.25X (V) to the output side of each of the first amplifier 4a and the second amplifier 4b as shown in Fig. 2. 0.25X (V) is a quarter of the maximum power supply voltage output from the discrete variable power supply 5.
[0024] The signal distributor 3 obtains the comparison result of the comparison circuit 2 . The signal distributor 3 refers to the comparison result of the comparator circuit 2 and recognizes the operation mode of the two-input amplifier 4 . If the operation mode of the two-input amplifier 4 is the first operation mode, when the power supply voltage X (V) is applied, the signal distributor 3 distributes the signal to be amplified to a first input signal and a second input signal according to the amplitude E of the signal to be amplified so as to generate load modulation in which the output impedance of the combiner circuit 4c changes with a change in the amplitude E of the signal to be amplified. The total power of the power of the first input signal and the power of the second input signal is equal to the power of the signal to be amplified. In the first operating mode, the output power P OUT is the saturation power P of the 2-input amplifier 4 s,X The power is 6 dB lower than the saturated power P s,X The power between
[0025] Specifically, as shown in FIG. 3, the signal distributor 3 distributes the signal to be amplified into a first input signal and a second input signal so that the amplitude ratio between the amplitude of the first input signal and the amplitude of the second input signal becomes an amplitude ratio corresponding to the amplitude E of the signal to be amplified. FIG. 3 is an explanatory diagram showing an amplitude ratio between a first input signal and a second input signal and a phase difference between the first input signal and the second input signal. In FIG. 3, the horizontal axis represents the amplitude E of the signal to be amplified, and the vertical axis represents each of the amplitude ratio and the phase difference. In the example of FIG. 3, the signal to be amplified is distributed between the first input signal and the second input signal such that the amplitude ratio decreases as the amplitude E of the signal to be amplified increases. If the first amplifier 4a is a carrier amplifier and the second amplifier 4b is a peak amplifier, the amplitude ratio is (amplitude of the first input signal / amplitude of the second input signal). If the first amplifier 4a is a peak amplifier and the second amplifier 4b is a carrier amplifier, the amplitude ratio is (amplitude of the second input signal / amplitude of the first input signal). In addition, as shown in Figure 3, the signal distributor 3 distributes the signal to be amplified into a first input signal and a second input signal so that the phase difference between the first input signal and the second input signal corresponds to the amplitude E of the signal to be amplified. In the example of FIG. 3, the signal to be amplified is divided into a first input signal and a second input signal so that the phase difference is constant even if the amplitude E of the signal to be amplified changes.
[0026] If the operation mode of the two-input amplifier 4 is the second operation mode, the signal distributor 3 distributes the signal to be amplified to a first input signal and a second input signal according to the amplitude E of the signal to be amplified so as to generate load modulation in which the output impedance of the combiner circuit 4c changes with a change in the amplitude E of the signal to be amplified when a power supply voltage of 0.5X (V) is applied. The total power of the power of the first input signal and the power of the second input signal is equal to the power of the signal to be amplified. In the second operating mode, the output power P OUT is the saturation power P of the 2-input amplifier 4 s,X The power is 12 dB lower than the saturated power P s,X The power is between 6 dB lower than the power of Specifically, as shown in FIG. 3, the signal distributor 3 distributes the signal to be amplified into a first input signal and a second input signal so that the amplitude ratio between the amplitude of the first input signal and the amplitude of the second input signal becomes an amplitude ratio corresponding to the amplitude E of the signal to be amplified. In addition, as shown in Figure 3, the signal distributor 3 distributes the signal to be amplified into a first input signal and a second input signal so that the phase difference between the first input signal and the second input signal corresponds to the amplitude E of the signal to be amplified.
[0027] If the operation mode of the two-input amplifier 4 is the third operation mode, the signal distributor 3 distributes the signal to be amplified to a first input signal and a second input signal according to the amplitude E of the signal to be amplified so as to generate load modulation in which the output impedance of the combiner circuit 4c changes with a change in the amplitude E of the signal to be amplified when a power supply voltage of 0.25X (V) is applied. The total power of the power of the first input signal and the power of the second input signal is equal to the power of the signal to be amplified. In the third operating mode, the output power P OUT is the saturation power P of the 2-input amplifier 4 s,X The power is 18 dB lower than the saturated power P s,X The power is between 12 dB lower than the power of Specifically, as shown in FIG. 3, the signal distributor 3 distributes the signal to be amplified into a first input signal and a second input signal so that the amplitude ratio between the amplitude of the first input signal and the amplitude of the second input signal becomes an amplitude ratio corresponding to the amplitude E of the signal to be amplified. In addition, as shown in Figure 3, the signal distributor 3 distributes the signal to be amplified into a first input signal and a second input signal so that the phase difference between the first input signal and the second input signal corresponds to the amplitude E of the signal to be amplified.
[0028] The signal distributor 3 outputs the first input signal to a first amplifier 4 a in the two-input amplifier 4 . The signal distributor 3 outputs the second input signal to the second amplifier 4 b in the two-input amplifier 4 .
[0029] The first amplifier 4 a receives a first input signal from the signal distributor 3 . The first amplifier 4a amplifies the first input signal and outputs the amplified signal to the combiner circuit 4c. The second amplifier 4 b receives a second input signal from the signal distributor 3 . The second amplifier 4b amplifies the second input signal and outputs the amplified signal to the combiner circuit 4c. The power supply voltage applied to the output side of each of the first amplifier 4a and the second amplifier 4b is switched according to the amplitude range that includes the amplitude E of the signal to be amplified, and the signal to be amplified is distributed to the first input signal and the second input signal according to the amplitude E of the signal to be amplified. Therefore, the two-input amplifier 4 generates load modulation regardless of the amplitude E of the signal to be amplified. The combiner circuit 4c combines the signal amplified by the first amplifier 4a and the signal amplified by the second amplifier 4b. The combiner circuit 4c outputs to an output terminal 6 a combined signal of the signal amplified by the first amplifier 4a and the signal amplified by the second amplifier 4b.
[0030] Here, the threshold Th 1 ,Th 2 and the power range in which load modulation occurs in the two-input amplifier 4 will be specifically described. If the power range in which load modulation occurs in the input amplifier 4 is β dB, then the threshold value Th 1 ,Th 2 is in an equal relationship with βdB. For example, if β=6dB, the threshold Th 1 is the 6 dB backoff value, and the threshold Th 2 would be a 12 dB backoff value. Threshold Th 1 ,Th 2 When expressed as a voltage amplitude and antilogarithm, the threshold value Th 1 ,Th 2 is 10 (-β / 20) Therefore, the threshold value Th 1 is 0.5 times the maximum power supply voltage X(V) output from the discrete variable power supply 5, and the threshold Th 2 is 0.25 times the maximum power supply voltage X (V) output from the discrete variable power supply 5.
[0031] In addition, if the power range in which load modulation occurs in the two-input amplifier 4 is β dB, the power supply voltage output from the discrete variable power supply 5 in each operation mode is 10 (-β / 20)Therefore, in the first operation mode, the power supply voltage output from the discrete variable power supply 5 is the maximum power supply voltage, X(V), and in the second operation mode, the power supply voltage output from the discrete variable power supply 5 is X(V)×10 (-β / 20) In the third operation mode, the power supply voltage output from the discrete variable power supply 5 is X(V)×10 (-β / 20)×2 become.
[0032] FIG. 4 is an explanatory diagram showing the relationship between the back-off amount of the dual-input amplifier 4 and the efficiency of the dual-input amplifier 4. As shown in FIG. In FIG. 4, the horizontal axis represents the back-off amount of the dual-input amplifier 4, and the vertical axis represents the efficiency of the dual-input amplifier 4. When the back-off amount is in the range from 6 dB to saturation, the power supply voltage output from the discrete variable power supply 5 is the maximum power supply voltage X (V), and when the back-off amount is in the range from 12 dB to 6 dB, the power supply voltage output from the discrete variable power supply 5 is 0.5 times the maximum power supply voltage X (V). Also, when the back-off amount is in the range from 18 dB to 12 dB, the power supply voltage output from the discrete variable power supply 5 is 0.25 times the maximum power supply voltage X (V). In the example of FIG. 4, when the back-off amount is in the range of less than 18 dB, no load modulation occurs in the two-input amplifier 4, and therefore the greater the back-off amount, the lower the efficiency of the two-input amplifier 4 becomes. On the other hand, when the back-off amount is in the range from 18 dB to saturation, the power supply voltage output from the discrete variable power supply 5 is switched according to the amplitude range that includes the amplitude E of the signal to be amplified, thereby causing load modulation in the two-input amplifier 4. As a result, the efficiency of the two-input amplifier 4 is high.
[0033] FIG. 5 is an explanatory diagram showing the back-off of the dual-input amplifier 4 and the saturation of the dual-input amplifier 4 in each operation mode. In the first operation mode, the power supply voltage is at the maximum value X (V), and load modulation is performed when the back-off amount is in the range from 6 dB to saturation. When the back-off amount is saturated, the characteristics of the first amplifier 4a and the second amplifier 4b overlap. In the second operation mode, the power supply voltage is 0.5X (V), and load modulation is performed when the back-off amount is in the range of 12 dB to 6 dB. In the second operation mode, saturation occurs when the back-off amount is 6 dB, and the characteristics of the first amplifier 4a and the second amplifier 4b overlap. In the third operation mode, the power supply voltage is 0.25X (V), and load modulation is performed when the back-off amount is in the range of 18 dB to 12 dB. In the third operation mode, saturation occurs when the back-off amount is 12 dB, and the characteristics of the first amplifier 4a and the second amplifier 4b overlap.
[0034] In the above-described first embodiment, the amplifying device is configured to include a signal distributor 3 that distributes the signal to be amplified into a first input signal and a second input signal according to the amplitude of the signal to be amplified, a first amplifier 4a that amplifies the first input signal, a second amplifier 4b that amplifies the second input signal, a combining circuit 4c that combines the signal amplified by the first amplifier 4a and the signal amplified by the second amplifier 4b, and a discrete variable power supply 5 that switches the power supply voltage applied to each output side of the first amplifier 4a and the second amplifier 4b according to the amplitude range included in the amplitude of the signal to be amplified. Therefore, the amplifying device can expand the amplitude range of the signal to be amplified, in which the output impedance of the combining circuit changes, compared to the amplifying device disclosed in Patent Document 1.
[0035] Embodiment 2 In the first embodiment, the threshold value to be compared with the amplitude E of the signal to be amplified is a threshold value Th 1 ,Th 2 An amplification apparatus has been described which is The threshold value to be compared with the amplitude E of the signal to be amplified may be one threshold value or three or more threshold values. In the second embodiment, the threshold value to be compared with the amplitude E of the signal to be amplified is one of three threshold values Th 1 ,Th 2 ,Th 3 An amplifier device having the above configuration will now be described. The configuration of the amplifying device according to the second embodiment is similar to that of the amplifying device according to the first embodiment, and a configuration diagram showing the amplifying device according to the second embodiment is shown in FIG.
[0036] As described above, if the power range in which load modulation occurs in the two-input amplifier 4 is β dB, then the threshold Th 1 ,Th 2 ,Th 3 is in an equal relationship with βdB. For example, if β=6dB, the threshold Th 1 is the 6 dB backoff value, and the threshold Th 2 is the 12 dB backoff value, and the threshold Th 3 would result in an 18dB backoff value. Threshold Th 1 ,Th 2 ,Th 3 When expressed as a voltage amplitude and antilogarithm, the threshold value Th 1 ,Th 2 ,Th 3 is 10 (-β / 20) Therefore, the threshold value Th 1 is 0.5 times the maximum power supply voltage X(V) output from the discrete variable power supply 5, and the threshold Th 2 is 0.25 times the maximum power supply voltage X (V) output from the discrete variable power supply 5, and the threshold Th 3 is 0.125 times the maximum power supply voltage X (V) output from the discrete variable power supply 5. In addition, when using α (α is an integer equal to or greater than 4) thresholds, the threshold Th α is the (6×α) dB backoff value. α is the 10th of the maximum power supply voltage X (V) output from the discrete variable power supply 5. (-β / 20)×(α-1) It will double.
[0037] In addition, if the power range in which load modulation occurs in the two-input amplifier 4 is β dB, the power supply voltage output from the discrete variable power supply 5 in each operation mode is 10 (-β / 20)Therefore, in the first operation mode, the power supply voltage output from the discrete variable power supply 5 is the maximum power supply voltage, X(V), and in the second operation mode, the power supply voltage output from the discrete variable power supply 5 is X(V)×10 (-β / 20) In the third operation mode, the power supply voltage output from the discrete variable power supply 5 is X(V)×10 (-β / 20)×2 In the fourth operation mode, the power supply voltage output from the discrete variable power supply 5 is X(V)×10 (-β / 20)×3 become. In addition, when α thresholds are used, in the (α+1)th operation mode, the power supply voltage output from the discrete variable power supply 5 is X(V)×10 (-β / 20)×α become.
[0038] When the operation mode of the two-input amplifier 4 is the first operation mode, the discrete variable power supply 5 applies a power supply voltage X(V) to the output side of each of the first amplifier 4a and the second amplifier 4b. When the operation mode of the two-input amplifier 4 is the second operation mode, the discrete variable power supply 5 applies a power supply voltage of 0.5X (V) to the output side of each of the first amplifier 4a and the second amplifier 4b. When the operation mode of the two-input amplifier 4 is the third operation mode, the discrete variable power supply 5 applies a power supply voltage of 0.25X (V) to the output side of each of the first amplifier 4a and the second amplifier 4b. When the operation mode of the two-input amplifier 4 is the fourth operation mode, the discrete variable power supply 5 applies a power supply voltage of 0.125X (V) to the output side of each of the first amplifier 4a and the second amplifier 4b.
[0039] If the operation mode of the two-input amplifier 4 is the first operation mode, when the power supply voltage X (V) is applied, the signal distributor 3 distributes the signal to be amplified into a first input signal and a second input signal in accordance with the amplitude E of the signal to be amplified so as to generate load modulation in which the output impedance of the combiner circuit 4c changes with a change in the amplitude E of the signal to be amplified. When the operating mode of the two-input amplifier 4 is the second operating mode, the signal distributor 3 distributes the signal to be amplified into a first input signal and a second input signal according to the amplitude E of the signal to be amplified so as to generate load modulation in which the output impedance of the combiner circuit 4c changes with changes in the amplitude E of the signal to be amplified when a power supply voltage of 0.5X (V) is applied. When the operating mode of the two-input amplifier 4 is the third operating mode, the signal distributor 3 distributes the signal to be amplified into a first input signal and a second input signal according to the amplitude E of the signal to be amplified so as to generate load modulation in which the output impedance of the combiner circuit 4c changes with changes in the amplitude E of the signal to be amplified when a power supply voltage of 0.25X (V) is applied. When the operating mode of the two-input amplifier 4 is the fourth operating mode, the signal distributor 3 distributes the signal to be amplified into a first input signal and a second input signal according to the amplitude E of the signal to be amplified so as to generate load modulation in which the output impedance of the combiner circuit 4c changes with changes in the amplitude E of the signal to be amplified when a power supply voltage of 0.125X (V) is applied.
[0040] Embodiment 3 In the third embodiment, an amplifying device is described in which a signal distributor 8 changes both the amplitude ratio corresponding to the amplitude E of the signal to be amplified and the phase difference corresponding to the amplitude E of the signal to be amplified depending on the frequency of the signal to be amplified.
[0041] Fig. 6 is a configuration diagram showing an amplifier device according to embodiment 3. In Fig. 6, the same reference numerals as in Fig. 1 indicate the same or corresponding parts, and detailed description thereof will be omitted. A signal to be amplified is applied from an input terminal 1 to a signal distributor 8 . When the signal to be amplified is a digital signal, the signal distributor 8 is realized by, for example, a quadrature modulator. When the signal to be amplified is an analog signal, the signal distributor 8 is realized by, for example, an attenuator or a variable gain amplifier and a phase shifter. The signal distributor 8 distributes the signal to be amplified into a first input signal and a second input signal based on the amplitude E of the signal to be amplified and the comparison result output from the comparator circuit 2. When distributing the signal to be amplified into a first input signal and a second input signal, the signal distributor 8 changes each of the amplitude ratio corresponding to the amplitude of the signal to be amplified and the phase difference corresponding to the amplitude of the signal to be amplified, depending on the frequency of the signal to be amplified. The signal distributor 8 outputs the first input signal to the first amplifier 4 a in the two-input amplifier 4 . The signal distributor 8 outputs the second input signal to the second amplifier 4 b in the two-input amplifier 4 .
[0042] Next, the operation of the amplifying device shown in FIG. 6 will be described. In the amplifying device shown in FIG. 6, if the frequency of the signal to be amplified is f, for example, the first amplifier 4a operates as a carrier amplifier, and the second amplifier 4b operates as a peak amplifier. In the amplifying device shown in FIG. 6, if the frequency of the signal to be amplified is switched to, for example, f / 2, then, for example, the first amplifier 4a operates as a peak amplifier and the second amplifier 4b operates as a carrier amplifier. When the frequency of the signal to be amplified is switched from f to f / 2, there is a change in the amount of back-off of the two-input amplifier 4. In the example of Fig. 7 described later, the amount of back-off of the two-input amplifier 4 is 7 dB.
[0043] If the power range in which load modulation occurs in the input amplifier 4 is β dB, then the threshold value Th 1 ,Th 2 is in an equal relationship with βdB. For example, if β=7dB, the threshold Th 1 is the 7 dB backoff value, and the threshold Th 2 would result in a 14 dB backoff. Therefore, when the back-off amount of the two-input amplifier 4 is 7 dB, the threshold Th 1 is the output power P of a two-input amplifier 4 when the power supply voltage is X(V). OUT is the saturation power P s,XThe amplitude E of the signal to be amplified is set to the amplitude E of the signal to be amplified when the power is 7 dB lower than Threshold Th 2 is the output power P of the 2-input amplifier 4 OUT is the saturation power P s,X The amplitude E of the signal to be amplified is set to the amplitude E of the signal to be amplified when the power is 14 dB lower than the Threshold Th 1 ,Th 2 When expressed as a voltage amplitude and antilogarithm, the threshold value Th 1 ,Th 2 is 10 (-β / 20) Therefore, the threshold value Th 1 is 0.45 times the maximum power supply voltage X (V) output from the discrete variable power supply 5, and the threshold Th 2 is 0.20 (=0.45×0.45) times the maximum power supply voltage X (V) output from the discrete variable power supply 5.
[0044] The comparator circuit 2 receives from the input terminal 1 a signal to be amplified, the signal having a frequency of f / 2. The comparator circuit 2 has a threshold value Th 1 ,Th 2 and the amplitude E of the signal to be amplified. The comparator circuit 2 has a threshold value Th 1 ,Th 2 The comparison result between the amplitude E and the amplitude E is output to the signal distributor 8 and the discrete variable power source 5, respectively. In the amplifier shown in FIG. 6, the amplitude E of the signal to be amplified is equal to or smaller than a threshold Th 1 If it is greater than , the operation mode of the two-input amplifier 4 is determined to be the first operation mode. The amplitude E of the signal to be amplified is equal to the threshold Th 1 and the amplitude E of the signal to be amplified is equal to or less than the threshold Th 2 If it is greater than , the operation mode of the two-input amplifier 4 is determined to be the second operation mode. The amplitude E of the signal to be amplified is equal to the threshold Th 2 If it is equal to or lower, the operation mode of the two-input amplifier 4 is determined to be the third operation mode.
[0045] The discrete variable power supply 5 obtains the comparison result of the comparison circuit 2 . The discrete variable power supply 5 refers to the comparison result of the comparator circuit 2 to recognize the operation mode of the two-input amplifier 4 . When the operation mode of the two-input amplifier 4 is the first operation mode, the discrete variable power supply 5 applies a power supply voltage X(V) to the output side of each of the first amplifier 4a and the second amplifier 4b. X(V) is the maximum power supply voltage output from the discrete variable power supply 5. When the operation mode of the two-input amplifier 4 is the second operation mode, the discrete variable power supply 5 applies a power supply voltage of 0.45X (V) to the output side of each of the first amplifier 4a and the second amplifier 4b. When the operation mode of the two-input amplifier 4 is the third operation mode, the discrete variable power supply 5 applies a power supply voltage of 0.20X (V) to the output side of each of the first amplifier 4a and the second amplifier 4b.
[0046] The signal distributor 8 receives the comparison result of the comparison circuit 2 . The signal distributor 8 refers to the comparison result of the comparator circuit 2 and recognizes the operation mode of the two-input amplifier 4 . If the operation mode of the two-input amplifier 4 is the first operation mode, when the power supply voltage X (V) is applied, the signal distributor 3 distributes the signal to be amplified to a first input signal and a second input signal according to the amplitude E of the signal to be amplified so as to generate load modulation in which the output impedance of the combiner circuit 4c changes with a change in the amplitude E of the signal to be amplified. The total power of the power of the first input signal and the power of the second input signal is equal to the power of the signal to be amplified. In the first operating mode, the output power P OUT is the saturation power P of the 2-input amplifier 4 s,X The power and saturation power P are 7 dB lower than s,X The power between
[0047] If the operation mode of the two-input amplifier 4 is the second operation mode, the signal distributor 3 distributes the signal to be amplified to a first input signal and a second input signal according to the amplitude E of the signal to be amplified so as to generate load modulation in which the output impedance of the combiner circuit 4c changes with a change in the amplitude E of the signal to be amplified when a power supply voltage of 0.45X (V) is applied. The total power of the power of the first input signal and the power of the second input signal is equal to the power of the signal to be amplified. In the second operating mode, the output power P OUT is the saturation power P of the 2-input amplifier 4 s,X The power and saturation power P are 14 dB lower than s,X The power is between 7 dB lower than the
[0048] If the operation mode of the two-input amplifier 4 is the third operation mode, when a power supply voltage of 0.20X (V) is applied, the signal distributor 3 distributes the signal to be amplified to a first input signal and a second input signal according to the amplitude E of the signal to be amplified so as to generate load modulation in which the output impedance of the combiner circuit 4c changes with a change in the amplitude E of the signal to be amplified. The total power of the power of the first input signal and the power of the second input signal is equal to the power of the signal to be amplified. In the third operating mode, the output power P OUT is the saturation power P of the 2-input amplifier 4 s,X The power and saturation power P are 21 dB lower than s,X The power is between 14 dB lower than the
[0049] FIG. 7 is an explanatory diagram showing the amplitude ratio between the first input signal and the second input signal and the phase difference between the first input signal and the second input signal. In FIG. 7, the horizontal axis represents the amplitude E of the signal to be amplified, and the vertical axis represents each of the amplitude ratio and the phase difference. 7, the signal distributor 8 distributes the signal to be amplified to a first input signal and a second input signal such that the amplitude ratio increases as the amplitude E of the signal to be amplified increases. The amplitude ratio is (amplitude of the second input signal / amplitude of the first input signal). 7, the signal divider 8 divides the signal to be amplified into a first input signal and a second input signal so that the phase difference is constant even if the amplitude E of the signal to be amplified changes. However, the phase difference at this time is smaller than the phase difference when the frequency of the signal to be amplified is f. When the frequency of the signal to be amplified is switched from f to f / 2, there is a change in the amount of back-off of the two-input amplifier 4. In the example of Fig. 7, the amount of back-off of the two-input amplifier 4 is 7 dB.
[0050] In the above third embodiment, the amplifier shown in Fig. 6 is configured so that the signal distributor 8 changes the amplitude ratio corresponding to the amplitude of the signal to be amplified and the phase difference corresponding to the amplitude of the signal to be amplified according to the frequency of the signal to be amplified. Therefore, like the amplifier shown in Fig. 1, the amplifier shown in Fig. 6 can widen the amplitude range of the signal to be amplified, in which the output impedance of the combining circuit changes, compared to the amplifier disclosed in Patent Document 1, and can also increase efficiency even if the frequency of the signal to be amplified changes.
[0051] In the amplifying device shown in Fig. 6, a case where the frequency of the signal to be amplified is switched from f to f / 2 is shown. However, this is merely an example, and the frequency of the signal to be amplified may be switched, for example, from f to 2f / 3. In such a case, the back-off amount of the two-input amplifier 4 also changes. In the example of Fig. 8, the back-off amount of the two-input amplifier 4 is 5 dB, and the two-input amplifier 4 operates as an outphasing amplifier.
[0052] If the power range in which load modulation occurs in the input amplifier 4 is β dB, then the threshold value Th 1 ,Th 2 is in an equal relationship with βdB. For example, if β=5dB, the threshold Th 1 is the 5 dB backoff value, and the threshold Th 2 is the 10 dB backoff value. Therefore, when the back-off amount of the two-input amplifier 4 is 5 dB, the threshold Th 1is the output power P of a two-input amplifier 4 when the power supply voltage is X(V). OUT is the saturation power P s,X The amplitude E of the signal to be amplified is set to the amplitude E of the signal to be amplified when the power is 5 dB lower than Threshold Th 2 is the output power P of the 2-input amplifier 4 OUT is the saturation power P s,X The amplitude E of the signal to be amplified is set to the amplitude E of the signal to be amplified when the power is 10 dB lower than the Threshold Th 1 ,Th 2 When expressed as a voltage amplitude and antilogarithm, the threshold value Th 1 ,Th 2 is 10 (-β / 20) Therefore, the threshold value Th 1 is 0.56 times the maximum power supply voltage X (V) output from the discrete variable power supply 5, and the threshold Th 2 is 0.32 (=0.56×0.56) times the maximum power supply voltage X (V) output from the discrete variable power supply 5.
[0053] The discrete variable power supply 5 obtains the comparison result of the comparison circuit 2 . The discrete variable power supply 5 refers to the comparison result of the comparator circuit 2 to recognize the operation mode of the two-input amplifier 4 . When the operation mode of the two-input amplifier 4 is the first operation mode, the discrete variable power supply 5 applies a power supply voltage X(V) to the output side of each of the first amplifier 4a and the second amplifier 4b. When the operation mode of the two-input amplifier 4 is the second operation mode, the discrete variable power supply 5 applies a power supply voltage of 0.56X (V) to the output side of each of the first amplifier 4a and the second amplifier 4b. When the operation mode of the two-input amplifier 4 is the third operation mode, the discrete variable power supply 5 applies a power supply voltage of 0.32X (V) to the output side of each of the first amplifier 4a and the second amplifier 4b.
[0054] The signal distributor 8 receives the comparison result of the comparison circuit 2 . The signal distributor 8 refers to the comparison result of the comparator circuit 2 and recognizes the operation mode of the two-input amplifier 4 . If the operation mode of the two-input amplifier 4 is the first operation mode, when the power supply voltage X (V) is applied, the signal distributor 3 distributes the signal to be amplified to a first input signal and a second input signal according to the amplitude E of the signal to be amplified so as to generate load modulation in which the output impedance of the combiner circuit 4c changes with a change in the amplitude E of the signal to be amplified. The total power of the power of the first input signal and the power of the second input signal is equal to the power of the signal to be amplified. In the first operating mode, the output power P OUT is the saturation power P of the 2-input amplifier 4 s,X The power and saturation power P are 5 dB lower than s,X The power between
[0055] If the operation mode of the two-input amplifier 4 is the second operation mode, the signal distributor 3 distributes the signal to be amplified to a first input signal and a second input signal according to the amplitude E of the signal to be amplified so as to generate load modulation in which the output impedance of the combiner circuit 4c changes with a change in the amplitude E of the signal to be amplified when a power supply voltage of 0.56X (V) is applied. The total power of the power of the first input signal and the power of the second input signal is equal to the power of the signal to be amplified. In the second operating mode, the output power P OUT is the saturation power P of the 2-input amplifier 4 s,X The power and saturation power P are 10 dB lower than s,X The power is between 5 dB less than the
[0056] If the operation mode of the two-input amplifier 4 is the third operation mode, the signal distributor 3 distributes the signal to be amplified to a first input signal and a second input signal according to the amplitude E of the signal to be amplified so as to generate load modulation in which the output impedance of the combiner circuit 4c changes with a change in the amplitude E of the signal to be amplified when a power supply voltage of 0.32X (V) is applied. The total power of the power of the first input signal and the power of the second input signal is equal to the power of the signal to be amplified. In the third operating mode, the output power P OUTis the saturation power P of the 2-input amplifier 4 s,X The power and saturation power P are 15 dB lower than s,X The power is between 10 dB lower than the
[0057] FIG. 8 is an explanatory diagram showing the amplitude ratio between the first input signal and the second input signal and the phase difference between the first input signal and the second input signal. In FIG. 8, the horizontal axis represents the amplitude E of the signal to be amplified, and the vertical axis represents each of the amplitude ratio and the phase difference. As shown in FIG. 8, signal distributor 8 distributes the signal to be amplified into a first input signal and a second input signal so that the amplitude ratio remains constant even if the amplitude E of the signal to be amplified changes. Furthermore, as shown in FIG. 8, the signal distributor 8 distributes the signal to be amplified into a first input signal and a second input signal such that the phase difference becomes smaller as the amplitude E of the signal to be amplified becomes larger. When the frequency of the signal to be amplified is switched from f to 2f / 3, there is a change in the amount of back-off of the two-input amplifier 4. In the example of Fig. 8, the amount of back-off of the two-input amplifier 4 is 5 dB.
[0058] Embodiment 4 In the amplifying devices according to the first to third embodiments, each of the first amplifier 4a and the second amplifier 4b is biased to class B. That is, each of the gate terminal of the first amplifier 4a and the gate terminal of the second amplifier 4b is biased to class B by the gate bias circuit 7. However, each of the first amplifier 4a and the second amplifier 4b is not limited to being biased to class B. For example, the gate bias circuit 7 may switch the gate bias of each of the first amplifier 4a and the second amplifier 4b according to the back-off amount of the two-input amplifier 4. For example, the larger the back-off amount of the two-input amplifier 4, the larger the gate bias circuit 7 applies to the gate terminal of the first amplifier 4a and the gate terminal of the second amplifier 4b.
[0059] By controlling the gate bias by the gate bias circuit 7, it is possible to smooth the respective gains of the first amplifier 4a and the second amplifier 4b, which change depending on the amplitude E of the signal to be amplified. By smoothing the respective gains of the first amplifier 4a and the second amplifier 4b, it is possible to reduce distortion of the composite signal.
[0060] Also, the gate bias circuit 7 may control the operating class of the amplifier by controlling the gate bias in accordance with the load modulation mode of the two-input amplifier 4. The load modulation modes include, for example, a mode in which the two-input amplifier 4 operates as a Doherty amplifier and a mode in which the two-input amplifier 4 operates as an outphasing amplifier. Specifically, the gate bias circuit 7 controls the gate bias such that the control of the gate bias when the two-input amplifier 4 operates as a Doherty amplifier is different from the control of the gate bias when the two-input amplifier 4 operates as an outphasing amplifier. As an example, the gate bias circuit 7 controls the gate bias such that the gate bias when the two-input amplifier 4 operates as an outphasing amplifier is larger than the gate bias when the two-input amplifier 4 operates as a Doherty amplifier. However, this is merely an example, and the gate bias circuit 7 may control the gate bias so that the gate bias when the two-input amplifier 4 operates as an outphasing amplifier is smaller than the gate bias when the two-input amplifier 4 operates as a Doherty amplifier. Also, the gate bias circuit 7 may control the gate bias so that the control of the gate bias when the two-input amplifier 4 operates as a Doherty amplifier is the same as the control of the gate bias when the two-input amplifier 4 operates as an outphasing amplifier.
[0061] Incidentally, when the two-input amplifier 4 performs back-off operation as a Doherty amplifier, the gate bias circuit 7 can increase the gain of the two-input amplifier 4 by setting the gate bias of each of the first amplifier 4a and the second amplifier 4b to a threshold voltage or higher. In addition, when the two-input amplifier 4 performs back-off operation as an outphasing amplifier, the gate bias circuit 7 can increase the gain of the two-input amplifier 4 by setting the gate bias of each of the first amplifier 4a and the second amplifier 4b to a threshold voltage or higher.
[0062] In addition, the present disclosure allows free combination of the respective embodiments, modification of any of the components of each embodiment, or omission of any of the components of each embodiment. [Industrial Applicability]
[0063] The present disclosure is suitable for amplification devices. [Explanation of symbols]
[0064] 1 input terminal, 2 comparison circuit, 3 signal distributor, 4 2 input amplifier, 4a first amplifier, 4b second amplifier, 4c synthesis circuit, 4c-1 first line, 4c-2 second line, 5 discrete variable power supply, 6 output terminal, 7 gate bias circuit, 8 signal distributor.
Claims
1. a signal divider that divides a signal to be amplified into a first input signal and a second input signal in accordance with the amplitude of the signal; a first amplifier for amplifying the first input signal; a second amplifier for amplifying the second input signal; a combining circuit that combines the signal amplified by the first amplifier and the signal amplified by the second amplifier; a discrete variable power supply that switches a power supply voltage to be applied to each of the output sides of the first amplifier and the second amplifier depending on an amplitude range that includes the amplitude of the signal to be amplified; Equipped with The amplitude range includes a plurality of amplitude ranges different from each other, a comparison circuit that compares a threshold value indicating a lower limit value of each amplitude range with the amplitude of the signal to be amplified and outputs a comparison result between each threshold value and the amplitude, The discrete variable power source includes: switching the power supply voltage based on the comparison result output from the comparison circuit; The signal distributor includes: an amplifying device that distributes the signal to be amplified into the first input signal and the second input signal based on the amplitude of the signal to be amplified and a comparison result output from the comparator circuit;
2. The signal distributor includes:
2. The amplifier device according to claim 1, wherein the signal to be amplified is distributed to the first input signal and the second input signal such that an amplitude ratio, which is a ratio between an amplitude of the first input signal and an amplitude of the second input signal, becomes an amplitude ratio corresponding to the amplitude of the signal to be amplified, and a phase difference, which is a difference between a phase of the first input signal and a phase of the second input signal, becomes a phase difference corresponding to the amplitude of the signal to be amplified.
3. The signal distributor includes:
3. The amplifier according to claim 2, wherein an amplitude ratio corresponding to the amplitude of the signal to be amplified and a phase difference corresponding to the amplitude of the signal to be amplified are both changed according to a frequency of the signal to be amplified.
4. 2. The amplifier according to claim 1, further comprising a gate bias circuit for biasing each of said first amplifier and said second amplifier to class B.
5. 2. The amplifier device according to claim 1, further comprising a gate bias circuit that switches the gate bias of the first amplifier and the second amplifier in accordance with a back-off amount of a two-input amplifier including the first amplifier and the second amplifier.
6. 2. The amplifier device according to claim 1, further comprising a gate bias circuit that switches the gate bias of the first amplifier and the second amplifier depending on a load modulation mode of a two-input amplifier including the first amplifier and the second amplifier.
7. The synthesis circuit includes: a first line, one end of which is connected to the output side of the first amplifier; a second line, one end of which is connected to the output side of the second amplifier and the other end of which is connected to the other end of the first line; the first line has an electrical length of 90 degrees at a center frequency of the signal to be amplified, 2. The amplifier according to claim 1, wherein the second line has an electrical length of 180 degrees at a center frequency of the signal to be amplified.
8. the discrete variable power supply comprises an envelope amplifier; The envelope amplifier is 2. The amplifier according to claim 1, wherein a power supply voltage that switches depending on an amplitude range that includes the amplitude of the signal to be amplified is applied to the output side of each of the first amplifier and the second amplifier.