Voltage references

Abstract

A voltage reference circuit portion (200, 300) includes a first current path, a second current path, a current source (204, 304) and a control portion (202, 302, 250, 354, 352). The first current path includes a first p-n junction (218) and an input resistor (216, 316), and the second current path includes a second p-n junction (214). The current source alternately supplies the same current to the first current path and the second current path, and the control portion compares a first voltage across the first current path and a second voltage across the second current path. The control portion adjusts the current supplied to the first and second current paths by the current source until the difference between the first and second voltages is below a predetermined tolerance amount.

Description

[0001] Voltage References

[0002] BACKGROUND OF THE INVENTION

[0003] The present invention relates to generation of a reference voltage such as a bandgap reference voltage.

[0004] A stable reference voltage which remains constant despite fluctuations in temperature is highly desirable within an integrated circuit, especially for use in low power electronic devices. Such circuits are known in the art. One example of such a circuit employs two current sources feeding two differently sized diodes (e.g. two differently sized transistors).

[0005] However, the Applicant has recognised that the reference voltage provided in such an arrangement is highly influenced by any mismatch between the current supplied by the two current sources, for example arising from a mismatch in the size of the transistors in respective sources. It is an object of the present invention to provide an alternative approach.

[0006] SUMMARY OF THE INVENTION

[0007] According to a first aspect of the present invention there is provided a voltage reference circuit portion comprising: a first current path comprising a first p-n junction and an input resistor; a second current path comprising a second p-n junction; a current source arranged to alternately supply the same current to the first current path and the second current path; a control portion arranged to compare a first voltage across the first current path and a second voltage across the second current path; wherein the control portion is arranged to adjust the current supplied to the first and second current paths until a difference between the first and second voltages is below a predetermined tolerance amount.

[0008] According to a second aspect of the present invention there is provided a method of generating a voltage reference using a voltage reference circuit portion comprising: a first current path comprising a first p-n junction and an input resistor; a second current path comprising a second p-n junction; and a current source; the method comprising: the current source alternately supplying the same current to the first current path and to the second current path; comparing a first voltage across the first current path to a second voltage across the second current path; and adjusting the current supplied by the current source until a difference between the first and second voltages is below a predetermined tolerance amount, thereby generating a voltage reference across the input resistor.

[0009] It will therefore be seen by those skilled in the art that in accordance with the invention, a voltage reference may be generated with only a single current source, by switching the current source between different current paths of the voltage reference circuit portion. As there is only one current source, the same current is supplied to both current paths and there is no mismatch between current paths, and thus the voltage reference generated will typically be more stable and reliable compared to voltage reference circuits using more than one current source. Preferably the second current path is not connected to any current source when the current source is connected to the first current path, and the first current path is not connected to any current source when the current source is connected to the second path.

[0010] The current source is alternated between the first and second current paths, such that the same current is alternately supplied to each of the first and second current paths. The input resistor may be connected in series with the first p-n junction. The first and second p-n junctions typically have different dimensions, and thus at a particular current, the voltage difference 21 V between the voltage across the first and second p-n junctions follows the relationship: where N is the ratio of the size differences of the first and second p-n junctions, k is the kT Boltzmann constant, q is the charge of the electron, and T is temperature, such that — is the thermal voltage. As the same current is passed through the first and second current paths, the voltage difference 1 V between the first and second p-n junctions should be equal to the voltage across the input resistor. Therefore, at the particular current where the voltage difference between the first and second p-n junctions is linearly proportional to temperature, the voltage and thus the current across the input resistor should also be linearly proportional to temperature. The first p-n junction may be operated at a lower current density to the second p-n junction, e.g. the first p-n junction may be smaller than the second p-n junction.

[0011] In order to determine the particular desired current to be supplied by the current source to achieve the above-mentioned linear proportionality, the voltages across the first and second current paths are compared. If the current being supplied to the first and second current paths by the current source is such that the above relationship in Eq. 1 applies, the first and second voltages across the first and second current paths will be substantially the same, i.e. to within the predetermined tolerance amount. If the first voltage is not close enough to the second voltage, the current supplied by the current source is adjusted. In a set of preferred embodiments, this process is repeated until the first and second voltages are substantially the same.

[0012] When the first and second voltages are substantially the same, as the same current source supplies current to both the first current path and the second current path, the voltage across the input resistor is advantageously linearly proportional to temperature. Similarly, the current through the input resistor is proportional to temperature. This may be used to generate a voltage reference which is proportional to temperature.

[0013] In some embodiments, the first and second p-n junctions each comprise a differently sized diode arrangement. For example, the first p-n junction may comprise at least two diodes, whereas the second p-n junction may only comprise one diode, where the diodes used for the first and second p-n junctions are identical. This may be implemented using a diode bus, wherein the diode bus comprises a plurality of substantially identical diodes, wherein the first p-n junction comprises two or more diodes of the plurality of diodes; and the second p-n junction comprises one diode of the plurality of diodes. Using differently sized diodes, or different numbers of diodes, for the first and second p-n junctions, provides a voltage difference in the forward voltages of the first and second p-n junctions. For example, by supplying a particular current to the first and second p-n junctions, such that the first and second voltages are substantially the same, the ratio of the saturation currents of the first and second p-n junctions (e.g. diodes) can be made constant. This can generate a voltage proportional to the thermal voltage across the input resistor.

[0014] In other embodiments, the first and second p-n junctions comprise respective bipolar junction transistors. In other embodiments, the first and second p-n junctions comprise respective MOSFETs, e.g. PMOS transistors. The first and second p-n junctions may be the same type of transistor, but with different sizes, e.g. different current densities. For example, by supplying a particular current to the first and second p-n junctions, such that the first and second voltages are the same, the ratio of the collector currents and saturation currents of the first and second p-n junctions (e.g. transistors) may be made constant. This can therefore generate a voltage proportional to temperature across the input resistor.

[0015] In a set of embodiments, the voltage reference circuit portion further comprises an output current path comprising an output resistor, wherein the current source is arranged to supply the particular current to the output current path once the first and second voltages are substantially the same. The voltage across the output resistor may be the voltage reference, e.g. a voltage proportional to or independent of absolute temperature.

[0016] In some embodiments, the current across the output resistor is proportional to the current across the input resistor. Therefore, it will be seen that in some embodiments the current through the output resistor is proportional to absolute temperature, and the output current path may be used to generate a voltage reference proportional to absolute temperature.

[0017] In a set of embodiments, the voltage reference circuit portion comprises a complementary resistor connected in parallel with one or both of the first second portions. This causes the current across the output resistor to be advantageously independent of temperature, as the current across the complementary resistor is inversely proportional to temperature, i.e. complementary to absolute temperature, which can cancel out the temperature dependence of the current across the input resistor which is proportional to temperature.

[0018] In a set of embodiments, a first complementary resistor is connected in parallel with the first current path and a second complementary resistor is connected in parallel with the second current path. Therefore, when the current source is connected to the first current path, current also flows through the first complementary resistor, and when the current source is connected to the second current path, current also flows through the second complementary resistor.

[0019] When the current source is connected to the first current path and the first complementary resistor, the current passing through the first complementary resistor is proportional to the first voltage. When the current source is connected to the second current path and the second complementary resistor, the current passing through the second complementary resistor is proportional to the second voltage. Therefore, when the first and second voltages are substantially the same, the current passing through the first and second complementary resistors is proportional to the voltage across the second p-n junction. A p-n junction has a negative temperature coefficient, and thus the current through the first and second complementary resistors respectively should be inversely proportional to absolute temperature, i.e. complementary to absolute temperature.

[0020] This current may be used to generate a voltage reference which is independent of absolute temperature, by adding the current inversely proportional (i.e. complementary) to absolute temperature through the first or second complementary resistors, to the current proportional to absolute temperature through the input resistor, as the temperature-induced variations in current can cancel out (e.g. by selecting the ratios of the input resistor to the first and / or second complementary resistors such that the temperature contributions to the respective currents cancel out). Therefore, it will be seen in some embodiments that the current through the output resistor is arranged to be proportional to the sum of the current across the input resistor and the current across the first and second complementary resistors. The Applicant has appreciated that a current inversely proportional (i.e. complementary) to absolute temperature may be generated with a single complementary resistor alternated between the first and second current paths. Thus, in some embodiments a shared complementary resistor is arranged to be connected to the first current path when the current source is connected to the first current path and connected to the second current path when the current source is connected to the second current path. The current passing through the complementary resistor is proportional to the first / second voltage (depending on which of the first and second current paths the complementary resistor is connected to) and thus when the first and second voltages are substantially the same, the current passing through the shared complementary resistor is proportional to the voltage across the second p-n junction. As above, the current through the complementary resistor is inversely proportional to absolute temperature. Again, this may be used to generate a voltage reference which is independent of absolute temperature, by adding it to the current proportional to absolute temperature through the input resistor, such that the temperature-induced variations in current cancel out.

[0021] Using a single complementary resistor alternated between the first and second current paths in sync with the current source may avoid resistor mismatch affecting the stability of the voltage reference independent of absolute temperature.

[0022] In the embodiments set out above where the voltage reference circuit portion comprises an output current path comprising an output resistor, the current through the output resistor may be proportional to the sum of a current inversely proportional to absolute temperature (e.g. through the complementary resistor(s)) and a current proportional to absolute temperature (e.g. through the input resistor). Therefore, such a current can be independent of absolute temperature, and hence the voltage across the output current path could be independent of absolute temperature. Such an output current path can therefore advantageously be used as an accurate, temperature stable bandgap voltage reference.

[0023] In some embodiments, the output current path further includes an output capacitor in parallel with the output resistor. The output capacitor can store the output voltage across the output resistor. The voltage stored by the output capacitor can thus be used as the bandgap voltage reference, e.g. to supply a voltage pulse independent of absolute temperature.

[0024] In some embodiments, the control portion comprises a voltage comparator and a current adjustment portion. The voltage comparator may receive the first voltage and the second voltage from the first and second current paths respectively and output a signal indicating whether the first and second voltages are substantially the same, or whether the first voltage is higher than the second voltage or vice versa. The signal can then be provided to the current adjustment portion which acts to control the value of the current output by the current source.

[0025] For example, if the voltage comparator output signal is low (e.g. the voltage across the first current portion is lower than the voltage across the second current portion), then the current adjustment portion may act to increase the output current supplied by the current source, and vice versa. The voltage comparator signal output to the current adjustment portion may be a digital signal, e.g. proportional to the difference between the first and second voltages. The voltage comparator signal may indicate whether the voltage across the first current portion is lower than the voltage across the second portion, or vice versa. The current adjustment portion may act to change the current supplied by current source in accordance with the output signal from the voltage comparator.

[0026] In some embodiments, the voltage reference circuit portion comprises a finite state machine arranged to switch the current source between the current paths. For example, the finite state machine may control a plurality of switches arranged to move the current source between the first current path, second current path, and / or output current path. The finite state machine may include a plurality of finite states, each corresponding to a particular connectivity of the voltage reference circuit. For example, a first state may correspond to the current source being connected to the first current path and the first (or shared) complementary resistor; a second state may correspond to the current source being connected to the second current path and the second (or shared) complementary resistor; and a third state may correspond to the current source being connected to the output current path. In accordance with the invention, the current supplied by the current source is varied until the first and second voltages are substantially the same. The current supplied by the current source may achieve the value at which the first and second voltages to be substantially the same over a predetermined number of iterations, e.g. over a known number of comparisons between the first and second voltages. For example, the finite state machine may act to alternate the current source between the first and second current paths a pre-determined number of times (and hence connect the first and second current paths to the control portion to compare the first and second voltages a pre-determined number of times). After this pre-determined number of iterations, the finite state machine may then connect the current source to the output portion. The predetermined number can therefore be set (e.g. empirically) to ensure that when the output portion is connected to the current source, the first and second voltages are the same to within the predetermined tolerance amount and thus the voltage across the output portion can provide a stable reference voltage.

[0027] The finite state machine may receive the digital output signal from the voltage comparator, e.g. indicating that the voltage across the first current portion is higher, lower or the same as the voltage across the second current portion. The finite state machine may output a digital signal indicating how the current supplied by the current source should be changed, in response to the output signal from the voltage comparator, in order to make the voltages across the first and second current portions the same. For example, if the current supplied by the current source is too low, then the output from the voltage comparator would be low, and the finite state machine outputs a digital signal that the current supplied by the current source should be increased.

[0028] For example, in some embodiments the current source comprises a PMOS transistor. Therefore, the finite state machine may output a digital signal indicating that a voltage applied to the gate of the PMOS transistor should be increased or decreased by a particular amount.

[0029] In some embodiments the current adjustment portion comprises a digital to analogue converter (DAC). The DAC may receive a digital signal output from the voltage comparator indicating that the current supplied by the current source should be raised or lowered, and the DAC may convert this digital signal to an analogue signal, the analogue signal being provided to the current source to alter the current supply.

[0030] For example, the DAC may receive a digital output signal from the finite state machine (indicating that the current supplied by the current source should be raised or lowered and by how much). The DAC can then convert this output signal to an analogue signal, which can be used to alter the current supplied by the current source. For example, in embodiments where the current source comprises a PMOS transistor, the DAC may output an analogue voltage signal to the gate of the PMOS transistor, in order to control the drain current of the PMOS transistor and thus the current supplied by the current source. The DAC may additionally use sigma delta techniques (e.g. the DAC could be a sigma delta DAC) to improve the low frequency performance (e.g. by reducing low frequency noise) of the current supplied by the current source.

[0031] In some embodiments, the current adjustment portion comprises a charge pump. The charge pump may receive the output signal from the voltage comparator indicating that the current supplied by the current source should be raised or lowered. The charge pump may be arranged to deliver a pre-determined quantity of charge to the current source, e.g. at the gate of the PMOS transistor, which raises or lowers the current supplied by the current source in accordance with the output signal from the voltage comparator.

[0032] In some embodiments, the voltage comparator further comprises a chopper arranged to receive the respective inputs of the first and second current paths to the control portion. The chopper is arranged to sample and swap the inputs to the control portion (e.g. the inputs to the voltage comparator), and invert the outputs from the control portion (e.g. the output from the voltage comparator). By swapping and inverting the respective inputs of the first and second current paths to the control portion, the signal itself remains transparent, and may reduce inherent offset bias in the control portion (e.g. in the voltage comparator). For example, the chopper may mix the offset of the control portion (e.g. in the voltage comparator) to a high frequency, and low-pass filter the offset.

[0033] In some embodiments, a first capacitor is connected in parallel with the first current path and a second capacitor is connected in parallel with the second current path. The first capacitor stores the first voltage, while the second capacitor stores the second voltage. When the current source is switched between the first, second and / or output current paths, the first and second capacitors respectively remain connected to the control portion. Therefore, despite the current source being cycled between the first and second current paths and optionally the output current path, the first and second capacitors allow the control portion to compare the first and second voltages, and to set the current supplied by the current source accordingly.

[0034] The first and second capacitors could be arranged to operate in a feedback loop, e.g. an asynchronous feedback loop, to alternate the current source between the current paths. A clock could also be used to alternate the current source between the current paths. The current source may be switched between each of the first, second, and output current paths, in response to the feedback from the voltage comparator. For example, the voltage comparator may compare the discharge of the voltages from the first, second, and output capacitors, and switch the current source when the respective capacitor has finished discharging.

[0035] This may allow the current source to self-time alternating between the current paths, and thus mitigate the need for an external clock, e.g. within the finite state machine, to regulate the switching between current paths.

[0036] In some embodiments, the first current path is connected to the current source via a first input switch, and the first capacitor is connected to the first current path via a first capacitor switch; wherein the first input and capacitor switches are arranged to open and close together, and the second current path is connected to the current source via a second input switch and the second capacitor is connected to the second current path via a second capacitor switch; wherein the second input and capacitor switches are arranged to open and close together. The skilled person will appreciate that when switches open or close together this could be at precisely the same instant but that in practice there may be a short lag which has no significant effect. This may allow for the current source to be alternated between the first and second current paths, and the first and second capacitors, at least substantially in sync such that when the current source is connected to the first current path, the first capacitor charges to the first voltage and when the current source is connected to the second current path, the second capacitor charges to the second voltage, but when the respective switches are opened, the capacitors remain connected to the control portion, e.g. to the voltage comparator. The first and second input switches and the first and second capacitor switches may be controlled by the finite state machine.

[0037] In a set of embodiments, the output current path is connected to the current source via an output switch. The output switch may be controlled by the finite state machine, such that the output switch is closed when the first and second input switches are both open, so that the output current path only receives the current from the current source when the first and second current paths are not connected to the current source. This separates the output current portion from the first and second current paths, which prevents the first and second capacitors discharging through the output current path.

[0038] In a set of embodiments, a third input switch is connected in parallel with the input resistor. This may allow for the current from the current source to bypass the input resistor and flow straight to the first and / or second p-n junction. This may be useful where the first p-n junction and second p-n junctions are formed using a subset of identical diodes from a diode bus. In such an arrangement, a diode bus can be used for both the first p-n junction and second p-n junction (but with a different number of diodes in the diode bus used for each of the first and second p-n junctions), but the input resistor is only used when the first p-n junction is connected to the current source. This may reduce the complexity of the circuit and number of p-n junctions with different current densities required.

[0039] Features of any aspect or embodiment described herein may, wherever appropriate, be applied to any other aspect or embodiment described herein. Where reference is made to different embodiments or sets of embodiments, it should be understood that these are not necessarily distinct but may overlap.

[0040] BRIEF DESCRIPTION OF THE DRAWINGS

[0041] One or more non-limiting examples will now be described, by way of example only, and with reference to the accompanying figures in which:

[0042] Figure 1 is a schematic diagram of a voltage reference circuit portion according to the prior art;

[0043] Figure 2 is a schematic diagram of a voltage reference circuit portion according to a first embodiment of the invention; Figure 3 is a schematic diagram of a voltage reference circuit portion according to a second embodiment of the invention.

[0044] DETAILED DESCRIPTION

[0045] Figure 1 shows a typical prior art bandgap voltage reference circuit 100 which uses two current sources.

[0046] Three identical PMOS transistors 104, 106, 108 are connected to a common node 105, thereby forming a current mirror. The first transistor 104 is connected to a first resistor 112 and a first diode 114 in parallel, whilst the second transistor 106 is connected to a second resistor 120, in parallel with a second diode 118 that is in series with a third resistor 116. An operational amplifier 102 is connected to the respective drains of the first and second transistors 104, 106, and is arranged to control the voltages at the drains of the first and second transistors 104, 106 to be the same, by controlling the current supplied to the gates of the three PMOS transistors 104, 106, 108 to be an optimum current via a feedback loop.

[0047] The first and second diodes 114, 118 have different dimensions, such that at the optimum current, the difference in the voltages across the first and second diodes 114, 118 is proportional to temperature. Therefore, at this optimum current, a first current I2a across the third resistor 116 is proportional to temperature, as the voltage across the third resistor 116 is equal to the difference in voltage between the first and second diodes 114, 118. The second resistor 120 is in parallel with the second diode 118, and therefore a second current I2b across the second resistor 120 is inversely proportional to temperature.

[0048] The current mirror formed by the three PMOS transistors 104, 106, 108 mirrors the first and second currents I2a, I2b across to the drain current at the third transistor 108. The third current I3 at the drain of the third transistor 108 is the sum of the first and second currents I2a, I2b. At pre-determined values of the second and third resistors 120, 116, the temperature contributions of the first and second currents I2a, I2b cancel out. Therefore, the third current I3 at the drain of the third transistor 106 is independent of temperature at the optimum current supplied by the operation amplifier 102. This can be used to generate a bandgap voltage reference. Figure 2 is a schematic diagram of a voltage reference circuit portion 200 embodying the invention. A current source 204, in the form of a PMOS transistor whose source terminal is connected to a positive voltage rail, has its drain terminal connected via a first input switch 240 to a first current path including a first diode 218 and an input resistor 216 arranged in series. The first diode 218 and input resistor 216 are connected in parallel with a first complementary resistor 220. A first capacitor 232 is arranged in parallel with the first diode 218 and the input resistor 216, and is connected to the current source 204 via a first capacitor switch 242. The first input switch and the first capacitor switch 240, 242 are arranged to open and close at the same time, as controlled by a first signal Qi. This arrangement means that the first capacitor 232 stores a first voltage Vi across the first diode 218 and the input resistor 216.

[0049] The current source transistor 204 is also connected via a second input switch 236 to a second current path including a second diode 214. The second diode 214 is arranged in parallel with a second complementary resistor 212, and via a second capacitor switch 238, is connected to a second capacitor 230 in parallel with the second diode 214. The second diode 214 is larger than the first diode 218. In practice this is achieved using a single diode as the first diode 218, whilst the second diode 214 is made up from seven such diodes, such that the size ratio of the first diode 218 to the second diode 214 is 1 :7. The second input switch and second capacitor switch 236, 238 are arranged to open and close at the same time, as controlled by a second signal 02. The second capacitor 230 stores a second voltage V2 across the second diode 214.

[0050] The current source transistor 204 is also connected via a first output switch 244 to an output current path including an output resistor 222. An output capacitor 234 is connected in parallel with the output resistor 222 via a second output switch 246. The first and second output switches are arranged to open and close at the same time, as controlled by a third signal 03. The output capacitor 234 stores an output voltage VBGAP across the output resistor 222.

[0051] A voltage comparator 202 includes a chopper 248 connected to the first and second capacitors 232, 230, and compares the first and second voltages Vi, V2.The chopper 248 periodically samples and swaps the inputs to the voltage comparator 202 and inverts the outputs from the voltage comparator 202, such that the swapping and inversion of the signal itself is transparent, whilst the offset of the voltage comparator 202 will be mixed to a high frequency, and low-pass filtered to reduce inherent offset bias in the voltage comparator 202. The voltage comparator 202 outputs a digital signal indicating whether the first voltage Vi is higher, lower, or the same as the second voltage V2.

[0052] The voltage comparator 202 is connected to a finite state machine 270 by a connection 249. The finite state machine 270 receives the digital output from the voltage comparator 202, and outputs a digital signal indicating a voltage to be applied at the gate of the current source transistor 204 in order to change the current supplied by the current source transistor 204. The finite state machine 270 is connected to a digital-to-analogue converter (DAC) 250, to provide thereto an input digital signal indicating the voltage to be applied at the current source transistor 204 in order to change the current supplied. The DAC 250 converts the digital signal from the voltage comparator 202 to an analogue signal, which it provides to the gate of the current source transistor 204, in order to control the current it supplies.

[0053] The finite state machine 270 operates the switches 236, 238, 240, 242, 244, 246, by issuing the first, second, and third signals cu, 02, 03.

[0054] In operation the finite state machine is alternately opens the first input and capacitor switches 204, 242 and the second input and capacitor switches 236, 238 to alternately connect the first and second output current paths to the current source 204.

[0055] As the first and second diodes 218, 214, have different current densities, i.e. different sizes as set out above, whilst the first and second complementary resistors have the same resistance and the first and second capacitors have the same capacitance, the voltage across the input resistor 216 is equal to the difference in voltage Z1 V across the first and second diodes 218, 214.

[0056] In order to compare the first and second voltages Vi, V2, the first and second input switches 240, 236 and first and second capacitor switches 242, 238 are opened, and the first and second output switches 244, 246 are closed. This allows the voltages Vi, V2 stored on the first and second capacitors 232, 230 to be compared by the voltage comparator 202.

[0057] The voltage comparator 202 compares the first and second voltages Vi, V2, and outputs a corresponding digital signal whose value is increased or decreased from a previous value dependent on the sign and magnitude of the difference in voltage to the finite state machine 270. The finite state machine 270 in turn outputs a digital signal to the DAC 250 indicative of the voltage to be applied to the gate of the current source transistor 204. The DAC 250 then outputs an analogue voltage to the gate of the current source transistor 204. For example, if the first voltage Vi is larger than the second voltage V2, the finite state machine 270 will decrease the value of the digital signal with a magnitude proportional to the difference in voltages. This process iterates until the first and second voltages Vi, V2 are substantially equal. The number of iterations needed for the first and second voltages Vi, V2 to become substantially equal may be pre-determined empirically, e.g. it may be found to take five iterations for the voltages to become substantially equal, e.g. within a pre-determined tolerance amount.

[0058] At this particular current supplied by the current source transistor 204 to the first and second current paths, the voltage difference 21 V follows the relationship: kT A7 = — InN

[0059] 9 where N is the ratio of the size differences of the first and second diodes 218, 214, k is the Boltzmann constant, q is the charge of an electron, and T is temperature, and thus kT

[0060] — is the thermal voltage. Therefore, at this particular value of the current, the voltage and thus current across the input resistor 216 is proportional to absolute temperature.

[0061] At this particular current value, the first and second voltages Vi, V2 stored by the first and second capacitors 232, 230 respectively are equal.

[0062] The current across the first and second complementary resistors 220, 212 is inversely proportional to absolute temperature, as they are in parallel with the first and second diodes 218, 214 respectively, and thus follow the same current characteristics as the diodes. Therefore, when the current source transistor 204 supplies the particular current value at which the current across the input resistor 216 is proportional to absolute temperature, the current across the output resistor 222 is independent of absolute temperature, by summing the currents which are directly and inversely proportional to absolute temperature across the input and complementary resistors respectively.

[0063] Once the stable current value has been reached, the finite state machine 270 closes the output switches 244, 246 and opens the other switches, 236, 238, 240, 242 so that the current is caused to flow through the output resistor 222. This provides the output voltage VBGAP across the output resistor 222 which is stored by the output capacitor 234 is independent of absolute temperature. The output voltage VBGAP is provided to another portion of the chip in order to supply a reference voltage which is independent of absolute temperature.

[0064] Thereafter the output switches 244, 246 can be opened so that the output capacitor 234 continues to provide the output voltage BGAP without being drained by the output resistor 222. The operation set out above can then be repeated to refresh the values on all of the capacitors as they drain and / or t account for changes in temperature.

[0065] Figure 3 shows a schematic diagram of a voltage reference circuit portion 300 in accordance with a second embodiment of the invention. This is an alternative arrangement to the voltage reference circuit portion 200 described above with reference to Figure 2.

[0066] In this embodiment the current source PMOS transistor 304, is connected to a shared complementary resistor 320 via a complementary switch 366. The shared complementary resistor 320 is connected in parallel with a first capacitor 330 via a first capacitor switch 356, and a second capacitor 332 via a second capacitor switch 358. Also connected in parallel with the first and second capacitors 330, 332 and the shared complementary resistor 320 is an input resistor 316 in series with a diode bus 314.

[0067] The diode bus 314 is made up of a bank of seven identical diodes connected in parallel with one another (not shown). It will be appreciated by the skilled person that the number of diodes in the bank can be selected according to the particular design requirements. The input resistor 316 is connected to the diode bus 314 via a bus switch 368, which can connect the input resistor 316 to either the single diode or the bank of seven as required. Therefore, the bus switch 368 is used to connect a different number of diodes to the input resistor 316. The bus switch 368 is also controlled by the finite state machine 370, where a control signal <7:0> issued by the finite state machine indicates diodes are to be connected. For example, in the arrangement shown in Figure 3, the bus switch 368 is arranged to connect a single diode within the diode bus 314 to the input resistor 316 when the first capacitor and input switches 356, 360 are closed, and the bus switch is arranged to connect seven diodes within the diode bus 314 to the input resistor 316 when the second capacitor switch 358 is closed.

[0068] An input switch 360 is connected in parallel with the input resistor 316, arranged such that when the input switch 360 is closed, current from the current source transistor 304 is able to bypass the input resistor 316 and flow straight to the diode bus 314. The first capacitor switch 356 and the input switch 360 are arranged to open and close at the same time, as controlled by a first signal Pi. The second capacitor switch 358 is controlled by a second signal P2, wherein the first and second capacitor switches 356, 358 are not open at the same time.

[0069] The current source transistor 304 is connected via a first output switch 362 to an output current path, where the first output switch 362 is arranged to be open when the complementary switch 366 is closed, and vice versa, as controlled by a third signal P3. The second output current path includes an output resistor 322, and an output capacitor 334 connected in parallel with the output resistor 322. A second output switch 364 is arranged between the output resistor 322 and the output capacitor 334, which is arranged to open and close at the same time as the first output switch 362.

[0070] The first, second, and third signals Pi, P2, P3 are issued by a finite state machine 370, such that the switches can be independently opened and closed to control the flow of current from the current source transistor 304. The finite state machine 370 generates the first, second, and third signals Pi, P2, P3 in an analogous manner to that set out above in relation to the first embodiment.

[0071] The single diode in the diode bus 314 and the input resistor 316 form a first current path when the input and first capacitor switches 360, 356, and the shared complementary switch 366 are closed (and the bus switch 368 is set accordingly), i.e. during the first control signal Pi. This is analogous to the first current path described with reference to Figure 2.

[0072] The seven diodes in the diode bus 314 form a second current path when the second capacitor switch 358 and the shared complementary switch 366 are closed (and the bus switch 368 is set accordingly), i.e. during the second control signal P2. This is analogous to the second current path described with reference to Figure 2.

[0073] The current source transistor 304 alternately connected to the first current path and the second current path by cycling through the first and second third signals Pi, P2 respectively before being provided to the output resistor 322 once stabilised. Therefore, the voltage reference circuit portion 300 enables the same process to be performed as by the voltage reference circuit portion 200 described with reference to Figure 2, but with only one complementary resistor (the shared complementary resistor 320). This obviates the problem of resistor mismatch when generating the current complementary to absolute temperature.

[0074] The voltage comparator 302 is connected to the finite state machine 370 by a connection 349. The finite state machine 370 receives the digital output from the voltage comparator 302, and outputs a digital signal indicating a voltage to be applied at the gate of the current source transistor 304 in order to change the current supplied by the current source transistor 304. In contrast with the embodiment described with reference to Figure 2, instead of using a digital-to-analogue converter (DAC), the finite state machine 370 outputs a digital signal dependent on the difference between the first and second voltages Vi, V2 to a logic circuit portion 354. The logic circuit portion 354 is connected to a charge pump 352, and converts the digital signal output by the finite state machine 370 to an analogue signal input to the charge pump 352. The charge pump 352 outputs an analogue voltage to the gate of the current source transistor 304, which varies the current supplied by the second current source transistor 304 in response to the difference between the first and second voltages Vi, V2. The logic circuit portion 354 indicates whether the charge pump 352 should inject or remove charge from the gate of the current source transistor 304, or whether the charge pump should act to maintain the voltage at the gate of the current source transistor 304. The skilled person will appreciate that a DAC or charge pump may be used with either of the embodiments shown in Figures 2 or 3. It will be appreciated by those skilled in the art that the invention has been illustrated by describing one or more specific embodiments thereof, but is not limited to these embodiments; many variations and modifications are possible, within the scope of the accompanying claims.

Claims

CLAIMS1. A voltage reference circuit portion, comprising: a first current path comprising a first p-n junction and an input resistor; a second current path comprising a second p-n junction; a current source arranged to alternately supply the same current to the first current path and the second current path; a control portion arranged to compare a first voltage across the first current path and a second voltage across the second current path; wherein the control portion is arranged to adjust the current supplied to the first and second current paths until a difference between the first and second voltages is below a predetermined tolerance amount.

2. The voltage reference circuit portion as claimed in any preceding claim, comprising an output current path comprising an output resistor; wherein the current source is further arranged to supply the current to the output current path.

3. The voltage reference circuit portion as claimed in claim 1 or 2, comprising a first complementary resistor connected in parallel with the first current path, and a second complementary resistor connected in parallel with the second current path.

4. The voltage reference circuit portion as claimed in claim 1 or 2, comprising a shared complementary resistor connected selectively in parallel with either the first current path or the second current path.

5. The voltage reference circuit portion and claimed in claim 4, wherein the shared complementary resistor is arranged to be connected in parallel with the first current path when the current source is connected to the first current path, and in parallel with the second current path when the current source is connected to the second current path.

6. The voltage reference circuit portion as claimed in any preceding claim, comprising a finite state machine arranged to alternate the current source between the first and second current paths.

7. The voltage reference circuit portion as claimed in any preceding claim, wherein the control portion comprises a voltage comparator and a current adjustment portion.

8. The voltage reference circuit portion as claimed in claim 7, wherein the current adjustment portion comprises a digital to analogue converter.

9. The voltage reference circuit portion as claimed in claim 7, wherein the current adjustment portion comprises a charge pump.

10. The voltage reference circuit portion as claimed in any preceding claim, comprising a first capacitor connected in parallel with the first current path and a second capacitor connected in parallel with the second current path.

11. The voltage reference circuit portion as claimed in claim 10, wherein the first current path is connected to the current source via a first switch, and wherein the first capacitor is connected to the first current path via a second switch; wherein the first and second switches are arranged to open and close together; and wherein the second current path is connected to the current source via a third switch, and the second capacitor is connected to the second current path via a fourth switch; wherein the third and fourth switches are arranged to open and close together.

12. The voltage reference circuit portion as claimed in any preceding claim, further comprising a chopper arranged to sample and swap the first and second voltages prior to comparison by the control portion; wherein the voltage reference circuit portion is further arranged to invert the output from the control portion.

13. The voltage reference circuit portion as claimed in any preceding claim, comprising a diode bus, wherein the diode bus comprises a plurality of substantially identical diodes; wherein first p-n junction comprises at least two diodes of the plurality of diodes;wherein the second p-n junction comprises at least one diode the plurality of diodes.

14. The voltage reference circuit portion as claimed in any preceding claim, wherein the second current path is not connected to any current source when the current source is connected to the first current path, and the first current path is not connected to any current source when the current source is connected to the second path.

15. A method of generating a voltage reference using a voltage reference circuit portion comprising: a first current path comprising a first p-n junction and an input resistor; a second current path comprising a second p-n junction; and a current source; the method comprising: the current source alternately supplying the same current to the first current path and to the second current path; comparing a first voltage across the first current path to a second voltage across the second current path; and adjusting the current supplied by the current source until a difference between the first and second voltages is below a predetermined tolerance amount, thereby generating a voltage reference across the input resistor.

16. The method of generating a voltage reference as claimed in claim 15, comprising: connecting the current source to the first current path, the second current path not being connected to any current source; and connecting the current source to the second current path, the first current path not being connected to any current source.

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