Memory allocation method and computing device

Abstract

The embodiments of the present application disclose a memory allocation method and a computing device, relating to the technical field of computers. A management unit determines address information of a target memory space on the basis of a first memory allocation request sent by a first computing device, and then separately sends the address information to the first computing device and a second computing device, so that a first process of the first computing device and a second process of the second computing device can access the target memory space using a same virtual address. According to the embodiments of the present application, the management unit unifies the virtual address of the target memory space in a CXL memory space for different computing devices, thereby simplifying the access process for the target memory space and improving the cooperation efficiency between processes of different computing devices.

Description

Memory allocation method and computing device

[0001] This application claims priority to Chinese Patent Application No. 202410608332.1, filed May 14, 2024, the contents of which are incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] Embodiments of the present application relate to the field of computer technology, and in particular to a memory allocation method and a computing device. BACKGROUND

[0003] With the development of the Internet, the interaction and cooperation between different applications become more and more frequent, but not all applications are deployed on the same server, in fact, there are a large number of applications deployed on different servers, the applications deployed on different servers are also called cross-node server applications, and these cross-node server applications cannot directly access the same memory space when cooperating.

[0004] Currently, if the cross-node server applications want to access the data in the same memory space, the data needs to be transmitted from the server storing the data to another server that needs to access the data through the network, so as to indirectly achieve the effect of accessing the data in the same memory space, and if the application modifies the data, the modified data also needs to be returned through the network, which obviously reduces the cooperation efficiency between the cross-node server applications. SUMMARY

[0005] Embodiments of the present application provide a memory allocation method and a computing device, which can determine the address information of the target memory space according to the memory allocation request sent by the computing device, unify the virtual address of the target memory space, so that different computing devices do not need to transfer the address offset when accessing the target memory space, and further do not need to calculate the address of the target data, but directly access according to the virtual address of the target data, which simplifies the access process of the target memory space, improves the convenience of access, and further improves the cooperation efficiency between the computing devices.

[0006] In a first aspect, an embodiment of the present application provides a memory allocation method applied to a management unit, the management unit being configured to manage a compute express link (CXL) memory space, and the method comprising: receiving a first memory allocation request sent by a first computing device, the first memory allocation request being configured to request the management unit to allocate a target memory space, the target memory space being a CXL memory space shared by the first computing device and a second computing device; determining, by the management unit, address information of the target memory space according to the first memory allocation request, the address information being configured to indicate a position of the target memory space in the CXL memory space, wherein the address information comprises a physical address and a virtual address corresponding to the physical address, and the virtual address is generated by the management unit based on the physical address; sending, by the management unit, the address information to the first computing device; and sending, by the management unit, the address information to the second computing device.

[0007] It can be understood that the management unit determines the address information of the target memory space according to the first memory allocation request of the first computing device, especially the virtual address, which realizes the unification of the virtual addresses of the same shared memory space for different computing devices, simplifies the process of the computing devices accessing the shared memory space, and improves the cooperation efficiency.

[0008] In a possible implementation, the management unit sends the address information to the second computing device, comprising: receiving, by the management unit, a second memory allocation request sent by the second computing device, the second memory allocation request being configured to request the management unit to allocate the target memory space to the first computing device and the second computing device; and sending, by the management unit, the address information to the second computing device according to the second memory allocation request.

[0009] It can be understood that the management unit sends the address information to the second computing device after determining that the second memory allocation request is received, which can effectively avoid the management unit from sending the address information to the second computing device in an unreceivable state, and improve the accuracy of the timing of sending the address information. Moreover, the management unit sends the corresponding address information according to the second memory allocation request, which can improve the accuracy of allocating the target memory space.

[0010] In a possible implementation, the management unit determines the address information of the target memory space according to the first memory allocation request, comprising: determining the target memory space from the unallocated CXL memory space according to capacity information in the first memory allocation request; obtaining a physical address of the target memory space; and generating a virtual address corresponding to the target memory space based on the physical address of the target memory space.

[0011] It can be understood that the management unit determines the target memory space according to the capacity information in the first memory allocation request, which can improve the accuracy of allocating the CXL memory space, avoid waste caused by allocating too large memory space, and avoid data overflow caused by allocating too small memory space. In addition, the management unit generates the corresponding virtual address based on the physical address of the target memory space, solves the problem that the same target memory space has multiple different virtual addresses corresponding to the physical address, and improves the convenience and efficiency of accessing the target memory space.

[0012] In a possible implementation, after the management unit determines the address information of the target memory space according to the first memory allocation request, the method further includes: saving the device identifier of the first computing device, the device identifier of the second computing device, and the address information of the target memory space into a preset shared memory virtual address to physical address (SMV2P) mapping table; and sending the address information to the second computing device, including: if a second memory allocation request sent by the second computing device is received, querying the SMV2P mapping table according to the device identifier or the virtual address in the second memory allocation request to obtain the address information of the target memory space corresponding to the device identifier or the virtual address; and sending the address information to the second computing device. It can be understood that the management unit saves the device identifier of the first computing device, the device identifier of the second computing device, and the address information of the target memory space into the SMV2P mapping table, which helps the management unit to manage the target memory space according to the SMV2P mapping table. In addition, the management unit determines the address information of the target memory space according to the device identifier or the virtual address in the memory allocation request, which improves the accuracy and efficiency of allocating the target memory space, and enables different computing devices to access the same target memory space using the same virtual address, simplifies the access process, and improves the collaboration efficiency of the computing devices.

[0013] In a possible implementation, the SMV2P mapping table includes state messages indicating whether the first computing device and the second computing device each currently perform read-write operations on data in the target memory space. After the address information is sent to the second computing device, the method further includes: modifying the state information from a state indicating that the second computing device does not perform read-write operations on data in the target memory space to a state indicating that the second computing device has performed read-write operations on data in the target memory space.

[0014] It can be understood that the management unit modifies the correspondence after sending the address information to the second computing device, which can improve the accuracy of the correspondence, and further improve the accuracy of the management unit in managing the target memory space according to the correspondence.

[0015] In a possible implementation, the method further includes: determining, by the management unit, a usage state of the target memory space according to the state information; and deleting, by the management unit, the address information and the device identifier of the target memory space in the SMV2P mapping table if the target memory space is in an unused state.

[0016] It can be understood that the management unit deletes the address information and the device identifier of the target memory space recorded in the SMV2P mapping table if it is determined that the target memory space is not used. In this way, the management unit cannot query the relevant information of the target memory space from the SMV2P mapping table when receiving a new memory allocation request, and the target memory space can be allocated to other computing devices again, thereby improving the utilization rate of the CXL memory space.

[0017] In a possible implementation, the address information of the target memory space includes a capacity of the target memory space, a physical address of the target memory space, and a virtual address of the target memory space.

[0018] It can be understood that the management unit records the capacity of the target memory space, the physical address of the target memory space, or the virtual address of the target memory space, thereby improving the accuracy and efficiency of the management unit in issuing the address information of the target memory space, and improving the cooperation efficiency between the computing devices after the management unit issues the address information to the computing devices.

[0019] In a second aspect, an embodiment of the present application provides a memory allocation method applied to a first computing device, the method including: sending a first memory allocation request to a management unit, the management unit being configured to manage a computing express link (CXL) memory space, the first memory allocation request being configured to request the management unit to allocate a target memory space, the target memory space being a CXL memory space shared by the first computing device and a second computing device; receiving address information, the address information being determined by the management unit according to the first memory allocation request, the address information including a physical address and a virtual address corresponding to the physical address, the virtual address being generated by the management unit based on the physical address; and performing data read / write operations on target data in the target memory space according to the address information, the target data being data for cooperative operation of the first computing device and the second computing device.

[0020] It can be understood that the first computing device performs data read / write operations on the target data in the target memory space according to the received address information, thereby avoiding the need for the computing device to calculate the virtual address of the target data through the offset of the virtual address before reading and writing the target data, improving the efficiency of the first computing device in reading and writing the target data in the target memory space, and thereby improving the cooperation efficiency between different computing devices.

[0021] In a possible implementation, the computing device performs a data read / write operation on the target data in the target memory space according to the address information, including: the first computing device determines a virtual address of the target data according to a virtual address of the target memory space; and the first computing device performs a data read / write operation on the target data according to the virtual address of the target data.

[0022] It can be understood that the first computing device can directly read or write the target data according to the virtual address of the target data, which simplifies the process of reading and writing the target data in the CXL memory space and improves the cooperation efficiency.

[0023] In a possible implementation, the target data includes a variable of a pointer type; and the variable of the pointer type is used to indicate that the first computing device or the second computing device accesses data pointed by the variable.

[0024] It can be understood that the first or second computing device can access the data pointed by the target data of the pointer type, which simplifies the access process of the target data of the pointer type in the target memory space and improves the convenience of cooperation of different computing devices.

[0025] In a third aspect, an embodiment of the present application provides a memory allocation apparatus, which is used to execute any one of the memory allocation methods provided in the first aspect.

[0026] In a possible implementation, the memory allocation apparatus can be divided into functional modules according to the method provided in the first aspect. For example, each functional module can be divided according to each function, or two or more functions can be integrated in one processing module. For example, the memory allocation apparatus can be divided into a receiving module, a determining module, a sending module, and the like according to functions. The possible technical solutions and beneficial effects of each functional module described above can be referred to the technical solutions provided in the first aspect or the corresponding possible implementation of the first aspect, which will not be described here.

[0027] In a fourth aspect, an embodiment of the present application provides a computing device, which includes a processor and a memory, the processor is coupled with the memory; the memory is used to store computer instructions, the computer instructions are loaded and executed by the processor to make the computing device implement the memory allocation method described in the above aspects.

[0028] In a fifth aspect, an embodiment of the present application provides a computing device cluster, the computing device cluster comprising at least one computing device, each computing device comprising a processor and a memory, the processor coupled to the memory; the processor of the at least one computing device is configured to execute computer instructions stored in the memory of the at least one computing device, so that the computing device cluster performs the memory allocation method provided in various optional implementation manners of the first aspect.

[0029] In a sixth aspect, an embodiment of the present application provides a computer readable storage medium, the computer readable storage medium storing at least one computer program instruction, the computer program instruction being loaded and executed by a processor to implement the memory allocation method according to the above aspects.

[0030] In a seventh aspect, an embodiment of the present application provides a computer program product, the computer program product comprising computer instructions stored in a computer readable storage medium. A processor of a computing device reads the computer instructions from the computer readable storage medium, and the processor executes the computer instructions, so that the computing device performs the memory allocation method provided in various optional implementation manners of the first aspect.

[0031] The detailed description of the third aspect to the seventh aspect and various implementation manners thereof in the embodiments of the present application can refer to the detailed description in the first aspect and various implementation manners thereof; and the beneficial effects of the third aspect to the seventh aspect and various implementation manners thereof can refer to the beneficial effect analysis in the first aspect and various implementation manners thereof, which will not be described herein again.

[0032] These and other aspects of the embodiments of the present application will become more apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0033] FIG. 1 is a schematic diagram of an application scenario according to an embodiment of the present application;

[0034] FIG. 2 is a schematic diagram of a shared memory access process in a related art according to an embodiment of the present application;

[0035] FIG. 3 is a structural schematic diagram of a computing system according to an embodiment of the present application;

[0036] FIG. 4 is a structural schematic diagram of a computing system according to an embodiment of the present application;

[0037] FIG. 5 is a flowchart of a memory allocation method according to an embodiment of the present application;

[0038] FIG. 6 is a schematic diagram of a computing device according to an embodiment of the present application;

[0039] FIG. 7 is a flowchart of another memory allocation method according to an embodiment of the present application;

[0040] FIG. 8 is a specific implementation flowchart of memory allocation according to an embodiment of the present application;

[0041] FIG. 9 is another specific implementation flowchart of memory allocation according to an embodiment of the present application;

[0042] FIG. 10 is a structural schematic diagram of a memory allocation apparatus according to an embodiment of the present application;

[0043] FIG. 11 is another structural schematic diagram of a memory allocation apparatus according to an embodiment of the present application. DETAILED DESCRIPTION

[0044] To make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the embodiments of the present application will be further described in detail below with reference to the drawings.

[0045] In the present document, "a plurality of" means two or more. "And / or" describes the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B can mean that A exists alone, A and B exist together, and B exists alone. The character " / " generally represents an "or" relationship between the associated objects before and after it.

[0046] In addition, in the description of the embodiments of the present application, "a plurality of" means two or more, unless otherwise specified. "At least one of" or the like means any combination of the items, including a single item or a combination of multiple items. For example, at least one of a, b, or c can mean a, b, c, a-b, a-c, b-c, or a-b-c, where a, b, and c can be a single item or multiple items.

[0047] In addition, in order to clearly describe the technical solutions of the embodiments of the present application, in the embodiments of the present application, "first", "second", and the like are used to distinguish the same items or similar items with basically the same functions and effects. Those skilled in the art can understand that "first", "second", and the like do not limit the quantity and execution order, and "first", "second", and the like do not necessarily mean different. At the same time, in the embodiments of the present application, "exemplary" or "for example" is used to represent an example, illustration or description. Any embodiment or design scheme described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as more preferred or more advantageous than other embodiments or design schemes. Rather, "exemplary" or "for example" is used to present the relevant concept in a specific manner, for understanding.

[0048] First, the application scenarios of the embodiments of the present application are exemplarily introduced.

[0049] With the development of computer technology, large amounts of data are generated, and more and more computing devices need to work together to process complex data or tasks. Different computing devices can share the same memory space to avoid using relatively poor disk storage and achieve better collaboration. However, in the traditional technology, two independent computing devices cannot access the same memory space. When the applications on the independent computing devices, such as cross-node server applications, need to access data in the same memory space, the target data needs to be transmitted to the target computing device through a network transmission method, and the target data can be read and written by the target computing device. If the target computing device modifies the data, the modified data needs to be transmitted back to realize data synchronization and collaboration.

[0050] For example, computing device A and computing device B need to work together. When computing device B needs to modify target data A in the same memory space of a server, target data A needs to be transmitted from the server to computing device B. After computing device B modifies the data, the modified target data A is transmitted back to the server to update the data. When computing device A needs to modify target data A, the above transmission process needs to be performed.

[0051] Obviously, this method will cause the same data to be copied and transmitted multiple times, consume a large amount of transmission bandwidth resources, and result in low collaboration efficiency between computing devices.

[0052] To solve the above problems, the related technology generally connects the computing device with a multi-port compute express link (CXL) device to realize cross-node data transmission-free access. Specifically, CXL is an open computing device interconnection standard. As shown in FIG. 1, which is a schematic diagram of an application scenario provided by an embodiment of the present application, specifically, a scenario in which a computing device accesses a CXL memory space. The multi-port CXL storage device 1000 includes two ports, which are connected to the first computing device 1100 and the second computing device 1200, respectively. The multi-port CXL storage device 1000 includes a controller 1010 and a memory 1020, and the memory 1020 further includes multiple memory spaces, such as memory space 1 and memory space 2. The controller 1010 can be a CXL controller or a CXL expansion control chip.

[0053] The first computing device 1100 runs a plurality of processes, such as process A, process B, and the like, and the second computing device 1200 runs a plurality of processes, such as process M, process N, and the like. Process A on the first computing device 1100 and process M on the second computing device 1200 can access data in the memory space 1 in the multi-port CXL storage device 1000. Specifically, when process A on the first computing device 1100 applies for the memory space shared with process M on the second computing device 1200, for example, applies for the memory space 1, process A receives the physical address and the virtual address of the memory space 1. The virtual address of the memory space 1 is randomly generated by the first computing device 1100 based on the physical address of the memory space 1, for example, 0x80000000. Process A records the mapping relationship between the physical address and the generated virtual address through its page table (PT), completes the mapping of the memory space 1 to the virtual address space of process A, and thus process A can achieve read and write of data in the memory space 1 without transmission.

[0054] The virtual address is generated based on the physical address of the memory space, which is a commonly used way in modern computer operating systems. Through this way, the process can avoid directly operating the memory space through the physical address, and to some extent, expand the available space of the memory and simplify the coordination problem between multiple processes in an operating system.

[0055] Correspondingly, when process M on the second computing device 1200 applies for the memory space shared with process A on the first computing device 1100, for example, applies for the memory space 1, process M receives the physical address and the virtual address of the memory space 1. The virtual address of the memory space 1 is randomly generated by the second computing device 1200 based on the physical address of the memory space 1, for example, 0x09990000. Process M records the mapping relationship between the physical address and the generated virtual address through its page table, completes the mapping of the memory space 1 to the virtual address space of process M, and thus process M can also achieve read and write of data in the memory space 1 without transmission.

[0056] Obviously, the above two virtual addresses are different. The related art shared memory access process is specifically shown in FIG. 2. FIG. 2 is a schematic diagram of a CXL shared memory access process in the related art. Process A running on the first computing device 10 and process M running on the second computing device 20 respectively access the same piece of shared memory in the CXL memory pool through their respective page tables. Through the difference of the page table positions pointed by the arrows, it can be known that process A and process M use different virtual addresses when accessing the shared memory.

[0057] Further, the virtual addresses corresponding to the same target data in the shared memory are also different. For example, if the target data has a physical offset a000 based on the start address of the shared memory, the virtual address of the target data reflected on the page table of process A can be 0x8000a000, and the virtual address of the target data reflected on the page table of process B can be 0x0999a000.

[0058] This approach has at least the following defects: first, the cooperation efficiency is low. Since the virtual addresses of cross-node processes are not unified, especially the start addresses of the virtual addresses are not unified, when accessing the target data in the shared memory, process A cannot directly pass the virtual address corresponding to the target data to process B, but needs to pass the offset, and process B needs to calculate after receiving the offset, so as to obtain the virtual address of the start address of the target data based on the shared memory in process B, and realize the access of process B to the target data in the shared memory.

[0059] Second, if the shared memory contains a variable of a pointer type data structure, since the data stored in the variable of the pointer type is a virtual address, the data pointed to by the variable of the pointer type can only be normally accessed on one process, and cannot be normally accessed on another process.

[0060] For example, the data stored in the pointer variable A in the shared memory is 0x8000a000, and the virtual address range of the shared memory in process A is 0x80000000-0x90000000; the virtual address range of the shared memory in process B is 0x99000000-0x99990000. Thus, process A can normally access the data pointed to by the pointer variable A, and process B cannot access the data pointed to by the pointer variable A since 0x8000a000 is not within the virtual address range of the shared memory in process B.

[0061] Moreover, in some cases, even if the data stored in the pointer variable falls within the virtual address range of the shared memory in the process, the data accessed by the process can not be the target data that needs to be cooperatively read and written due to the difference in the start address of the virtual address.

[0062] In summary, the related art limits the access efficiency and convenience of cross-node applications to the shared memory space in the CXL device, and further reduces the cooperation efficiency of cross-node applications.

[0063] Therefore, the following embodiments of the present application provide a memory allocation method, which can determine the address information of a target memory space according to a memory allocation request sent by a process, and unify the virtual addresses of the target memory space, so that the processes on different computing devices do not need to pass address offsets when accessing the target memory space, and further do not need to calculate the addresses of target data, but directly access the target data according to the virtual addresses of the target data, thereby simplifying the access process of the target memory space, improving the convenience of access, and further improving the cooperation efficiency between processes.

[0064] Secondly, the system architecture of the embodiments of the present application is exemplarily introduced.

[0065] The embodiments of the present application relate to at least two system architectures based on multi-port CXL storage devices.

[0066] The first one is shown in FIG. 3, which is a structural schematic diagram of a computing system provided by the embodiments of the present application.

[0067] Among them, the computing system includes multiple computing devices, which can be multi-port CXL storage devices, first computing devices and second computing devices. In FIG. 3, multiple multi-port CXL storage devices such as multi-port CXL storage device 3000 and multi-port CXL storage device 3300 are connected with first computing device 3100 and second computing device 3200. The number of computing devices connected to each multi-port CXL storage device depends on the number of ports it has and the actual demand, for example, a four-port CXL storage device can be connected with at most 4 computing devices, and an eight-port CXL storage device can be connected with at most 8 computing devices. In FIG. 3, only a dual-port CXL storage device is connected with two computing devices.

[0068] Among them, first computing device 3100 runs multiple processes such as process A and process B, and second computing device 3200 runs multiple processes such as process M and process N. Multi-port CXL storage device 3000 includes controller 3010 and memory 3020, and memory 3020 further includes multiple memory spaces such as memory space 1 and memory space 2. Multi-port CXL storage device 3300 includes controller 3310 and memory 3320, and memory 3320 further includes multiple memory spaces such as memory space 8 and memory space 9. The above memory spaces can be dual inline memory modules (DIMM) or dynamic random access memories (DRAM).

[0069] The management unit in the embodiments of the present application can be deployed in the controller of the multi-port CXL storage device in the form of firmware or a process, for example, the management unit 3030 in FIG. 3 is deployed in the controller 3010, and the management unit 3330 is deployed in the controller 3310.

[0070] The second is shown in FIG. 4, which is a structural schematic diagram of a computing system provided by the embodiments of the present application.

[0071] The computing system includes a plurality of computing devices, and the computing devices can be a CXL switch, a multi-port CXL storage device, a first computing device, and a second computing device. In FIG. 4, the CXL switch 4000 is connected to a plurality of computing devices including the first computing device 4100 and the second computing device 4200, and a plurality of multi-port CXL storage devices including the multi-port CXL storage device 4300 and the multi-port CXL storage device 4400. The first computing device 4100 runs a plurality of processes including process A and process B, and the second computing device 4200 runs a plurality of processes including process M and process N. The multi-port CXL storage device 4300 includes a controller 4310 and a memory 4320, and the memory 4320 further includes a plurality of memory spaces including memory space 1 and memory space 2. The multi-port CXL storage device 4400 includes a controller 4410 and a memory 4420, and the memory 4420 further includes a plurality of memory spaces including memory space 8 and memory space 9. The above memory spaces can be DIMMs or DRAMs.

[0072] The management unit in the embodiments of the present application can be deployed in the CXL switch in the form of firmware or a process, for example, the management unit 4010 in FIG. 4 is deployed in the CXL switch 4000.

[0073] In some possible embodiments, the management unit in the above FIG. 3 and FIG. 4 can also be deployed on a computing device capable of communicating with the first process and the second process in the form of software, for example, the management unit can be deployed on a computing device running the first process and capable of communicating with the second process, and run in the form of a management process. For another example, the management unit can be deployed on a third computing device capable of communicating with the first computing device running the first process and the second computing device running the second process. Alternatively, the management unit can also be a separate management device capable of communicating with the first computing device running the first process and the second computing device running the second process.

[0074] It should be noted that the system architecture and application scenarios described in the embodiments of the present application are used to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided by the embodiments of the present application. Those skilled in the art can know that with the evolution of system architecture and the appearance of new business scenarios, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems.

[0075] For ease of understanding, the memory allocation method provided by the embodiments of the present application is exemplarily introduced below in combination with the accompanying drawings. The memory allocation method is applicable to the multi-port CXL storage device shown in FIG. 3 or FIG. 4.

[0076] FIG. 5 shows a flowchart of a memory allocation method according to an embodiment of the present application. The memory allocation method can be applied to a management unit for managing a CXL memory space, and includes the following steps:

[0077] S101, the management unit receives a first memory allocation request sent by a first computing device.

[0078] The first memory allocation request is a memory allocation request sent by a first process of the first computing device, and is used to request the management unit to allocate a target memory space. The target memory space is a CXL memory space shared by the first computing device and a second computing device. Specifically, the target memory space is a CXL memory space shared by a first process of the first computing device and a second process of the second computing device.

[0079] For example, the first computing device and the second computing device can be the first computing device 3100 and the second computing device 3200 in FIG. 3 respectively. The management unit can be firmware or a management process of the controller 3010 or the controller 3310 in FIG. 3. Alternatively, the first computing device and the second computing device can be the first computing device 4100 and the second computing device 4200 in FIG. 4 respectively. The management unit can be firmware or a management process of the CXL switch 4000 in FIG. 4. Further, the first memory allocation request can include capacity information of the target memory space, a device identifier of the first computing device, and a device identifier of the second computing device.

[0080] For example, as shown in FIG. 3, the management unit can be deployed in the form of firmware on the controller 3010, and receives a first memory allocation request sent by the first computing device 3100. The request includes capacity information 100 megabytes of the target memory space, a device identifier "host1" of the first computing device, and a device identifier "host2" of the second computing device.

[0081] The management unit receives the first memory allocation request sent by the first process, and can determine the address information of the target memory space for step S102, thereby providing a corresponding reference basis.

[0082] S102, the management unit determines the address information of the target memory space according to the first memory allocation request.

[0083] The address information is used to indicate the position of the target memory space in the CXL memory space. The address information includes a physical address and a virtual address corresponding to the physical address, and the virtual address is generated by the management unit based on the physical address.

[0084] In a possible implementation, the management unit can determine the target memory space from the unallocated CXL memory space according to the capacity information in the first memory allocation request, and then obtain the physical address of the target memory space, and generate the virtual address corresponding to the target memory space based on the physical address of the target memory space.

[0085] For example, as shown in FIG. 3, the management unit 3030 receives the capacity information of 100 megabytes in the first memory allocation request sent by the first computing device 3100, and then determines a target memory space with a capacity of 100 megabytes from the unallocated memory spaces in the memory 3020, and obtains the physical address of the target memory space as 0x90000000. The management unit 3030 generates a virtual address as 0x99990000 based on the physical address.

[0086] Further, when generating the virtual address corresponding to the target memory space based on the physical address of the target memory space, the management unit can generate the virtual address in a preset address range in a random manner. For example, the preset address range is 0x90000000-0x95000000, and the computing device generates a virtual address as 0x90090000.

[0087] In this way, the management unit determines the target memory space according to the capacity information in the memory allocation request, which can improve the accuracy of allocating the CXL memory space and improve the effective utilization rate of the CXL memory space.

[0088] In a possible implementation, the address information of the target memory space can include the capacity of the target memory space, the physical address of the target memory space, and the virtual address of the target memory space.

[0089] For example, the address information of the target memory space A can be: the capacity is 100 megabytes, the physical address is 0x90000000, and the virtual address is 0x99990000.

[0090] The management unit can improve the accuracy of managing the target memory space by determining the address information including the capacity of the target memory space, the physical address of the target memory space, and the virtual address. For example, the management unit can further determine the address range included in the target memory space based on the physical address and the capacity of the target memory space, and then more accurately distinguish different target memory spaces.

[0091] In step S103, the management unit sends the address information to the first computing device.

[0092] Specifically, the management unit can be a first process that sends the physical address, the virtual address, and the capacity information of the target memory space to the first computing device, so that the first process can perform read and write operations on the data in the target memory space according to the information.

[0093] In a possible implementation, when performing step S103, the management unit can also save the device identifier of the first computing device, the device identifier of the second computing device, and the corresponding address information of the two devices into a preset shared memory virtual to physical (SMV2P) mapping table.

[0094] In this way, the management unit can improve the accuracy when managing multiple target memory spaces by maintaining the SMV2P mapping table.

[0095] In step S104, the management unit sends the address information to the second computing device.

[0096] In this step, the management unit can immediately send the same address information to the second computing device after performing step S103, which does not need to wait for the second computing device to send the second memory allocation request described below, thereby improving the efficiency of allocating the target memory space. However, since this way is actively sent by the management unit, it cannot be guaranteed that the second computing device is in a state that can receive the address information. It can be understood that if the management unit sends the address information after receiving the second memory allocation request sent by the second computing device, the probability of successfully receiving the address information by the second computing device can be improved.

[0097] Therefore, the present application provides a possible implementation, in which the management unit receives a second memory allocation request sent by the second computing device, and the second memory allocation request is used to request the management unit to allocate the target memory space to the first computing device and the second computing device. Then, the management unit sends the address information to the second computing device according to the second memory allocation request.

[0098] Specifically, the second memory allocation request is a memory allocation request sent by a second process of the second computing device, and the request management unit allocates the target memory space to the first process of the first computing device and the second process of the second computing device. The second memory allocation request can include device identifiers of the first computing device and the second computing device or a virtual address of the target memory space.

[0099] In a possible implementation, the management unit records a correspondence relationship between device identifiers of the first computing device, device identifiers of the second computing device, and address information of the target memory space in the SMV2P mapping table.

[0100] If the device identifiers of the first computing device and the device identifiers of the second computing device are included in the second memory allocation request, the management unit obtains the target memory space corresponding to the device identifiers by querying the SMV2P mapping table, and sends address information of the target memory space to the second process of the second computing device.

[0101] Alternatively, the virtual address of the target memory space is included in the second memory allocation request, the management unit obtains the target memory space with a virtual address consistent with the virtual address in the memory allocation request by querying the SMV2P mapping table, and sends a physical address and capacity information of the target memory space to the second process of the second computing device.

[0102] Further, when querying the SMV2P mapping table, the management unit can match the device identifiers or the virtual addresses included in the second memory allocation request sent by the second computing device with records in the SMV2P mapping table in a traversal matching manner, and send address information of the target memory space that matches successfully to the second process of the second computing device.

[0103] For example, the management unit saves the device identifier "host1" of the first computing device, the device identifier "host2" of the second computing device, and address information corresponding to the two in the SMV2P mapping table, where the address information includes a physical address 0x90000000, a virtual address 0x80200000, and a capacity 100 megabytes of the target memory space. When receiving the second memory allocation request sent by the second computing device, if the device identifiers included in the second memory allocation request are "host1" and "host2", the management unit matches device identifiers corresponding to address information of each target memory space recorded in the SMV2P mapping table, and when the device identifiers corresponding to the target memory space are "host1" and "host2", the matching result is successful. The management unit sends the physical address 0x90000000, the virtual address 0x80200000, and the capacity 100 megabytes of the target memory space to the second computing device.

[0104] In this way, the management unit implements that processes on different computing devices use the same virtual address to access the same target memory space by sending the address information of the target memory space matching the second memory allocation request to the second computing device, simplifies the access process, and further improves the cooperation efficiency between processes on different computing devices.

[0105] In a possible implementation, the SMV2P mapping table includes state information indicating whether the first computing device and the second computing device each currently perform read-write operations on data in the target memory space, and after the management unit sends the address information to the second computing device, the management unit can also modify the state information from indicating that the second computing device does not perform read-write operations on data in the target memory space to indicating that the second computing device has performed read-write operations on data in the target memory space. Specifically, the foregoing state information indicates whether the first process of the first computing device and the second process of the second computing device currently perform read-write operations on data in the target memory space.

[0106] For example, the SMV2P mapping table includes (virtual address, physical address, capacity, host1_on, host2_off), where "host1_on" and "host2_off" not only record the device identifiers of the two computing devices running processes capable of sharing the use of the target memory space, but also record state information of whether the first process and the second process currently perform read-write operations on data in the target memory space through the keywords "on" and "off" therein. "host1_on" represents that the first process currently performs read-write operations on data in the target memory space, and after the management unit sends the address information to the second process, "host2_off" can be modified to "host2_on".

[0107] In this way, the management unit implements the update of the state information in the correspondence recorded in the SMV2P mapping table, and improves the accuracy of the correspondence.

[0108] In a possible implementation, the management unit can determine the use state of the target memory space according to the state information; if the target memory space is in an unused state, the management unit deletes the address information and the device identifier of the target memory space in the SMV2P mapping table.

[0109] In this way, after the management unit deletes the address information and the device identifier of the target memory space in the SMV2P mapping table, when a new memory allocation request is received again, the foregoing target memory space information cannot be found in the SMV2P mapping table, and the target memory space can be allocated to the computing device indicated by the new memory allocation request, thereby improving the effective utilization rate of the CXL memory space.

[0110] In a possible implementation, after determining that the target memory space is in an unused state, the management unit can empty the data in the target memory space or mark the data in the target memory space as coverable. In this way, the management unit can improve the proportion of the available space of the multi-port CXL storage device, which helps to improve the effective utilization rate of the CXL memory space. Based on the above steps S101-S104, the management unit can determine the address information of the target memory space according to the memory allocation request sent by the first computing device, and implement the allocation of the same virtual address to different processes corresponding to the same target memory space, so that the computing device receiving the address information can access the target data in the target memory space without calculation, which simplifies the access process of the target memory space, improves the convenience of accessing the target data in the shared memory, and further improves the cooperation efficiency between processes.

[0111] Next, the memory allocation method provided by the embodiments of the present application is introduced from the perspective of the computing device sending the memory allocation request. The memory allocation method is also applicable to the computing device shown in FIG. 6.

[0112] FIG. 6 shows a structural schematic diagram of a computing device provided by an embodiment of the present application. As shown in FIG. 6, in terms of hardware, the computing device 100 can include a processor 101, a memory 102, and the like, where the processor 101 can include a central processing unit (CPU). In terms of software, the computing device 100 can have the functions of sending a first memory allocation request, receiving address information, and the like, that is, the computing device 100 can send a first memory allocation request to a management unit, where the management unit is used to manage a computing express link (CXL) memory space, and the memory allocation request is used to request the management unit to allocate a target memory space to a corresponding process, and the target memory space is a CXL memory space shared by a first computing device and a second computing device; the computing device 100 receives address information, where the address information is determined by the management unit according to the memory allocation request, and is used to indicate the position of the target memory space in the CXL memory space; and the computing device 100 performs data read / write operations on target data in the target memory space according to the address information, where the target data is data for collaborative operation of the first computing device and the second computing device.

[0113] The embodiments of the present application provide a memory allocation method, applied to a first computing device, and a first process running on the first computing device. The first computing device can be the computing device 100 in FIG. 6. As shown in FIG. 7, FIG. 7 shows a flowchart of another memory allocation method provided by an embodiment of the present application, which includes the following steps:

[0114] S201, the first computing device sends a first memory allocation request to a management unit.

[0115] The first memory allocation request is a request sent by a first process of the first computing device, and the management unit is configured to manage a computing express link (CXL) memory space. The first memory allocation request is configured to request the management unit to allocate a target memory space. The target memory space is a CXL memory space shared by the first computing device and a second computing device. Specifically, the target memory space is a CXL memory space shared by the first process of the first computing device and a second process of the second computing device.

[0116] The first computing device can send the first memory allocation request to the management unit when the first computing device needs to read and write target data in cooperation with the first computing device. The first memory allocation request can include a capacity of the target memory space, a device identifier of the first computing device, and a device identifier of the second computing device.

[0117] For example, the first memory allocation request sent by the first computing device to the management unit includes a capacity of the target memory space of 100 megabytes, a device identifier of the first computing device of "host1", and a device identifier of the second computing device of "host2".

[0118] The first computing device sends the first memory allocation request, so that the management unit can determine the target memory space according to the demand of the first computing device, to realize the read and write operation of the processes on different computing devices on the data in the same target memory space.

[0119] In S202, the first computing device receives address information.

[0120] The address information is determined by the management unit according to the first memory allocation request. The address information includes a physical address and a virtual address corresponding to the physical address. The virtual address is generated by the management unit based on the physical address.

[0121] The address information received by the first computing device can include a physical address, a virtual address, and capacity information of the target memory space.

[0122] For example, the address information received by the first computing device is (0x90000000, 0x60100000, 100), which represents that the physical address of the target memory space is 0x90000000, the virtual address is 0x60100000, and the capacity is 100 megabytes.

[0123] In a possible implementation, the physical address can include a device name of a device to which the target memory space belongs and a physical offset based on a physical start address of a memory space in the device.

[0124] For example, the physical address of the target memory space is (1000, DAX1), which represents that the target memory space is located in the multi-port CXL storage device with the device name "DAX1", and the offset between the starting address of the physical address of the target memory space and the starting address of the aforementioned multi-port CXL storage device memory physical address is 0x1000.

[0125] The first computing device can access the data in the target memory space according to the address, and further complete the cooperative operation of the processes of the other computing devices on the data in the target memory space, by receiving the address information indicating the location of the target memory space in the CXL memory space.

[0126] S203, the first computing device performs data read / write operation on the target data in the target memory space according to the address information.

[0127] The target data is the data on which the first process of the first computing device and the second process of the second computing device perform cooperative operation. After receiving the address information of the target memory space, the first process of the first computing device can map the physical address and the virtual address in the target memory space to the page table of the first process, and then the first process can determine the target data on which it needs to perform cooperative operation with the second process of the second computing device according to the actual needs, and determine the virtual address of the target data according to the virtual address of the target memory space. Then the first process can perform data read / write operation on the target data in the target memory space according to the virtual address of the target data. It can be understood that the virtual address of the target data can be at least part of the virtual address of the target memory space.

[0128] Based on the above steps S201-S203, the first computing device can perform data read / write operation on the target data in the target memory space according to the received address information.

[0129] Therefore, in order to realize the read and write operation of the processes on different computing devices on the target data in the same target memory space, the present application embodiment provides a possible implementation manner, the first computing device determines the virtual address of the target data according to the virtual address of the target memory space; sends the virtual address of the target data to the second computing device, specifically to the second process of the second computing device, and then the second process can perform data read / write operation on the target data according to the received virtual address.

[0130] For example, the virtual address of the target memory space is 0x90000000, the first computing device determines the virtual address of the target data as 0x90001000 according to actual needs, and then the first computing device can send the virtual address 0x90001000 to the second computing device, so that the second process of the second computing device can read and write the target data with the virtual address 0x90001000.

[0131] Since the virtual addresses received by the processes in different computing devices are the same, in other words, the virtual addresses of the same target memory space are unified, the virtual addresses of the target data can be directly transmitted between different computing devices without transmitting the virtual address offset. The process receiving the virtual address does not need to calculate the virtual address of the target data according to the offset, but can directly read or write the target data using the received virtual address, simplifying the access process of the target memory space and improving the cooperation efficiency.

[0132] In a possible implementation, the target data includes a variable of a pointer type; the variable of the pointer type is used to indicate that the first process of the first computing device or the second process of the second computing device accesses data pointed by the variable. Specifically, the variable of the pointer type is used to indicate that the first process of the first computing device or the second process of the second computing device accesses data pointed by the variable.

[0133] The variable of the pointer type usually stores a virtual address of another data in the target memory space, that is, when the first process or the second process accesses the variable of the pointer type, another virtual address can be obtained, and since the virtual addresses of the target memory space are unified, the first process or the second process can access data pointed by the variable according to the virtual address stored in the variable of the pointer type, thereby improving the cooperation efficiency between the processes of different computing devices.

[0134] The steps S101-S104 and the steps S201-S203 respectively introduce the memory allocation method provided by the embodiments of the present application from the perspective of the management unit for managing the CXL memory space and the first computing device sending the first memory allocation request, so that the processes on different computing devices can access the same target memory space based on the same virtual address for cooperation, thereby improving the cooperation efficiency between the processes. For specific effects, refer to FIG. 8, which is a schematic diagram of a CXL shared memory access process related to the embodiments of the present application. The process A running on the first computing device 10 and the process M running on the second computing device 20 access the same target memory space in the CXL memory pool through their respective page tables. As shown by the page table positions pointed by the arrows, the process A and the process M use the same virtual address when accessing the target shared memory.

[0135] The complete interaction process of the memory allocation method provided by the embodiments of the present application is exemplarily described below, wherein the aforementioned memory allocation method can be implemented on the aforementioned two architectures of FIG. 3 and FIG. 4, and the specific process is shown in FIG. 9. FIG. 9 is another specific implementation flowchart of the memory allocation provided by the embodiments of the present application, including the following steps:

[0136] S301, the first computing device sends a first memory allocation request to the management unit.

[0137] The first memory allocation request is sent by a first process in the first computing device.

[0138] Exemplarily, as shown in FIG. 4, the first computing device can be the first computing device 4100, and the process A on the first computing device 4100 sends a first memory allocation request to the management unit 4010, requesting to share a target memory space with a capacity of 100 megabytes with the process M in the second computing device 4200.

[0139] S302, the management unit queries whether the target memory space exists in the SMV2P mapping table.

[0140] In this step, the management unit can match the device identifier included in the first memory allocation request sent by the first computing device with the device identifier corresponding to the address information of each target memory space in the SMV2P mapping table by traversing and matching.

[0141] If the target memory space exists, the management unit performs step S303.

[0142] Exemplarily, as shown in FIG. 4, the management unit matches the device identifier “host1” of the first computing device 4100, the device identifier “host2” of the second computing device 4200 with the device identifiers corresponding to the address information of each target memory space recorded in the SMV2P mapping table, and when it is matched that the device identifiers corresponding to the target memory space are “host1” and “host2”, it is determined that the target memory space exists, and then step S303 is performed.

[0143] If not, the management unit performs step S304.

[0144] Exemplarily, as shown in FIG. 4, the management unit matches the device identifier "host1" on the first computing device 4100, the device identifier "host2" of the second computing device 4200 with the device identifiers corresponding to the address information of each target memory space recorded in the SMV2P mapping table, and when no device identifier corresponding to the target memory space exists, the management unit determines that no target memory space exists, and then executes step S304.

[0145] S303, the management unit sends the address information of the target memory space to the running first computing device and modifies the information in the SMV2P mapping table.

[0146] In this step, the management unit specifically sends the address information of the target memory space to the first process running on the first computing device. The management unit determines that the target memory space already exists according to the SMV2P mapping table, and does not need to be allocated again, and sends the address information of the target memory space to the aforementioned first process.

[0147] S304, the management unit determines the target memory space in the unallocated CXL memory space, and obtains the physical address of the target memory space, and allocates a virtual address to the target memory space.

[0148] In this step, the management unit can determine the target memory space from a plurality of multi-port CXL storage devices.

[0149] In a possible implementation, the physical address of the target memory space includes a physical offset and a device name corresponding to the target memory space.

[0150] The device name can refer to the identifier of the multi-port CXL storage device in the management unit, for example, the identifier of the multi-port CXL storage device 3000 in the management unit 3030 in FIG. 3 can be "DAX01".

[0151] Exemplarily, as shown in FIG. 4, the management unit 4010 determines a target memory space with a capacity of 100 megabytes from the unallocated memory space 1 of the storage 4320 of the multi-port CXL storage device 4300, obtains the physical offset of the target memory space as 0x1000, and the device name of the multi-port CXL storage device 4300 as "DAX01", and then the management unit 4010 allocates a virtual address of 0x60000000 to the target memory space.

[0152] Through steps S302-S304, the management unit can avoid repeatedly allocating target memory spaces to processes by querying the SMV2P mapping table, and ensure that processes sharing the same target memory space can use the same virtual address, thereby improving the cooperation efficiency.

[0153] S305, the management unit saves the related information to the SMV2P mapping table.

[0154] In this step, the management unit can save the device identifiers of the first computing device and the second computing device, and the address information of the target memory space corresponding to the two, to the SMV2P mapping table.

[0155] For example, as shown in FIG. 4, the management unit 4010 saves the following information to the SMV2P mapping table: (0x60000000, 0x20001000, 100, Host1_on, Host2_off), wherein 0x60000000 represents the virtual address of the target memory space, 0x20001000 represents the physical address of the target memory space, 100 represents that the capacity of the target memory space is 100 megabytes, Host1_on represents the first computing device 4100 running the first process; Host2_off represents the second computing device 4200 running the second process.

[0156] Further, Host1_on can also be used to represent that the first computing device is currently performing read-write operations on the data in the target memory space, and Host2_off can also be used to represent that the second computing device is currently not performing read-write operations on the data in the target memory space.

[0157] By maintaining the SMV2P mapping table, the management unit records the device identifiers of multiple computing devices and the address information of the target memory space, so as to realize the constraint and management of the virtual address generated when the CXL memory space is allocated, and ensure that the virtual addresses used by the processes of different computing devices to access the same target memory space are the same, thereby improving the cooperation efficiency between processes.

[0158] In a possible implementation, the management unit determines, according to the SMV2P mapping table, that there is no process performing read-write operations on the data in the target memory space, and releases or allocates the target memory space to other processes in need of memory space.

[0159] Specifically, when a process no longer needs to use a target memory space, the process can send a release instruction of the target memory space to the management unit via the computing device where the process is located. After receiving the release instruction, the management unit modifies the SMV2P mapping table accordingly, for example, changes Host1_on to Host1_off. In this way, the management unit can determine the use of each target memory space according to the SMV2P mapping table.

[0160] Exemplarily, when the management unit determines that the target memory space 1 is no longer used according to the state information corresponding to the target memory space 1 in the SMV2P mapping table, i.e., Host1_off and Host2_off, the management unit can release or reallocate the target memory space 1. Then, when the management unit receives a memory allocation request and determines that the memory allocation request matches the target memory space 1, the management unit can reallocate the target memory space 1, thereby improving the utilization rate of the memory in the CXL storage device.

[0161] S306, the management unit sends the address information to the first computing device.

[0162] In this step, the management unit can send the virtual address, the physical address and the capacity information of the target memory space to the first computing device.

[0163] Exemplarily, as shown in FIG. 4, the management unit 4010 sends (0x60000000, 0x1000, CXL01, 100) to the process A in the first computing device 4100, where 0x60000000 represents the virtual address of the target memory space, 0x1000 represents that the offset between the starting address of the physical address of the target memory space and the starting address of the corresponding physical address of the target memory space is 0x1000, CXL01 represents the device name of the multi-port CXL storage device 4300, and 100 represents that the capacity of the target memory space is 100 megabytes.

[0164] S307, the first computing device sends the virtual address of the target memory space to the second computing device.

[0165] In this step, when the first computing device sends the virtual address of the target memory space, the first computing device can send the virtual address of the target memory space to the computing device sharing the target memory space via a network or the like. In this way, on the one hand, the second computing device can timely send a memory allocation request to the management unit, thereby improving the cooperation efficiency, and on the other hand, the second computing device can ensure that the virtual address allocation is correct in the subsequent memory allocation process according to the received virtual address, thereby further improving the accuracy of allocating the target memory space.

[0166] When the first computing device sends the virtual address of the target memory space to the second computing device, specifically, the first process of the first computing device sends the virtual address of the target memory space to the second process of the second computing device. The processes between different computing devices can communicate in various ways. For example, the first process can send a process identifier to ensure that the virtual address is sent to the second process, or the first process can send the virtual address to the port number corresponding to the second process. The embodiments of the present application do not limit this.

[0167] For example, the first process sends the received target memory space virtual address 0x60000000 through the first computing device where the first process is located to the port number 5244 of the second process on the second computing device through the network.

[0168] In S308, the first computing device maps the target memory space to the virtual address space of the process according to the address information.

[0169] In this step, the first process in the first computing device receives the address information, and then the first process can map the physical address and the virtual address in the address information to the page table of the first process, so as to map the target memory space to the virtual address space of the process.

[0170] In a possible implementation, after the first computing device sends the received virtual address to the second computing device, the first computing device sends the virtual address of the target data to the second computing device.

[0171] The target data is data that the first process needs to cooperate with the second process, for example, the first process writes the target data, and the second process reads the target data. The first process can determine the target data in the target memory space and the virtual address of the target data according to the actual needs in the running process, and send the virtual address of the target data to the second computing device.

[0172] For example, as shown in FIG. 4, the first computing device 4100 sends the determined address information of the target data in the target memory space 0x60005000 to the second computing device 4200 running the process M through the network.

[0173] Based on the above steps S301-S308, the management unit records the related information of the target memory space allocated to the first process and the second process, and saves the information to the SMV2P mapping table. Correspondingly, the first process receives the address information of the target memory space, and can perform data reading and writing operations on the target memory space.

[0174] In S309, the second computing device sends a second memory allocation request to the management unit.

[0175] In this step, the second memory allocation request sent by the second computing device can include the virtual address received in the above step S307.

[0176] For example, as shown in FIG. 4, the process M on the second computing device 4200 sends a memory allocation request to the management unit 4010 on the CXL switch 4000, and applies for a target memory space with a virtual address of 0x60000000.

[0177] Alternatively, the second memory allocation request sent by the second computing device can include the device identifier of the first computing device and the device identifier of the second computing device.

[0178] S310, the management unit queries whether the target memory space exists in the SMV2P mapping table.

[0179] If not, the management unit performs step S311; if already exists, the management unit performs step S312.

[0180] In this step, the management unit queries the virtual address of each recorded target memory space in the SMV2P mapping table according to the virtual address in the second memory allocation request received in step S309, and if there is a target memory space with the same virtual address, the management unit performs step S311; if not, the management unit performs step S312.

[0181] S311, the management unit sends the address information of the target memory space to the second computing device and modifies the information in the SMV2P mapping table.

[0182] In this step, the management unit specifically sends the address information of the target memory space to the second process running the second computing device. The management unit determines that the target memory space already exists according to the SMV2P mapping table, and does not need to be allocated again, and sends the address information of the target memory space to the aforementioned second process.

[0183] S312, the management unit determines the target memory space in the unallocated CXL memory space and obtains the physical address of the target memory space, and allocates a virtual address to the target memory space.

[0184] S313, the management unit saves the relevant information to the SMV2P mapping table.

[0185] Steps S312-S313 are similar to steps S304-S305 described above, and will not be described again here.

[0186] S314, the second computing device checks the virtual address and maps the target memory space to the virtual address space of the process.

[0187] In this step, specifically, the second process in the second computing device receives the address information, and after receiving the address information, the second computing device can check the virtual address in the following ways, including: the second process matches the virtual address in the address information received in step S314 with the virtual address sent by the first computing device in the aforementioned step S307, and when it is determined that the two virtual addresses are consistent, or the virtual address check is correct, the address information is registered in its page table, the mapping of the target memory space is realized, and the accuracy of the unified addressing of the target memory space is improved.

[0188] After the steps S301-S314 are completed, the first process of the first computing device and the second process of the second computing device can cooperate on the target data in the target memory space according to actual needs, for example, the first process modifies the target data in the target memory space, and then transmits the virtual address of the target data to the second computing device. After receiving the virtual address of the target data, the second computing device reads the modified target data in the target memory space, realizing the cooperative operation of the processes on different computing devices based on the virtual address of the unified target memory space, and improving the cooperation efficiency.

[0189] The above mainly describes the scheme of the embodiments of the present application from the method aspect. It can be understood that the software upgrading apparatus contains at least one of the hardware structure and the software module for executing the corresponding functions in order to realize the above functions. Those skilled in the art should easily realize that the units and algorithm steps of the examples described in combination with the embodiments disclosed in the present application can be realized in the form of hardware or the combination of hardware and computer software. Whether a certain function is realized in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical scheme. The skilled person can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the embodiments of the present application.

[0190] The embodiments of the present application can divide the functional units of the memory allocation apparatus according to the above method examples. For example, each functional unit can be divided according to each function, or two or more functions can be integrated in one processing unit. The integrated unit can be realized in the form of hardware or software functional unit. It should be noted that the division of units in the embodiments of the present application is illustrative, and is only a logical functional division. There can be another division method in actual implementation.

[0191] For example, FIG. 10 shows a structural schematic diagram of a memory allocation apparatus 1200 provided by an example embodiment of the present application. The memory allocation apparatus 1200 is applied to a computing device or a management unit, or the memory allocation apparatus 1200 can be a computing device. The memory allocation apparatus 1200 includes:

[0192] The receiving module 1210 is configured to receive a first memory allocation request sent by a first computing device, the first memory allocation request being used to request the management unit to allocate a target memory space to a corresponding process, the target memory space being the CXL memory space shared by the first computing device and a second computing device.

[0193] The determining module 1220 is configured to determine address information of the target memory space according to the first memory allocation request, the address information being used to indicate a position of the target memory space in the CXL memory space, wherein the address information includes a physical address and a virtual address corresponding to the physical address, and the virtual address is generated by the management unit based on the physical address.

[0194] The first sending module 1230 is configured to send the address information to the first computing device.

[0195] The second sending module 1240 is configured to send the address information to the second computing device.

[0196] For example, in combination with FIG. 5, the receiving module 1210 can be configured to perform S101 as shown in FIG. 5, the determining module 1220 can be configured to perform S102 as shown in FIG. 5, the first sending module 1230 can be configured to perform S103 as shown in FIG. 5, and the second sending module 1240 can be configured to perform S104 as shown in FIG. 5.

[0197] In a possible implementation, the second sending module 1240 is further configured to receive a second memory allocation request sent by the second computing device, the second memory allocation request being used to request the management unit to allocate a target memory space to the first computing device and the second computing device; and send the address information to the second computing device according to the second memory allocation request.

[0198] In a possible implementation, the determining module 1220 is further configured to determine the target memory space from the unallocated CXL memory space according to capacity information in the first memory allocation request; obtain a physical address of the target memory space; and generate a virtual address corresponding to the target memory space based on the physical address of the target memory space.

[0199] In a possible implementation, the apparatus further includes a saving module configured to save a device identifier of the first computing device, a device identifier of the second computing device, and the address information of the target memory space into a preset shared memory virtual address to physical address (SMV2P) mapping table; and the second sending module 1240 is further configured to, if the second memory allocation request sent by the second computing device is received, query the SMV2P mapping table according to a device identifier or a virtual address in the second memory allocation request to obtain the address information of the target memory space corresponding to the device identifier or the virtual address, and send the address information to the second computing device.

[0200] In a possible implementation, the SMV2P mapping table includes state information of whether the first computing device and the second computing device each currently perform read-write operations on data in the target memory space, and the modification module is further configured to modify the state information from a state indicating that the second computing device does not perform read-write operations on data in the target memory space to a state indicating that the second computing device performs read-write operations on data in the target memory space after the second sending module 1240 sends the address information to the second computing device.

[0201] In a possible implementation, the memory allocation apparatus 1300 further includes a deletion module, configured to determine a use state of the target memory space according to the state information, and delete address information and device identification of the target memory space in the SMV2P mapping table if the target memory space is in an unused state.

[0202] For example, FIG. 11 shows a structural schematic diagram of a memory allocation apparatus 1300 provided by another example embodiment of the present application. The memory allocation apparatus 1300 is applied to a first computing device. The memory allocation apparatus 1300 includes:

[0203] The sending module 1310 is configured to send a first memory allocation request to a management unit, the management unit being configured to manage a computing express link (CXL) memory space, and the first memory allocation request being configured to request the management unit to allocate a target memory space, the target memory space being the CXL memory space shared by the first computing device and a second computing device.

[0204] The receiving module 1320 is configured to receive address information, the address information being determined by the management unit according to the first memory allocation request, and the address information including a physical address and a virtual address corresponding to the physical address, the virtual address being generated by the management unit based on the physical address.

[0205] The read-write module 1330 is configured to perform data read-write operations on target data in the target memory space according to the address information, and the target data being data operated by the first computing device and the second computing device in cooperation.

[0206] In a possible implementation, the address information includes a virtual address of the target memory space, and the read-write module 1330 is configured to determine a virtual address of the target data according to the virtual address of the target memory space, and perform data read-write operations on the target data according to the virtual address of the target data.

[0207] In a possible implementation, the target data includes a variable of a pointer type; the variable of the pointer type is used to indicate that the first computing device or the second computing device accesses data pointed by the variable.

[0208] In an example embodiment, a computer readable storage medium is also provided for storing at least one instruction, at least one program, a code set or an instruction set, which is loaded and executed by a processor to implement all or part of the steps of the above memory failure prediction method. For example, the computer readable storage medium can be a read-only memory (ROM), a random access memory (RAM), a compact disc read-only memory (CD-ROM), a magnetic tape, a floppy disk, and an optical data storage device, etc.

[0209] In an example embodiment, a computer program product or computer program is also provided, which includes computer instructions stored in a computer readable storage medium. A processor of a computing device reads the computer instructions from the computer readable storage medium, and the processor executes the computer instructions to make the computing device perform all or part of the steps of the method shown in any of the embodiments of FIG. 5.

[0210] In some embodiments, the method shown in the embodiments of the present application can be implemented as computer program instructions encoded in a machine-readable format on a computer readable storage medium or on other non-transitory media or articles.

[0211] Through the above description of the embodiments, those skilled in the art can clearly understand that, for the convenience and brevity of description, only the division of the above functional modules is taken as an example for illustration, and in actual application, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above.

[0212] In several embodiments provided in the present application, it should be understood that the disclosed apparatus and method can be implemented by other manners. For example, the apparatus embodiments described above are merely illustrative, for example, the division of the modules or units is merely a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another apparatus, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units or components shown or discussed can be indirect coupling or communication connection through some interfaces, apparatuses or units, and can be electrical, mechanical or other forms.

[0213] The units described as separate components can or can not be physically separate, and the components shown as units can be one physical unit or a plurality of physical units, that is, can be located in one place, or can be distributed to a plurality of different places. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment scheme.

[0214] In addition, each functional unit in each embodiment of the present application can be integrated in one processing unit, or each unit can be physically present separately, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software functional unit.

[0215] The integrated unit, if realized in the form of a software functional unit and sold or used as an independent product, can be stored in a readable storage medium. Based on this understanding, the technical solutions of the embodiments of the present application essentially or the parts that make contributions to the related art or the whole or part of the technical solutions can be embodied in the form of a software product, which is stored in a storage medium and includes a plurality of instructions for causing an apparatus (which can be a single-chip microcomputer, a chip, etc.) or a processor to execute all or part of the steps of the method described in the embodiments of the present application. The foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various storage program codes.

[0216] The above description is only optional embodiments of the present application, and does not limit the present application, and any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A memory allocation method, characterized by, The method is applied to a management unit for managing a compute express link (CXL) memory space, and the method comprises the following steps: receiving a first memory allocation request sent by a first computing device, the first memory allocation request being used to request the management unit to allocate a target memory space, the target memory space being the CXL memory space shared by the first computing device and a second computing device; determining address information of the target memory space according to the first memory allocation request, the address information being used to indicate a position of the target memory space in the CXL memory space, wherein the address information comprises a physical address and a virtual address corresponding to the physical address, and the virtual address is generated by the management unit based on the physical address; sending the address information to the first computing device; sending the address information to the second computing device.

2. The method of claim 1, wherein, The step of sending the address information to the second computing device comprises the following steps: receiving a second memory allocation request sent by the second computing device, the second memory allocation request being used to request the management unit to allocate a target memory space to the first computing device and the second computing device; sending the address information to the second computing device according to the second memory allocation request.

3. The method according to claim 1 or 2, characterized in that, The step of determining the address information of the target memory space according to the first memory allocation request comprises the following steps: determining the target memory space from the unallocated CXL memory space according to capacity information in the first memory allocation request; obtaining a physical address of the target memory space; generating a virtual address corresponding to the target memory space based on the physical address of the target memory space.

4. The method according to any one of claims 1 to 3, characterized in that, After the step of determining the address information of the target memory space according to the first memory allocation request, the method further comprises the following steps: saving a device identifier of the first computing device, a device identifier of the second computing device, and the address information of the target memory space into a preset shared memory virtual address to physical address (SMV2P) mapping table; The step of sending the address information to the second computing device comprises the following steps: if the second memory allocation request sent by the second computing device is received, querying the SMV2P mapping table to obtain the address information of the target memory space corresponding to the device identifier or the virtual address according to the device identifier or the virtual address in the second memory allocation request; sending the address information to the second computing device.

5. The method of claim 4, wherein, The SMV2P mapping table comprises state information indicating whether the first computing device and the second computing device each currently perform read-write operations on data in the target memory space, and after the step of sending the address information to the second computing device, the method further comprises the following steps: modifying the state information from a state indicating that the second computing device does not perform read-write operations on data in the target memory space to a state indicating that the second computing device has performed read-write operations on data in the target memory space.

6. The method of claim 5, wherein, The method further comprises the following steps: determining a use state of the target memory space according to the state information; If the target memory space is in an unused state, deleting address information and device identification of the target memory space in the SMV2P mapping table.

7. A memory allocation method characterized by comprising: The method is applied to a first computing device, and the method comprises: sending a first memory allocation request to a management unit, the management unit being configured to manage a computing express link (CXL) memory space, the first memory allocation request being configured to request the management unit to allocate a target memory space, the target memory space being the CXL memory space shared by the first computing device and a second computing device; receiving address information, the address information being determined by the management unit based on the first memory allocation request, the address information comprising a physical address and a virtual address corresponding to the physical address, the virtual address being generated by the management unit based on the physical address; performing data read / write operations on target data in the target memory space according to the address information, the target data being data operated by the first computing device and the second computing device in cooperation.

8. The method of claim 7, wherein, The performing data read / write operations on target data in the target memory space according to the address information comprises: determining a virtual address of the target data according to the virtual address of the target memory space; performing data read / write operations on the target data according to the virtual address of the target data.

9. The method according to claim 7 or 8, characterized in that, The target data comprises a pointer type variable, the pointer type variable being configured to indicate the first computing device or the second computing device to access data pointed by the variable.

10. A computing device, comprising: The computing device comprises a processor and a memory, the processor being coupled to the memory, and the memory being configured to store computer instructions, the computer instructions being loaded and executed by the processor to enable the computing device to implement the memory allocation method according to any one of claims 1 to 9.

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