Method for storing coherence directory, and multi-core system, device, medium and product

Abstract

Provided in the present disclosure is a method for storing a coherence directory. A multi-core system comprises N processing cores, N being an integer greater than 1. The method comprises: acquiring access information of a plurality of data blocks, wherein the access information comprises address information of each data block and accessor information of the data block; and on the basis of the access information of the plurality of data blocks, generating one storage entry of a coherence directory, wherein the storage entry comprises: a plurality of address fields, which correspond to the plurality of data blocks on a one-to-one basis and are used for carrying the address information of the plurality of data blocks, and an accessor information field, which is used for representing accessor information of the plurality of data blocks. Further provided in the present disclosure are a multi-core system, an electronic device, a computer-readable medium and a computer program product.

Description

Method for storing consistency directory, multi-core system, device, medium and product

[0001] Cross-reference to related applications

[0002] This application claims priority to Chinese Patent Application CN 202411275877.1, entitled “Method for storing consistency directory, multi-core system, device, medium and product”, filed on September 11, 2024, the entire contents of which are incorporated herein by reference. TECHNICAL FIELD

[0003] The present disclosure relates to the field of computer technology, and particularly relates to a method for storing a consistency directory, a multi-core system, an electronic device, a computer-readable medium and a computer program product. BACKGROUND

[0004] In a multi-core system, there is a scenario where a data block is accessed by one or more processing cores. When a data block is accessed by multiple processing cores, there are usually multiple copies of the data block in the multiple processing cores. If the original data block is changed, a mechanism is needed to ensure that the copies in different processing cores are updated in time, otherwise the processing cores will read dirty data or outdated data.

[0005] To this end, related technical personnel proposes a consistency directory scheme, that is, a consistency directory is used to record the processing cores that access the data block, forming an access list. When the copy of the data block in a certain processing core is modified, only the processing cores recorded in the access list need to be sent a notification message that the data block is modified. However, the length of the consistency directory will linearly increase with the increase of the number of processing cores, resulting in an increase in the physical memory space occupied by the consistency directory, thereby causing the consistency directory to occupy the resources of the multi-core system. SUMMARY

[0006] The present disclosure provides a method for storing a consistency directory, a multi-core system, a device, a medium and a product.

[0007] The present disclosure provides a method for storing a consistency directory for a multi-core system, the multi-core system comprising N processing cores, N being an integer greater than 1, the method comprising: obtaining access information of a plurality of data blocks, wherein the access information comprises address information of each data block and access information of the data block; generating a storage entry of a consistency directory according to the access information of the plurality of data blocks, wherein the storage entry comprises: a plurality of address fields corresponding one-to-one to the plurality of data blocks, for carrying the address information of the plurality of data blocks; and an access information field, for representing the access information of the plurality of data blocks.

[0008] The embodiment of the present disclosure provides a multi-core system, comprising: a plurality of processing cores; a directory data processing module, configured to process access information of a plurality of data blocks by the method for storing a consistent directory for a multi-core system provided by the embodiment of the present disclosure, and generate a storage entry of the consistent directory; and a memory, configured to store the storage entry of the consistent directory.

[0009] The embodiment of the present disclosure provides an electronic device, comprising a memory and a processor; the memory stores a computer program which can be executed by the processor, and the computer program is executed by the processor to implement the method for storing a consistent directory for a multi-core system provided by the embodiment of the present disclosure.

[0010] The embodiment of the present disclosure provides a computer readable medium, which stores a computer program, and the computer program is executed by a processor to implement the method for storing a consistent directory for a multi-core system provided by the embodiment of the present disclosure.

[0011] The embodiment of the present disclosure provides a computer program product, comprising a computer program, and the computer program is executed by a processor to implement the method for storing a consistent directory for a multi-core system provided by the embodiment of the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0012] In the drawings of the embodiment of the present disclosure:

[0013] FIG. 1 is a diagram of an application scenario of a consistent directory;

[0014] FIG. 2 is a diagram of a typical consistent directory structure in the related art;

[0015] FIG. 3 is a diagram of a typical storage entry structure;

[0016] FIG. 4 is a diagram of a typical read-write consistent directory;

[0017] FIG. 5 is a flowchart of the method for storing a consistent directory for a multi-core system provided by the embodiment of the present disclosure;

[0018] FIG. 6 is a diagram of a storage entry structure in the embodiment of the present disclosure;

[0019] FIG. 7 is a diagram of a read-write model of a consistent directory provided by the embodiment of the present disclosure;

[0020] FIG. 8 is a diagram of a consistent directory structure in the embodiment of the present disclosure;

[0021] FIG. 9 is a diagram of a consistent directory structure containing two data blocks in the embodiment of the present disclosure;

[0022] FIG. 10 is a diagram of a storage entry of two data blocks using the consistent directory structure provided by the embodiment of the present disclosure;

[0023] FIG. 11 is a structural diagram of a storage entry according to an embodiment of the present disclosure;

[0024] FIG. 12 is another structural diagram of a storage entry according to an embodiment of the present disclosure;

[0025] FIG. 13 is another structural diagram of a storage entry according to an embodiment of the present disclosure;

[0026] FIG. 14 is a structural diagram of a storage entry (precise compression) according to an embodiment of the present disclosure;

[0027] FIG. 15 is a structural diagram of a storage entry (coarse-grained compression) according to an embodiment of the present disclosure;

[0028] FIG. 16 is a structural diagram of a multi-core system according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0029] In order to make the technical solution of the present disclosure better understood by those skilled in the art, the embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0030] The embodiments of the present disclosure will be described more fully hereinafter with reference to the accompanying drawings, but the embodiments shown can be embodied in different forms and the present disclosure should not be construed as being limited to the embodiments set forth below. Rather, the purpose of providing these embodiments is to make the present disclosure thorough and complete and to fully enable a person skilled in the art to understand the scope of the present disclosure.

[0031] The accompanying drawings of the embodiments of the present disclosure are used to provide a further understanding of the embodiments of the present disclosure and constitute a part of the specification, which, together with the detailed embodiments, serve to explain the present disclosure and do not constitute a limitation of the present disclosure. The above and other features and advantages will become more apparent to those skilled in the art by describing the detailed embodiments with reference to the accompanying drawings.

[0032] The present disclosure can be described with reference to plan views and / or sectional views by means of ideal schematic drawings of the present disclosure. Therefore, the example drawings can be modified according to manufacturing techniques and / or tolerances.

[0033] The embodiments of the present disclosure and the features in the embodiments can be combined with each other without conflict.

[0034] The terminology used by the present disclosure is intended to be interpreted in only a descriptive sense, and is not intended to limit the present disclosure. As used by the present disclosure, the term "and / or" includes any and all combinations of one or more of the associated listed items. As used by the present disclosure, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. As used by the present disclosure, the terms "comprises," "comprising," "made," and "made of" specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0035] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an overly literal or overly formal sense unless expressly so defined herein.

[0036] FIG. 1 is a scenario diagram of an application of a coherence directory. As shown in FIG. 1, processing cores 11, 12,..., 1n are connected with a main memory 3 through a coherence bus 2, and a coherence directory 4 can be set in the coherence bus 2 to record state information and location information of data blocks owned by the processing cores 11, 12,..., 1n. The coherence directory 4 can record the case of the processing cores 11, 12,..., 1n owning data blocks in the form of a visitor list. Before the processing cores access data blocks, the coherence directory 4 is queried to obtain the latest state information of the data blocks to ensure the coherence of the data blocks. When the processing cores modify data blocks, the coherence directory 4 needs to be updated and other processing cores recorded in the coherence directory 4 that access the modified data blocks are notified.

[0037] In the related art, the coherence directory records state information and location information of data blocks in a way of a way group structure. FIG. 2 is a schematic diagram of a typical coherence directory structure in the related art. As shown in FIG. 2, the typical coherence directory structure includes N storage blocks, and the storage blocks are determined based on storage addresses of data blocks, and each storage block can store one storage entry. Specifically, the address of a data block is segmented to obtain an index part and a storage entry. The index part is used to index directory data, and the directory data includes directory information created based on the address of the data block, and the storage address of the data block can be quickly found according to the directory data.

[0038] The index part includes a directory set and a directory way, each directory set includes a plurality of directory ways, for example, a first directory set setl includes N directory ways wayl, way2,..., wayN, each directory way wayl, way2,..., wayN corresponds to a memory block raml, ram2,..., ramN, that is, the directory way wayl, way2,..., wayN has a one-to-one correspondence with the memory block raml, ram2,..., ramN.

[0039] For example, assuming that the storage address of a data block is 40 bits, the storage address of the data block is divided into three segments, 1-5 bits are internal addresses, 6-15 bits are index addresses, and 16-40 bits are storage entries. The position of the memory block can be quickly determined through the index part.

[0040] The storage entry is used to record the address information of the data block and the visitor information. The address information is used to record the address information of the processing core that owns the data block, and the visitor information is used to record the information of the data block, such as the number of processing cores that own the data block and which processing core owns the data block.

[0041] FIG. 3 is a schematic diagram of the structure of a typical storage entry. As shown in FIG. 3, the storage entry includes a tag value, state information, and a processing core vector core_vecter. The tag value is a part of the storage address of the data block, such as the low bit part of the storage address of the data block, such as the 16-40 bits, and the tag value is used to index the storage entry in the coherence directory. The state information can be based on the cache coherence (MESI) protocol model, and is used to record the state information of the data block. The bit width of the state information can be 2 bits. For example, 2'b00 represents an invalid (Invalid) state, indicating that the data block is in an invalid state or the entry is in an invalid state; 2'b01 represents a unique (Unique) state, indicating that the data block is exclusively owned by one processing core; 2'b10 represents a shared (shared) state, indicating that the data block is shared by more than one processing core; and 2'b11 represents a reserved state.

[0042] The processing core vector core_vecter is in the form of a vector to represent which processing core owns the data block. The bit width of the processing core vector is consistent with the number of processing cores. In a multi-core system, the number of processing cores can reach 64 or even 128 or more, so the bit width of the processing core vector is relatively wide.

[0043] When writing and reading the coherence directory is needed, the target memory can be indexed through the index part, and then the target memory can be written or read through the write enable or read enable.

[0044] Figure 4 is a schematic diagram of a typical read-write consistent directory. As shown in Figure 4, assuming the target memory is a ram n, when a write consistent directory is needed, the target memory can be indexed according to the index part of the data block, and then a data block corresponding storage entry is written into the target storage block with wr_en enabled. When a read consistent directory is needed, the target memory can be indexed according to the index part, and then the storage entry is read from the target memory with rd_en enabled.

[0045] The address field in the storage entry is part of the data block address, which is relatively long and occupies a large storage resource. In addition, in a multi-core system, a certain data block is usually only owned by several or even one processing core, and the bit width of the processing core vector is consistent with the number of processing cores, so the processing core vector will occupy a large amount of storage resources, but a lot of information is useless, resulting in low efficiency of storage resource use. In addition, each storage entry can only store the information of one data block, and the resource utilization is low.

[0046] In view of the above problem that the typical consistent directory occupies a large amount of resources, the embodiment of the present disclosure provides a method for storing a consistent directory for a multi-core system. The consistent directory data processed by the method can reduce the occupation of the storage resources by the consistent directory.

[0047] The embodiment of the present disclosure provides a method for storing a consistent directory for a multi-core system. The method is applied to a multi-core system, and the multi-core system includes N processing cores, and N is an integer greater than 1.

[0048] Figure 5 is a flowchart of the method for storing a consistent directory for a multi-core system provided by the embodiment of the present disclosure. As shown in Figure 5, the method for storing a consistent directory for a multi-core system according to the embodiment of the present disclosure includes the following steps S501-S502.

[0049] In step S501, access information of a plurality of data blocks is obtained, and the access information includes address information of each data block and accesser information of the data block.

[0050] The address information of the data block refers to the address of the stored data block, i.e. the address of the processing core that owns the data block. The accesser information of the data block refers to which processing cores access the data block.

[0051] In step S502, a storage entry of a consistent directory is generated according to the access information of the plurality of data blocks, and the storage entry includes: a plurality of address fields corresponding to the plurality of data blocks, for carrying the address information of the plurality of data blocks; and an accesser information field, for indicating the accesser information of the plurality of data blocks.

[0052] The address field is in one-to-one correspondence with the data block. Each data block corresponds to an address field, and each address field carries address information of a data block.

[0053] The visitor information field is used to represent visitor information of the plurality of data blocks. In some embodiments, the visitor information field includes information of processing cores that access the plurality of data blocks, and does not include information of processing cores that do not access the plurality of data blocks. Therefore, the bit width of the visitor information field is consistent with the number of processing cores that access the data blocks. Compared with the case where the visitor information field includes information of all processing cores, the storage resource occupied by the visitor information field is smaller in the embodiments of the present disclosure, thereby improving the use efficiency of the storage resource.

[0054] In the embodiments of the present disclosure, the visitor information field can be precisely compressed or coarsely compressed.

[0055] In the precise compression, the visitor information field includes one or more visitor number fields and a pointer field. The visitor number field is used to indicate the number of visitors of each data block. For example, assuming that there are two data blocks, i.e., a first data block and a second data block, there are two visitor number fields corresponding to the two data blocks. If the first data block has two visitors, the value of the visitor number field corresponding to the first data block is 2. If the second data block has three visitors, the value of the visitor number field corresponding to the second data block is 3.

[0056] The pointer field is used to indicate which processing cores access each data block, i.e., which processing cores access each data block. For example, if the first data block is accessed by the first processing core, the pointer field records that the first data block is accessed by the first processing core in the form of a pointer. If the first data block is accessed by the first processing core and the second processing core, the pointer field records that the first data block is accessed by the first processing core and the second processing core in the form of a pointer.

[0057] In some embodiments, generating one storage entry of the coherence directory according to the access information of the plurality of data blocks (i.e., step S502) includes: for each data block, concatenating the identifiers of the processing cores that access the data block together as visitor data of the data block; and concatenating the visitor data of the plurality of data blocks together as data of the pointer field.

[0058] In the embodiments of the present disclosure, the processing core identifier is unique, and the processing core can be identified by the processing core identifier. Since each storage entry includes access information of a plurality of data blocks, when generating the storage entry of the coherence directory, the identifiers of the processing cores corresponding to each data block can be concatenated together as visitor data of the data block, and the visitor data of the plurality of data blocks can be concatenated together as data of the pointer field.

[0059] The bit width of the pointer field is round up, where M is the sum of the number of visitors of the plurality of data blocks, and N is the number of processing cores.

[0060] In some embodiments, before the step of concatenating, for each data block, the identifiers of the processing cores that visit the data block together as the visitor data of the data block, the method further comprises: determining address difference values of the plurality of data blocks based on address information of the plurality of data blocks, and determining the number of processing cores corresponding to the plurality of data blocks; and in the case that the address difference values of the plurality of data blocks are within a preset deviation threshold range, and the sum of the number of processing cores corresponding to the plurality of data blocks is less than or equal to a preset number threshold range, performing the step of concatenating, for each data block, the identifiers of the processing cores that visit the data block together as the visitor data of the data block.

[0061] In the coarse-grained compression, the visitor information field includes a pointer field, where the pointer field is used to indicate which processing cores visit each data block, i.e., which processing cores access each data block, and the bit width of the pointer field is round up, where M is the sum of the number of visitors of the plurality of data blocks, and N is the number of processing cores.

[0062] The step of generating, according to the access information of the plurality of data blocks, one storage entry of the coherence directory (i.e., step S502) comprises: for each data block, using a predetermined P bits to carry the visitor data of the data block; and concatenating the visitor data of the plurality of data blocks together as the data of the pointer field.

[0063] The N processing cores are divided into P groups, each group including N / P processing cores, and each of the P bits corresponds to a group of processing cores, i.e., one bit represents one group of processing cores. When at least one processing core in a group of processing cores visits the data block, the value of the bit corresponding to the group of processing cores is set to a first value, otherwise, the value of the bit corresponding to the group of processing cores is set to a second value. For example, the first value is 1, and the second value is 0, or the first value is 0, and the second value is 1.

[0064] For example, the number of processing cores is 32, and the processing cores are divided into 4 groups, each group including 8 processing cores. If at least one processing core in the 8 processing cores visits the data block, the value of the bit corresponding to the group of processing cores is 1; if none of the 8 processing cores visits the data block, the value of the bit corresponding to the group of processing cores is 0. Thus, the visitor data corresponding to the data block is obtained.

[0065] The visitor data corresponding to the plurality of data blocks is concatenated together to obtain the data of the pointer field. For example, the visitor data corresponding to the first data block is 0100, and the visitor data corresponding to the second data block is 0110. Thus, the visitor data of the first data block and the second data block is 01000110.

[0066] The embodiments of the present disclosure provide two combined compression modes of accurate compression and coarse-grained compression. The accurate compression is lossless compression, and the processing core vector in the storage entry can be accurately parsed. The coarse-grained compression is lossy compression, and the processing core vector in the storage entry cannot be accurately parsed. In the coarse-grained compression, the parsed processing core vector is greater than or equal to the number of the original processing core vector, and the listening traffic in the multi-core system needs to be increased, but the consistency principle will not be broken.

[0067] In some embodiments, before splicing the visitor data of the plurality of data blocks together as the data of the pointer field, the method further comprises: determining the address difference of the plurality of data blocks based on the address information of the plurality of data blocks, and determining the number of processing cores corresponding to the plurality of data blocks; in the case that the address difference of the plurality of data blocks is within a preset deviation threshold range, and the sum of the number of processing cores corresponding to the plurality of data blocks is less than or equal to a preset number threshold range, performing the splicing of the visitor data of the plurality of data blocks together as the data of the pointer field.

[0068] For example, the plurality of data blocks includes a first data block and a second data block, the address difference of the first data block and the second data block is determined according to the address information of the first data block and the address information of the second data block; the sum of the number of processing cores accessing the first data block and the number of processing cores accessing the second data block is calculated; and in the case that the address difference of the first data block and the second data block is less than or equal to a preset deviation threshold range, and the sum of the number of processing cores corresponding to the first data block and the second data block is less than or equal to a preset number threshold range, the accurate compression is implemented.

[0069] In some embodiments, before splicing the visitor data of the plurality of data blocks together as the data of the pointer field, the method further comprises: determining the address difference of the plurality of data blocks based on the address information of the plurality of data blocks, and determining the number of processing cores corresponding to the plurality of data blocks; in the case that the address difference of the plurality of data blocks is within a preset deviation threshold range, and the sum of the number of processing cores corresponding to the plurality of data blocks is greater than a preset number threshold range, performing the splicing of the visitor data of the plurality of data blocks together as the data of the pointer field.

[0070] For example, the plurality of data blocks includes a first data block and a second data block, the address difference of the first data block and the second data block is determined according to the address information of the first data block and the address information of the second data block; the sum of the number of processing cores accessing the first data block and the number of processing cores accessing the second data block is calculated; and in the case that the address difference of the first data block and the second data block is less than or equal to a preset deviation threshold range, and the sum of the number of processing cores corresponding to the first data block and the second data block is greater than a preset number threshold range, the coarse-grained compression is implemented.

[0071] In some embodiments, the deviation threshold can be determined according to the representable range. If the representable range is four digits, the deviation threshold can be that the last four digits in the address information of the data block are different, and if other digits are different, the first data block and the second data block cannot be accurately compressed or coarsely compressed, i.e., cannot exist in the same storage entry.

[0072] Since the storage entry of the embodiment is basically similar in structure to a typical storage entry, no additional timing resources are required, and therefore, the adaptability of the storage entry is stronger. Moreover, the storage entry can be flexibly configured as needed, thereby meeting different needs of the consistency directory.

[0073] FIG. 6 is a schematic diagram of the structure of a storage entry in an embodiment of the present disclosure. As shown in FIG. 6, the storage entry includes a plurality of address fields, which include a first address field (tag) and other address fields (offset). The first address field is used to carry address information of one data block in a plurality of data blocks, and each of the other address fields is used to carry an address offset of another data block in the plurality of data blocks relative to the address information in the first address field.

[0074] The plurality of address fields in each storage entry includes a first address field and other address fields. The first address field carries address information of one data block, and the other address fields carry address information of other data blocks. Moreover, the other address fields are determined based on the address information of the other data blocks and the address information of the first data block. The other address fields are address offsets of the first data block and the other data blocks, i.e., differences between the addresses of the first data block and the other data blocks. The bit width of the address offset is much smaller than the bit width of the address information.

[0075] For the address information of the other data blocks, only the address offset is recorded, and the complete address information does not need to be recorded. The bit width corresponding to the address offset can be set according to the capacity of the address space, and the field bit width is much smaller than the complete address information, and therefore, the storage space occupied is smaller.

[0076] For example, the storage entry stores address fields of a first data block and a second data block. The first address field carries address information of the first data block, and the second address field carries address information of the second data block. However, the address information of the second data block is not complete address information, but an address offset of the second data block relative to the first data block. Since the address offset occupies smaller storage space than the complete address information.

[0077] When the storage entry includes address information of multiple data blocks, each data block corresponds to an address field, with the difference that the first address field carries complete address information of the first data block, and each of the other address fields carries an address offset of the corresponding data block.

[0078] In the embodiments of the present disclosure, the bit width of the first address field can be the length of the low bit part of the address information, and the bit width of the other address fields can be the length of the address offset.

[0079] In some embodiments, the address information includes an index part and a tag part, where the index part is used to index the coherence directory, and the tag part is used to index the storage address of the data block.

[0080] In some embodiments, the index part of the address information of each data block corresponds to the high bit part of the address of the data block, and the tag part of the address information of each data block corresponds to the low bit part of the address of the data block.

[0081] The address of each data block is segmented, with the high bit part of the address of the data block as the index part and the low bit part of the address of the data block as the tag part. For example, if the width of the address information of the data block is 40 bits, the 6th-15th bits can be the high bit part of the address as the index address, and the 16th-40th bits can be the low bit part of the address as the tag part. It should be noted that the 1st-5th bits are internal addresses and are not the high bit and low bit parts of the address.

[0082] As shown in FIG. 6, the storage entry further includes a state field (state) for carrying state information of the data block. The state information includes but is not limited to Invalid, Unique, and Shared. Invalid means that the data block is an invalid data block or the storage entry is in an invalid state, which can be represented by 2’b00. Unique means that the data block is accessed by one processing core, which can be represented by 2’b01. Shared means that the data block is accessed by more than one processing core, which can be represented by 2’b11.

[0083] When the storage entry records multiple data blocks, each data block corresponds to a state field. For example, the state field corresponding to the first data block is state1, and the state field corresponding to the second data block is state2. state1 is used to record the state of the first data block, and state2 is used to record the state of the second data block. The first data block and the second data block belong to the same directory way.

[0084] In some embodiments, the storage entry further comprises a compression mode field (z_flag) for carrying a compression mode of the visitor information. As mentioned previously, the present disclosure provides two compression modes, i.e., fine-grained compression and coarse-grained compression, and the specific compression modes of the fine-grained compression and the coarse-grained compression are not repeated. The compression mode field is used to record the compression mode of the visitor information. When the compression mode field carries a fine-grained compression identifier (1’b1), it indicates that the visitor information is compressed in the fine-grained compression mode. When the compression mode field carries a coarse-grained compression identifier (1’b0), it indicates that the visitor information is compressed in the coarse-grained compression mode.

[0085] In the embodiments of the present disclosure, the bit width of each state field can be 1 bit, and the bit width of the compression mode field can be 1 bit.

[0086] In some embodiments, the method for storing a consistency directory for a multi-core system further comprises: storing the storage entry in the memory.

[0087] In some embodiments, generating a storage entry of the consistency directory according to the access information of the plurality of data blocks (i.e., step S502) comprises: generating an address field corresponding to each data block according to a tag part of the address information of the data block; generating a visitor information field according to the visitor information of the plurality of data blocks; and generating a storage entry of the consistency directory based on the address field and the visitor information field.

[0088] The address information of the data block is relatively long. If the address field is generated according to the address information of the data block, the address field occupies a relatively large storage space. The embodiments of the present disclosure generate an address field corresponding to each data block according to a tag part of the address information of the data block, and the tag part can be a low bit part of the address of the data block. Thus, the generated address field of the data block is relatively short and occupies less storage resource.

[0089] The visitor information of the data block includes but is not limited to the number of processing cores (the number of visitors) that access the data block and which processing core accesses the data block. The visitor information field is generated according to the visitor information of the data block, such as the number of visitors of each data block and the processing core that accesses the data block.

[0090] In some embodiments, after the storage entry is stored in the memory, the method further comprises: reading the storage entry from the memory; and generating the address information and the visitor information of each data block according to the storage entry.

[0091] The storage entry is read from the memory by the index part of the data block, and then the storage entry is decomposed and analyzed to obtain the address information and the visitor information of each data block.

[0092] In some embodiments, generating the address information and the visitor information of each data block according to the storage entry includes: performing a decomposition process on the storage entry to obtain a state field, a compression mode field, an address field, and a visitor information field of each data block; obtaining the address information of each data block based on the address field of each data block; and performing a parsing process on the visitor information field based on the state field and the compression mode field to obtain the visitor information of each data block.

[0093] In reading the data block, the storage entry is decomposed to obtain the state field, the compression mode field, the address field, and the visitor information field of each data block from the storage entry. The address information of the data block is obtained based on the address field, and the visitor information of each data block is obtained by performing a parsing process on the visitor information field based on the state field and the compression mode field.

[0094] FIG. 7 is a schematic diagram of a read-write model of a consistency directory according to an embodiment of the present disclosure. As shown in FIG. 7, for any storage entry in a directory way, the storage entries of multiple data blocks are compressed by a compression module 71, and then the storage entry is written into a storage block ram n corresponding to the directory way. For example, the storage entries wayn_1, wayn_2, wayn_… corresponding to multiple data blocks are compressed to obtain a storage entry, and then the storage entry is stored in a certain address of a target storage block ram n.

[0095] In reading the storage entry of the data block, the storage entry is read from a certain address of a target storage block ram n by a decompression module 72, and the storage entry is decomposed to obtain the state field, the compression mode field, the address field, and the visitor information field of each data block. The address information of the data block is obtained based on the address field, and the visitor information of each data block is obtained by performing a parsing process on the visitor information field based on the state field and the compression mode field.

[0096] FIG. 8 is a schematic diagram of a structure of a consistency directory according to an embodiment of the present disclosure. As shown in FIG. 8, the consistency directory includes multiple directory sets, and only a first directory set set1 is shown in the figure. Each directory set includes N directory ways way1, way2, …, wayN, and the directory ways way1, way2, …, wayN have a one-to-one correspondence with storage blocks ram1, ram2, …, ramN. Each directory way includes multiple sub-directory ways, for example, the directory way way1 includes sub-directory ways way1_1, way1_2, …, each sub-directory way corresponds to a data block, and each storage entry stores multiple data blocks. Compared with a related art in which one storage entry in a consistency directory stores only one data block, storing multiple data blocks in one storage entry can improve the resource utilization of the memory.

[0097] The memory can store one or more storage entries, each of which contains access information of a plurality of data blocks, so that the memory can carry more access information of data blocks under the condition that the storage resource remains unchanged, thereby achieving the purpose of consistency directory compression.

[0098] The consistency directory structure provided by the embodiments of the present disclosure is improved on the basis of the structure of the typical consistency directory shown in FIG. 2, and the structure of the storage entry is changed slightly, which is conducive to popularizing the method for storing a consistency directory for a multi-core system provided by the embodiments of the present disclosure on the basis of the existing consistency directory.

[0099] It should be noted that FIG. 8 is only an example of the structure of the memory, and actually the consistency directory provided by the embodiments of the present disclosure can also be stored in a memory of other structures.

[0100] In order to more clearly understand the technical solutions of the present disclosure, the method for storing a consistency directory for a multi-core system provided by the embodiments of the present disclosure will be further described in the specific embodiment mode below.

[0101] FIG. 9 is a structural schematic diagram of a consistency directory containing two data blocks in the embodiments of the present disclosure. As shown in FIG. 9, the consistency directory includes a plurality of directory groups and N storage blocks ram1, ram2, …, ramN, each of which corresponds to a directory road way, and each directory road includes two sub-directory roads wayn_1 and wayn_2.

[0102] Taking the storage entry of two data blocks as an example, the two data blocks correspond to two sub-directory roads wayn_1 and wayn_2, and the access information of the two data blocks is compressed in one storage entry, that is, one storage entry carries the access information of the original two storage entries.

[0103] When indexing the consistency directory, the storage block ram n can be indexed through the index part index of the data block, and the storage entry can be obtained from the ram n, and then the storage entry is parsed and processed to obtain the address information and the visitor information of the data block.

[0104] In some embodiments, the storage entry includes a plurality of fields, and generating a storage entry of a consistency directory according to access information of a plurality of data blocks includes: obtaining the plurality of fields based on the access information of the first data block and the second data block; and generating a storage entry of a consistency directory according to the plurality of fields.

[0105] In some embodiments, the field includes a first address field, and obtaining the plurality of fields based on the access information of the first data block and the second data block includes: generating the first address field based on a low bit part of the address information of the first data block.

[0106] In some embodiments, the fields include an address offset field, and obtaining the plurality of fields based on the access information of the first data block and the second data block includes determining the address offset field based on a low bit part of the address information of the first data block and a low bit part of the address information of the second data block.

[0107] In some embodiments, the fields include a compression mode field. Obtaining the plurality of fields based on the access information of the first data block and the second data block includes determining the compression mode field based on the address offset field, the access information of the first data block and the second data block.

[0108] In some embodiments, the fields include a state field, and obtaining the plurality of fields based on the access information of the first data block and the second data block includes determining the state field of the first data block based on the access information of the first data block, and determining the state field of the second data block based on the access information of the second data block.

[0109] In some embodiments, the fields include a number of accessors field and a pointer field, and obtaining the plurality of fields based on the access information of the first data block and the second data block includes determining the number of accessors field and the pointer field based on the access information of the first data block and the second data block.

[0110] In some embodiments, generating a storage entry of the coherence directory according to the plurality of fields includes determining the number of accessors field and the pointer field based on the access information of the first data block and the second data block; and generating a storage entry of the coherence directory according to the first address field, the address offset field, the compression mode field, the state field of the first data block, the state field of the second data block, the number of accessors field and the pointer field.

[0111] In parsing (decomposing) the storage entry, the other address information is obtained by merging operation according to the first address field and the other address field.

[0112] The structure of a storage entry of the coherence directory and the read-write mode are introduced below by taking the first data block and the second data block as examples.

[0113] FIG. 10 is a schematic diagram of a storage entry of two data blocks represented by the coherence directory structure provided by the embodiments of the present disclosure. As shown in FIG. 10, the storage entry includes a state field of the first data block (state1), a state field of the second data block (state2), a first address field (tag), other address fields (offset), a compression mode field (z_flag), a segment field (num_way1) and a pointer field (core_point).

[0114] The state field (state1) of the first data block is used to record the state information of the first data block, the state field (state2) of the second data block is used to record the state information of the second data block, the first address field (tag) is used to record the address information of the first data block, the other address field (offset) is used to record the address information of the second data block, the compression mode field (z_flag) is used to record the compression mode of the access information, the segmentation field (num_way1) is used to record the number of segments of the pointer field, and the pointer field (core_point) is used to record which processing core accesses the first data block and the second data block.

[0115] When the first address field is the address information of the first data block, the other address field is the address offset of the address of the second data block relative to the address of the first data block; when the first address field is the address information of the second data block, the other address field is the address offset of the address of the first data block relative to the address of the second data block.

[0116] When reading the storage entry, whether the data block is stored is determined by the state field, the address information of the data block is obtained by the first address field and the other address field, the compression mode of the data block is determined by the compression mode field, and then the access information of the data block is obtained according to the compression mode, the segmentation field and the pointer field. When the data block is precisely compressed, the pointer field can be segmented by the value in the segmentation field to parse the access information of the first data block and the second data block.

[0117] As shown in FIG. 11, when there is only one data block in the directory road, the access information of the data block does not need to be compressed, at this time, the storage entry includes the state field (state1) of the first data block, the state field (state2) of the second data block, the first address field (tag), and the processing core vector field (core_vector).

[0118] For example, as shown in FIG. 12, the state field (state2) of the second data block is filled with 2’b11, indicating that the storage entry only stores the access information of the first data block. The state field (state1) of the first data block, the first address field (tag1), and the processing core vector field (core1_vector) are filled with the state information, the address information and the processing core vector of the first data block, respectively.

[0119] When reading the storage entry, the decompression module detects that the field of the state field (state2) of the second data block is filled with 2’b11, that is, it can be determined that the storage entry only stores the access information of the first data block, and the address information and the access information of the first data block are obtained after decomposition.

[0120] For example, as shown in FIG. 13, the state field (state1) of the first data block is filled with 2'b11, indicating that the storage entry only stores the access information of the second data block. The state field (state2), the second address field (tag2), and the processing core vector field (core2_vector) of the second data block store the state information, the address information, and the processing core vector of the second data block, respectively.

[0121] When reading the storage entry, the decompression module detects that the field of the state field (state1) of the first data block is filled with 2'b11, and determines that the storage entry only stores the access information of the second data block, and the address information and the visitor information of the second data block are obtained after decomposition.

[0122] As shown in FIG. 14, the state field (state1) of the first data block stores the state information of the first data block; the state field (state2) of the second data block stores the state information of the second data block; the first address field (tag1) stores the address information of the first data block; the other address field (offset) stores the second address information of the second data block; the compression mode field (z_flag) is filled with 1'b1, indicating that the storage entry is accurately compressed; the segmentation field (num_way1) is used to indicate the number of "1"s in the processing core vector, and the value in the segmentation field can be used to segment the pointer field to obtain the processing core vector of the first data block and the second data block. The pointer field (core_point) stores the pointer value converted from the processing core vector of the first data block and the second data block.

[0123] When generating the storage entry, the compression mode of the visitor information is determined by the following two judgment conditions.

[0124] The first judgment condition: whether the address difference between the address information of the first data block and the address information of the first data block is within the deviation threshold range.

[0125] The second judgment condition: whether the sum of the number of processing cores accessing the first data block and the second data block is less than or equal to the preset number threshold.

[0126] When the first judgment condition and the second judgment condition are both met, the address information and the visitor information of the first data block and the second data block can be accurately compressed.

[0127] When reading the storage entry, the decompression module parses the state field (state1) of the first data block and the state field (state2) of the second data block, and judges that the storage entry stores the first data block and the second data block if both the state fields are not 2'b11. If the compression mode field (z_flag) is parsed as 1'b1, it is judged that the storage entry is accurate compression. Based on the segmentation field (num_way1), the data block pointer field (core_point) is segmented and processed, and the visitor information of the first data block and the second data block is parsed.

[0128] As shown in FIG. 15, the state field (state1) of the first data block stores the state information of the first data block; the state field (state2) of the second data block stores the state information of the second data block; the first address field (tag1) stores the address information of the first data block; the other address field (offset) stores the address information of the second data block; the compression mode field (z_flag) is filled with 1'b0, indicating that the storage entry is coarse-grained compression; the not_care field does not need to be concerned; and the pointer field (core_point) stores the visitor information of the first data block and the second data block after coarse-grained conversion, that is, 1 bit in core_point represents the value of P bits in core_vector, and if at least one bit in the continuous P bits in core_vector is "1", the corresponding 1 bit in core_point is assigned a value of "1".

[0129] When generating the storage entry, the compression mode of the visitor information is judged by the following two judgment conditions.

[0130] The first judgment condition is whether the address difference between the address information of the first data block and the address information of the first data block is within the deviation threshold range.

[0131] The second judgment condition is whether the sum of the number of processing cores accessing the first data block and the second data block is greater than the preset number threshold.

[0132] When the first judgment condition and the second judgment condition are both met, the address information and the visitor information of the first data block and the second data block can be coarse-grained compressed.

[0133] When reading the storage entry, the decompression module parses the state field (state1) of the first data block and the state field (state2) of the second data block, and judges that the storage entry stores the first data block and the second data block if the state fields are not 2'b11. If the parsing result of the compression mode field (z_flag) is 1'b0, it is judged that the storage entry is coarsely granular compressed. The pointer field (core_point) is segmented into high and low parts, and the processing core vector corresponding to the first data block and the second data block is parsed, respectively. Since the coarsely granular compression mode is lossy compression, the number of "1"s in the parsed processing core vector core_vector is greater than or equal to the number of "1"s in the processing core vector core_vector before storage.

[0134] When the first judgment condition is not met, it is indicated that the first data block and the second data block do not meet the compression condition and cannot be stored in the same storage entry. Therefore, a judgment condition is added when the directory path is selected to prevent such a situation from occurring, or the directory data with the longest storage time in the directory data is removed before storage.

[0135] In some embodiments, in the case that there are two data blocks in the storage directory and the number of visitors is two, the number of visitors field includes one number of visitors field.

[0136] When there are two data blocks in the storage directory and the number of visitors field has only one, the number of visitors field can only represent the number of visitors of the first data block, and the visitor information of the first data block is parsed according to the number of visitors field, and the remaining visitor information is the visitor information of the second data block.

[0137] The method for storing a consistent directory for a multi-core system provided in the embodiments of the present disclosure generates one storage entry of a consistent directory according to the access information of multiple data blocks, and the storage entry includes an address field carrying address information of the multiple data blocks and a number of visitors field representing visitor information of the multiple data blocks, that is, the storage entry includes the address field and the number of visitors field of the multiple data blocks, thereby reducing the occupation of storage resources by the consistent directory data. In the case of consistent directory data, the embodiments of the present disclosure can reduce the area of hardware for storing the consistent directory. The consistent directory storage method can store the information of multiple data blocks in one storage entry, so that less storage space can be used to store the consistent directory, and the storage resource utilization rate is improved.

[0138] The embodiments of the present disclosure also provide a multi-core system.

[0139] FIG. 16 is a structural schematic diagram of a multi-core system according to an embodiment of the present disclosure. As shown in FIG. 16, the multi-core system according to an embodiment of the present disclosure includes a plurality of processing cores 601, a directory data processing module 602, and a memory 603. The processing cores 601 are signal connected to the directory data processing module 602, and the directory data processing module 602 is signal connected to the memory 603.

[0140] The processing cores 601 are configured to access data blocks.

[0141] The directory data processing module 602 is configured to generate directory data based on the data blocks, and perform processing based on the directory data.

[0142] The directory data processing module 602 processes the directory data of the data blocks by the method for storing a consistent directory for a multi-core system according to an embodiment of the present disclosure, to obtain a storage entry of the consistent directory.

[0143] In the embodiment of the present disclosure, the structure and generation manner of the storage entry are the same as those of the above method embodiment, and will not be described herein again.

[0144] The memory 603 is configured to store the storage entry of the consistent directory.

[0145] The multi-core system according to an embodiment of the present disclosure, the directory data processing module processes the access information of the data blocks, one storage entry carries address fields of address information of a plurality of data blocks and an accesser information field representing accesser information of the plurality of data blocks, that is, the storage entry includes the address fields and the accesser information field of the plurality of data blocks, thereby reducing the occupation of the storage resource by the consistent directory data, and in the case of the directory data, the area of the storage resource occupation hardware can be reduced.

[0146] An electronic device according to an embodiment of the present disclosure includes a memory and a processor. The memory stores a computer program capable of being executed by the processor. The computer program is executed by the processor to implement any one of the methods for storing a consistent directory for a multi-core system according to an embodiment of the present disclosure.

[0147] For example, the computer program is executed by the processor to implement the following: obtaining access information of a plurality of data blocks, wherein the access information includes address information of each data block and accesser information of the data block; and generating a storage entry of a consistent directory according to the access information of the plurality of data blocks, wherein the storage entry includes: a plurality of address fields corresponding to the plurality of data blocks one by one, configured to carry the address information of the plurality of data blocks; and an accesser information field, configured to represent the accesser information of the plurality of data blocks.

[0148] The embodiment of the present disclosure provides a computer readable medium, which stores a computer program, and the program is executed by a processor to implement any one of the methods for storing a consistent directory for a multi-core system according to the embodiments of the present disclosure.

[0149] The embodiment of the present disclosure provides a computer program product, which comprises computer readable code or a non-volatile computer readable storage medium carrying the computer readable code, and when the computer readable code is run in a processor of an electronic device, the processor in the electronic device is executed to implement any one of the methods for storing a consistent directory for a multi-core system according to the embodiments of the present disclosure.

[0150] The processor is a device with data processing capability, including but not limited to a central processing unit (CPU) and the like; the memory is a device with data storage capability, including but not limited to a random access memory (RAM, more specifically SDRAM, DDR, etc.), a read-only memory (ROM), an electrically erasable programmable read-only memory (EEPROM), a flash memory (FLASH); the I / O interface (read-write interface) is connected between the processor and the memory, and can realize information interaction between the memory and the processor, and includes but is not limited to a data bus (Bus) and the like.

[0151] Those skilled in the art can understand that all or some of the functional modules / units in the above disclosed steps, systems and devices can be implemented as software, firmware, hardware and appropriate combinations thereof.

[0152] In the hardware implementation, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component can have multiple functions, or one function or step can be executed by several physical components in cooperation.

[0153] Some or all of the physical components can be implemented as software executed by a processor, such as a central processing unit (CPU), a digital signal processor, or a microprocessor, or hardware, or a combination of software and / or hardware. Such software can be distributed on computer readable media, which can comprise computer storage media (or non-transitory media), and communication media (or transitory media). Computer storage media, as used herein, includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data. Computer storage media includes, but is not limited to, random access memory (RAM), such as SDRAM, DDR, or other RAM, read only memory (ROM), electrically erasable programmable read only memory (EEPROM), flash memory, or other memory technology, compact disc read only memory (CD-ROM), digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and that can be accessed by a computer. Further, it should be appreciated by those skilled in the art that computer storage media generally includes computer readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media. Communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media. Examples of communication media include, but are not limited to, ionized gases, or other propagation techniques.

[0154] The present disclosure has disclosed example embodiments, and while specific terminology has been employed, it is merely in the nature of a general description and is not intended to be limiting. In some instances, it will be apparent to those skilled in the art that features, characteristics or / and elements described in connection with a particular embodiment can be used in conjunction with other embodiments unless otherwise explicitly stated. Accordingly, it will be understood that various changes in form and details can be made without departing from the scope of the disclosure as set forth in the appended claims.

Claims

1. A method for storing a coherence directory for a multi-core system, the multi-core system comprising N processing cores, N being an integer greater than 1, the method comprising: obtaining access information of a plurality of data blocks, wherein the access information comprises address information of each data block and visitor information of the data block; generating a storage entry of a coherence directory according to the access information of the plurality of data blocks, wherein the storage entry comprises: a plurality of address fields corresponding to the plurality of data blocks one by one, for carrying the address information of the plurality of data blocks; and a visitor information field for representing the visitor information of the plurality of data blocks.

2. The method of claim 1, wherein, The visitor information field comprises information of processing cores that access the plurality of data blocks, and does not comprise information of processing cores that do not access the plurality of data blocks.

3. The method of claim 2, wherein, The visitor information field comprises: one or more visitor number fields for indicating the number of visitors of each data block; and a pointer field for indicating which processing cores are the visitors of each data block.

4. The method of claim 3, wherein, Generating a storage entry of a coherence directory according to the access information of the plurality of data blocks comprises: for each data block, concatenating the identities of the processing cores that access the data block together as visitor data of the data block; concatenating the visitor data of the plurality of data blocks together as data of the pointer field.

5. The method of claim 4, wherein, Before for each data block, concatenating the identities of the processing cores that access the data block together as visitor data of the data block, the method further comprises: determining address difference values of the plurality of data blocks based on the address information of the plurality of data blocks, and determining the number of processing cores that access the plurality of data blocks; in a case where the address difference values of the plurality of data blocks are within a preset deviation threshold range, and the sum of the number of processing cores that access the plurality of data blocks is less than or equal to a preset number threshold range, performing for each data block, concatenating the identities of the processing cores that access the data block together as visitor data of the data block.

6. The method of claim 2, wherein, The visitor information field comprises a pointer field, and generating a storage entry of a coherence directory according to the access information of the plurality of data blocks comprises: for each data block, using a predetermined P bits to carry the visitor data of the data block, wherein the N processing cores are divided into P groups, each group comprising N / P processing cores, each of the P bits corresponds to a group of processing cores, when at least one processing core in a group of processing cores accesses the data block, the value of the bit corresponding to the group of processing cores is set to a first value, otherwise the value is set to a second value; concatenating the visitor data of the plurality of data blocks together as data of the pointer field.

7. The method of claim 6, wherein, Before concatenating the visitor data of the plurality of data blocks together as data of the pointer field, the method further comprises: determining address difference values of the plurality of data blocks based on the address information of the plurality of data blocks, and determining the number of processing cores that access the plurality of data blocks; In a case where the address difference of the plurality of data blocks is within a preset deviation threshold range, and the sum of the number of processing cores accessing the plurality of data blocks is greater than a preset number threshold, the method further comprises: splicing together the visitor data of the plurality of data blocks as the data of the pointer field.

8. The method of claim 3 or 6, wherein, The bit width of the pointer field is M log2N Ceiling, wherein M is the sum of the number of visitors of the plurality of data blocks, and N is the number of processing cores.

9. The method of claim 1, wherein, The plurality of address fields comprise a first address field and other address fields, the first address field is used to carry address information of one data block in the plurality of data blocks, and each of the other address fields is used to carry an address offset of other data blocks in the plurality of data blocks relative to the address information in the first address field.

10. The method of claim 1, wherein, The storage entry further comprises a state field used to carry state information of the plurality of data blocks.

11. The method of claim 1, wherein, The storage entry further comprises a compression mode field used to carry a compression mode of the visitor information.

12. The method of claim 1, further comprising: storing the storage entry in a memory.

13. The method of claim 12, wherein, The address information comprises an index part and a tag part.

14. The method of claim 13, wherein, Storing the storage entry in a memory comprises: storing the storage entry in the memory corresponding to the index part.

15. The method of claim 13, wherein, Generating one storage entry of the coherence directory according to the access information of the plurality of data blocks comprises: generating, according to the tag part of the address information of each data block, an address field corresponding to the data block.

16. The method of claim 13, wherein, The index part of the address information of each data block corresponds to a high-order part of the address of the data block, and the tag part of the address information of each data block corresponds to a low-order part of the address of the data block.

17. The method of claim 12, wherein, After storing the storage entry in the memory, the method further comprises: reading the storage entry from the memory; generating, according to the storage entry, the address information and the visitor information of each data block.

18. The method of claim 17, wherein, Generating, according to the storage entry, the address information and the visitor information of each data block comprises: decomposing the storage entry to obtain the state field, the compression mode field, the address field and the visitor information field of each data block; obtaining, based on the address field of each data block, the address information of each data block; parsing, based on the state field and the compression mode field, the visitor information field to obtain the visitor information of each data block.

19. The method of claim 18, wherein, The bit width of the state field is 2 bits, and the bit width of the compression mode field is 1 bit.

20. The method of claim 1, wherein, The plurality of data blocks comprise a first data block and a second data block, and the storage entry comprises a plurality of fields, and generating one storage entry of the coherence directory according to the access information of the plurality of data blocks comprises: obtaining the plurality of fields based on the access information of the first data block and the second data block; generating one storage entry of the coherence directory according to the plurality of fields.

21. The method of claim 20, wherein, The plurality of fields comprise a first address field, and obtaining the plurality of fields based on the access information of the first data block and the second data block comprises: generating the first address field based on a low-order part of the address information of the first data block.

22. The method of claim 20, wherein, The plurality of fields comprise an address offset field, and obtaining the plurality of fields based on the access information of the first data block and the second data block comprises: The address offset field is determined based on a low bit part of address information of the first data block and a low bit part of address information of the second data block.

23. The method of claim 22, wherein, The plurality of fields includes a compression mode field, and the plurality of fields is obtained based on access information of the first data block and the second data block including: The compression mode field is determined based on the address offset field and the access information of the first data block and the second data block.

24. The method of claim 20, wherein, The plurality of fields includes a state field, and the plurality of fields is obtained based on access information of the first data block and the second data block including: The state field of the first data block is determined based on the access information of the first data block, and the state field of the second data block is determined based on the access information of the second data block.

25. The method of claim 20, wherein, The plurality of fields includes a number of accessors field and a pointer field, and the plurality of fields is obtained based on access information of the first data block and the second data block including: The number of accessors field and the pointer field are determined based on the access information of the first data block and the second data block.

26. The method of claim 20, wherein, In the case of two data blocks, the number of accessors field includes one number of accessors field.

27. A multi-core system comprising: a plurality of processing cores; a directory data processing module configured to process access information of a plurality of data blocks by the method for storing a consistent directory for a multi-core system according to any one of claims 1 to 26 to generate a storage entry of the consistent directory; a memory configured to store the storage entry of the consistent directory.

28. An electronic device comprising a memory, a processor, the memory stores a computer program, and the computer program is executed by the processor to implement the method for storing a consistent directory for a multi-core system according to any one of claims 1 to 26.

29. A computer readable medium having stored thereon a computer program, the computer program being executed by a processor to implement the method for storing a consistent directory for a multi-core system according to any one of claims 1 to 26.

30. A computer program product comprising a computer program, the computer program being executed by a processor to implement the method for storing a consistent directory for a multi-core system according to any one of claims 1 to 26.

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