Electronic devices including self-mixing interferometry sensors and methods for using said devices

Abstract

An electronic device includes a self -mixing interferometer (SMI) sensor. The SMI sensor includes a vertical cavity surface emitting laser (VCSEL) configured to output optical light toward a user or object. The VCSEL includes: a. semiconductor substrate; a first reflector structure formed above a first surface of the semiconductor substrate; a second reflector structure formed above the first surface of the semiconductor substrate; a. Fabry-Perot Cavity including an active region arranged, between the first reflector structure and the second reflector structure; a mode filter cap layer formed on or over a first surface of the first reflector structure facing away from the semiconductor substrate. The SMI sensor further includes a detector configured detect self-mixing interferometer (SMI) signals formed in the Fabry-Perot Cavity and further configured to generate electrical signals based on the detected reflected optical light.

Description

[0001] P-VIERDR-OOl / WO

[0002] 1

[0003] ELECTRONIC DEVICES INCLUDING SELF-MIXING INTERFEROMETRY SENSORS AND METHODS FOR USING SAID DEVICES

[0004] Field

[0005] This present disclosure generally relates to self-mixing interferometry (SMI) sensors devices including SMI sensors.

[0006] Background

[0007] The stability of self-mixing interferometry (SMI) sensors that use vertical-cavity surface-emitting lasers (VCSELs) is often compromised by mode jumps and polarization flips inherent to the VCSEL. Achieving single-mode operation in VCSELs typically requires a small oxide aperture (less than 6 micrometers in diameter) and low driving currents (below 1.5 mA) . However, these low driving currents result in reduced output power, which directly impacts the strength of the SMI signal, as the signal is proportional to the laser's output power.

[0008] In addition to mode stability issues, the linear polarization of the VCSEL is usually aligned with the crystal axis, but this approach can cause yield losses across the wafer. Moreover, the polarization tends to flip unpredictably as current increases or temperature fluctuates, and even experiences brief micro-flips on a nanosecond timescale. Without proper control over the optical mode and polarization of the VCSEL, these instabilities introduce unpredictable mode and polarization jumps, leading to wavelength shifts of hundreds of picometers. Since the stability of the laser wavelength can be an important factor in the accuracy of SMI sensors, these factors severely limit sensor performance and reliability . P-VIERDR-OOl / WO

[0009] - 2 -

[0010] Brief Description of the Drawings

[0011] In the drawings, like reference characters generally refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead generally being placed upon illustrating the principles of the disclosure. In the following description, various aspects of the disclosure are described with reference to the following drawings, in which :

[0012] FIG. 1 shows a vertical cavity surface emitting laser (VCSEL) according to one example;

[0013] FIGS. 2 and 3 are graphs of plots of the electric field and optical index for different cap layers of the VCSEL of FIG. 1;

[0014] FIG. 4 include a plot output power for a VCSEL with a phase match cap layer) and a plot of output power for VCSEL with an antiphase match cap layer;

[0015] FIG. 5 shows a VCSEL according to at least one example) ;

[0016] FIG. 6 images of optical modes (LP01-LP71) which can be supported and produced by at least the VCSEL of FIG. 5;

[0017] FIG. 7 shows a VCSEL according to at least one aspect of the present disclosure;

[0018] FIG. 8 shows images of electrical field of optical mode which can be produced by circular and elliptical shaped apertures of a mode filter cap layer for a VCSEL;

[0019] FIG. 9 shows a diagram of a device / system according to at least one example of the present disclosure;

[0020] FIG. 10 shows a flow diagram of a method according to at least one aspect of the present disclosure P-VIERDR-OOl / WO

[0021] Description

[0022] The following detailed description refers to the accompanying drawings that show, by way of illustration, specific details and aspects in which the disclosure may be practiced. One or more aspects are described in sufficient detail to enable those skilled in the art to practice the disclosure. Other aspects may be utilized and structural, logical, and electrical changes may be made without departing from the scope of the disclosure. The various aspects described herein are not necessarily mutually exclusive, as some aspects can be combined with one or more other aspects to form new aspects. Various aspects are described in connection with methods and various aspects are described in connection with devices. However, it may be understood that aspects described in connection with methods may similarly apply to the devices, and vice versa. Throughout the drawings, it should be noted that like reference numbers are used to depict the same or similar elements, features, and structures. Throughout the drawings, it should be noted that proportions are not necessary to scale and that the size of features may be emphasized for ease of illustration.

[0023] FIG. 1 shows a simplified cross-sectional view of a vertical cavity surface emitting laser (VCSEL) 100. The VCSEL 100 used as or for a self-mixing interferometer (SMI) sensor.

[0024] The VCSEL 100 includes bottom mirror or reflector structure

[0025] 120 and a top mirror or reflector structure 140. Between the bottom mirror 120 and the top mirror 140 is an active region 130.

[0026] Further, the top mirror 140 can have a first conductivity type, e.g., p-type while the bottom mirror 120 has the opposite conductivity type, e.g., n-type. Each of the bottom mirror 120 and the mirror 140 can each be or include a distributed Bragg P-VIERDR-OOl / WO

[0027] 4 reflector (DBR) . For example, in at least one example, the top mirror 140 is a p-DBR and the bottom mirror 120 is a n-DBR.

[0028] The active region or gain region 130 includes a Fabry-Perot resonator and may include a layer or layer stack providing a multiple quantum well (MQW) structure. The MQW structure can include one or a plurality of MQW layers or regions.

[0029] As shown in the example of FIG. 1, the mirrors 120, 140 and the active region 130 are disposed over or on a semiconductor substrate 110. In one or more instances case, the semiconductor substrate can be or include a gallium arsenide (GaAs) substrate.

[0030] Further, a cap layer 150 can be disposed on or over the top reflector structure 140. In at least on example, the cap layer 150 can have thickness, measured in vertical direction (e.g., along z-axis) of a X / 4n where X is the wavelength and n is the optical index of that layer (cap layer) .

[0031] A cap layer 150 can be configured to terminate the produced electrical field in phase or in anti-phase and can have a huge impact on the top mirror reflectivity.

[0032] FIG. 2 is a graph 200 including a plot of the electric field 210 and a plot 220 of the optical index of the cap layer 140 for the VCSEL 100 in the case where the cap layer 150 is in phase or in phase-match with the electric field produced by the VCSEL 100.

[0033] Similarly, FIG. 3 is a graph 300 including a plot 310 of the electric field and a plot 320 of the optical index of the cap layer 140 for the VCSEL 100 in the case where the cap layer P-VIERDR-OOl / WO

[0034] 5

[0035] 150 is in anti-phase or anti-phase match with the electric field produced by the VCSEL 100.

[0036] The graphs 200 and 300 are plotted as a function of distance along the z-direction.

[0037] FIG. 4 is a graph 400 include a plot 410 of output power for a phase match cap layer (see e.g., FIG. 2) and a plot 420 of output power for an anti-phase match cap layer for a VCSEL. The output power is a function of input or threshold current. As shown by the graph 400 having a phase matching layer will increase the threshold current while having an anti-phase matching layer would decrease threshold current. For example, in for some exemplary VCSELs, the threshold current can be affected by an amount of at least 1 mA, while in other VCSELs, the amount may be less.

[0038] FIG. 5 shows a VCSEL 500. The VCSEL 500 may be considered a more detailed representation of the VCSEL 100 of FIG. 1. Accordingly, the VCSEL 500 may in several respects be similar to the VCSEL 100 of FIG. 1. Hence, herein the same elements being referred to with the same reference number. Therefore, a duplicated description of such elements is not provided.

[0039] As shown in FIG. 5, the VCSEL has a mesa structure, wherein a bottom mesa includes the bottom mirror 120 (e.g., n-DBR) and a top mesa which includes the active region / area 130, a cavity 134 for Fabry-Perot resonator, one or more oxide apertures 136 (e.g., oxide layers defining oxide apertures) , and a top mirror 120 (e.g., p-DBR) .

[0040] Further, as shown, a top contact 180, a p-contact, is arranged on or over the top mesa, e.g., on or over the top mirror 120. P-VIERDR-OOl / WO

[0041] - 6 -

[0042] In at least this example, the top contact 180 has a ringshape. Therefore, input current prefers to flow along or at the edges of the VCSEL mesa. As a result, higher order optical modes are better supported at increased input current, which results in the overall mode profile having a donut-like shape.

[0043] For example, FIG. 6 shows the optical modes (LP01-LP71) which can be supported and produced by the VCSEL 500 of FIG. 5.

[0044] FIG. 7 shows a cross-sectional side view of a VCSEL 700, e.g., for SMI sensor, according to at least one aspect of the present disclosure. The VCSEL 700 is similar to the VCSEL 500 of FIG. 5. Again, the same elements being referred to with the same reference number. Therefore, a duplicated description of such elements is not provided.

[0045] However, unlike the VCSEL 500, the VCSEL 700 includes a mode filter cap layer 750. As shown, the mode filter cap layer 750, which can also be referred to as a mode filter, mode filter layer, VCSEL surface relief, or simply surface relief, is arranged on or over a first surface of the first reflector structure facing away from the semiconductor substrate.

[0046] In at least one instance, the mode filter layer 750 is configured to enforce a single optical mode for the optical output of the VCSEL. That is, in at least one example, the mode filter layer 750 is configured to a single optical mode which is a linearly polarized (LP) mode 01.

[0047] Furthermore, as a result of the presence or inclusion of the mode filter cap layer, the mode filter cap layer can cause or be configured to increase the reflectivity of a portion of the top reflector structure or the top mirror 140. In at least P-VIERDR-OOl / WO one example, the mode filter cap layer 705 can be configured to increase the reflectivity of a portion of the top mirror 140 to 99% reflectivity, e.g., configured to cause to the reflectivity to be in a range from approximately or about from 98% to approximately or about 99.9%.

[0048] In the example of at least FIG. 7, the mode filter cap layer 750 is configured to act as both a phase match layer and as an anti-phase match layer. That is, in at least one instance, the mode filter cap 750 is configured to act or be a phase match layer with respect to the single optical mode (e.g., LP01) , and is further configured to act or be as an anti-phase match layer with respect to one or more optical modes other than the single optical mode (e.g., higher order optical modes) .

[0049] In at least one example, the mode filter cap layer 750 has a thickness of X / 4n, with the thickness measured along a direction orthogonal to the first surface of the first reflector structure (e.g., along the Z-axis direction) . Further, where X represents a wavelength (e.g., fundamental wavelength) of the optical output of the VCSEL, and where n is an optical index of that mode filter cap layer.

[0050] As shown at least in the example of FIG. 7, the mode filter cap layer 750 is patterned. For example, at least in the instance of FIG. 7, the mode filter cap layer 750 is patterned so as to have a donut shape defining a recessed hole 755 arranged at the center of the mode filter cap layer 750.

[0051] In the example of FIG. 7, the recessed hole 755 is P-VIERDR-OOl / WO

[0052] - 8 - is a blind hole. In other instances, the recessed hole 755 may be realized as a through-hole, e.g., a hole extending through the entire thickness of the mode filter cap layer 750.

[0053] In at least one case, the mode filter cap layer 750 have a thickness (e.g., when mode filter cap layer 750 is made of gallium arsenide) in a range + / -10% of a target thickness at X / 4 / n. For example, at X (wavelength) = 940nm and n(GaAs)=3.5, thickness = 940 / 4 / 3.5 = 67nm + / -7nm. (Herein, thicknesses can be measured along the z-axis direction, e.g., perpendicular to a main surface of a layer or element.)

[0054] In one or more instances, the (etched) hole 755 of the mode filter cap layer 750 can have a diameter in a range of about or substantially 3 microns to about or substantially 6 microns .

[0055] Further, in the case where the wavelength X is 940 nanometers (nm) , the depth of the hole 755 can be in a range from about 60 nm to about 70 nm (e.g., with tolerances of + / -10%) .

[0056] In one or more examples, the mode filter cap layer 750 includes semiconductor material. For instance, the mode filter cap layer 750 can include or be a semiconductor layer. Further, such a semiconductor layer can include gallium arsenide (GaAs) with a refractive index of ~3.5. In other cases, the semiconductor layer for the mode filter cap layer 750 can be made from other materials, for example silicon dioxide (SiO2) , with a refractive index of n~1.5, or silicon nitride (S13N4) having a refractive index of n~2. Each different material for the filter cap layer 750 can lead to different thicknesses. P-VIERDR-OOl / WO

[0057] - 9 -

[0058] In at least one instance, the semiconductor layer for the mode filter cap layer 750 may deposited or formed epitaxially.

[0059] In general, the addition of a circular mode filter cap, in anti-phase onto the center of a VCSEL can enhance a single mode, e.g., the fundamental mode that is the Linear Polarized LP01. However, the polarization produced by such a VCSEL is not fixed or locked and as a result the optical output or light can switch, e.g., from the crystal axis

[0110] and [1- 10] even though the

[0110] may be preferred. This is due to the fact that the circular aperture leads to 2 degenerated eigen modes in the x and y direction (the effective optical indexes Neff are equal in the X and Y direction) .

[0060] Accordingly, the mode filter cap layer 750, with its etched hole 755, can be elliptical instead of circular. The etched hole 755 being elliptical breaks the symmetry and hence lifts the degeneracy which leads or produces to 2 distinct eigen modes (e.g., the effective optical indexes Neff are different from the X and Y direction) . See e.g., FIG. 8 which shows electrical field of optical mode produced by circular and elliptical shaped apertures.

[0061] As a result, the hole 755 being an elliptically shaped aperture, the VCSEL can realize stabilized polarization along the short axis of the ellipse. (See also, e.g., JAP Vixar) .

[0062] Further, in one or more examples, the stability of the polarization can be further enforced or further forced by means an oxide apertures defined by oxide layers as described herein. For example, instead of the oxide apertures defined by the oxide layers being circular in shape (e.g., from a top P-VIERDR-OOl / WO view) , the oxide apertures can be elliptical or elliptically shaped .

[0063] Further, without being bound by theory, the mode filter cap 750 can require that the output light 170 on that side of the VCSEL 700 to be significant. For example, at least, 10% of the total output power of the VCSEL 700 should pass through the filter. In other words, the VCSEL 700 being both single side and a bottom side emitting VCSEL 700.

[0064] For example, in at least one instance, the VCSEL 700 can be configured as a single-sided emitter that emits its optical output through a top side of the VCSEL. This is shown in FIG. 7 in which a top side of the emitter includes the top mirror 140 and the mode filter cap 750.

[0065] In other examples, a VCSEL, such as or similar to VCSEL 700, can be configured as a double-sided emitter that emits optical output through a top side and a bottom side of the VCSEL. For example, the top side of the emitter can include the top mirror 140 structure and the mode filter cap 750, while the bottom side of the emitter can be opposite to the top side (e.g., in the vertical / z-axis direction) .

[0066] Furthermore, the mode filter cap VCSEL 700 or other similar VCSELs are suitable for different kinds of SMI readout architecture, power and voltage readout.

[0067] In at least one example, a detector or detector circuitry can be arranged in the proximity of the Fabry-Perot cavity of the VCSEL 700 so as to be able to detect the self-mixing signals generated in the Fabry-Perot cavity. That is, the detector P-VIERDR-OOl / WO

[0068] - 11 - may be arranged external to the Fabry-Perot cavity or the VCSEL device.

[0069] In one or more cases, the detector can be a photodetector, which may include one or more photodiodes.

[0070] FIG. 9 shows a diagram of a device / system 900 according to at least one example of the present disclosure. In FIG. 9, the device 900 includes a SMI sensor 910. The SMI sensor 910 includes a VCSEL 914, which can be the VCSEL 500 or a similar one. Further, the SMI sensor 910 includes a detector 916 (e.g., a photodetector) as described herein.

[0071] The device / system 900 further include a driver circuity 920 is configured to provide the current and modulation signals to control and operate the VCSEL 914. For instance, the driver circuitry can be configured to selectively cause the VCSEL emit optical output.

[0072] In addition, the device / system 900 includes a read-out circuitry is configured to processes the signals output by the detector 916 in response to detecting interference signals by the VCSEL. The processing by the read-out circuitry 916 may include amplifying, filtering, and converting it into a usable format for further analysis or measurement.

[0073] Further, the system 900 further includes processors 940. The processors 940 may be used for analyze the signals from the read-out circuit in an SMI VCSEL system, applying algorithms to extract information such as the distance to an object based on the interference patterns. For example, the processors may be configured to execute instructions stored on non-transitory media . P-VIERDR-OOl / WO

[0074] - 12 -

[0075] FIG . 10 shows a method 1000 according to at least one aspect of the present disclosure . The method may be performed at least in part by the VCSEL 1000 or one similar there .

[0076] The method 1000 includes at 1010 , emitting one or more optical light from a vertical cavity surface emitting laser (VCSEL ) towards a target . The VCSEL includes :

[0077] - a semiconductor substrate

[0078] - a first reflector structure formed above a first surface of the semiconductor substrate

[0079] - a second reflector structure formed above the first surface of the semiconductor substrate

[0080] - a Fabry-Perot Cavity including an active region arranged between the first reflector structure and the second reflector structure

[0081] - a mode filter cap layer formed on or over a first surface of the f irst reflector structure facing away from the semiconductor substrate .

[0082] At 1020 , the method 1000 further includes receiving in the Fabry-Perot cavity, a portion o f optical light output from the VCSEL and reflected from the target to generate a SMI signal .

[0083] At 1030 , the method 1000 further includes generating, by a detector configured detect sel f-mixing interferometer ( SMI ) signals formed in the Fabry-Perot Cavity of the VCSEL, electrical signals in response to the SMI signals formed in the Fabry-Perot Cavity of the VCSEL .

[0084] At 1040 , the method 1000 includes processing the electrical signals from the detector . P-VIERDR-OOl / WO

[0085] The systems or devices described herein, e.g., SMI sensors, can be applied to or used with SMI systems, such as, for example Ex: SMI Proximity sensing integrated with Behind Organic Light Emitting Diode (BOLED) , 4D-ranger, eye tracking, loud speaker feedback, optical microphone, force sensor, vital sign monitoring, particle sensor.

[0086] The devices or systems herein can be integrated with devices such as, for example, a computing device such as a laptop, tablet, smartphone, media player, or other handheld or portable device; a smaller device like a smartwatch, pendant, wireless earbud, or eyewear; a television, gaming device, navigation system, embedded system (e.g., in a kiosk or automobile) , or peripheral such as a keyboard, mouse, stylus, earbud, or voice-controllable speaker.

[0087] The following examples pertain to further aspects of the present disclosure:

[0088] Example 1 is an electronic device including: a self-mixing interferometer (SMI) sensor including: a vertical cavity surface emitilng laser (VCSEL) configured to output optical light toward a user or object, the VCSEL including : a semiconductor substrate; a first reflector structure formed above a first surface of the semiconductor substrate; a second reflector structure formed above the first surface of the semiconductor substrate; a Fabry-Perot Cavity including an active region arranged between the first reflector structure and the second reflector structure; a mode filter cap laver formed on or over a first surface of the first P-VIERDR-OOl / WO

[0089] - 14 - reflector structure facing away from the semiconductor substrate; a detector configured detect self-mixing interferometer (SMI) signals formed in the Fabry-Perot Cavity and further configured to generate electrical signals based on the detected reflected optical light.

[0090] Example 2 is the subject matter of Example lswherein the mode filter layer may be optionally configured to enforce a single optical mode for the optical output of the VCSEL.

[0091] Example is the subject matter of Example 2, wherein the single mode is optionally a linearly polarized (LP; mode 01.

[0092] Example 4 is the subject matter of example 2 or 3, wherein the mode filter cap layer is optionally configured to increase the reflectivity of a portion of the tirst reflector structure .

[0093] Example 5 is the subject matter of Example 4, wherein the mode filter cap layer is optionally configured to increase the reflectivity of a portion of the first reflector structure to have a reflectivity in a range from about 98% to about 99.9% reflectivity.

[0094] Example 6 is the subject matter of any of Examples 2 to 5fwherein the mode filter cap layer is optionally configured to act a phase match layer with respect to the single optical mode and further configured to act as an anti-phase match layer with respect to one or more optical modes other than the single optical mode. P-VIERDR-OOl / WO

[0095] Example 7 is the subject matter of any of Examples 2 to 6, wherein mode filter cap layer optionally has a thickness of X / 4n, where in the thickness measured along a direction orthogonal to the first surface of the first reflector structure, where X is a wavelength of the optical output of the VCSEL, and where n is an optical index of that mode filter cap layer.

[0096] Example is the subject matter of any of Examples 1 to wherein the mode filter cap layer is optionally patterned.

[0097] Example 9 is the subject matter of Example 8, wherein the mode filter cap layer is patterned so as to optionally have a donut shape defining a recessed hole arranged at a center of the mode filter cap layer from a top view facing the first surface the of first reflector structure.

[0098] Example 10 is the subject matter of Example 9, wherein the recessed hole is optionally a blind hole.

[0099] Example 11 is the subject matter of any of Examples 1 to 10, wherein the mode filter cap layer optionally is or includes a semiconductor layer.

[0100] Example 12 is the subject matter of Example 11, wherein the semiconductor layer optionally includes gallium arsenide.

[0101] Example 13 is the subject matter of any of Examples 1 to 12, wherein the active region is optionally formed above the first surface of substrate between the first reflector structure and the second reflector structure and Includes: one or more multiple-quantum-wells (MQWs) regions, and one or more oxide layers defining an aperture region. P-VIERDR-OOl / WO

[0102] - 16 -

[0103] Example 14 Is the subj ect matter of any of Examples 1 to 13 , wherein the VCSEL is optionally configured as a single-side emitter so as to emit the optical output through a top side of the VCSEL, wherein the top side of the emitter includes the first reflector structure and the cap layer .

[0104] Example 15 is the subj ect matter of any of Examples 1 to 13 , wherein the VCSEL is optionally configured as a double-side emitter so as to emit the optical output through a top side and a bottom side of the VCSEL, wherein the top side of the emitter includes the first reflector structure and the cap layer, and wherein the bottom side of the emitter is opposite to the top side .

[0105] Example 16 is the subj ect matter of any of Examples 1 to 15 , wherein the detector is optionally integrated within the Fabry-Perot cavity of the VCSEL .

[0106] Example 17 is the subj ect matter of any of Examples 1 to 16 , wherein the detector optionally includes one or more photodiodes .

[0107] Example 18 is the subj ect matter of any of Examples 1 to 17 , wherein the first reflector structure is optionally a first distributed Bragg reflector ( DBR) having a first conductivity type , and wherein the second reflector structure is optionally a second DBR having a second conductivity type , wherein the first conductivity type is opposite to the second conductivity type . P-VIERDR-OOl / WO

[0108] Example 19 is the subject matter of Example 18, wherein first conductivity type is optionally a p-type and the second conductivity type is optionally an n-type.

[0109] Example 20 is the subject matter of any of Examples 1 to 19, wherein the semiconductor substrate optionally is or includes a gallium arsenide layer.

[0110] Example 21 is the subject matter of any of Examples 1 to 20, which may optionally further include: a read-out circuitry coupled to the detector; and one or more processors coupled the read-out circuitry and configured to process electrical signals output from the read-out circuitry to extract the information about the user or object.

[0111] Example 22 is the subject matter of any of Examples 1 to 21, which may optionally further include a driver circuit coupled to the VCSEL configured selectively cause the VCSEL emit optical output.

[0112] Example 1A is a method including: emitting one or more optical light from a vertical cavity surface emitting laser (VCSEL) towards a target, the VCSEL including: a semiconductor substrate; a first reflector structure formed above a first surface of the semiconductor substrate; a second reflector structure formed above the first surface of the semiconductor substrate; a Fabry-Perot Cavity including an active region arranged between the first reflector structure and the second reflector structure P-VIERDR-OOl / WO

[0113] - 18 - a inode filter cap layer formed on or over a first surface of the first reflector structure facing away from the semiconductor substrate; receiving in the Fabry-Perot cavity, a portion of optical light output from the VCSL and reflected from the target to generate a SMI signal; generating, by a detector configured detect self-mixing interferometer (SMI) signals formed in the Fabry-Perot Cavity of the VCSEL, electrical signals in response to the SMI signals formed in the Fabry-Perot Cavity of the VCSEL; and processing the electrical signals.

[0114] Example 2A is the subject matter of Example 1A, which may optionally further include: determining information about target based on the processing of the electrical signals.

[0115] Example 3A is the subject matter of Example 2A, wherein determining the information about the target optionally includes determining a distance to the object.

[0116] Example 4A is the subject matter of Example 2A, wherein determining the information about the target optionally includes determining a velocity of the object.

[0117] Any of the aspects, examples, and / or embodiments described herein may be suitable or appropriately combined.

[0118] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any example or design described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other examples or designs . P-VIERDR-OOl / WO

[0119] For the purposes of the present disclosure, the phrase "A and / or B" means (A) , (B) , or (A and B) . For the purposes of the present disclosure, the phrase "A, B, and / or C" means (A) , (B) , (C) , (A and B) , (A and C) , (B and C) , or (A, B, and C) .

[0120] Reference to "one embodiment" or "an embodiment" in the present disclosure means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. The appearances of the phrase "in one embodiment" or "in an embodiment" are not necessarily all referring to the same embodiment. The appearances of the phrase "for example," "in an example," or "in some examples" are not necessarily all referring to the same example.

[0121] The words "plurality" and "multiple" in the description or the claims expressly refer to a quantity greater than one. The terms "group (of) ", "set [of] ", "collection (of) ", "series (of)", "sequence (of)", "grouping (of)", etc., and the like in the description or in the claims refer to a quantity equal to or greater than one, i.e. one or more. Any term expressed in plural form that does not expressly state "plurality" or "multiple" likewise refers to a quantity equal to or greater than one .

[0122] The term "connected" can be understood in the sense of a (e.g. mechanical, optical and / or electrical) , e.g. direct or indirect, connection and / or interaction. For example, several elements can be connected together mechanically such that they are physically retained (e.g., a plug connected to a socket) and electrically such that they have an electrically conductive path (e.g., signal paths exist along a communicative chain) .

[0123] As used herein, unless otherwise specified the use of the ordinal adjectives "first", "second", "third" etc., to describe a common object, merely indicate that different instances of like objects are being referred to, and are not P-VIERDR-OOl / WO

[0124] 20 intended to imply that the objects so described must be in a given sequence, either temporally, spatially, in ranking, or in any other manner.

[0125] As utilized herein, terms "module", "component," "system," "circuit, " "element, " "slice, " "circuitry, " and the like are intended to refer to a set of one or more electronic components, a computer-related entity, hardware, software (e.g., in execution) , and / or firmware. For example, circuitry or a similar term can be a processor, a process running on a processor, a controller, an object, an executable program, a storage device, and / or a computer with a processing device. By way of illustration, an application running on a server and the server can also be circuitry. One or more circuits can reside within the same circuitry, and circuitry can be localized on one computer and / or distributed between two or more computers. A set of elements or a set of other circuits can be described herein, in which the term "set" can be interpreted as "one or more."

[0126] Such electric or electronic circuitry can be operated by a software application or a firmware application executed by one or more processors. The one or more processors can be internal or external to the apparatus and can execute at least a part of the software or firmware application. As yet another example, circuitry can be an apparatus that provides specific functionality through electronic components without mechanical parts; the electronic components can include one or more processors therein to execute executable instructions stored in computer readable storage medium and / or firmware that confer (s) , at least in part, the functionality of the electronic components. As another example, circuitry or similar term can be implemented in hardware such as application specific integrated circuit (ASIC) , programmable gate array (PGA) , discrete digital circuits, etc.) or in a combination of hardware and software (e.g., a software model executed by a corresponding processor) . P-VIERDR-OOl / WO

[0127] The term "semiconductor substrate" can mean any construction comprising semiconductor material, for example, a silicon substrate with or without an epitaxial layer, a silicon-on- insulator substrate containing a buried insulator layer, or a substrate with a silicon germanium layer.

[0128] A lateral direction is understood to mean a direction that runs, in particular, parallel to a main extension surface of the component, in particular of a layer. A vertical direction is understood to mean a direction that is oriented, in particular, perpendicular to the main extension surface of the component and / or layer. The vertical direction and the lateral direction are approximately orthogonal to each other.

[0129] Further, spatially relative terms, such as "beneath, " "below, " "lower, " "above, " "upper" and the like, may be used herein for ease of description to describe one element or feature's relationship to another element (s) or feature (s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly .

[0130] The term "data" as used herein may be understood to include information in any suitable analog or digital form, e.g., provided as a file, a portion of a file, a set of files, a signal or stream, a portion of a signal or stream, a set of signals or streams, and the like. Further, the term "data" may also be used to mean a reference to information, e.g., in form of a pointer. The term data, however, is not limited to the aforementioned examples and may take various forms and represent any information as understood in the art. P-VIERDR-OOl / WO

[0131] As used herein, a signal that i s " indicative of" a value or other information may be a digital or analog signal that encodes or otherwise communicates the value or other information in a manner that can be decoded by and / or cause a responsive action in a component receiving the signal . The signal may be stored or buf fered in computer readable storage medium prior to its receipt by the receiving component and the receiving component may retrieve the signal from the storage medium . Further, a "value" that is " indicative of" some quantity, state , or parameter may be physically embodied as a digital signal , an analog s ignal , or stored bits that encode or otherwise communicate the value .

[0132] Unless otherwise stated, the words "about" and " substantially" as used herein are to be construed as meaning the normal measuring and / or fabrication limitations related to the value or condition which the word "about" or " substantially" modi fies . Unless expressly stated otherwise , the term "embodiment" is used herein to mean an embodiment of the present disclosure .

[0133] As used herein, a signal may be transmitted or conducted through a signal chain in which the signal is processed to change characteristics such as phase , amplitude , frequency, and so on . The signal may be referred to as the same signal even as such characteristics are adapted . In general , so long as a signal continues to encode the same information, the signal may be considered as the same signal . For example , a transmit signal may be considered as referring to the transmit signal in baseband, intermediate , and radio frequencies .

[0134] While the above descriptions and connected figures may depict device components as separate elements , skilled persons will appreciate the various possibilities to combine or integrate discrete features , functions into a single element . Such may include combining two or more components into a single component . Conversely, skilled persons will recogni ze the P-VIERDR-OOl / WO

[0135] 23 possibility to separate a s ingle element into two or more discrete elements , such as splitting a single component into two or more separate components .

[0136] It is appreciated that implementations of methods detailed herein are exemplary in nature , and are thus understood as capable of being implemented in a corresponding device . Likewise , it is appreciated that implementations of devices detailed herein are understood as capable of being implemented as a corresponding method . It is thus understood that a device corresponding to a method detailed herein may include one or more components configured to perform each aspect of the related method .

[0137] All acronyms defined in the above description additionally hold in all claims included herein .

[0138] While embodiments of the present disclosure have been described above , it is obvious that further embodiments may be implemented . For example , further embodiments may comprise any subcombination of features recited in the claims or any subcombination of elements described in the examples given above . Accordingly, this spirit and scope of the appended claims should not be l imited to the description of the embodiments contained herein .

[0139] While the disclosure has been particularly shown and described with reference to speci fic embodiments , it should be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the disclosure as defined by the appended claims . The scope of the disclosure is thus indicated by the appended claims and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced . P-VIERDR-OOl / WO

[0140] 24

[0141] Reference Numeral List

[0142] 100 vertical cavity surface emitting laser (VCSEL )

[0143] 110 substrate

[0144] 120 bottom mirror / ref lector structure

[0145] 130 active region or gain region

[0146] 134 cavity

[0147] 136 oxide apertures

[0148] 140 top mirror / ref lector structure

[0149] 150 cap layer

[0150] 180 top contact / p contact

[0151] 200 graph

[0152] 210 plot

[0153] 220 plot

[0154] 300 graph

[0155] 310 plot

[0156] 320 plot

[0157] 400 graph

[0158] 410 plot

[0159] 420 plot

[0160] 500 VCSEL

[0161] 700 VCSEL

[0162] 750 mode filter cap layer

[0163] 755 hole

[0164] 900 device / system

[0165] 910 SMI sensor

[0166] 914 VCSEL

[0167] 916 detector

[0168] 920 driver circuitry

[0169] 930 read-out circuitry

[0170] 940 one or more processors

[0171] 1000 1010- 1040 method

Claims

1. P-VIERDR-OOl / WOCLAIMS1. An electronic device comprising: a self-mixing interferometer (SMI) sensor comprising: vertical cavity surface emitting laser (VCSEL) configured to output optical light toward a user or object, the VCSEL comprising: a semiconductor substrate; a first reflector structure formed above a first surface of the semiconductor substrate; a second reflector structure formed above the first surface of the semiconductor substrate; a Fabry-Perot Cavity including an active region arranged between the first reflector structure and the second reflector structure a mode filter cap layer formed on or over a first surface of the first reflector structure facing away from the semi conductor substrate; a detector configured detect self-mixing interferometer (SMI) signals formed in the Fabry-Perot Cavity and further configured to generate electrical signals based on the detected reflected optical light.

2. The electronic device of claim 1, wherein the mode filter layer is configured to enforce a single optical mode for the optical output of the VCSEL.The electronic device of claim 2, wherein the single mode is a linearly polarised (LP) mode 04. The electronic device of claim 2, wherein the mode filter cap layer is configured to Increase the reflectivity of a portion of the first reflector structure .P-VIERDR-OOl / WO- 26 - b. The electronic device ot claim 4, wherein the mode filter cap layer is configured to increase the reflectivity of a portion of the first reflector structure to have a reflectivity in a range from about 98% to about 99.9% reflectivity.The electronic device of claim 2, wherein the mode filter cap layer is configured to act a phase match layer with respect to the single optical mode and further configured to act as an anti-phase match layer with respect to one or more optical modes other than the single optical mode.

7. The electronic device of claim 2, wherein mode filter cap layer has a thickness of X / 4n, where in the thickness measured along a direction orthogonal to the first surface of the first reflector structure, where A is a wavelength of the optical output of the VCSEL,8 n ci where n is an optical index of that mode filter cap layer.

8. The electronic device of claim 1, wherein the mode filter cap layer is patterned.

9. The electronic device of claim 8, wherein the mode filter cap layer is patterned so as to have a donut shape defining a recessed hole arranged at a center of the mode filter cap layer from a top view facing the first surface the of first reflector structure.

10. The electronic device ot claim 9, wherein the recessed hole a blind hole.

11. The electronic device ot claim 1P-VIERDR-OOl / WO wherein the inode filter cap layer comprises a semiconductor12, The electronic device of claim 11, wherein the semiconductor layer comprises gallium arsenide.

13. The electronic device of any of claim 1 to 12, wherein the detector is integrated within the Fabry-Perot cavity of the VCSEL, and wherein the detector comprises one or more photodiodes.

14. The electronic device of any of claims 1 to 12, wherein the first reflector structure is a first distributed Bragg reflector (DBR) having a first conductivity type, and wherein the second reflector structure is a second DBR having a second conductivity type, wherein the first conductivity type is opposite to the second conductivity type.

15. The electronic device of any of claims 1 to 12, further comprising a read-out circuitry coupled to the detector; and one or more processors coupled the read-out circuitry and configured to process electrical signals output from the read-out circuitry to extract the information about the user or object.

16. The electronic device of any of claims 1 to 12, further comprising : a driver circuit coupled to the VCSEL configured selectively cause the VCSEL emit optical output.

17. A method comprising: emitting one or more optical light from a vertical cavity surface emitting laser (VCSEL) towards a target, the VCSEL comprising:P-VIERDR-OOl / WO a semi conductor substrate; a first reflector structure formed above a first surface of the semiconductor substrate; a second reflector structure formed above the first surface of the semiconductor substrate; a Fabry-Perot Cavity including an active region arranged between the first reflector structure and the second reflector structure a mode filter cap layer formed on or over a first surface of the first reflector structure facing away from the semiconductor substrate; receiving in the Fabry-Perot cavity, a portion of optical light output from the VCSL and reflected from the target to generate a SMI signal; generating, by a detector configured detect self-mixing interferometer (SMI) signals formed in the Fabry-Perot Cavity of the VCSEL, electrical signals in response to the SMI signals formed in the Fabry-Perot Cavity of the VCSEL; and processing the electrical signals.

18. The method of claim 17, further comprising: determining information about the target based on the processing of the electrical signals.19, The method of claim IS, wherein determining the information about the target comprises determining a distance to the object.20, The method of claim 18, wherein determining the information about the target omprises determining a velocity of the object

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