Electronic device including hybrid power amplifier and operation method thereof

Abstract

An electronic device including a hybrid power amplifier unit according to an embodiment disclosed herein may comprise: a communication processor for outputting a baseband signal; a radio frequency integrated circuit (RFIC) which converts the baseband signal into a plurality of radio frequency (RF) signals; and a hybrid power amplifier unit for amplifying the RF signals. The hybrid power amplifier unit may amplify a first RF signal among the plurality of RF signals according to a low load line characteristic or a high load line characteristic on the basis of the operation mode. Various other embodiments are also possible.

Description

Electronic device including a hybrid power amplifier and method of operation thereof

[0001] The present disclosure relates to an electronic device comprising a hybrid power amplifier capable of amplifying wireless signals in accordance with low band, middle band, and high band wireless signals, and a method of operating the same.

[0002] With the advancement of information and communication technology and semiconductor technology, electronic devices can provide various functions. For example, electronic devices can provide near-field wireless communication functions (e.g., Bluetooth, wireless LAN, or NFC (near field communication)) and / or mobile communication functions (LTE (long term evolution), LTE-A (advanced), or 5G NR (5th generation new radio)).

[0003] Electronic devices can generate RF (radio frequency) signals for wireless communication. Power amplifiers (PAs) that amplify RF signals may require a certain physical area within the electronic device.

[0004] Electronic devices utilize multi-mode multi-band (MMMB) power amplifiers (PAs) as power amplifiers (PAs). Multi-mode multi-band (MMMB) power amplifiers (PAs) support a variety of radio frequency (RF) frequencies ranging from 2G communication to 5G NR radio access technology (RAT) communication, and can be used to amplify small signals significantly and transmit signals from electronic devices to base stations.

[0005] The information described above may be provided as related art for the purpose of aiding understanding of the present disclosure. No claim or determination is made as to whether any of the foregoing may be applied as prior art related to the present disclosure.

[0006] Optimal design considering trade-offs of various characteristics (e.g., gain, efficiency, harmonic, current consumption) of MMMB (multi-mode multi-band) power amplifiers (PA) may be required. In designing class-specific amplifiers, which are closely related to the efficiency and maximum output of the power amplifier, a loadline may be considered.

[0007] Power amplifiers are designed considering load line characteristics, and multi-stage power amplifiers amplify the signal entering the input stage through a drive amplifier and then amplify it to the desired signal maximum through a main power amplifier.

[0008] High-load or low-load power amplifiers may be applied to electronic devices. For example, when designing a power amplifier, if characteristics such as maximum gain, maximum power, and linearity are important, a high-load power amplifier that amplifies using a boost power supply of approximately 3.8 to 4.5 V can be applied. For example, when designing a power amplifier, if current consumption is important, a low-load power amplifier that amplifies using a buck power supply of approximately 3.0 to 3.5 V can be applied. As high-performance communication and low power consumption are required for electronic devices, both the characteristics of high-load and low-load power amplifiers are required; therefore, a power amplifier capable of satisfying all these requirements is necessary.

[0009] Embodiments of the present disclosure may provide an electronic device comprising a dual power amplifier (dual PA) combined with a high-load power amplifier and a low-load power amplifier, and a method of operating the same.

[0010] Embodiments of the present disclosure may provide an electronic device including a dual power amplifier capable of satisfying the trade-off between linearity and output efficiency of the power amplifier through a dual loadline MMMB power amplifier (PA) structure, and a method of operating the same.

[0011] Embodiments of the present disclosure may provide an electronic device including a hybrid power amplifier (PA) capable of satisfying high-performance communication and low power consumption of an electronic device, and a method of operating the same.

[0012] The technical tasks intended to be accomplished in this document are not limited to those mentioned above, and other technical tasks not mentioned can be clearly understood by a person skilled in the art to which this document belongs from the description below.

[0013] An electronic device including a hybrid power amplifier according to an embodiment of the present disclosure may include a communication processor that outputs a baseband signal, a radio frequency integrated circuit (RFIC) that converts the baseband signal into a plurality of radio frequency (RF) signals, and a hybrid power amplifier that amplifies the RF signals. The hybrid power amplifier may amplify a first RF signal among the plurality of RF signals according to a low load line characteristic or a high load line characteristic based on an operating mode.

[0014] In a method of operation of an electronic device comprising a hybrid power amplifier section (e.g., a power amplifier circuit) according to one embodiment of the present disclosure, the electronic device may include a communication processor that outputs a baseband signal, a radio frequency integrated circuit (RFIC) that converts the baseband signal into a plurality of radio frequency (RF) signals, and a hybrid power amplifier section that amplifies the RF signals. The method of operation may amplify a first RF signal among the plurality of RF signals according to a low load line characteristic or a high load line characteristic based on the operation mode of the hybrid power amplifier section.

[0015] An electronic device including a dual power amplifier according to an embodiment of the present disclosure and a method of operation thereof can satisfy the trade-off between linearity and output efficiency of the power amplifier through a dual loadline MMMB power amplifier (PA) structure.

[0016] An electronic device including a dual power amplifier according to an embodiment of the present disclosure can reduce the space required for power amplifier placement by providing a dual power amplifier (dual PA) combined with a high-load power amplifier and a low-load power amplifier.

[0017] An electronic device including a dual power amplifier (dual PA) according to an embodiment of the present disclosure can provide a hybrid power amplifier (PA) capable of satisfying high-performance communication and low power consumption of the electronic device.

[0018] In addition, various effects that can be identified directly or indirectly through this document may be provided.

[0019] The effects obtainable from the present disclosure are not limited to those mentioned above, and other unmentioned effects will be clearly understood by those skilled in the art to which the present disclosure belongs from the description below.

[0020] In relation to the description of the drawings, the same (or similar) reference numerals may be used to describe identical (or similar) components, features, and structures.

[0021] FIG. 1 is a block diagram of an electronic device in a network environment according to various embodiments of the present disclosure.

[0022] FIG. 2 is a block diagram of an electronic device for supporting legacy network communication and 5G network communication according to one embodiment of the present disclosure.

[0023] FIG. 3a is a block diagram of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) including a dual amplifier according to one embodiment of the present disclosure.

[0024] FIG. 3b is a drawing showing a first power amplifier section of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) according to one embodiment of the disclosure.

[0025] FIG. 3c is a drawing showing a second power amplifier section of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) according to one embodiment of the disclosure.

[0026] FIG. 3d is a drawing showing a third power amplifier section of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) according to one embodiment of the disclosure.

[0027] FIGS. 4a to 4c are drawings showing the structure of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) including a dual amplifier according to one embodiment of the present disclosure.

[0028] Figure 5 is a diagram showing the output voltage and current swing relationship and loadline of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module).

[0029] FIG. 6 is a diagram illustrating a method of operation of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) including a dual amplifier according to one embodiment of the present disclosure, wherein the operation mode of the hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) is a first mode (e.g., low load line mode).

[0030] FIG. 7 is a diagram illustrating a method of operation of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) including a dual amplifier according to one embodiment of the present disclosure, wherein the operation mode of the hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) is a second mode (e.g., high load line mode).

[0031] FIGS. 8a and 8b are drawings showing the structure of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) including a dual amplifier according to one embodiment of the present disclosure.

[0032] It should be noted that throughout the drawings, the same reference number is used to describe the same or similar elements, features, and structures.

[0033] The following description, with reference to the attached drawings, is provided to facilitate a comprehensive understanding of various embodiments of the disclosure as defined by the claims and their equivalents. While various specific details are included to aid understanding, they should be considered merely illustrative. Accordingly, those skilled in the art will recognize that various changes and modifications to the various embodiments described herein may be made without departing from the scope and spirit of the disclosure. Additionally, for clarity and brevity, descriptions of well-known functions and configurations may be omitted.

[0034] The terms and words used in the following description and claims are not limited to their literary meanings and are merely used by the applicant to enable a clear and consistent understanding of this document. Accordingly, it should be apparent to those skilled in the art that the following description of various embodiments of this document is provided for illustrative purposes only and is not intended to limit this document as defined by the appended claims and their equivalents.

[0035] The singular form should be understood to include plural referents unless the context clearly indicates otherwise. Thus, for example, a reference to "component surfaces" may include a reference to one or more of such surfaces.

[0036] FIG. 1 is a block diagram of an electronic device in a network environment according to various embodiments of the present disclosure.

[0037] Referring to FIG. 1, in a network environment (100), an electronic device (101) may communicate with an electronic device (102) through a first network (198) (e.g., a short-range wireless communication network) or with at least one of an electronic device (104) or a server (108) through a second network (199) (e.g., a long-range wireless communication network). According to one embodiment, the electronic device (101) may communicate with the electronic device (104) through a server (108). According to one embodiment, the electronic device (101) may include a processor (120), memory (130), input module (150), sound output module (155), display module (160), audio module (170), sensor module (176), interface (177), connection terminal (178), haptic module (179), camera module (180), power management module (188), battery (189), communication module (190), subscriber identification module (196), or antenna module (197). In some embodiments, at least one of these components (e.g., connection terminal (178)) may be omitted from the electronic device (101), or one or more other components may be added. In some embodiments, some of these components (e.g., sensor module (176), camera module (180), or antenna module (197)) may be integrated into a single component (e.g., display module (160)).

[0038] The processor (120) can control at least one other component (e.g., hardware or software component) of the electronic device (101) connected to the processor (120) by executing software (e.g., program (140)), for example, and can perform various data processing or operations. According to one embodiment, as at least part of the data processing or operations, the processor (120) can store commands or data received from other components (e.g., sensor module (176) or communication module (190)) in volatile memory (132), process the commands or data stored in volatile memory (132), and store the resulting data in non-volatile memory (134). According to one embodiment, the processor (120) may include a main processor (121) (e.g., central processing unit or application processor) or an auxiliary processor (123) that can operate independently or together with it (e.g., graphics processing unit, neural processing unit (NPU), image signal processor, sensor hub processor, or communication processor). For example, if the electronic device (101) includes a main processor (121) and an auxiliary processor (123), the auxiliary processor (123) may be configured to use lower power than the main processor (121) or to be specialized for a designated function. The auxiliary processor (123) may be implemented separately from the main processor (121) or as part thereof.

[0039] The auxiliary processor (123) may control at least some of the functions or states associated with at least one component of the electronic device (101) (e.g., display module (160), sensor module (176), or communication module (190)) on behalf of the main processor (121) while the main processor (121) is in an inactive (e.g., sleep) state, or together with the main processor (121) while the main processor (121) is in an active (e.g., application execution) state. According to one embodiment, the auxiliary processor (123) (e.g., image signal processor or communication processor) may be implemented as part of another functionally related component (e.g., camera module (180) or communication module (190)). According to one embodiment, the auxiliary processor (123) (e.g., neural network processing unit) may include a hardware structure specialized for processing an artificial intelligence model. The artificial intelligence model may be generated through machine learning. Such learning may be performed, for example, on the electronic device (101) itself where the artificial intelligence model is executed, or through a separate server (e.g., server (108)). The learning algorithm may include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model may include a plurality of artificial neural network layers.An artificial neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to the hardware structure, the artificial intelligence model may include a software structure, either additionally or substantially.

[0040] The number of processors (120) may be one or more. For example, the processor (120) may have the structure of a multi-core processor such as a dual core, a quad core, or a hexa core.

[0041] The processor (120) can control the operations of the electronic device (101) by executing instructions stored in memory (130). For example, the processor (120) may correspond to a plurality of processors that divide and collectively perform a plurality of operations among the processors.

[0042] The memory (130) can store various data used by at least one component of the electronic device (101) (e.g., processor (120) or sensor module (176)). The data may include, for example, input data or output data for software (e.g., program (140)) and related commands. The memory (130) may include volatile memory (132) or non-volatile memory (134).

[0043] The program (140) may be stored as software in memory (130) and may include, for example, an operating system (142), middleware (144), or an application (146).

[0044] The input module (150) can receive commands or data to be used for a component of the electronic device (101) (e.g., processor (120)) from outside the electronic device (101) (e.g., user). The input module (150) may include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0045] The sound output module (155) can output a sound signal to the outside of the electronic device (101). The sound output module (155) may include, for example, a speaker or a receiver. The speaker may be used for general purposes, such as multimedia playback or recording playback. The receiver may be used to receive incoming calls. According to one embodiment, the receiver may be implemented separately from the speaker or as part thereof.

[0046] The display module (160) can visually provide information to an external (e.g., user) of the electronic device (101). The display module (160) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling said device. According to one embodiment, the display module (160) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of the force generated by said touch.

[0047] The audio module (170) can convert sound into an electrical signal or, conversely, convert an electrical signal into sound. According to one embodiment, the audio module (170) can acquire sound through the input module (150) or output sound through the sound output module (155) or an external electronic device (e.g., electronic device (102)) (e.g., speaker or headphones) connected directly or wirelessly to the electronic device (101).

[0048] The sensor module (176) can detect the operating state of the electronic device (101) (e.g., power or temperature) or the external environmental state (e.g., user state) and generate an electrical signal or data value corresponding to the detected state. According to one embodiment, the sensor module (176) may include, for example, a gesture sensor, a gyroscope sensor, a barometric pressure sensor, a magnetic sensor, an accelerometer sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biosensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0049] The interface (177) may support one or more specified protocols that can be used for the electronic device (101) to be connected directly or wirelessly to an external electronic device (e.g., electronic device (102)). According to one embodiment, the interface (177) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0050] The connection terminal (178) may include a connector through which the electronic device (101) can be physically connected to an external electronic device (e.g., electronic device (102)). According to one embodiment, the connection terminal (178) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0051] The haptic module (179) can convert an electrical signal into a mechanical stimulus (e.g., vibration or movement) or an electrical stimulus that can be perceived by the user through tactile or kinesthetic senses. According to one embodiment, the haptic module (179) may include, for example, a motor, a piezoelectric element, or an electric stimulation device.

[0052] The camera module (180) can capture still images and video. According to one embodiment, the camera module (180) may include one or more lenses, image sensors, image signal processors, or flashes.

[0053] The power management module (188) can manage power supplied to the electronic device (101). According to one embodiment, the power management module (188) can be implemented, for example, as at least part of a power management integrated circuit (PMIC).

[0054] The battery (189) can supply power to at least one component of the electronic device (101). According to one embodiment, the battery (189) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0055] The communication module (190) can support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between an electronic device (101) and an external electronic device (e.g., electronic device (102), electronic device (104), or server (108)), and the performance of communication through the established communication channel. The communication module (190) may include one or more communication processors that operate independently of the processor (120) (e.g., application processor) and support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (190) may include a wireless communication module (192) (e.g., cellular communication module, short-range wireless communication module, or GNSS (global navigation satellite system) communication module) or a wired communication module (194) (e.g., LAN (local area network) communication module, or power line communication module). The corresponding communication module among these communication modules can communicate with an external electronic device (104) through a first network (198) (e.g., a short-range communication network such as Bluetooth, WiFi (wireless fidelity) direct, or IrDA (infrared data association)) or a second network (199) (e.g., a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN). These various types of communication modules may be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (192) can identify or authenticate the electronic device (101) within a communication network such as the first network (198) or the second network (199) using subscriber information (e.g., International Mobile Subscriber Identifier (IMSI)) stored in the subscriber identification module (196).

[0056] The wireless communication module (192) can support 5G networks and next-generation communication technologies following 4G networks, for example, new radio access technology. NR access technology can support high-speed transmission of high-capacity data (enhanced mobile broadband (eMBB)), minimization of terminal power and connection of multiple terminals (massive machine type communications (mMTC)), or high reliability and low latency (ultra-reliable and low-latency communications (URLLC)). The wireless communication module (192) can support a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate, for example. The wireless communication module (192) can support various technologies for securing performance in the high-frequency band, such as beamforming, massive MIMO (multiple-input and multiple-output), full-dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large-scale antenna. The wireless communication module (192) can support various requirements specified in the electronic device (101), external electronic device (e.g., electronic device (104)), or network system (e.g., second network (199)). According to one embodiment, the wireless communication module (192) may support a Peak data rate (e.g., 20 Gbps or more) for eMBB realization, loss coverage (e.g., 164 dB or less) for mMTC realization, or U-plane latency (e.g., downlink (DL) and uplink (UL) each 0.5 ms or less, or round trip 1 ms or less) for URLLC realization.

[0057] An antenna module (197) can transmit a signal or power to or from an external source (e.g., an external electronic device). According to one embodiment, the antenna module (197) may include an antenna comprising a radiator made of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). According to one embodiment, the antenna module (197) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as a first network (198) or a second network (199), may be selected from the plurality of antennas, for example, by a communication module (190). A signal or power may be transmitted or received between the communication module (190) and an external electronic device through the selected at least one antenna. According to some embodiments, in addition to the radiator, other components (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as part of the antenna module (197).

[0058] According to one embodiment, the antenna module (197) may form a mmWave antenna module. According to one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent to a first surface (e.g., bottom surface) of the printed circuit board and capable of supporting a specified high frequency band (e.g., mmWave band), and a plurality of antennas (e.g., array antennas) disposed on or adjacent to a second surface (e.g., top surface or side surface) of the printed circuit board and capable of transmitting or receiving a signal of the specified high frequency band.

[0059] At least some of the above components can be connected to each other via a communication method between peripheral devices (e.g., bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)) and exchange signals (e.g., commands or data) with each other.

[0060] According to one embodiment, commands or data may be transmitted or received between the electronic device (101) and an external electronic device (104) through a server (108) connected to a second network (199). Each of the external electronic devices (102, or 104) may be the same or a different type of device as the electronic device (101). According to one embodiment, all or part of the operations performed on the electronic device (101) may be performed on one or more of the external electronic devices (102, 104, or 108). For example, if the electronic device (101) needs to perform a function or service automatically or in response to a request from a user or another device, the electronic device (101) may request one or more external electronic devices to perform at least part of the function or service instead of performing the function or service itself or additionally. One or more external electronic devices that receive the above request may execute at least part of the requested function or service, or additional function or service related to the request, and transmit the result of the execution to the electronic device (101). The electronic device (101) may provide the result as is or additionally processed as at least part of the response to the request. For this purpose, for example, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used. The electronic device (101) may provide ultra-low latency services using, for example, distributed computing or mobile edge computing. In another embodiment, the external electronic device (104) may include an Internet of Things (IoT) device. The server (108) may be an intelligent server using machine learning and / or neural networks. According to one embodiment, the external electronic device (104) or the server (108) may be included within a second network (199).The electronic device (101) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

[0061] FIG. 2 is a block diagram (200) of an electronic device for supporting legacy network communication and 5G network communication according to one embodiment of the present disclosure.

[0062] Referring to FIG. 2, the electronic device (101) may include a first communication processor (212), a second communication processor (214), a first RFIC (222, radio frequency integrated circuit), a second RFIC (224), a third RFIC (226), a fourth RFIC (228), a first power amplifier (232, PA: power amplifier), a second power amplifier (234), a first antenna module (242), a second antenna module (244), and an antenna (248).

[0063] According to one embodiment, the electronic device (101) may further include a processor (120) and a memory (130). A network (e.g., the first network (198) and the second network (199) of FIG. 1) may include the first network (292) and the second network (294).

[0064] According to one embodiment, the electronic device (101) may further include at least one of the components described in FIG. 1, and the network (198, 199) may further include at least one other network.

[0065] According to one embodiment, a first communication processor (212), a second communication processor (214), a first RFIC (222), a second RFIC (224), a fourth RFIC (228), a first power amplifier (232), and a second power amplifier (234) may form at least a part of a wireless communication module (192).

[0066] According to one embodiment, the fourth RFIC (228) may be omitted or included as part of the third RFIC (226).

[0067] According to one embodiment, the first communication processor (212) can support the establishment of a communication channel of a band to be used for wireless communication with the first network (292), and legacy network communication through the established communication channel.

[0068] According to one embodiment, the first network may be a legacy network including a second generation (2G), 3G, 4G, or LTE (long term evolution) network. The second communication processor (214) may support the establishment of a communication channel corresponding to a designated band (e.g., about 6 GHz to about 60 GHz) among the bands to be used for wireless communication with the second network (294), and 5G network communication through the established communication channel.

[0069] According to one embodiment, the second network (294) may be a 5G network defined by 3GPP (e.g., NR (new radio)).

[0070] According to one embodiment, the first communication processor (212) or the second communication processor (214) may support the establishment of a communication channel corresponding to another designated band (e.g., about 6 GHz or less) among the bands to be used for wireless communication with the second network (294), and 5G network communication through the established communication channel.

[0071] According to one embodiment, the first communication processor (212) and the second communication processor (214) may be implemented in a single chip or a single package.

[0072] According to one embodiment, the first communication processor (212) or the second communication processor (214) may be formed within a single chip or single package with the processor (120), auxiliary processor (123), or communication module (190).

[0073] According to one embodiment, the first communication processor (212) can transmit and receive data with the second communication processor (214). For example, data classified to be transmitted through the second network (294) may be changed to be transmitted through the first network (292). In this case, the first communication processor (212) can receive transmitted data from the second communication processor (214). For example, the first communication processor (212) can transmit and receive data with the second communication processor (214) through a processor interface.

[0074] For example, the interface between processors can be implemented as a UART (universal asynchronous receiver / transmitter) (e.g., HS-UART (high speed-UART)) or PCIe (peripheral component interconnect bus express) interface, but there are no restrictions on the type.

[0075] For example, the first communication processor (212) and the second communication processor (214) can exchange control information and packet data information using shared memory. As an example, the first communication processor (212) can transmit and receive various information, such as sensing information, information on output strength, and RB (resource block) allocation information, with the second communication processor (214).

[0076] Depending on the implementation, the first communication processor (212) may not be directly connected to the second communication processor (214). In this case, the first communication processor (212) may transmit and receive data to and from the second communication processor (214) through a processor (120) (e.g., an application processor).

[0077] For example, the first communication processor (212) and the second communication processor (214) can transmit and receive data to and from the processor (120) (e.g., application processor) through an HS-UART interface or a PCIe interface, but there are no restrictions on the type of interface.

[0078] For example, the first communication processor (212) and the second communication processor (214) can exchange control information and packet data information using shared memory with the processor (120) (e.g., application processor).

[0079] According to one embodiment, the first communication processor (212) and the second communication processor (214) may be implemented in a single chip or a single package.

[0080] According to one embodiment, the first communication processor (212) or the second communication processor (214) may be formed within a single chip or single package with the processor (120), auxiliary processor (123), or communication module (190).

[0081] According to one embodiment, the first RFIC (222) can convert a baseband signal generated by the first communication processor (212) during transmission into a radio frequency (RF) signal of about 700 MHz to about 3 GHz used in the first network (292) (e.g., legacy network). During reception, the RF signal is acquired from the first network (292) (e.g., legacy network) through an antenna (e.g., first antenna module (242)) and can be preprocessed through an RFFE (e.g., first power amplifier (232)). The first RFIC (222) can convert the preprocessed RF signal into a baseband signal so that it can be processed by the first communication processor (212).

[0082] According to one embodiment, the second RFIC (224) can convert a baseband signal generated by the first communication processor (212) or the second communication processor (214) into an RF signal of the Sub6 band (e.g., about 6 GHz or less) used in the second network (294) (e.g., 5G network) (hereinafter, 5G Sub6 RF signal). When receiving, the 5G Sub6 RF signal is acquired from the second network (294) (e.g., 5G network) through an antenna (e.g., the second antenna module (244)) and can be preprocessed through an RFFE (e.g., the second power amplifier (234)). The second RFIC (224) can convert the preprocessed 5G Sub6 RF signal into a baseband signal so that it can be processed by the corresponding communication processor among the first communication processor (212) or the second communication processor (214).

[0083] According to one embodiment, the third RFIC (226) can convert a baseband signal generated by the second communication processor (214) into an RF signal of the 5G Above6 band (e.g., approximately 6 GHz to approximately 60 GHz) to be used in the second network (294) (e.g., 5G network) (hereinafter, 5G Above6 RF signal). Upon reception, the 5G Above6 RF signal may be acquired from the second network (294) (e.g., 5G network) through an antenna (e.g., antenna (248)) and preprocessed through the third RFFE (236). The third RFIC (226) can convert the preprocessed 5G Above6 RF signal into a baseband signal so that it can be processed by the second communication processor (214). According to one embodiment, the third RFFE (236) may be formed as part of the third RFIC (226).

[0084] According to one embodiment, the electronic device (101) may include a fourth RFIC (228) separately from or at least as part of the third RFIC (226). In this case, the fourth RFIC (228) may convert a baseband signal generated by the second communication processor (214) into an RF signal (hereinafter referred to as an IF signal) in an intermediate frequency band (e.g., about 9 GHz to about 11 GHz) and then transmit the IF signal to the third RFIC (226). The third RFIC (226) may convert the IF signal into a 5G Above6 RF signal. Upon reception, the 5G Above6 RF signal may be received from the second network (294) (e.g., a 5G network) through an antenna (e.g., antenna (248)) and converted into an IF signal by the third RFIC (226). The fourth RFIC (228) can convert the IF signal into a baseband signal so that the second communication processor (214) can process it.

[0085] According to one embodiment, the first RFIC (222) and the second RFIC (224) may be implemented as at least part of a single chip or a single package. According to one embodiment, the first power amplifier (232) and the second power amplifier (234) may be implemented as at least part of a single chip or a single package. According to one embodiment, at least one of the first antenna module (242) or the second antenna module (244) may be omitted or combined with another antenna module to process RF signals of a plurality of corresponding bands.

[0086] According to one embodiment, the third RFIC (226) and the antenna (248) may be placed on the same substrate to form a third antenna module (246). For example, a wireless communication module (192) or a processor (120) may be placed on the first substrate (e.g., main PCB). In this case, the third RFIC (226) may be placed on a portion of a second substrate (e.g., sub PCB) separate from the first substrate (e.g., bottom surface), and the antenna (248) may be placed on another portion of a second substrate (e.g., top surface) to form the third antenna module (246). By placing the third RFIC (226) and the antenna (248) on the same substrate, it is possible to reduce the length of the transmission line between them. This can, for example, reduce the loss (e.g., attenuation) of signals in the high-frequency band (e.g., about 6 GHz to about 60 GHz) used for 5G network communication by the transmission line. As a result, the electronic device (101) can improve the quality or speed of communication with the second network (294) (e.g., 5G network).

[0087] According to one embodiment, the antenna (248) may be formed as an antenna array comprising a plurality of antenna elements that can be used for beamforming. In this case, the third RFIC (226) may include a plurality of phase shifters (238) corresponding to the plurality of antenna elements, for example, as part of the third RFFE (236). During transmission, each of the plurality of phase shifters (238) can change the phase of a 5G Above6 RF signal to be transmitted to the outside of the electronic device (101) (e.g., a base station of a 5G network) through the corresponding antenna element. During reception, each of the plurality of phase shifters (238) can change the phase of a 5G Above6 RF signal received from the outside through the corresponding antenna element to the same or substantially the same phase. This enables transmission or reception through beamforming between the electronic device (101) and the outside.

[0088] According to one embodiment, the second network (294) (e.g., 5G network) may be operated independently of the first network (292) (e.g., legacy network) (e.g., stand-alone (SA)) or connected to it (e.g., non-stand-alone (NSA)). For example, the 5G network may have only an access network (e.g., 5G radio access network (RAN) or next generation RAN (NG RAN)) and no core network (e.g., next generation core (NGC)). In this case, the electronic device (101) can access the access network of the 5G network and then access an external network (e.g., the Internet) under the control of the core network of the legacy network (e.g., evolved packed core (EPC)). Protocol information for communication with a legacy network (e.g., LTE protocol information) or protocol information for communication with a 5G network (e.g., new radio (NR) protocol information) is stored in memory (130) and can be accessed by other parts (e.g., processor (120), first communication processor (212), or second communication processor (214)).

[0089] Embodiments of the present disclosure may provide an electronic device including a hybrid power amplifier (PA) capable of satisfying high-performance communication and low power consumption of an electronic device, and a method of operating the same.

[0090] Embodiments of the present disclosure may provide an electronic device comprising a dual power amplifier (dual PA) combined with a high-load power amplifier and a low-load power amplifier, and a method of operating the same.

[0091] FIG. 3a is a block diagram of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) including a dual amplifier according to one embodiment of the present disclosure.

[0092] FIG. 3b is a drawing showing a first power amplifier section of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) according to one embodiment of the disclosure.

[0093] FIG. 3c is a drawing showing a second power amplifier section of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) according to one embodiment of the disclosure.

[0094] FIG. 3d is a drawing showing a third power amplifier section of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) according to one embodiment of the disclosure.

[0095] FIG. 4 is a drawing showing the structure of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) including a dual amplifier according to one embodiment of the present disclosure.

[0096] FIG. 5 is a diagram showing the output voltage and current swing relationship (510) and load line (520, loadline) of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module).

[0097] Referring to FIGS. 3a to 3d, FIG. 4, and FIG. 5, an electronic device according to one embodiment of the present disclosure (e.g., the electronic device (101) of FIG. 1, the electronic device (101) of FIG. 2) may include a hybrid power amplifier section (300) (e.g., a power amplifier circuit, a power amplifier module) including a dual amplifier.

[0098] According to one embodiment, a hybrid power amplifier section (300) (e.g., power amplifier circuit, power amplifier module) according to one embodiment of the present disclosure may include a first power amplifier section (310) (e.g., dual power amplifier section), a second power amplifier section (320), and a third power amplifier section (330).

[0099] A power amplifier can be designed by considering the trade-off between linearity and efficiency. To output high power with good linearity and without issues regarding error vector magnitude (EVM) characteristics, efficiency must be sacrificed. Additionally, when an electronic device (e.g., the electronic device (101) of FIGS. 1 and 2) supports 5G NR, the CP-OFDM (cyclic prefix orthogonal frequency division multiplexing) waveform has a high peak-to-average power ratio (PAPR), making it difficult to secure linearity with an amplifier having a low-voltage, low-loadline structure. Furthermore, when the electronic device (101) supports n41 power class 2 (PC2) in the high band with high path loss, it is difficult to secure performance using a low-loadline structure because linearity must be satisfied at high power. Since the electronic device (101) supports n41 PC2 and can also support other Power classes, the hybrid power amplifier section (300) (e.g., power amplifier circuit, power amplifier module) may include a first power amplifier section (310) (e.g., dual power amplifier section) that can satisfy both low load line characteristics and high load line characteristics.

[0100] For example, a hybrid power amplifier section (300) (e.g., power amplifier circuit, power amplifier module) according to one embodiment of the present disclosure may include a dual loadline MMMB (multi-mode multi-band) power amplifier (PA) (e.g., dual power amplifier).

[0101] For example, the first power amplifier section (310) may include a high-load power amplifier that performs high-power amplification to enable high-performance communication of the electronic device (101), and a low-load power amplifier for low-power consumption of the electronic device (101).

[0102] According to one embodiment, the first power amplifier section (310) may include an input matching section (311) (e.g., input matching circuit, first matching circuit), a first bias section (312a), a second bias section (312b), a third bias section (312c), a first switch (313) (e.g., input switch), a plurality of internal matching sections (314a, 314b) (e.g., a plurality of internal matching circuits, second matching circuits), a low load line amplifier (315) (e.g., first power amplifier), a high load line amplifier (316) (e.g., second power amplifier), a plurality of output matching sections (317a, 317b) (e.g., a plurality of output matching circuits, third matching circuits), a second switch (318) (e.g., output switch), and a drive amplifier (319).

[0103] For example, the first power amplifier section (310) can receive a high band RF signal (301) as an input signal to the amplifier from an RFIC (e.g., the first RFIC (222), the second RFIC (224), or the third RFIC (226) of FIG. 2).

[0104] For example, the first power amplifier (310) can receive a high band RF signal (301) as an input signal to the amplifier from a communication processor (e.g., the first communication processor (212) of FIG. 2, or the second communication processor (214)).

[0105] For example, the input matching unit (311) can compensate for the loss of the RF signal at the input terminal. The input matching unit (311) can match the impedance between the input terminal and a plurality of internal matching units (314a, 314a).

[0106] For example, the first bias section (312a) can vary the magnitude of the bias applied to the drive amplifier (319).

[0107] For example, the output of the first bias section (312a) and the buck voltage or boost voltage (319a) may be input to the drive amplifier (319). For example, the drive amplifier (319) may amplify the power to a certain magnitude before amplifying the high signal to the power amplifier (e.g., low load power amplifier (315), high load power amplifier (316)), and output the input signal to the power amplifier.

[0108] For example, the buck voltage can be about 3.0 to about 3.5 V. The boost voltage can be about 3.8 to about 4.5 V.

[0109] For example, when the operating mode of the hybrid power amplifier section (300) (e.g., power amplifier circuit, power amplifier module) is the first mode (e.g., low load line mode), a buck voltage (319a) is input to the drive amplifier (319), and using this, the hybrid power amplifier section (300) (e.g., power amplifier circuit, power amplifier module) can amplify a high band RF signal (301).

[0110] For example, when the operating mode of the hybrid power amplifier section (300) (e.g., power amplifier circuit, power amplifier module) is the second mode (e.g., high load line mode), a boost voltage is input to the drive amplifier (319), and using this, the hybrid power amplifier section (300) (e.g., power amplifier circuit, power amplifier module) can amplify the high band RF signal (301).

[0111] For example, the first internal matching unit (314a) can compensate for the loss of the RF signal by matching the impedance between the first switch (313) (e.g., input switch) and the low load line amplifier (315) (e.g., first power amplifier).

[0112] According to one embodiment, a low load line amplifier (315) (e.g., a first power amplifier) ​​can be configured to generate a desired RF signal by adjusting the load resistance value of a terminal connected to a first output matching section (317a). The load resistance value can be determined by the peak power and power supply voltage (V_DC) required by the first power amplifier section (310).

[0113] According to one embodiment, the high load line amplifier (316) (e.g., the second power amplifier) ​​can be configured to generate a desired RF signal by adjusting the load resistance value of the terminal connected to the second output matching section (317b). The load resistance value can be determined by the peak power and power supply voltage (V_DC) required by the first power amplifier section (310).

[0114] For example, the first power amplifier section (310) may be configured such that the magnitude of the load resistance value is adjusted along a load line that reflects a voltage-current curve to amplify the signal to maximum power by reflecting the characteristics of the device. For example, the first power amplifier section (310) may vary the magnitude of the load resistance value by considering parameters such as loss due to output impedance matching, frequency characteristics, and limited Q (quality).

[0115] For example, the first power amplifier section (310) can be configured to allow the voltage to change between a minimum voltage (Vmin) and a maximum voltage (Vmax) due to the device characteristics.

[0116] For example, the first power amplifier section (310) may be configured to include a loadline within an operating area configured to operate within a range that does not exceed the maximum current (Imax).

[0117] FIG. 6 is a diagram illustrating a method of operation of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) including a dual amplifier according to one embodiment of the present disclosure, wherein the operation mode of the hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) is a first mode (e.g., low load line mode).

[0118] Referring to FIGS. 3 through 6, according to one embodiment, an RFIC (e.g., the first RFIC (222), the second RFIC (224), or the third RFIC (226) of FIG. 2) can generate a first switch control signal to control the operation of a first switch (313) (e.g., an input switch) based on the control of a processor (e.g., the processor (120) of FIG. 2) or a communication processor (e.g., the communication processor (212, 214) of FIG. 2).

[0119] For example, a first switch control signal generated by an RFIC (e.g., the first RFIC (222), the second RFIC (224), or the third RFIC (226) of FIG. 2) can be input to a first switch (313) (e.g., an input switch).

[0120] For example, the first switch (313) (e.g., input switch) can be switched first or second based on the first switch control signal.

[0121] According to one embodiment, when the operating mode of the hybrid power amplifier section (300) (e.g., power amplifier circuit, power amplifier module) is a first mode (e.g., low load line mode), the low load line amplifier (315) (e.g., first power amplifier) ​​can be turned on and the high load line amplifier (316) (e.g., second power amplifier) ​​can be turned off.

[0122] According to one embodiment, when the operating mode of the hybrid power amplifier section (300) is a first mode (e.g., low load line mode), the first switch (313) (e.g., input switch) can be first switched based on a first switch control signal. When the first switch (313) (e.g., input switch) is first switched, the output of the drive amplifier (319) can be input to the low load line amplifier (315) (e.g., first power amplifier) ​​via the first internal matching section (314a).

[0123] For example, when the operating mode of the hybrid power amplifier section (300) is the first mode (e.g., low load line mode), the bias voltage of the second bias section (312b) can be input to the low load line amplifier (315) (e.g., the first power amplifier).

[0124] For example, when the operating mode of the hybrid power amplifier section (300) is the first mode (e.g., low load line mode), a buck voltage (319b) can be input to the low load line amplifier (315) (e.g., the first power amplifier).

[0125] For example, when the operating mode of the hybrid power amplifier section (300) is the first mode (e.g., low load line mode), the low load line amplifier (315) (e.g., the first power amplifier) ​​can be operated. The low load line amplifier (315) (e.g., the first power amplifier) ​​can be operated to amplify and output an RF signal in accordance with the low load line characteristics.

[0126] For example, the second internal matching unit (314b) can compensate for RF signal loss by matching the impedance between the first switch (313) (e.g., input switch) and the high load line amplifier (316) (e.g., second power amplifier).

[0127] FIG. 7 is a diagram illustrating a method of operation of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) including a dual amplifier according to one embodiment of the present disclosure, wherein the operation mode of the hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) is a second mode (e.g., high load line mode).

[0128] Referring to FIGS. 3 to 5 and FIG. 7, according to one embodiment, when the operating mode of the hybrid power amplifier section (300) (e.g., power amplifier circuit, power amplifier module) is a second mode (e.g., high load line mode), the low load line amplifier (315) (e.g., first power amplifier) ​​can be turned off and the high load line amplifier (316) (e.g., second power amplifier) ​​can be turned on.

[0129] According to one embodiment, when the operating mode of the hybrid power amplifier section (300) (e.g., power amplifier circuit, power amplifier module) is a second mode (e.g., high load line mode), the first switch (313) (e.g., input switch) may be switched a second time based on the first switch control signal. When the first switch (313) (e.g., input switch) is switched a second time, the output of the drive amplifier (319) may be input to the high load line amplifier (316) (e.g., second power amplifier) ​​via the second internal matching section (314b).

[0130] For example, when the operating mode of the hybrid power amplifier section (300) is the second mode (e.g., high load line mode), the bias voltage of the third bias section (312c) can be input to the high load line amplifier (316) (e.g., the first power amplifier).

[0131] For example, when the operating mode of the hybrid power amplifier section (300) is the second mode (e.g., high load line mode), a boost voltage (319c) can be input to the high load line amplifier (316) (e.g., second power amplifier).

[0132] For example, when the operating mode of the hybrid power amplifier section (300) is the second mode (e.g., high load line mode), the high load line amplifier (316) (e.g., first power amplifier) ​​can be operated. The high load line amplifier (316) (e.g., first power amplifier) ​​can be operated to amplify and output a high band RF signal in accordance with the high load line characteristics.

[0133] For example, the first output matching unit (317a) can compensate for the loss of a high band RF signal by matching the impedance between the low load line amplifier (315) (e.g., first power amplifier) ​​and the second switch (318) (e.g., output switch).

[0134] For example, the second output matching unit (317b) can match the impedance between the high load line amplifier (316) (e.g., first power amplifier) ​​and the second switch (318) (e.g., output switch) to compensate for the loss of the high band RF signal.

[0135] According to one embodiment, an RFIC (e.g., the first RFIC (222), the second RFIC (224), or the third RFIC (226) of FIG. 2) may generate a second switch control signal to control the operation of a second switch (318) (e.g., an output switch) based on the control of a processor (e.g., the processor (120) of FIG. 2) or a communication processor (e.g., the communication processor (212, 214) of FIG. 2).

[0136] For example, a second switch control signal generated by an RFIC (e.g., the first RFIC (222), the second RFIC (224), or the third RFIC (226) of FIG. 2) can be input to a second switch (318) (e.g., an output switch).

[0137] For example, the second switch (318) (e.g., output switch) can be switched first or second based on the second switch control signal.

[0138] For example, when the operating mode of the hybrid power amplifier section (300) is the first mode (e.g., low load line mode), the second switch (318) (e.g., output switch) can be switched first based on the second switch control signal. When the second switch (318) (e.g., output switch) is switched first, a high band RF signal amplified by the low load line amplifier (315) (e.g., first power amplifier) ​​can be output.

[0139] For example, when the second switch (318) (e.g., output switch) is switched first, the high band RF signal amplified in the low load line amplifier (315) (e.g., first power amplifier) ​​can be blocked from being input to the high load line amplifier (316) (e.g., first power amplifier).

[0140] For example, if the operating mode of the hybrid power amplifier section (300) is a second mode (e.g., high load line mode), the second switch (318) (e.g., output switch) can be switched a second time based on the second switch control signal. When the second switch (318) (e.g., output switch) is switched a second time, a high-band RF signal amplified by the high load line amplifier (316) (e.g., second power amplifier) ​​can be output.

[0141] For example, when the second switch (318) (e.g., output switch) is switched a second time, the high-band RF signal amplified in the high-load line amplifier (316) (e.g., second power amplifier) ​​can be blocked from being input to the low-load line amplifier (315) (e.g., first power amplifier).

[0142] According to one embodiment, the second power amplifier section (320) may include an input matching section (321) (e.g., input matching circuit, first matching circuit), a first bias section (322a), a second bias section (322b), an internal matching section (324) (e.g., internal matching circuit, second matching circuit), a low load line amplifier (325), an output matching section (327) (e.g., output matching circuit, third matching circuit), and a drive amplifier (329).

[0143] For example, the second power amplifier (320) can receive a mid-band RF signal (302) from an RFIC (e.g., the first RFIC (222), the second RFIC (224), or the third RFIC (226) of FIG. 2).

[0144] For example, the second power amplifier (320) can receive a mid-band RF signal (302) from a communication processor (e.g., the first communication processor (212) of FIG. 2, or the second communication processor (214)).

[0145] For example, the input matching unit (321) can compensate for the loss of the RF signal at the input terminal. The input matching unit (321) can match the impedance between the input terminal and the internal matching unit (324).

[0146] For example, the first bias section (322a) can vary the magnitude of the bias applied to the drive amplifier (329).

[0147] For example, the drive amplifier (329) can amplify the power to a certain size before amplifying the high signal to the power amplifier (e.g., low load power amplifier (326)), and output the input signal to the power amplifier.

[0148] For example, the output of the first bias section (322a) and the buck voltage (329a) may be input to the drive amplifier (329). For example, the buck voltage (329a) may be about 3.0 to about 3.5 V.

[0149] For example, a buck voltage (329a) is input to the drive amplifier (329), and the hybrid power amplifier section (300) can amplify the mid-band RF signal (302).

[0150] For example, the internal matching section (324) can compensate for RF signal loss by matching the impedance between the drive amplifier (329) and the low load line amplifier (325).

[0151] According to one embodiment, the low load line amplifier (325) can be configured to generate a desired RF signal by adjusting the load resistance value of a terminal connected to the output matching section (327) (e.g., output matching circuit, third matching circuit). The load resistance value can be determined by the peak power and power supply voltage (V_DC) required by the second power amplifier section (320).

[0152] For example, the second power amplifier section (320) may be configured so that the magnitude of the load resistance value is adjusted along a load line that reflects a voltage-current curve to amplify the signal to maximum power by reflecting the characteristics of the device. For example, the second power amplifier section (320) may vary the magnitude of the load resistance value by taking into account parameters such as losses due to output impedance matching, frequency characteristics, and limited Q.

[0153] For example, the second power amplifier section (320) can be configured to allow the voltage to change between a minimum voltage (Vmin) and a maximum voltage (Vmax) due to the device characteristics.

[0154] For example, the second power amplifier section (320) may be configured to include a loadline within an operating range configured to operate within a range that does not exceed the maximum current (Imax).

[0155] According to one embodiment, the output of the drive amplifier (329) can be input to the low load line amplifier (325) via the internal matching unit (324).

[0156] For example, the bias voltage of the second bias section (322b) can be input to the low load line amplifier (325).

[0157] For example, a buck voltage (329b) can be input to the low load line amplifier (325). For example, the buck voltage can be about 3.0 to about 3.5 V.

[0158] For example, the low load line amplifier (325) can operate to amplify and output a mid band RF signal according to the low load line characteristics.

[0159] For example, the output matching section (327) (e.g., output matching circuit, third matching circuit) can match the impedance between the low load line amplifier (325) and the output terminal to compensate for the loss of the mid band RF signal.

[0160] According to one embodiment, the third power amplifier section (330) may include an input matching section (331) (e.g., input matching circuit, first matching circuit), a first bias section (332a), a second bias section (332b), an internal matching section (334) (e.g., internal matching circuit, second matching circuit), a low load line amplifier (335), an output matching section (337) (e.g., output matching circuit, third matching circuit), and a drive amplifier (339).

[0161] For example, the third power amplifier (330) can receive a low band RF signal (303) from an RFIC (e.g., the first RFIC (222), the second RFIC (224), or the third RFIC (226) of FIG. 2).

[0162] For example, the third power amplifier (330) can receive a low band RF signal (303) from a communication processor (e.g., the first communication processor (212) or the second communication processor (214) of FIG. 2).

[0163] For example, the input matching unit (331) can compensate for the loss of the RF signal at the input terminal. The input matching unit (331) can match the impedance between the input terminal and the internal matching unit (334).

[0164] For example, the first bias section (332a) can vary the magnitude of the bias applied to the drive amplifier (329).

[0165] For example, the drive amplifier (339) can amplify the power to a certain size before amplifying the high signal to the power amplifier (e.g., low load power amplifier (336)), and output the input signal to the power amplifier.

[0166] For example, the output of the first bias section (332a) and the buck voltage (339a) may be input to the drive amplifier (339). For example, the buck voltage (339a) may be about 3.0 to about 3.5 V.

[0167] For example, a buck voltage (339a) is input to the drive amplifier (339), and the hybrid power amplifier section (300) can amplify the low band RF signal (303).

[0168] For example, the internal matching section (334) can match the impedance between the drive amplifier (339) and the low load line amplifier (335) to compensate for the loss of the low band RF signal.

[0169] According to one embodiment, the low load line amplifier (335) can be configured to generate a desired RF signal by adjusting the load resistance value of a terminal connected to the output matching section (337) (e.g., output matching circuit, third matching circuit). The load resistance value can be determined by the peak power and power supply voltage (V_DC) required by the third power amplifier section (330).

[0170] For example, the third power amplifier section (330) may be configured so that the magnitude of the load resistance value is adjusted along a load line that reflects a voltage-current curve to amplify the signal to maximum power by reflecting the characteristics of the device. For example, the third power amplifier section (330) may vary the magnitude of the load resistance value by taking into account parameters such as losses due to output impedance matching, frequency characteristics, and limited Q.

[0171] For example, the third power amplifier section (330) can be configured to allow the voltage to change between a minimum voltage (Vmin) and a maximum voltage (Vmax) due to the device characteristics.

[0172] For example, the third power amplifier section (330) may be configured to include a loadline within an operating range configured to operate within a range that does not exceed the maximum current (Imax).

[0173] According to one embodiment, the output of the drive amplifier (339) can be input to the low load line amplifier (335) via the internal matching unit (334).

[0174] For example, the bias voltage of the second bias section (332b) can be input to the low load line amplifier (335).

[0175] For example, a buck voltage (339b) can be input to the low load line amplifier (335). For example, the buck voltage (339b) can be about 3.0 to about 3.5 V.

[0176] For example, the low load line amplifier (335) can operate to amplify and output an RF signal according to the low load line characteristics.

[0177] For example, the output matching section (337) (e.g., output matching circuit, third matching circuit) can match the impedance between the low load line amplifier (335) and the output terminal to compensate for the loss of the low band RF signal.

[0178] An electronic device (e.g., the electronic device (101) of FIG. 1, the electronic device (101) of FIG. 2) including a hybrid power amplifier section (300) (e.g., power amplifier circuit, power amplifier module) according to one embodiment of the present disclosure can support wireless communication of bands n1 to n12 as described in Table 1.

[0179] [Table 1]

[0180]

[0181] An electronic device (e.g., the electronic device (101) of FIG. 1, the electronic device (101) of FIG. 2) including a hybrid power amplifier section (300) (e.g., power amplifier circuit, power amplifier module) according to one embodiment of the present disclosure can support wireless communication of bands n13 to 26 as described in Table 2.

[0182] [Table 2]

[0183]

[0184] An electronic device (e.g., the electronic device (101) of FIG. 1, the electronic device (101) of FIG. 2) including a hybrid power amplifier section (300) (e.g., power amplifier circuit, power amplifier module) according to one embodiment of the present disclosure can support wireless communication of the n28 to n38 bands described in Table 3.

[0185] [Table 3]

[0186]

[0187] An electronic device (e.g., the electronic device (101) of FIG. 1, the electronic device (101) of FIG. 2) including a hybrid power amplifier section (300) (e.g., power amplifier circuit, power amplifier module) according to one embodiment of the present disclosure can support wireless communication of the n39 to n48 bands described in Table 4.

[0188] [Table 4]

[0189]

[0190] An electronic device (101) including a dual power amplifier according to an embodiment of the present disclosure and a method of operation thereof can satisfy the trade-off between linearity and output efficiency of the power amplifier through a dual loadline MMMB power amplifier (PA) structure.

[0191] An electronic device (101) including a dual power amplifier according to an embodiment of the present disclosure can reduce the space required for power amplifier placement by providing a dual power amplifier (dual PA) combined with a high-load power amplifier and a low-load power amplifier.

[0192] An electronic device (101) including a dual power amplifier (dual PA) according to an embodiment of the present disclosure can satisfy high-performance communication and low power consumption of the electronic device.

[0193] FIGS. 8a and 8b are drawings showing the structure of a hybrid power amplifier section (e.g., power amplifier circuit, power amplifier module) including a dual amplifier according to one embodiment of the present disclosure.

[0194] In describing the hybrid power amplifier section (800) (e.g., power amplifier circuit, power amplifier module) illustrated in FIGS. 8a and 8b, detailed descriptions of configurations identical (or similar) to the configuration of the hybrid power amplifier section (300) (e.g., power amplifier circuit, power amplifier module) of FIGS. 3 and 4 may be omitted.

[0195] Referring to FIGS. 8a and 8b, an electronic device according to one embodiment of the present disclosure (e.g., the electronic device (101) of FIG. 1, the electronic device (101) of FIG. 2) may include a hybrid power amplifier section (800) (e.g., a power amplifier circuit, a power amplifier module) including a dual amplifier.

[0196] For example, a hybrid power amplifier section (800) according to one embodiment of the present disclosure may include a dual loadline MMMB (multi-mode multi-band) power amplifier (PA) (e.g., a dual power amplifier).

[0197] According to one embodiment, a hybrid power amplifier unit (800) according to one embodiment of the present disclosure may include a first power amplifier unit (810), a second power amplifier unit (820), and a third power amplifier unit (830).

[0198] The hybrid power amplifier section (800) illustrated in FIGS. 8a and 8b may include at least a portion of the hybrid power amplifier section (800) of FIGS. 3 and 4. FIGS. 8a illustrates a first power amplifier section (810) and a second power amplifier section (820), and FIGS. 8b illustrates a third power amplifier section (830). However, not limited thereto, a single hybrid power amplifier section (800) may be configured with the first power amplifier section (810), the second power amplifier section (820), and the third power amplifier section (830).

[0199] According to one embodiment, the hybrid power amplifier section (800) may include a first power amplifier section (810) and a second power amplifier section (820) capable of satisfying both low load line characteristics and high load line characteristics.

[0200] For example, the first power amplifier section (810) may include a high-load power amplifier that performs high-power amplification to enable high-performance communication of the electronic device (101), and a low-load power amplifier for low-power consumption of the electronic device (101).

[0201] For example, the second power amplifier section (820) may include a high-load power amplifier that performs high-power amplification to enable high-performance communication of the electronic device (101), and a low-load power amplifier for low-power consumption of the electronic device (101).

[0202] According to one embodiment, the first power amplifier section (810) may include an input matching section (811) (e.g., input matching circuit, first matching circuit), a first bias section (812a), a second bias section (812b), a third bias section (812c), a first switch (313) (e.g., input switch), a second switch (813) (e.g., input switch), a plurality of internal matching sections (814a, 814b) (e.g., a plurality of internal matching circuits, second matching circuits), a low load line amplifier (815), a high load line amplifier (816), a plurality of output matching sections (817a, 817b) (e.g., a plurality of output matching circuits, third matching circuits), a third switch (818) (e.g., output switch), a fourth switch (318a) (e.g., high band output switch), a fifth switch (318b) (e.g., middle band output switch), and a drive amplifier (819).

[0203] For example, the first power amplifier (810) can receive a high band RF signal (801) from an RFIC (e.g., the first RFIC (222), the second RFIC (224), or the third RFIC (226) of FIG. 2).

[0204] For example, the first power amplifier (810) can receive a high band RF signal (801) from a communication processor (e.g., the first communication processor (212) of FIG. 2, or the second communication processor (214)).

[0205] According to one embodiment, the second power amplifier section (820) may include an input matching section (821) (e.g., input matching circuit, first matching circuit), a first bias section (822a), a second bias section (822b), an internal matching section (824a, 824b) (e.g., internal matching circuit, second matching circuit), a low load line amplifier (825), a high load line amplifier (816), an output matching section (827a, 827b) (e.g., output matching circuit, third matching circuit), and a drive amplifier (829).

[0206] For example, the second power amplifier (820) can receive a mid-band RF signal (802) from an RFIC (e.g., the first RFIC (222), the second RFIC (224), or the third RFIC (226) of FIG. 2).

[0207] For example, the second power amplifier (820) can receive a mid-band RF signal (802) from a communication processor (e.g., the first communication processor (212) of FIG. 2, or the second communication processor (214)).

[0208] According to one embodiment, the first power amplifier section (810) may include a low load line amplifier (815) and a high load line amplifier (816). The second power amplifier section (820) may include a low load line amplifier (825) and a high load line amplifier (816). The first power amplifier section (810) and the second power amplifier section (820) may share one high load line amplifier (816).

[0209] For example, the input matching unit (811) can compensate for the loss of the RF signal at the input terminal. The input matching unit (811) can match the impedance between the input terminal and a plurality of internal matching units (814a, 814a).

[0210] For example, the first bias section (812a) can vary the magnitude of the bias applied to the drive amplifier (819).

[0211] For example, the output of the first bias section (812a) and the buck voltage or boost voltage (819a) may be input to the drive amplifier (819).

[0212] For example, the buck voltage can be about 3.0 to about 3.5 V. The boost voltage can be about 3.8 to about 4.5 V.

[0213] For example, when the operating mode of the hybrid power amplifier section (800) is the first mode (e.g., low load line mode), a buck voltage is input to the drive amplifier (819), and the hybrid power amplifier section (800) can amplify a high band RF signal (801).

[0214] For example, when the operating mode of the hybrid power amplifier section (800) is the second mode (e.g., high load line mode), a boost voltage is input to the drive amplifier (819), and the hybrid power amplifier section (800) can amplify the high band RF signal (801).

[0215] For example, the first internal matching unit (814a) can compensate for loss of RF signal by matching the impedance between the second switch (813) (e.g., input switch) and the low load line amplifier (815) (e.g., first power amplifier).

[0216] According to one embodiment, a low load line amplifier (815) (e.g., a first power amplifier) ​​can be configured to generate a desired RF signal by adjusting the load resistance value of a terminal connected to a first output matching section (817a). The load resistance value can be determined by the peak power and power supply voltage (V_DC) required by the first power amplifier section (810).

[0217] According to one embodiment, the high load line amplifier (816) (e.g., the second power amplifier) ​​can be configured to generate a desired RF signal by adjusting the load resistance value of the terminal connected to the second output matching section (817b). The load resistance value can be determined by the peak power and power supply voltage (V_DC) required by the first power amplifier section (810).

[0218] For example, the first power amplifier section (810) may be configured so that the magnitude of the load resistance value is adjusted along a load line that reflects a voltage-current curve to amplify the signal to maximum power by reflecting the characteristics of the device. For example, the first power amplifier section (810) may vary the magnitude of the load resistance value by taking into account parameters such as losses due to output impedance matching, frequency characteristics, and limited Q.

[0219] For example, the first power amplifier section (810) can be configured to allow the voltage to change between a minimum voltage (Vmin) and a maximum voltage (Vmax) due to the device characteristics.

[0220] For example, the first power amplifier section (810) may be configured to include a loadline within an operating range configured to operate within a range that does not exceed the maximum current (Imax).

[0221] According to one embodiment, an RFIC (e.g., the first RFIC (222), the second RFIC (224), or the third RFIC (226) of FIG. 2) can generate first to fifth switch control signals to control the operation of a first switch (313) (e.g., an input switch), a second switch (813) (e.g., an input switch), a third switch (818) (e.g., an output switch), a fourth switch (318a) (e.g., a high-band output switch), and a fifth switch (318b) (e.g., a middle-band output switch) based on the control of a processor (e.g., the processor (120) of FIG. 2) or a communication processor (e.g., the communication processor (212, 214) of FIG. 2).

[0222] For example, a first switch control signal generated by an RFIC (e.g., the first RFIC (222), the second RFIC (224), or the third RFIC (226) of FIG. 2) can be input to a first switch (313) (e.g., an input switch). For example, the first switch (313) (e.g., an input switch) can be switched first or second based on the first switch control signal.

[0223] For example, a second switch control signal generated by an RFIC (e.g., the first RFIC (222), the second RFIC (224), or the third RFIC (226) of FIG. 2) can be input to a second switch (813) (e.g., an input switch). For example, the second switch (813) (e.g., an input switch) can be switched first or second based on the second switch control signal.

[0224] According to one embodiment, when the operating mode of the hybrid power amplifier section (800) is a first mode (e.g., low load line mode), the low load line amplifier (815) (e.g., first power amplifier) ​​may be turned on, and the high load line amplifier (816) (e.g., second power amplifier) ​​may be turned off.

[0225] According to one embodiment, when the operating mode of the hybrid power amplifier section (800) is a first mode (e.g., low load line mode), the first switch (313) (e.g., input switch) can be first switched based on a first switch control signal. When the first switch (313) (e.g., input switch) is first switched, the output of the drive amplifier (819) can be input to the low load line amplifier (815) (e.g., first power amplifier) ​​via the first internal matching section (814a).

[0226] For example, when the operating mode of the hybrid power amplifier section (800) is the first mode (e.g., low load line mode), the bias voltage of the second bias section (812b) can be input to the low load line amplifier (815) (e.g., the first power amplifier).

[0227] For example, when the operating mode of the hybrid power amplifier section (800) is the first mode (e.g., low load line mode), a buck voltage (819b) can be input to the low load line amplifier (815) (e.g., the first power amplifier).

[0228] For example, when the operating mode of the hybrid power amplifier section (800) is the first mode (e.g., low load line mode), the low load line amplifier (815) (e.g., the first power amplifier) ​​can be operated. The low load line amplifier (815) (e.g., the first power amplifier) ​​can be operated to amplify and output an RF signal in accordance with the low load line characteristics.

[0229] For example, the second internal matching unit (814b) can compensate for RF signal loss by matching the impedance between the first switch (313) (e.g., input switch) and the high load line amplifier (816) (e.g., second power amplifier).

[0230] According to one embodiment, when the operating mode of the hybrid power amplifier section (800) is a second mode (e.g., high load line mode), the low load line amplifier (815) (e.g., first power amplifier) ​​may be turned off, and the high load line amplifier (816) (e.g., second power amplifier) ​​may be turned on.

[0231] According to one embodiment, when the operating mode of the hybrid power amplifier section (800) is a second mode (e.g., high load line mode), the first switch (313) (e.g., input switch) may be switched a second time based on a second switch control signal. When the first switch (313) (e.g., input switch) is switched a second time, the output of the drive amplifier (819) may be input to the second switch (818 (e.g., input switch) via the second internal matching section (814b).

[0232] For example, the second switch (813) (e.g., input switch) can be switched a second time based on the second switch control signal. When the second switch (813) (e.g., input switch) is switched a second time, the output of the drive amplifier (819) can be input to the high load line amplifier (816) (e.g., second power amplifier) ​​via the second internal matching section (814b).

[0233] For example, when the operating mode of the hybrid power amplifier section (800) is the second mode (e.g., high load line mode), the bias voltage of the third bias section (812c) can be input to the high load line amplifier (816) (e.g., the first power amplifier).

[0234] For example, if the operating mode of the hybrid power amplifier section (800) is the second mode (e.g., high load line mode), a boost voltage (819c) can be input to the high load line amplifier (816) (e.g., second power amplifier).

[0235] For example, when the operating mode of the hybrid power amplifier section (800) is the second mode (e.g., high load line mode), the high load line amplifier (816) (e.g., first power amplifier) ​​can be operated. The high load line amplifier (816) (e.g., first power amplifier) ​​can be operated to amplify and output a high band RF signal in accordance with the high load line characteristics.

[0236] For example, the first output matching unit (817a) can compensate for the loss of the low band RF signal by matching the impedance between the low load line amplifier (815) (e.g., the first power amplifier) ​​and the fourth switch (318a) (e.g., the high band output switch).

[0237] For example, the second output matching unit (817b) can match the impedance between the high load line amplifier (816) (e.g., the first power amplifier) ​​and the fourth switch (318a) (e.g., the high band output switch) to compensate for the loss of the high band RF signal.

[0238] For example, a third switch control signal generated by an RFIC (e.g., the first RFIC (222), the second RFIC (224), or the third RFIC (226) of FIG. 2) can be input to a third switch (818) (e.g., an output switch). For example, the third switch (818) (e.g., an output switch) can be switched first or second based on the third switch control signal.

[0239] For example, a fourth switch control signal generated by an RFIC (e.g., the first RFIC (222), the second RFIC (224), or the third RFIC (226) of FIG. 2) can be input to a fourth switch (318a) (e.g., a high-band output switch). For example, the fourth switch (318a) (e.g., a high-band output switch) can be switched first or second based on the fourth switch control signal.

[0240] For example, a fifth switch control signal generated by an RFIC (e.g., the first RFIC (222), the second RFIC (224), or the third RFIC (226) of FIG. 2) can be input to a fifth switch (318b) (e.g., a middle band output switch). For example, the fifth switch (318b) (e.g., a middle band output switch) can be switched first or second based on the fifth switch control signal.

[0241] For example, when the operating mode of the hybrid power amplifier section (800) is the first mode (e.g., low load line mode), the third switch (818) (e.g., output switch) can be switched first based on the first switch control signal.

[0242] For example, when the operating mode of the hybrid power amplifier section (800) is the first mode (e.g., low load line mode), the fourth switch (318a) (e.g., high band output switch) can be switched first based on the first switch control signal. When the third switch (818) (e.g., output switch) and the fourth switch (318a) (e.g., high band output switch) are switched first, a high band RF signal amplified by the low load line amplifier (815) (e.g., first power amplifier) ​​can be output.

[0243] For example, when the third switch (818) (e.g., output switch) is switched a second time, the high band RF signal amplified in the low load line amplifier (815) (e.g., first power amplifier) ​​can be blocked from being input to the high load line amplifier (816) (e.g., first power amplifier).

[0244] For example, if the operating mode of the hybrid power amplifier section (800) is a second mode (e.g., high load line mode), the third switch (818) (e.g., output switch) can be switched a second time based on the second switch control signal. When the second switch (818) (e.g., output switch) is switched a second time, a high-band RF signal amplified by the high load line amplifier (816) (e.g., second power amplifier) ​​can be output.

[0245] For example, when the second switch (818) (e.g., output switch) is switched a second time, the high-band RF signal amplified in the high-load line amplifier (816) (e.g., second power amplifier) ​​can be blocked from being input to the low-load line amplifier (815) (e.g., first power amplifier).

[0246] For example, the input matching unit (821) can compensate for the loss of the RF signal at the input terminal. The input matching unit (821) can match the impedance between the input terminal and the internal matching unit (824a, 824b).

[0247] For example, the first bias section (822a) can vary the magnitude of the bias applied to the drive amplifier (829).

[0248] For example, the output of the first bias section (822a) and the buck voltage (829a) may be input to the drive amplifier (829). For example, the buck voltage may be about 3.0 to about 3.5 V.

[0249] For example, a buck voltage (829a) is input to the drive amplifier (829), and the hybrid power amplifier section (800) can amplify the mid-band RF signal (802).

[0250] For example, the internal matching section (824a, 824b) can match the impedance between the drive amplifier (829) and the low load line amplifier (825) to compensate for the loss of the RF signal.

[0251] According to one embodiment, the low load line amplifier (825) can be configured to generate a desired RF signal by adjusting the load resistance value of a terminal connected to the output matching section (827a, 827b) (e.g., output matching circuit, third matching circuit). The load resistance value can be determined by the peak power and power supply voltage (V_DC) required by the second power amplifier section (820).

[0252] For example, the second power amplifier section (820) may be configured so that the magnitude of the load resistance value is adjusted along a load line that reflects a voltage-current curve to amplify the signal to maximum power by reflecting the characteristics of the device. For example, the second power amplifier section (820) may vary the magnitude of the load resistance value by taking into account parameters such as losses due to output impedance matching, frequency characteristics, and limited Q.

[0253] For example, the second power amplifier section (820) can be configured to allow the voltage to change between a minimum voltage (Vmin) and a maximum voltage (Vmax) due to the device characteristics.

[0254] For example, the second power amplifier section (820) may be configured to include a loadline within an operating range configured to operate within a range that does not exceed the maximum current (Imax).

[0255] According to one embodiment, the output of the drive amplifier (829) can be input to the low load line amplifier (825) via the internal matching section (824a, 824b).

[0256] For example, the bias voltage of the second bias section (822b) can be input to the low load line amplifier (825).

[0257] For example, a buck voltage (829b) can be input to the low load line amplifier (825). For example, the buck voltage can be about 3.0 to about 3.5 V.

[0258] For example, the low load line amplifier (825) can operate to amplify and output a mid band RF signal according to the low load line characteristics.

[0259] For example, the output matching section (827a, 827b) (e.g., output matching circuit, third matching circuit) can match the impedance between the low load line amplifier (825) and the output terminal to compensate for the loss of the mid band RF signal.

[0260] According to one embodiment, the third power amplifier section (830) may include an input matching section (831) (e.g., input matching circuit, first matching circuit), a first bias section (832a), a second bias section (832b), an internal matching section (834) (e.g., internal matching circuit, second matching circuit), a low load line amplifier (835), an output matching section (837) (e.g., output matching circuit, third matching circuit), and a drive amplifier (839).

[0261] For example, the third power amplifier (830) can receive a low band RF signal (803) from an RFIC (e.g., the first RFIC (222), the second RFIC (224), or the third RFIC (226) of FIG. 2).

[0262] For example, the third power amplifier (830) can receive a low band RF signal (803) from a communication processor (e.g., the first communication processor (212) or the second communication processor (214) of FIG. 2).

[0263] For example, the input matching unit (831) can compensate for the loss of the RF signal at the input terminal. The input matching unit (831) can match the impedance between the input terminal and the internal matching unit (834).

[0264] For example, the first bias section (832a) can vary the magnitude of the bias applied to the drive amplifier (839).

[0265] For example, the output of the first bias section (832a) and the buck voltage (839a) may be input to the drive amplifier (839). For example, the buck voltage may be about 3.0 to about 3.5 V.

[0266] For example, a buck voltage (839a) is input to the drive amplifier (839), and the hybrid power amplifier section (800) can amplify the low band RF signal (803).

[0267] For example, the internal matching section (834) can match the impedance between the drive amplifier (839) and the low load line amplifier (835) to compensate for the loss of the low band RF signal.

[0268] According to one embodiment, the low load line amplifier (835) can be configured to generate a desired RF signal by adjusting the load resistance value of a terminal connected to the output matching section (837) (e.g., output matching circuit, third matching circuit). The load resistance value can be determined by the peak power and power supply voltage (V_DC) required by the third power amplifier section (830).

[0269] For example, the third power amplifier section (830) may be configured so that the magnitude of the load resistance value is adjusted along a load line that reflects a voltage-current curve to amplify the signal to maximum power by reflecting the characteristics of the device. For example, the third power amplifier section (830) may vary the magnitude of the load resistance value by taking into account parameters such as losses due to output impedance matching, frequency characteristics, and limited Q.

[0270] For example, the third power amplifier section (830) can be configured to allow the voltage to change between a minimum voltage (Vmin) and a maximum voltage (Vmax) due to the device characteristics.

[0271] For example, the third power amplifier section (830) may be configured to include a loadline within an operating range configured to operate within a range that does not exceed the maximum current (Imax).

[0272] According to one embodiment, the output of the drive amplifier (839) can be input to the low load line amplifier (835) via the internal matching unit (834).

[0273] For example, the bias voltage of the second bias section (832b) can be input to the low load line amplifier (835).

[0274] For example, a buck voltage (839b) may be input to the low load line amplifier (835). For example, the buck voltage (839b) may be about 3.0 to about 3.5 V.

[0275] For example, the low load line amplifier (835) can operate to amplify and output an RF signal according to the low load line characteristics.

[0276] For example, the output matching section (837) (e.g., output matching circuit, third matching circuit) can match the impedance between the low load line amplifier (835) and the output terminal to compensate for the loss of the low band RF signal.

[0277] An electronic device (101) including a dual power amplifier according to an embodiment of the present disclosure and a method of operation thereof can satisfy the trade-off between linearity and output efficiency of the power amplifier through a dual loadline MMMB power amplifier (PA) structure.

[0278] An electronic device (101) including a dual power amplifier according to an embodiment of the present disclosure can reduce the space required for power amplifier placement by providing a dual power amplifier (dual PA) combined with a high-load power amplifier and a low-load power amplifier.

[0279] An electronic device (101) including a dual power amplifier (dual PA) according to an embodiment of the present disclosure can satisfy high-performance communication and low power consumption of the electronic device.

[0280] An electronic device (101) including a hybrid power amplifier unit (300) according to an embodiment of the present disclosure may include a communication processor that outputs a baseband signal, a radio frequency integrated circuit (RFIC) that converts the baseband signal into a plurality of radio frequency (RF) signals, and a hybrid power amplifier unit (300) that amplifies the RF signals. The hybrid power amplifier unit (300) may amplify a first RF signal among the plurality of RF signals according to a low load line characteristic or a high load line characteristic based on an operating mode.

[0281] According to one embodiment, the hybrid power amplifier section (300) may include a low load line amplifier (315) that amplifies the first RF signal according to the low load line characteristic, and a high load line amplifier (316) that amplifies the first RF signal according to the high load line characteristic.

[0282] According to one embodiment, when the operating mode of the hybrid power amplifier section (300) is the first mode, the low load line amplifier (315) may be turned on and the high load line amplifier (316) may be turned off.

[0283] According to one embodiment, the low load line amplifier (315) receives a first RF signal and a buck voltage among the plurality of RF signals, and can amplify the first RF signal according to the low load line characteristics.

[0284] According to one embodiment, the buck voltage may be 3.0 to 3.5 V.

[0285] According to one embodiment, when the operating mode of the hybrid power amplifier section (300) is the second mode, the low load line amplifier (315) may be off and the high load line amplifier (316) may be on.

[0286] According to one embodiment, the high load line amplifier (316) receives a first RF signal and a boost voltage among the plurality of RF signals, and can amplify the first RF signal according to the high load line characteristics.

[0287] According to one embodiment, the boost voltage may be 3.8 to 4.5 V.

[0288] According to one embodiment, the hybrid power amplifier section (300) may include a first switch (313) disposed at the input terminals of the low load line amplifier (315) and the high load line amplifier (316) to output the first RF signal to the low load line amplifier (315) or the high load line amplifier (316). The hybrid power amplifier section (300) may further include a second switch (318) disposed at the output terminals of the low load line amplifier (315) and the high load line amplifier (316) to output the first RF signal to the output signal of the low load line amplifier (315) or the output signal of the high load line amplifier (316) to the output terminal.

[0289] According to one embodiment, the RFIC can generate a first switch (313) control signal for controlling the first switch (313) and a second switch (318) control signal for controlling the second switch (318). When the operating mode of the hybrid power amplifier section (300) is the first mode, the first switch (313) can output the first RF signal to the low load line amplifier (315) based on the first switch (313) control signal. The second switch (318) can output the output signal of the low load line amplifier (315) to the output terminal based on the second switch (318) control signal.

[0290] According to one embodiment, when the operating mode of the hybrid power amplifier section (300) is the second mode, the first switch (313) can output the first RF signal to the high load line amplifier (316) based on the control signal of the first switch (313). The second switch (318) can output the output signal of the high load line amplifier (316) to the output terminal based on the control signal of the second switch (318).

[0291] In a method of operation of an electronic device (101) including a hybrid power amplifier unit (300) according to one embodiment of the present disclosure, the electronic device may include a communication processor that outputs a baseband signal, a radio frequency integrated circuit (RFIC) that converts the baseband signal into a plurality of radio frequency (RF) signals, and a hybrid power amplifier unit (300) that amplifies the RF signals. The method of operation may amplify a first RF signal among the plurality of RF signals according to a low load line characteristic or a high load line characteristic based on the operation mode of the hybrid power amplifier unit (300).

[0292] According to one embodiment, the hybrid power amplifier section (300) includes a low load line amplifier (315) and can amplify the first RF signal according to the low load line characteristics. The hybrid power amplifier section (300) includes a high load line amplifier (316) and can amplify the first RF signal according to the high load line characteristics.

[0293] According to one embodiment, in the operation method, when the operation mode of the hybrid power amplifier section (300) is the first mode, the low load line amplifier (315) can be turned on and the high load line amplifier (316) can be turned off.

[0294] According to one embodiment, the low load line amplifier (315) receives a first RF signal and a buck voltage among the plurality of RF signals, and can amplify the first RF signal according to the low load line characteristics.

[0295] According to one embodiment, the buck voltage may be 3.0 to 3.5 V.

[0296] According to one embodiment, when the operating mode of the hybrid power amplifier section (300) is the second mode, the low load line amplifier (315) may be off and the high load line amplifier (316) may be on.

[0297] According to one embodiment, the high load line amplifier (316) receives a first RF signal and a boost voltage among the plurality of RF signals, and can amplify the first RF signal according to the high load line characteristics.

[0298] According to one embodiment, the boost voltage may be 3.8 to 4.5 V.

[0299] According to one embodiment, the electronic device may include a first switch (313) disposed at the input terminal of the low load line amplifier (315) and the high load line amplifier (316), and a second switch (318) disposed at the output terminal of the low load line amplifier (315) and the high load line amplifier (316). The RFIC may generate a first switch (313) control signal for controlling the first switch (313) and a second switch (318) control signal for controlling the second switch (318). When the operating mode of the hybrid power amplifier section (300) is the first mode, the first switch (313) may output the first RF signal to the low load line amplifier (315) based on the first switch (313) control signal. The second switch (318) can output the output signal of the low load line amplifier (315) to the output terminal based on the control signal of the second switch (318).

[0300] According to one embodiment, when the operating mode of the hybrid power amplifier section (300) is the second mode, the first switch (313) can output the first RF signal to the high load line amplifier (316) based on the control signal of the first switch (313). The second switch (318) can output the output signal of the high load line amplifier (316) to the output terminal based on the control signal of the second switch (318).

[0301] An electronic device including a dual power amplifier according to an embodiment of the present disclosure and a method of operation thereof can satisfy the trade-off between linearity and output efficiency of the power amplifier through a dual loadline MMMB power amplifier (PA) structure.

[0302] An electronic device including a dual power amplifier according to an embodiment of the present disclosure can reduce the space required for power amplifier placement by providing a dual power amplifier (dual PA) combined with a high-load power amplifier and a low-load power amplifier.

[0303] An electronic device including a dual power amplifier (dual PA) according to an embodiment of the present disclosure can satisfy high-performance communication and low power consumption of the electronic device.

[0304] The effects obtainable from the present disclosure are not limited to those mentioned above, and other unmentioned effects will be clearly understood by those skilled in the art to which the present disclosure pertains from the description below.

[0305] An electronic device according to one embodiment disclosed in this document may be of various forms. The electronic device may include, for example, a portable communication device (e.g., a smartphone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a consumer electronics device. The electronic device according to the embodiment of this document is not limited to the aforementioned devices.

[0306] The embodiments of the present disclosure and the terms used therein are not intended to limit the technical features described in this document to specific embodiments, and should be understood to include various modifications, equivalents, or substitutions of said embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of said items unless the relevant context clearly indicates otherwise. In this document, each of phrases such as “A or B”, “at least one of A and B”, “at least one of A or B”, “A, B or C”, “at least one of A, B and C”, and “at least one of A, B, or C” may include any one of the items listed together in the corresponding phrase, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used simply to distinguish a component from another component and do not limit the components in any other aspect (e.g., importance or order). Where any component (e.g., the first) is referred to as "coupled" or "connected" to another component (e.g., the second), with or without the terms "functionally" or "communicationally," it means that said component may be connected to said other component directly (e.g., via a wire), wirelessly, or through a third component.

[0307] As used in one embodiment of the present disclosure, the term “module” may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit, for example. A module may be a component formed integrally, or a minimum unit of said component or a part thereof that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0308] One embodiment of the present disclosure may be implemented as software (e.g., program (140)) comprising one or more instructions stored in a storage medium (e.g., internal memory (136) or external memory (138)) readable by a machine (e.g., electronic device (101)). For example, a processor (e.g., processor (120)) of the machine (e.g., electronic device (101)) may call at least one of the one or more instructions stored in the storage medium and execute it. This enables the machine to be operated to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code that can be executed by an interpreter. The storage medium readable by the machine may be provided in the form of a non-transitory storage medium. Here, 'non-temporary' simply means that the storage medium is a tangible device and does not contain a signal (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently and cases where it is stored temporarily.

[0309] According to one embodiment, the method according to one embodiment disclosed herein may be provided by being included in a computer program product. The computer program product may be traded between a seller and a buyer as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read-only memory (CD-ROM)) or an application store (e.g., Play Store). TM It can be distributed online (e.g., downloaded or uploaded) through ) or directly between two user devices (e.g., smartphones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily created on a device-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a relay server.

[0310] According to one embodiment, each component (e.g., module or program) of the components described above may include a singular or multiple entities, and some of the multiple entities may be separated and placed in other components. According to one embodiment, one or more of the components or operations among the aforementioned components may be omitted, or one or more other components or operations may be added. Generally or additionally, multiple components (e.g., module or program) may be integrated into a single component. In this case, the integrated component may perform one or more functions of each of the multiple components in the same or similar manner as those performed by the corresponding component among the multiple components prior to integration. According to one embodiment, operations performed by the module, program, or other components may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

Claims

1. In an electronic device (101), A communication processor that outputs a baseband signal; A radio frequency integrated circuit (RFIC) that converts the above-mentioned radio frequency band signal into a plurality of radio frequency (RF) signals; and A hybrid power amplifier section (300) that amplifies the above RF signal; is included, The above hybrid power amplifier section (300) amplifies a first RF signal among the plurality of RF signals according to a low load line characteristic or a high load line characteristic based on an operation mode. Electronic device (101) including a hybrid power amplifier section.

2. In Paragraph 1, The above hybrid power amplifier section (300) is, A hybrid power amplifier section (300) comprising a low load line amplifier (315) that amplifies the first RF signal according to the low load line characteristics, and a high load line amplifier (316) that amplifies the first RF signal according to the high load line characteristics, and When the operating mode of the hybrid power amplifier section (300) is the first mode, the low load line amplifier (315) is turned on and the high load line amplifier (316) is turned off. Electronic device (101) including a hybrid power amplifier section (300).

3. In Paragraph 2, The above low load line amplifier (315) receives a first RF signal and a buck voltage among the plurality of RF signals, and amplifies the first RF signal according to the low load line characteristics. Electronic device (101) including a hybrid power amplifier section (300).

4. In Paragraph 1, When the operating mode of the hybrid power amplifier section (300) is the second mode, The above low load line amplifier (315) is off, and the above high load line amplifier (316) is on. Electronic device (101) including a hybrid power amplifier section (300).

5. In Paragraph 4, The above high load line amplifier (316) receives a first RF signal and a boost voltage among the plurality of RF signals, and amplifies the first RF signal according to the high load line characteristics. Electronic device (101) including a hybrid power amplifier section (300).

6. In any one of paragraphs 1 through 5, The above hybrid power amplifier section (300) is, A first switch (313) disposed at the input terminals of the low load line amplifier (315) and the high load line amplifier (316) to output the first RF signal to the low load line amplifier (315) or the high load line amplifier (316), and A second switch (318) further comprising a second switch disposed at the output terminals of the low load line amplifier (315) and the high load line amplifier (316) for outputting the first RF signal to the output signal of the low load line amplifier (315) or the output signal of the high load line amplifier (316) to the output terminal. Electronic device (101) including a hybrid power amplifier section (300).

7. In Paragraph 6, The RFIC generates a first switch (313) control signal for controlling the first switch (313) and a second switch (318) control signal for controlling the second switch (318), and When the operating mode of the hybrid power amplifier section (300) is the first mode, The first switch (313) outputs the first RF signal to the low load line amplifier (315) based on the control signal of the first switch (313), and The second switch (318) outputs the output signal of the low load line amplifier (315) to the output terminal based on the control signal of the second switch (318). Electronic device (101) including a hybrid power amplifier section (300).

8. In Paragraph 7, When the operating mode of the hybrid power amplifier section (300) is the second mode, The first switch (313) outputs the first RF signal to the high load line amplifier (316) based on the control signal of the first switch (313), and The second switch (318) outputs the output signal of the high load line amplifier (316) to the output terminal based on the control signal of the second switch (318). Electronic device (101) including a hybrid power amplifier section (300).

9. In the method of operating the electronic device (101), The above electronic device (101) is, A communication processor that outputs a baseband signal; A radio frequency integrated circuit (RFIC) that converts the above-mentioned radio frequency band signal into a plurality of radio frequency (RF) signals; and A hybrid power amplifier section (300) that amplifies the above RF signal; is included, The above method of operation is, Amplifying the first RF signal among the plurality of RF signals according to the operating mode of the hybrid power amplifier section (300) to match the low load line characteristic or the high load line characteristic, Method of operation of electronic device (101).

10. In Paragraph 9, The above method of operation is, The above hybrid power amplifier section (300) includes a low load line amplifier (315) to amplify the first RF signal according to the low load line characteristics, and The above hybrid power amplifier section (300) includes a high load line amplifier (316) to amplify the first RF signal according to the high load line characteristics, and When the operating mode of the hybrid power amplifier section (300) is the first mode, the low load line amplifier (315) is turned on and the high load line amplifier (316) is turned off. Method of operation of electronic device (101).

11. In Paragraph 9, The above low load line amplifier (315) receives a first RF signal and a buck voltage among the plurality of RF signals, and amplifies the first RF signal according to the low load line characteristics. Method of operation of electronic device (101).

12. In Paragraph 10, When the operating mode of the hybrid power amplifier section (300) is the second mode, The above low load line amplifier (315) is off, and the above high load line amplifier (316) is on. Method of operation of electronic device (101).

13. In Paragraph 12, The above high load line amplifier (316) receives a first RF signal and a boost voltage among the plurality of RF signals, and amplifies the first RF signal according to the high load line characteristics. Method of operation of electronic device (101).

14. In any one of paragraphs 9 through 13, The above electronic device is, It includes a first switch (313) disposed at the input terminal of the low load line amplifier (315) and the high load line amplifier (316), and a second switch (318) disposed at the output terminal of the low load line amplifier (315) and the high load line amplifier (316). The above RFIC generates a first switch (313) control signal for controlling the first switch (313) and a second switch (318) control signal for controlling the second switch (318). Method of operation of electronic device (101).

15. In Paragraph 14, When the operating mode of the hybrid power amplifier section (300) is the first mode, The first switch (313) outputs the first RF signal to the low load line amplifier (315) based on the control signal of the first switch (313), and The second switch (318) outputs the output signal of the low load line amplifier (315) to the output terminal based on the control signal of the second switch (318). Method of operation of electronic device (101).

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