Bioinformatics systems, apparatus, and methods for performing secondary and / or tertiary processing

Abstract

Abstract A system, method and apparatus for executing a bioinformatics analysis on genetic sequence data is provided. Particularly, a genomics analysis platform for executing a sequence analysis pipeline is provided. The genomics analysis platform includes one or more of a first integrated circuit, where each first integrated circuit forms a central processing unit (CPU) that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of the sequence analysis pipeline. Additionally, a second integrated circuit is also provided, where each second integrated circuit forming a field programmable gate array (FPGA), the FPGA being configured by firmware to arrange a set of hardwired digital logic circuits that are interconnected by a plurality of physical interconnects to perform a second set of genomic processing steps of the sequence analysis pipeline, the set of hardwired digital logic circuits of each FPGA being arranged as a set of processing engines to perform the second set of genomic processing steps. A shared memory is also provided. Abstract A system, method and apparatus for executing a bioinformatics analysis on genetic sequence data is provided. Particularly, a genomics analysis platform for executing a sequence analysis pipeline is provided. The genomics analysis platform includes one or more of a first integrated circuit, where each first integrated circuit forms a central processing unit (CPU) that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of the sequence analysis pipeline. Additionally, a second integrated circuit is also provided, where each second integrated circuit forming a field programmable gate array (FPGA), the FPGA being configured by firmware to arrange a set of hardwired digital logic circuits that are interconnected by a plurality of physical interconnects to perform a second set of genomic processing steps of the sequence analysis pipeline, the set of hardwired digital logic circuits of each FPGA being arranged as a set of processing engines to perform the second set of genomic processing steps. A shared memory is also provided. 20 24 20 51 08 25 J ul 2 02 4 2 0 2 4 2 0 5 1 0 8 2 5 J u l 2 0 2 4

Description

N = 2, Number of regions being jointly processed; M = 22.N.P = 24 = 16 candidate joint-diplotypes

[00453] Hence, for a single candidate active position, given all the reads and both the reference regions, let the two haplotypes be ‘A’ and ‘G’. Unique haplotypes = ‘A’ and ‘G’ Candidate Diplotypes = ‘AA’, ‘AG’, ‘GA’ and ‘GG’, (4 candidates for 1 region). 2024205108   25 Jul 2024 Candidate Joint Diplotypes = 'AAAA',  'AAAG',  'AAGA', 'AAGG' 'AGAA', 'AGAG', 'AGGA', ' AGGG' 'GAAA', 'GAAG', 'GAGA' ,'GAGG' ^'GGAA',  'GGAG',  ' GGGA','GGGG'  □

[00454] Accordingly, using the candidate joint diplotypes, the read likelihoods can be calculated given a haplotype for each haplotype in every candidate joint diplotype set. This may be done using a HMM algorithm, as described herein. However, in doing so the HMM algorithm may be modified from its standard use case so as to allow for candidate variants (SNPs / INDELs) in the haplotype, which have not yet been processed, to be considered. Subsequently, the read likelihoods can be calculated given a joint diplotype (P(ri|Gm)) using the results from the modified HMM. This may be done using the formula below.

[00455] For the case of 2-region joint detection: Gm = [3ii,m, 312,m, &2i,m, ^22,m], wherein 9ij,m, i is the region and j is the phase P(ri|Gm) = p(ri|311, m)+ p(ri|312, m)+ p(ri|921, m)+ P(ri|922,m) 4 P(R|Gm) = n^ P(ri|Gm). Given P(ri|Gm), it is straightforward to calculate P(R|Gm) for all the reads. Next, using Bayes’ formula, the a-posteriori probability (P(Gi|R)) may be computed from P(R|Gi) and the a-priori probabilities (P(Gi)). P(Gi|R) = P(R|Gi) P(Gi) / Xk P(R|Gk) P(Gk).

[00456] Further, an intermediate genotype matrix may be calculated for each region given the a-posteriori probabilities for all the candidate joint diplotypes. For each event combination in the genotype matrix the a-posteriori probabilities of all joint diplotypes supporting that event may be summed up. At this point, the genotype matrix may be considered as “intermediate” because not all the candidate variants supporting the current candidate have been included. However, as seen earlier, the number of joint diplotype candidates grows exponentially with the number of candidate variant positions and number of regions. This in-turn exponentially increases the computation required to calculate the a-posteriori probabilities. Therefore, in order to reduce the computational complexity, at this stage, the number of joint diplotypes based on the a-posteriori probabilities may be pruned so that the number of joint diplotypes to keep may be user defined and programmable. Finally, the final genotype matrix may be updated based on a user-defined confidence metric of 2024205108   25 Jul 2024 variants which is computed using the intermediate genotype matrix. The various steps of these processes are set forth in the process flow diagram of FIG. 24.

[00457] The process above may be repeated until all the candidate variants are included as evidence for the current candidates being processed using the connection matrix. Once all of the candidates have been included, the processing of the current candidate is done. Other stopping criteria for processing candidate variants are also possible. For example, the process may be stopped when the confidence has stopped increasing as more candidates variants are added. This analysis, as exemplified in FIG. 24, may be restarted and repeated in the same manner for all other candidate variants in the list thereby resulting in a final variant call file at the output of MRJD. Accordingly, instead of considering each region in isolation, a Multi-Region Joint Detection protocol, as described herein, may be employed so as to consider all locations from which a group of reads may have originated as it attempts to detect the underlying sequences jointly using all available information.

[00458] Accordingly, for Multi-Region Joint Detection, an exemplary MRJD protocol may employ one or more of the following equations in accordance with the methods disclosed herein. Specifically, instead of considering each region to be assessed in isolation, MRJD considers a plurality of locations from which a group of reads may have been originated and attempts to detect the underlying sequences jointly, such as by using as much as, e.g., all, the available information that is useful. For instance, in one exemplary embodiment:

[00459] Let N be the number of regions to be jointly processed. And let Hk be a candidate haplotype, k = 1...K, each of which may include various SNPs, insertions and / or deletions relative to a reference sequence. Each haplotype Hk represents a single region along a single strand (or “phase”, e.g., maternal or paternal), and they need not be contiguous (e.g., they may include gaps or “don’t care” sequences).

[00460] Let Gm be a candidate solution for both phases O = 1,2 (for a diploid organism) and all regions n = 1.N: Gm = [ Gm, 1,1...  Gm, 1, N Gm, 2,1...  Gm, 2, N where each element Gm,O,n is a haplotype chosen from the set of candidates {H1.Hk}.

[00461] First, the probability of each read may be calculated for each candidate haplotype P(ri|Hk), for example, by using a Hidden Markov Model (HMM). In the case of 2024205108   25 Jul 2024 datasets with paired reads, ri indicates the pair {ri,1, ri,2}, and P(ri|Hk) = P(ri,1|Hk) P(ri,2|Hk). In the case of datasets with linked reads (e.g., barcoded reads), ri indicates the group of reads {ri,i...ri,NL} that came from the same long molecule, and P(ri|Hk) = ^=1 P(ri,n|Hk) .

[00462] Next, for each candidate solution Gm, m=1.M, we calculate the conditional probability of each read P(ri|Gm) =     En=1 ^ ^=1P(ri|Gm,¢,n) and conditional probability of the entire pileup R ={n...rNR}: P(R|Gm) = n™ P(ri|Gm) .

[00463] Next, the a-posteriori probability is calculated of each candidate solution given the observed pileup: P(Gm|R) = P(R|Gm)P(Gm) / £-=1 P(R|Gi)P(Gi) where P(Gm) indicates the a-priori probability of the candidate solution, which is set forth in detail here below.

[00464] Finally, the relative probability of every candidate variant Vj is calculated p= Xn|Gm=>vj P(Gm|R) / Sm|Gm=>re / P(Gm|R) , such as where Gm ^ Vj indicates that Gm supports variant Vj, and Gm ^ ref indicates that Gm supports the reference. In a VCF P(Vj|R) file, this may be reported as a quality score on a phred scale: QUAL(Vj) = -10log10 p^ref ।  .

[00465] An exemplary process for performing various variant calling operations is set forth herein with respect to FIG.25 where a conventional and MRJD detection process are compared. Specifically, FIG. 25 illustrates a joint pileup of paired reads for two regions whose reference sequences differ by only 3 bases over the range of interest. All the reads are known to come from either region #1 or region #2, but it is not known with certainty from which region any individual read originated. Note, as described above, that the bases are only shown for the positions where the two references differ, e.g., bubble regions, or where the reads differ from the reference. These regions are referred to as the active positions. All other positions can be ignored, as they don’t affect the calculation.

[00466] Accordingly, as can be seen with respect to FIG. 25, in a conventional detector, the read pairs 1-16 would be mapped to region #2, and these alone would be used for variant calling in region #2. All of these reads match the reference for region #2, so no variants would be called. Likewise, read pairs 17-23 would be mapped to region #1, and these alone would be used for variant calling in region #1. As can be seen, all of these reads match the reference for region #1, so no variants will be called. However, read pairs 24-32 map equally well to region #1 and region #2 (each has a one-base difference to ref #1 and to ref #2), so the mapping is indeterminate, and a typical variant caller would simply ignore these 2024205108   25 Jul 2024 reads. As such, a conventional variant caller would make no variant calls for either region, as seen in FIG. 25.

[00467] However, with MRJD, FIG. 25 illustrates that the result is completely different than that received employing conventional methods. The relevant calculations are set forth below. In this instance N = 2 regions. Additionally, there are three positions, each with 2 candidate bases (one can safely ignore bases whose count is sufficiently low, and in this example the count is zero on all but 2 bases in each position). If all combinations are considered, this will yield K = 23 = 8 candidate haplotypes: H1 = CAT, H2 = CAA, H3 = CCT, H4 = CCA, H5 = GAT, H6 = GAA, H7 = GCT, H8 = GCA.

[00468] In a brute-force calculation where all combinations of all candidate haplotypes are considered, the number of candidate solutions is M = K2N = 82.2 = 4096, and P(Gm / R) may be calculated for each candidate solution Gm. The following illustrates this calculation for two candidate solutions: Gm1 = [ CAT GCA CAT GCA ], Gm2 = [ J           L CAT CCT GCA GCA Where Gm1 has no variants (this is the solution found by a conventional detector), and Gm2 has a single heterozygous SNP A^C in position #2 of region #1.

[00469] The probability P(ri|Hk) depends on various factors including the base quality and other parameters of the HMM. It may be assumed that only base call errors are present and all base call errors are equally likely, so P(ri|Hk) = (1-pe)Np(i)-Ne(i)(pe / 3)Ne(i), where pe is the probability of a base call error, Np(i) is the number of active base position(s) overlapped by read i, and Ne(i) is the number of errors for read i, assuming haplotype Hk. Accordingly, it may be assumed that pe = 0.01, which corresponds to a base quality of phred 20. The table set forth in FIG. 26 shows P(ri|Hk), for all read pairs and all candidate haplotypes. The two far right columns show P(ri|Gm1) and P(ri|Gm2), with the product at the bottom. FIG. 26 shows that P(R|Gm1) = 3.5-30 and P(R|Gm2) = 2.2-15, a difference of 15 orders of magnitude in favor of Gm2.

[00470] The a-posteriori probabilities P(Gm|R) depend on the a-priori probabilities P(Gm). To complete this example, a simple independent identically distributed (IID) model may be assumed, such that the a-priori probability of a candidate solution with Nv variants is (1 - pv)N.Np-Nv(pv / 9)Nv, where Np is the number of active positions (3 in this case) and Pv is the probability of a variant, assumed to be 0.01 in this example. This yields P(Gm) = 7.22e-13, 2024205108   25 Jul 2024 and P(Gm2) = 0.500. It is noted that Gm2 is heterozygous over region #1, and all heterozygous pairs of haplotypes have a mirror-image representation with the same probability (obtained by simply swapping the phases). In this case, the sum of the probabilities for Gm2 and its mirror image sum to 1.000. Calculating probabilities of individual variants, a heterozygous A^C SNP at position #2 of region #1, with quality score of phred 50.4 can be seen.

[00471] Accordingly, as can be seen, there is an immense computational complexity for performing a brute force variant calling operation, which complexity can be reduced by performing multiple region joint detection, as described herein. For instance, the complexity of the above calculations grows rapidly with the number of regions N and the number of candidate haplotypes K. To consider all combinations of candidate haplotypes, the number of candidate solutions for which to calculate probabilities is M = K2N. In a brute force implementation, the number of candidate haplotypes is K = 2Np, where Np is the number of active positions (e.g., as exemplified above, if graph-assembly techniques are used to generate the list of candidate haplotypes, then Np is the number of independent bubbles in the graph). Hence, a mere brute-force calculation can be prohibitively expensive to implement. For example, if N = 3 and Np =10, the number of candidate solutions is M = 23.2.10 = 260 = 1018. However, in practice, it’s not uncommon to have values of Np much higher than this.

[00472] Consequently, because a brute force Bayesian calculation can be prohibitively complex, the following description sets forth further methods for reducing the complexity of such calculations. For instance, in a first step of another embodiment, starting with a small number of positions N( (or even a single position = 1), the Bayesian calculation may be performed over those positions. At the end of the calculation, the candidates whose probability falls below a predefined threshold may be eliminated, such as in a pruning of the tree function, as described above. In such an instance, the threshold may be adaptive.

[00473] Next, in a second step, the number of positions Nm may be increased by a small number ANp (such as one: !Vp+1 =    + ANp), and the surviving candidates can be combined with one or more, e.g., all, possible candidates at the new position(s), such as in a growing the tree function. These steps of (1) performing the Bayesian calculation, (2) pruning the tree, and (3) growing the tree, may then be repeated, e.g., sequentially, until a stopping criteria is met. The threshold history may then be used to determine the confidence of the result (e.g., the probability that the true solution was or was not found). This process is illustrated in the flow chart set forth in FIG. 27. 2024205108   25 Jul 2024

[00474] It is to be understood that there are a variety of possible variations to this approach. For instance, as indicated, the pruning threshold may be adaptive, such as based on the number of surviving candidates. For instance, a simple implementation may set the threshold to keep the number of candidates below a fixed number, while a more sophisticated implementation may set the threshold based on a cost-benefit analysis of including additional candidates. Further, a simple stopping criteria may be that a result has been found with a sufficient level of confidence, or that the confidence on the initial position has stopped increasing as more positions are added. Further still, a more sophisticated implementation may perform some type of cost-benefit analysis of continuing to add more positions. Additionally, as can be seen with respect to FIG. 27, the order in which new positions are added may depend on several criteria, such as the distance to the initial position(s) or how highly connected these positions are to the already-included positions (e.g., the amount of overlap with the paired reads).

[00475] A useful feature of this algorithm is that the probability that the true solution wasn’t found can be quantified. For instance, a useful estimate is obtained by simply summing the probabilities of all pruned branches at each step: Ppruned = Ppruned + Smspruned set Pfam |R). Such an estimate is useful for calculating the confidence of the resulting variant calls:     P (vj1 R) &                               P(ref | R) Zm|Gm=>v; P(Gm|R) + Ppruned / Sm|Gm=>ref P(Gm|R) + Ppruned. Good confidence estimates are essential for producing good Receiver Operating Characteristic (ROC) curves. This is a key advantage of this pruning method over other ad hoc complexity reductions.

[00476] Returning to the example pileup of FIG. 25, and starting from the left-most position (position #1) and working toward the right one base position at a time, using a pruning threshold of phred 60 on each iteration: Let {G^, ml^Mj represent the candidate solutions on the j-th iteration. FIG. 28 shows the candidate solutions on the first iteration, representing all combinations of bases C and G, listed in order of decreasing probability. For any solution with equivalent mirror-image representations (obtained by swapping the phases), only a single representation is shown here. The probabilities for all candidate solutions can be calculated, and those probabilities beyond the pruning threshold (indicated by the solid line in the FIG. 28) can be dropped. As can be seen with respect to FIG. 28, as a result of the pruning methods disclosed herein, six candidates survive. 2024205108   25 Jul 2024

[00477] Next, as can be seen with respect to FIG. 29, the tree can be grown by finding all combinations of the surviving candidates from iteration #1 and candidate bases (C and A) in the position #2. A partial list of the new candidates is shown in FIG. 29, again shown in order of decreasing probability. Again, the probabilities can be calculated and compared to the pruning threshold, and in this instance 5 candidates survive.

[00478] Finally, all combinations of the surviving candidates from iteration #2 and the candidate bases in position #3 (A and T) can be determined. The final candidates and their associated probabilities are shown in FIG. 30. Accordingly, when calculating the probabilities of individual variants, it is determined that a heterozygous A^C SNP at position #2 of region #1, with quality score of phred 50.4, which is the same result found in the brute-force calculation. In this example, pruning had no significant effect on the end result, but in general pruning may affect the calculation, often resulting in a more confidence score.

[00479] There are many possible variations to the implementations of this approach, which may affect the performance and complexity of the system, and different variations may be appropriate for different scenarios. For instance, there can be variations in deciding which regions to include. For example, prior to running a Multi-Region Joint Detection, the variant caller may be configured to determine whether a given active region should be processed individually or jointly with other regions, and if jointly, it may then determine which regions to include. In other instances, some implementations may rely on a list of secondary alignments provided by the mapper so as to inform or otherwise make this decision. Other implementations may use a database of homologous regions, computed offline, such as based on a search of the reference genome.

[00480] Accordingly, a useful step in such operations is in deciding which positions to include. For instance, it is to be noted that various regions of interest may not be selfcontained and / or isolated from adjacent regions. Hence, information in the pileup can influence the probability of bases separated by far more than the total read length (e.g., the paired read length or long molecule length). As such, it must be decided which positions to include in the MRJD calculation, and the number of positions is not unconstrained (even with pruning). For example, some implementations may process overlapping blocks of positions and update the results for a subset of the positions based on the confidence levels at those positions, or the completeness of the evidence at those positions (e.g., positions near the middle of the block typically have more complete evidence than those near the edge). 2024205108   25 Jul 2024

[00481] Another determining factor may be the order in which new positions may be added. For instance, for pruned MRJD, the order of adding new positions may affect performance. For example, some implementations may add new positions based on the distance to the already-included positions, or the degree of connectivity with these positions (e.g., the number of reads overlapping both positions). Additionally, there are also many variations on how pruning may be performed. In the example set forth above, the pruning was based on a fixed probability threshold, but in general the pruning threshold may be adaptive or based on the number of surviving candidates. For instance, a simple implementation may set the threshold to keep the number of candidates below a fixed number, while a more sophisticated implementation may set the threshold based on a costbenefit analysis of including additional candidates.

[00482] Various implementations may perform pruning based on probabilities P(R|Gm) instead of the a-priori probabilities P(Gm|R). This has the advantage of allowing the elimination of equivalent mirror-image representations across regions (in addition to phases). This advantage is at least partially offset by the disadvantage of not pruning out candidates with very low a-priori probabilities, which in various instances may be beneficial. As such, a useful solution may depend on the scenario. If pruning is done, such as based on the P(R|Gm), then the bayesian calculation would be performed once after the final iteration.

[00483] Further in the example above, the process was stopped after processing all base positions in the pileup shown, but other stopping criteria are also possible. For instance, if only a subset of the base positions (e.g. when processing overlapping blocks) is being solved for, the process may stop when the result for the subset has been found with a sufficient level of confidence, or when the confidence has stopped increasing as more positions are added. A more sophisticated implementation, however, may perform some type of cost-benefit analysis, weighing the computational cost against the potential value of adding more positions.

[00484] A-priori probabilities may also be useful. For instance, in the examples above, a simple IID model was used, but other models may also be used. For example, it is to be noted that clusters of variants are more common than would be predicted by an IID model. It is also to be noted that variants are more likely to occur at positions where the references differ. Therefore, incorporating such knowledge into the a-priori probabilities P(Gm) can improve the detection performance and yield better ROC curves. Particularly, it is to be noted that the a-priori probabilities for homologous regions are not well-understood in the genomics 2024205108   25 Jul 2024 community, and this knowledge is still evolving. As such, some implementations may update the a-priori models as better information becomes available. This may be done automatically as more results are produced. Such updates may be based on other biological samples or other regions of the genome for the same sample, which learnings can be applied to the methods herein to further promote a more rapid and accurate analysis.

[00485] Accordingly, in some instance, an iterative MJRD process may be implemented. Specifically, the methodology described herein can be extended to allow message passing between related regions so as to further reduce the complexity and / or increase the detection performance of the system. For instance, the output of the calculation at one location can be used as an input a-priori probability for the calculation at a nearby location. Additionally, some implementations may use a combination of pruning and iterating to achieve the desired performance / complexity tradeoff.

[00486] Further, sample preparation may be implemented to optimize the MRJD process. For instance, for paired-end sequencing, it may be useful to have a tight distribution on the insertion size when using conventional detection. However, in various instances, introducing variation in the insertion size could significantly improve the performance for MRJD. For example, the sample may be prepared to intentionally introduce a bimodal distribution, a multi-modal distribution, or bell-curve-like distribution with a higher variance than would typically be implemented for conventional detection.

[00487] FIG. 31 illustrates the ROC curves for MRJD and a conventional detector for human sample NA12878 over selected regions of the genome with a single homologous copy, such that N = 2, with varying degrees of reference sequence similarity. This dataset used paired-end sequencing with a read length of 101 and a mean insertion size of approx. 400. As can be seen with respect to FIG. 31, MRJD offers dramatically improved sensitivity and specificity over these regions than conventional detection methods. FIG. 32 illustrates the same results displayed as a function of the sequence similarity of the references, measured over a window of 1000 bases (e.g. if the references differ by 10 bases out of 1000, then the similarity is 99.0 percent). For this dataset, it may be seen that conventional detection starts to perform badly at a sequence similarity ~0.98, while MRJD performs quite well up to 0.995 and even beyond.

[00488] Additionally, in various instances, this methodology may be extended to allow message passing between related regions to further reduce the complexity and / or increase the 2024205108   25 Jul 2024 detection performance. For instance, the output of the calculation at one location can be used as an input a-priori probability for the calculation at a nearby location, and in some implementations may use a combination of pruning and iterating to achieve the desired performance / complexity tradeoff. In particular instances, as indicated above, prior to running multi-region joint detection, the variant caller may determine whether a given active region should be processed individually or jointly with other regions. Additionally, as indicated above, some implementations may rely on a list of secondary alignments provided by the mapper to make such a decision. Other implementations may use a database of homologous regions, computed offline based on a search of the reference genome.

[00489] In view of the above, a Pair-Determined Hidden Markov Model (PD-HMM may be implemented in a manner so as to take advantage of the benefits of MRJD. For instance, MRJD can separately estimate the probability of observing a portion or all of the reads given each possible joint diplotype, which comprises one haplotype per ploidy per homologous reference region, e.g., for two homologous regions in diploid chromosomes, each joint diplotype will include four haplotypes. In such instances, all or a portion of the possible haplotypes may be considered, such as by being constructed, for instance, by modifying each reference region with every possible subset of all the variants for which there is nontrivial evidence. However, for long homologous reference regions, the number of possible variants is large, so the number of haplotypes (combinations of variants) becomes exponentially large, and the number of joint diplotypes (combinations of haplotypes) may be astronomical.

[00490] Consequently, to keep MRJD calculations tractable, it may not be useful to test all possible joint diplotypes. Rather, in some instances, the system may be configured in such a manner that only a small subset of “most likely” joint diplotypes is tested. These “most likely” joint diplotypes may be determined by incrementally constructing a tree of partially-determined joint diplotypes. In such an instance, each node of the tree may be a partially determined joint diplotype that includes a partially determined haplotype per ploidy per homologous reference region. In this instance, a partially determined haplotype may include a reference region modified by a partially determined subset of the possible variants. Accordingly, a partially determined subset of the possible variants may include an indication, for each possible variant, of one of three states: that the variant is determined and present, or the variant is determined and absent, or the variant is not yet determined, e.g., it may be present or absent. At the root of the tree, all variants are undetermined in all 2024205108   25 Jul 2024 haplotypes; tree nodes branching successively further from the root have successively more variants determined as present or absent in each haplotype of each node’s joint diplotype.

[00491] Further, in the context of this joint diplotype tree, as described above, the amount of MRJD calculations is kept limited and tractable by trimming branches of the tree in which all joint diplotype nodes are unlikely, e.g., moderately to extremely unlikely, relative to other more likely branches or nodes. Accordingly, such trimming may be performed on branches at nodes that are still only partially determined; e.g., several or many variants are still not determined as present or absent from the haplotypes of a trimmed node’s joint diplotype. Thus, in such an instance, it is useful to be able to estimate or bound the likelihood of observing each read assuming the truth of a partially determined haplotype. A modified pair hidden Markov model (pHMM) calculation, denoted “PD-HMM” for “partially determined pair hidden Markov model” is useful to estimate the probability P(R|H) of observing read R assuming the true haplotype H* is consistent with partially determined haplotype H. Consistent in this context means that some specific true haplotype H* agrees with partially determined haplotype H with respect to all variants whose presence or absence are determined in H, but for variants undetermined in H, H* may agree with the reference sequence either modified or unmodified by each undetermined variant.

[00492] Note that it is not generally adequate to run an ordinary pHMM calculation for some shorter sub-haplotype of H chosen to encompass only determined variant positions. It is generally important to build the joint diplotype tree with undetermined variants being resolved in an efficient order, which is generally quite different than their geometric order, so that a partially determined haplotype H will typically have many undetermined variant positions interleaved with determined ones. To properly consider PCR indel errors, it is useful to use a pHMM-like calculation spanning through all determined variants and significant radius around them, which may not be compatible with attempts to avoid undetermined variant positions.

[00493] Accordingly, the inputs to PD-HMM may include the called nucleotide sequence of read R, the base quality scores (e.g., phred scale) of the called nucleotides of R, a baseline haplotype H0, and a list of undetermined variants (edits) from H0. The undetermined variants may include single-base substitutions (SNPs), multiple-base substitutions (MNPs), insertions, and deletions. Advantageously, it may be adequate to support undetermined SNPs and deletions. An undetermined MNP may be imperfectly but adequately represented as multiple independent SNPs. An undetermined insertion may be represented by first editing 2024205108   25 Jul 2024 the insertion into the baseline haplotype, then indicating the corresponding undetermined deletion which would undo that insertion.

[00494] Restrictions may be placed on the undetermined deletions, to facilitate hardware engine implementation with limited state memory and logic, such as that no two undetermined deletions may overlap (delete the same baseline haplotype bases). If a partially determined haplotype must be tested with undetermined variants violating such restrictions, this may be resolved by converting one or more undetermined variants into determined variants in a larger number of PD-HMM operations, covering cases with those variants present or absent. For example, if two undetermined deletions A and B violate by overlapping each other in baseline haplotype H0, then deletion B may be edited into H0 to yield H0B, and two PD-HMM operations may be performed using undetermined deletion A only, one for baseline haplotype H0, and the other for baseline haplotype H0B, and the maximum probability output of the two PD-HMM operations may be retained.

[00495] The result of a PD-HMM operation may be an estimate of the maximum P(R|H*) among all haplotypes H* that can be formed by editing H0 with any subset of the undetermined variants. The maximization may be done locally, contributing to the pHMM-like dynamic programming in a given cell as if an adjacent undetermined variant is present or absent from the haplotype, whichever scores better, e.g., contributes the greater partial probability. Such local maximization during dynamic programming may result in larger estimates of the maximum P(R|H*) than true maximization over individual pure H* haplotypes, but the difference is generally inconsequential.

[00496] Undetermined SNPs may be incorporated into PD-HMM by allowing one or more matching nucleotide values to be specified for each haplotype position. For example, if base 30 of H0 is ‘C’ and an undetermined SNP replaces this ‘C’ with a ‘T’, then the PD-HMM operation’s haplotype may indicate position 30 as matching both bases ‘C’ and ‘T’. In the usual pHMM dynamic programming, any transition to an ‘M’ state results in multiplying the path probability by the probability of a correct base call (if the haplotype position matches the read position) or by the probability of a specific base call error (if the haplotype position mismatches the read position); for PD-HMM this is modified by using the correct-call probability if the read position matches either possible haplotype base (e.g. ‘C’ or ‘T’), and the base-call-error probability otherwise. 2024205108   25 Jul 2024

[00497] Undetermined haplotype deletions may be incorporated into PD-HMM by flagging optionally-deleted haplotype positions, and modifying the dynamic programming of pHMM to allow alignment paths to skip horizontally across undetermined deletion haplotype segments without probability loss. This may be done in various manners, but with the common property that probability values in M, I, and / or D states can transmit horizontally (along the haplotype axis) over the span of an undetermined deletion without being reduced by ordinary gap-open or gap-extend probabilities.

[00498] In one particular embodiment, haplotype positions where undetermined deletions begin are flagged “F1”, and positions where undetermined deletions end are flagged “F2”. In addition to the M, I, and D “states” (partial probability representations) for each cell of the HMM matrix (haplotype horizontal / read vertical), each PD-HMM cell may further include BM, BI, and BD “bypass” states. In F1-flagged haplotype columns, BM, BI, and BD states receive values copied from M, I, and D states of the cell to the left, respectively. In non-F2-flagged haplotype columns, particularly columns starting with an F1 flagged column end extending into the interior of an undetermined deletion, BM, BI, and BD states transmit their values to BM, BI, and BD states of the cell to the right, respectively. In F2-flagged haplotype columns, in place of M, I, and D states used to calculate states of adjacent cells, the maximum of M and BM is used, and the maximum of I and BI is used, and the maximum of D and BD is used, respectively. This is exemplified in an F2 column as multiplexed selection of signals from M and BM, from I and BI, and from D and BD registers.

[00499] Note that although BM, BI, and DB state registers may be represented in F1 through F2 columns, and maximizing M / BM, I / BI, and D / BD multiplexers may be shown in an F2 column, these components may be present for all cell calculations, enabling an undetermined deletion to be handled in any position, and enabling multiple undetermined deletions with corresponding F1 and F2 flags throughout the haplotype. Note also that F1 and F2 flags may be in the same column, for the case of a single-base undetermined deletion. It is further to be noted that the PD-HMM matrix of cells may be depicted as a schematic representation of the logical M, I, D, BM, BI, and BD state calculations, but in a hardware implementation, a smaller number of cell calculating logic elements may be present, and pipelined appropriately to calculate M, D, I, BM, BI, and BD state values at high clock frequencies, and the matrix cells may be calculated with various degrees of hardware parallelism, in various orders consistent with the inherent logical dependencies of the PD-HMM calculation. 2024205108   25 Jul 2024

[00500] Thus, in this embodiment, the pHMM state values in one column may be immediately left of an undetermined deletion which may be captured and transmitted rightward, unchanged, to the rightmost column of this undetermined deletion, where they substitute into pHMM calculations whenever they beat normal-path scores. Where these maxima are chosen, the “bypass” state values BM, BI, and BD represent the local dynamic programming results where the undetermined deletion is taken to be present, while “normal” state values M, I, and D represent the local dynamic programming results where the undetermined deletion is taken to be absent.

[00501] In another embodiment, a single bypass state may be used, such as a BM state receiving from an M state in F1 flagged columns, or receiving a sum of M, D, and / or I states. In another embodiment, rather than using “bypass” states, gap-open and / or gap-extend penalties are eliminated within columns of undetermined deletions. In another embodiment, bypass states contribute additively to dynamic programming rightward of undetermined deletions, rather than local maximization being used. In a further embodiment, more or fewer or differently defined or differently located haplotype position flags are used to trigger bypass or similar behavior, such as a single flag indicating membership in an undetermined deletion. In an additional embodiment, two or more overlapping undetermined deletions may participate, such as with the use of additional flags and / or bypass states. Additionally, undetermined insertions in the haplotype are supported, rather than, or in addition to, undetermined deletions. Likewise, undetermined insertions and / or deletions on the read axis are supported, rather than or in addition to undetermined deletions and / or insertions on the haplotype axis. In another embodiment, undetermined multiple-nucleotide substitutions are supported as atomic variants (all present or all absent). In a further embodiment, undetermined length-varying substitutions are supported as atomic variants. In another embodiment, undetermined variants are penalized with fixed or configurable probability or score adjustments.

[00502] This PD-HMM calculation may be implemented as a hardware engine, such as in FPGA or ASIC technology, by extension of a hardware engine architecture for “ordinary” pHMM calculation or may be implemented by one or more quantum circuits in a quantum computing platform. In addition to an engine pipeline logic to calculate, transmit, and store M, I, and D state values for various or successive cells, parallel pipeline logic can be constructed to calculate, transmit, and store BM, BI, and BD state values, as described herein and above. Memory resources and ports for storage and retrieval of M, I, and D state values 2024205108   25 Jul 2024 can be accompanied by similar or wider or deeper memory resources and ports for storage and retrieval of BM, BI, and BD state values. Flags such as F1 and F2 may be stored in memories along with associated haplotype bases.

[00503] Multiple matching nucleotides for e.g. undetermined SNP haplotype positions may be encoded in any manner, such as using a vector of one bit per possible nucleotide value. Cell calculation dependencies in the pHMM matrix are unchanged in PD-HMM, so order and pipelining of multiple cell calculations can remain the same for PD-HMM. However, the latency in time and / or clock cycles for complete cell calculation increases somewhat for PD-HMM, due to the requirement to compare “normal” and “bypass” state values and select the larger ones. Accordingly, it may be advantageous to include one or more extra pipeline stages for PD-HMM cell calculation, resulting in additional clock cycles of latency. Additionally, it may further be advantageous to widen each “swath” of cells calculated by one or more rows, to keep the longer pipeline filled without dependency issues.

[00504] This PD-HMM calculation tracks twice as many state values (BM, BI, and BD, in addition to M, I, and D), as an ordinary pHMM calculation, and may require about twice the hardware resources for an equivalent throughput engine embodiment. However, a PD-HMM engine has exponential speed and efficiency advantages for increasing numbers of undetermined variants, versus an ordinary pHMM engine run once for each haplotype representing a distinct combination of the undetermined variants being present or absent. For example, if a partially determined haplotype has 30 undetermined variants, each of which may be independently present or absent, there are 2A30, or more than 1 billion, distinct specific haplotypes that pHMM would otherwise need to process.

[00505] Accordingly, these and other such operations herein disclosed may be performed so as to better understand and accurately predict what happened to the subject’s genome such that the reads varied in relation to reference. For instance, even though the occurrence of mutations may be random, there are instances wherein the likelihood of their occurrence appears to be potentially predictable to some extent. Particularly, in some instances when mutations occur, they may occur in certain defined locations and in certain forms. More particularly, mutations, if they occur, will occur on one allele or another or both, and will have a tendency to occur in certain locations over others, such as at the ends of the chromosomes. Consequently, this and other associated information may be used to develop mutation models, which may be generated and employed to better assess the likely presence of a mutation in one or more regions of the genome. For instance, by taking account of 2024205108   25 Jul 2024 various a priori knowledge, e.g., one or more mutation models, when performing genomic variation analyses, better and more accurate genomic analysis results may be obtained, such as with more accurate demarcations of genetic mutation.

[00506] Such mutation models may give an account for the frequency and / or location of various known mutations and / or mutations that appear to happen in conjunction with one another or otherwise non-randomly. For instance, it has been determined that toward the ends of a given chromosome variations occur more predominantly. Thus, known models of mutations can be generated, stored in a database herein, and used by the system to make a better prediction of the presence of one or more variations within the genomic data being analyzed. Additionally, a machine learning process, as described in greater detail herein below, may also be implemented such that the various results data derived by the analyses performed herein may be analyzed and used to better inform the system as to when to make a specific variance call, such as in accordance with the machine learning principles disclosed herein. Specifically, machine learning may be implemented on the collective data sets, especially with respect to the variations determined, and this learning may be used to better generate more comprehensive mutation models that in turn may be employed to make more accurate variance determinations.

[00507] Hence, the system may be configured to observe all the various variation data, mine that data for various correlations, and where correlations are found, such information may be used to better weight and therefore more accurately determine the presence of other variations in other genome samples, such as on an ongoing basis. Accordingly, in a manner such as this, the system, especially the variant calling mechanism, may constantly be updated with respect to the learned variant correlation data so as to make better variant calls moving forward, so as to get better and more accurate results data.

[00508] Specifically, telemetry may be employed to update the growing mutation model so as to achieve better analysis in the system. This may be of particular usefulness when analyzing samples that are in some way connected with one another, such as from being within the same geographical population, and / or may be used to determine which reference genome out of a multiplicity of reference genomes may be a better reference genome by which a particular sample is to be analyzed. Further, in various instances, the mutation model and / or telemetry may be employed so as to better select the reference genome to be employed in the system processes, and thereby enhance the accuracy and efficiency of the results of the system. Particularly, where a plurality of reference genomes 2024205108   25 Jul 2024 may be employed in one or more of the analyses herein, a particular reference genome may be selected for use over the others such as by applying a mutation model so at select the most appropriate reference genome to apply.

[00509] It is to be noted that when performing secondary analysis, the fundamental structure for each region of the genome being mapped and aligned may include one or more underlying genes. Accordingly, in various instances, this understanding of the underlying genes and / or the functions of the proteins they code for may be informative when performing secondary analysis. Particularly, tertiary indications and / or results may be useful in the secondary analysis protocols being run by the present system, such as in a process of biological contextually sensitive mutation model. More particularly, since DNA codes for genes, which genes code for proteins, information about such proteins that result in mutations and / or abhorrent functions can be used to inform the mutation models being employed in the performance of secondary and / or tertiary analyses on the subject’s genome.

[00510] For example, tertiary analysis, such as on a sample set of genes coding for mutated proteins, may be informative when performing secondary analysis of genomic regions known to code for such mutations. Hence, as set forth above, various tertiary processing results may be used to inform and / or update the mutation models used herein for achieving better accuracy and efficiency when performing the various secondary analysis operations disclosed herein. Specifically, information about mutated proteins, e.g., contextual tertiary analysis, can be used to update the mutation model when performing secondary analysis of those regions known to code for the proteins and / or to potentially include such mutations

[00511] Accordingly, in view of the above, for embodiments involving FPGA-accelerated mapping, alignment, sorting, and / or variant calling applications, one or more of these functions may be implemented in one or both of software and hardware (HW) processing components, such as software running on a traditional CPU, GPU, QPU, and / or firmware such as may be embodied in an FPGA, ASIC, sASIC, and the like. In such instances, the CPU and FPGA need to be able to communicate so as to pass results from one step on one device, e.g., the CPU or FPGA, to be processed in a next step on the other device. For instance, where a mapping function is run, the building of large data structures, such as an index of the reference, may be implemented by the CPU, where the running of a hash function with respect thereto may be implemented by the FPGA. In such an instance, the 2024205108   25 Jul 2024 CPU may build the data structure, store it in an associated memory, such as a DRAM, which memory may then be accessed by the processing engines running on the FPGA.

[00512] For instance, in some embodiments, communications between the CPU and the FPGA may be implemented by any suitable interconnect such as a peripheral bus, such as a PCIe bus, USB, or a networking interface such as Ethernet. However, a PCIe bus may be a comparatively loose integration between the CPU and FPGA, whereby transmission latencies between the two may be relatively high. Accordingly, although one device e.g., (the CPU or FPGA) may access the memory attached to the other device (e.g., by a DMA transfer), the memory region(s) accessed are non-cacheable, because there is no facility to maintain cache coherency between the two devices. As a consequence, transmissions between the CPU and FPGA are constrained to occur between large, high-level processing steps, and a large amount of input and output must be queued up between the devices so they don’t slow each other down waiting for high latency operations. This slows down the various processing operations disclosed herein. Furthermore, when the FPGA accesses non-cacheable CPU memory, the full load of such access is imposed on the CPU’s external memory interfaces, which are bandwidth-limited compared to its internal cache interfaces.

[00513] Accordingly, because of such loose CPU / FPGA integrations, it is generally necessary to have “centralized” software control over the FPGA interface. In such instances, the various software threads may be processing various data units, but when these threads generate work for the FPGA engine to perform, the work must be aggregated in “central” buffers, such as either by a single aggregator software thread, or by multiple threads locking aggregation access via semaphores, with transmission of aggregated work via DMA packets managed by a central software module, such as a kernel-space driver. Hence, as results are produced by the HW engines, the reverse process occurs, with a software driver receiving DMA packets from the HW, and a de-aggregator thread distributing results to the various waiting software worker threads. However, this centralized software control of communication with HW FPGA logic is cumbersome and expensive in resource usage, reduces the efficiency of software threading and HW / software communication, limits the practical HW / software communication bandwidth, and dramatically increases its latency.

[00514] Additionally, as can be seen with respect to FIG. 33A, a loose integration between the CPU 1000 and FPGA 7 may require each device to have its own dedicated external memory, such as DRAMs 1014, 14. As depicted in FIG. 33A, the CPU(s) 1000 has its own DRAM 1014 on the system motherboard, such as DDR3 or DDR4 DIMMs, while the 2024205108   25 Jul 2024 FPGA 7 has its own dedicated DRAMs 14, such as four 8GB SODIMMs, that may be directly connected to the FPGA 7 via one or more DDR3 busses 6, such as a high latency PCIe bus. Likewise, the CPU 1000 may be communicably coupled to its own DRAM 1014, such as by a suitably configured bus 1006. As indicated above, the FPGA 7 may be configured to include one or more processing engines 13, which processing engines may be configured for performing one or more functions in a bioinformatics pipeline as herein described, such as where the FPGA 7 includes a mapping engine 13a, an alignment engine 13b, and a variant call engine 13c. Other engines as described herein may also be included. In various embodiments, one or both of the CPU may be configured so as to include a cache 1014a, 14a respectively, that is capable of storing data, such as result data that is transferred thereto by one or more of the various components of the system, such as one or more memories and / or processing engines.

[00515] Many of the operations disclosed herein, to be performed by the FPGA 7 for genomic processing, require large memory accesses for the performance of the underlying operations. Specifically, due to the large data units involved, e.g. 3+ billion nucleotide reference genomes, 100+ billion nucleotides of sequencer read data, etc., the FPGA 7 may need to access the host memory 1014 a large number of times such as for accessing an index, such as a 30GB hash table or other reference genome index, such as for the purpose of mapping the seeds from a sequenced DNA / RNA query to a 3Gbp reference genome, and / or for fetching candidate segments, e.g., from the reference genome, to align against.

[00516] Accordingly, in various implementations of the system herein disclosed, many rapid random memory accesses may need to occur by one or more of the hardwired processing engines 13, such as in the performance of a mapping, aligning, and / or variant calling operation. However, it may be prohibitively impractical for the FPGA 7 to make so many small random accesses over the peripheral bus 3 or other networking link to the memory 1014 attached to the host CPU 1000. For instance, in such instances, latencies of return data can be very high, bus efficiency can be very low, e.g., for such small random accesses, and the burden on the CPU external memory interface 1006 may be prohibitively great.

[00517] Additionally, as a result of each device needing its own dedicated external memory, the typical form factor of the full CPU 1000 + FPGA 7 platform is forced to be larger than may be desirable, e.g., for some applications. In such instances, in addition to a standard system motherboard for one or more CPUs 1000 and supporting chips 7 and 2024205108   25 Jul 2024 memories, 1014 and / or 14, room is needed on the board for a large FPGA package (which may even need to be larger so as to have enough pins for several external memory busses) and several memory modules, 1014, 14. Standard motherboards, however, do not include these components, nor would they easily have room for them, so a practical embodiment may be configured to utilize an expansion card 2, containing the FPGA 7, its memory 14, and other supporting components, such as power supply, e.g. connected to the PCIe expansion slot on the CPU motherboard. To have room for the expansion card 2, the system may be fabricated to be in a large enough chassis, such as a 1U or 2U or larger rack-mount server.

[00518] In view of the above, in various instances, as can be seen with respect to FIG. 33B, to overcome these factors, it may be desirable to configure the CPU 1000 to be in a tight coupling arrangement with the FPGA 7. Particularly, in various instances, the FPGA 7 may be tightly coupled to the CPU 1000, such as by a low latency interconnect 3, such as a quick path interconnect (QPI). Specifically, to establish a tighter CPU+FPGA integration, the two devices may be connected by any suitable low latency interface, such as a “processor interconnect” or similar, such as INTELS® Quick Path Interconnect (QPI) or HyperTransport (HT).

[00519] Accordingly, as seen with respect to FIG. 33B, a system 1 is provided wherein the system includes both a CPU 1000 and a processor, such as an FPGA 7, wherein both devices are associated with one or more memory modules. For instance, as depicted, the CPU 1000 may be coupled, such as via a suitably configured bus 1006, to a DRAM 1014, and likewise, the FPGA 7 is communicably coupled to an associated memory 14 via a DDR3 bus 6. However, in this instance, instead of being coupled to one another such as by a typical high latency interconnect, e.g., PCIe interface, the CPU 1000 is coupled to the FPGA 7 by a low latency, hyper transport interconnect 3, such as a QPI. In such an instance, due to the inherent low latency nature of such interconnects, the associated memories 1014, 14 of the CPU 1000 and the FPGA 7 are readily accessible to one another. Additionally, in various instances, due to this tight coupling configuration, one or more cashes 1114a / 14a associated with the devices may be configured so as to be coherent with respect to one another.

[00520] Some key properties of such a tightly coupled CPU / FPGA interconnect include a high bandwidth, e.g., 12.8GB / s; low latency, e.g., 100-300ns; an adapted protocol designed for allowing efficient remote memory accesses, and efficient small memory transfers, e.g., on the order of 64 bytes or less; and a supported protocol and CPU integration for cache access and cache coherency. In such instances, a natural interconnect for use for 2024205108   25 Jul 2024 such tight integration with a given CPU 1000 may be its native CPU-to-CPU interconnect 1003, which may be employed herein to enable multiple cores and multiple CPUs to operate in parallel in a shared memory 1014 space, thereby allowing the accessing of each other’s cache stacks and external memory in a cache-coherent manner.

[00521] Accordingly, as can be seen with respect to FIGS. 34A and 34B, a board 2 may be provided, such as where the board may be configured to receive one or more CPUs 1000, such as via a plurality of interconnects 1003, such as native CPU-CPU interconnects 1003a and 1003b. However, in this instance, as depicted in FIG. 34A, a CPU 1000 is configured so as to be coupled to the interconnect 1003a, but rather than another CPU being coupled therewith via interconnect 1003b, an FPGA 7 of the disclosure is configured so as to be coupled therewith. Additionally, the system 1 is configured such that the CPU 1000 may be coupled to the associated FPGA 7, such as by a low latency, tight coupling interconnect 3. In such instances, each memory 1014, 14 associated with the respective devices 1000, 7 may be made so as to accessible to each other, such as in a high-bandwidth, cache coherent manner.

[00522] Likewise, as can be seen with respect to FIG. 34B, the system can also be configured so as to receive packages 1002a and / or 1002b, such as where each of the packages include one or more CPUs 1000a, 1000b that are tightly coupled, e.g., via low latency interconnects 3a and 3b, to one or more FPGAs 7a, 7b, such as where given the system architecture, each package 2a and 2b may be coupled one with the other such as via a tight coupling interconnect 3. Further, as can be seen with respect to FIG. 35, in various instances, a package 1002a may be provided, wherein the package 1002a includes a CPU 1000 that has been fabricated in such a manner so as to be closely coupled with an integrated circuit such as an FPGA 7. In such an instance, because of the close coupling of the CPU 1000 and the FPGA 7, the system may be constructed such that they are able to directly share a cache 1014a in a manner that is consistent, coherent, and readily accessible by either device, such as with respect to the data stored therein.

[00523] Hence, in such instances, the FPGA 7, and or package 2a / 2b, can, in effect, masquerade as another CPU, and thereby operate in a cache-coherent shared-memory environment with one or more CPUs, just as multiple CPUs would on a multi-socket motherboard 1002, or multiple CPU cores would within a mutli-core CPU device. With such an FPGA / CPU interconnect, the FPGA 7 can efficiently share CPU memory 1014, rather than having its own dedicated external memory 14, which may or may not be included or 2024205108   25 Jul 2024 accessed. Thus, in such a configuration, rapid, short, random accesses are supported efficiently by the interconnect 3, such as with low latency. This makes it practical and efficient for the various processing engines 13 in the FPGA 7 to access large data structures in CPU memory 1000.

[00524] For instance, as can be seen with respect to FIG. 37, a system for performing one or more of the methods disclosed herein is provided, such as where the method includes one or more steps for performing the functions of the disclosure, such as one or more mapping and / or aligning and / or variant calling function, as described herein, in a shared manner. Particularly, in one step (1) a data structure may be generated or otherwise provided, such as by an NGS and / or CPU 1000, which data structure may then be stored in an associated memory (2), such as a DRAM 1014. The data structure may be any data structure, such as with respect to those described herein, but in this instance, may be a plurality of reads of sequenced data and / or a reference genome and / or an index of the reference genome, such as for the performance of mapping and / or aligning and / or variant calling functions.

[00525] In a second step (2), such as with respect to mapping and / or aligning, etc. functions, an FPGA 7 associated with the CPU 1000, such as by a tight coupling interface 3, may access the CPU associated memory 1014, so as to perform one or more actions with respect to the stored sequenced reads, reference genome(s), and / or an index thereof. Particularly, in a step (3), e.g., in an exemplary mapping operation, the FPGA 7 may access the data structure, e.g., the sequenced reads and / or reference sequences, so as to produce one or more seeds there from, such as where the data structure includes one or more reads and / or genome reference sequences. In such an instance, the seeds, e.g., or the reference and / or read sequences may be employed for the purposes of performing a hash function with respect thereto, such as to produce one or more reads that have been mapped to one or more positions with respect to the reference genome.

[00526] In a further step (3), the mapped result data may be stored, e.g., in either the host memory 1014 or in an associated DRAM 14. Additionally, once the data has been mapped, the FPGA 7, or a processing engine 13 thereof, may be reconfigured, e.g., partially re-configured, as an alignment engine, which may then access the stored mapped data structure so as to perform an aligning function thereon, so as to produce one or more reads that have been aligned to the reference genome. In an additional step (4), the host CPU may then access the mapped and / or aligned data so as to perform one or more functions thereon, such as for the production of a De Brujin Graph (“DBG”), which DBG may then be stored in 2024205108   25 Jul 2024 its associated memory. Likewise, in one or more additional steps, the FPGA 7 may once again access the host CPU memory 1014 so as to access the DBG and perform an HMM analysis thereon so as to produce one or more variant call files.

[00527] In particular instances, the CPU 1000 and / or FPGA 7 may have one or more memory cache’s which due to the tight coupling of the interface between the two devices will allow the separate caches to be coherent, such as with respect to the transitionary data, e.g., results data, stored thereon, such as results from the performance of one or more functions herein. In a manner such as this, data may be shared substantially seamlessly between the tightly coupled devices, thereby allowing a pipeline of functions to be weaved together such as in a bioinformatics pipeline. Thus, in such an instance, it may no longer be necessary for the FPGA 7 to have its own dedicated external memory 14 attached, and hence, due to such a tight coupling configuration, the stored reads, the reference genome, and / or reference genomic index, as herein described, may be intensively shared, e.g., in a cache coherent manner, such as for read mapping and alignment, and other genomic data processing operations.

[00528] Additionally, as can be seen with respect to FIG. 38, the low latency and cache coherency configurations, as well as other component configurations discussed herein, allow smaller, lower-level operations to be performed in one device (e.g., in a CPU or FPGA), before handing back a data structure or processing thread 20 to the other device, such as for further processing. For example, in one instance, a CPU thread 20a, may be configured to que up large amounts of work for the FPGA hardware logic 13 to process, and the same or another thread 20b, may be configured to then process the large queue of results data generated thereby, such as at a substantially later time. However, in various instances, it may be more efficient, as presented herein, for a single CPU thread 20 to make a blocking “function call” to a coupled FPGA hardware engine 13, which CPU may be set to resume software execution as soon as the hardware function of the FPGA is completed. Hence, rather than packaging up data structures in packets to stream by DMA 14 into the FPGA 7, and unpacking results when they return, a software thread 20 could simply provide a memory pointer to the FPGA engine 13, which could access and modify the shared memory 1014 / 14 in place, in a cache-coherent manner.

[00529] Particularly, given the relationship between the structures provided herein, the granularity of the software / hardware cooperation can be much finer, with much smaller, lower level operations being allocated so as to be performed by various hardware engines 13, 2024205108   25 Jul 2024 such as function calls from various allocated software threads 20. For example, in a loose CPU / FPGA interconnect platform, for efficient acceleration of DNA / RNA read mapping, alignment, and / or variant calling, a full mapping / aligning / variant calling pipeline may be constructed as one or more software and / or FPGA engines, with unmapped and unaligned reads being streamed from software to hardware, and the fully mapped and aligned reads streamed from the hardware back to the software, where the process may be repeated, such as for variant calling. With respect to the configurations herein described, this can be very fast. However, in various instances, such a system may suffer from limitations of flexibility, complexity, and / or programmability, such because the whole map / align and / or variant call pipeline is implemented in hardware circuitry, which although reconfigurable in an FPGA, is generally much less flexible and programmable than software, and may therefore be limited to less algorithmic complexity.

[00530] By contrast, using a tight CPU / FPGA interconnect, such as a QPI or other interconnect in the configurations disclosed herein, several resource expensive discrete operations, such as seed generation and / or mapping, rescue scanning, gapless alignment, gapped, e.g., Smith-Waterman, alignment, etc., can be implemented as distinct separately accessible hardware engines 13, e.g., see FIG. 38, and the overall mapping / alignment and / or variant call algorithms can be implemented in software, with low-level acceleration calls to the FPGA for the specific expensive processing steps. This framework allows full software programmability, outside the specific acceleration calls, and enables greater algorithmic complexity and flexibility, than standard hardware implemented operations.

[00531] Furthermore, in such a framework of software execution accelerated by discrete low-level FPGA hardware acceleration calls, hardware acceleration functions may more easily be shared for multiple purposes. For instance, when hardware engines 13 form large, monolithic pipelines, the individual pipeline subcomponents may generally be specialized to their environment, and interconnected only within one pipeline, which unless tightly coupled may not generally be accessible for any purpose. But many genomic data processing operations, such as Smith-Waterman alignment, gapless alignment, De Bruijn or assembly graph construction, and other such operations, can be used in various higher level parent algorithms. For example, as described herein, Smith-Waterman alignment may be used in DNA / RNA read mapping and aligning, such as with respect to a reference genome, but may also be configured so as to be used by haplotype-based variant callers, to align candidate haplotypes to a reference genome, or to each other, or to sequenced reads, such as in a HMM 2024205108   25 Jul 2024 analysis and / or variant call function. Hence, exposing various discrete low-level hardware acceleration functions via general software function calls may enable the same acceleration logic, e.g., 13, to be leveraged throughout a genomic data processing application, such as in the performance of both alignment and variant calling, e.g. HMM, operations.

[00532] It is also practical, with tight CPU / FPGA interconnection, to have distributed rather than centralized CPU 1000 software control over communication with the various FPGA hardware engines 13 described herein. In widespread practices of multi-threaded, multi-core, and multi-CPU software design, many software threads and processes communicate and cooperate seamlessly, without any central software modules, drivers, or threads to manage intercommunication. In such a format, this is practical because of the cache-coherent shared memory, which is visible to all threads in all cores in all of the CPUs; while physically, coherent memory sharing between the cores and CPUs occurs by intercommunication over the processor interconnect, e.g., QPI or HT.

[00533] In a similar manner, as can be seen with respect to FIGS. 36 - 38, the systems provided herein may have a number of CPUs and / or FPGAs that may be in a tight CPU / FPGA interconnect configuration that incorporates a multiplicity of threads, e.g., 20a, b, c, and a multiplicity of processes running on one or the multiple cores and / or CPUs, e.g., 1000a, 100b, and 1000c. As such, the system components are configured for communicating and cooperating in a distributed manner with one another, e.g., between the various different CPU and / or FPGA hardware acceleration engines, such as by the use of cache-coherent memory sharing between the various CPU(s) and FPGA(s). For instance, as can be seen with respect to FIG. 36, a multiplicity of CPU cores 1000a, 1000b, and 1000c can be coupled together in such a manner as to share one or more memories, e.g., DRAMs 1014, and / or one or more caches having one or more layers, e.g., L1, L2, L3, etc., or levels associated therewith. Likewise, with respect to FIG. 38, in another embodiment, a single CPU 1000 may be configured to include multiple cores 1000a, 1000b, and 1000c that can be coupled together in such a manner so as to share one or more memories, e.g., DRAMs 1014, and / or one or more caches, 1014a, having one or more layers or levels associated therewith.

[00534] Hence, in either embodiment, data to be passed from one or more software threads 20 from one or more CPU cores 1000 to a hardware engine 13, e.g., of an FPGA, or vice versa, may be continuously and / or seamlessly updated in the shared memory 1014, or a cache and / or layer thereof, which is visible to each device. Additionally, requests to process data in the shared memory 1014, or notification of results updated therein, can be signaled 2024205108   25 Jul 2024 between the software and / or hardware, such as over a suitably configured bus, e.g., DDR4 bus, such as in queues that may be implemented within the shared memory itself. Standard software mechanisms for control, transfer, and data protection, such as semaphores, mutexes, and atomic integers, can also be implemented similarly for software / hardware coordination.

[00535] Consequently, in some embodiments, as exemplified in FIG. 36, with no need for the FPGA 7 to have its own dedicated memory 14, or other external resources, due to cache coherent memory-sharing over a tight CPU / FPGA interconnect, it becomes much more practical to package the FPGA 7 more compactly and natively within traditional CPU 1000 motherboards, without the use of expansion cards. See, for example FIGS. 34A and 34B and FIG. 35. Several packaging alternatives are available. Specifically, an FPGA 7 may be installed onto a multi-CPU motherboard in a CPU socket, as shown in FIGS. 34A and 34B, such as by use of an appropriate interposer, such as a small PC board 2, or alternative wirebond packaging of the FPGA die within the CPU chip package 2a, where the CPU socket pins are appropriately routed to the FPGA pins, and include power and ground connections, a processer interconnect 3 (QPI, HT, etc.), and other system connections. Accordingly, an FPGA die and CPU die may be included in the same multi-chip package (MCP) with the necessary connections, including power, ground, and CPU / FPGA interconnect, made within the package 2a. Inter-die connections may be made by die-to-die wire-bonding, or by connection to a common substrate or interposer, or by bonded pads or through-silicon vias between stacked dice.

[00536] Additionally, in various implementations, FPGA and CPU cores may be fabricated on a single die, see FIG. 35, using a system-on-a-chip (SOC) methodology. In any of these cases, custom logic, e.g., 17, may be instantiated inside the FPGA 7 to both communicate over the CPU / FPGA interconnect 3, e.g., by properly dedicated protocols, and to service, convert, and / or route memory access requests from internal FPGA engines 13 to the CPU / FPGA interconnect 3, via appropriate protocols, to the shared memory 1014a. Additionally, some or all of this logic may be hardened into custom silicon, to avoid using up FPGA logic real estate for this purpose, such as where the hardened logic may reside on the CPU die, and / or the FPGA die, or a separate die. Also, in any of these cases, power supply and heat dissipation requirements may be appropriately achieved, such as within a single package (MCP or SOC). Further, the FPGA size and CPU core count may be selected to stay within a safe power envelope, and / or dynamic methods (clock frequency management, clock 2024205108   25 Jul 2024 gating, core disabling, power islands, etc.) may be used to regulate power consumption according to changing the CPU and / or the FPGA computation demands.

[00537] All of these packaging options share several advantages. The tightly-integrated CPU / FPGA platform becomes compatible with standard motherboards and / or system chassis, of a variety of sizes. If the FPGA is installed via an interposer in a CPU socket, see FIGS. 34A and 34B, then at least a dual-socket motherboard1002 may be employed. In others instances, a quad-socket motherboard may be employed so as to allow 3 CPUs + 1 FPGA, 2 CPUs + 2 FPGAs, or 1 CPU + 3 FPGAs, etc. configurations to be implemented. If each FPGA resides in the same chip package as a CPU (either MCP or SOC), then a single-socket motherboard may be employed, potentially in a very small chassis (although a dual socket motherboard is depicted); this also scales upward very well, e.g. 4 FPGAs and 4 multi-core CPUs on a 4-socket server motherboard, which nevertheless could operate in a compact chassis, such as a 1U rack-mount server.

[00538] Accordingly, in various instances, therefore, there may be no need for an expansion card to be installed so as to integrate the CPU and FPGA acceleration, because the FPGA 7 may be integrated in to the CPU socket 1003. This implementation avoids the extra space and power requirements of an expansion card, and avoids various additional failure points expansion cards sometimes have with respect to relatively low-reliability components. Furthermore, standard CPU cooling solutions (head sinks, heat pipes, and / or fans), which are efficient yet low-cost since they are manufactured in high volumes, can be applied to FPGAs or CPU / FPGA packages in CPU sockets, whereas cooling for expansion cards can be expensive and inefficient.

[00539] Likewise, an FPGA / interposer and / or CPU / FPGA package may include the full power supply of a CPU socket, e.g. 150W, whereas a standard expansion card may be power limited, e.g. 25W or 75W from the PCIe bus. In various instances, for genomic data processing applications, all these packaging options may facilitate easy installation of a tightly-integrated CPU+FPGA compute platform, such as within a DNA sequencer. For instance, typical modern “next-generation” DNA sequencers contain the sequencing apparatus (sample and reagent storage, fluidics tubing and control, sensor arrays, primary image and / or signal processing) within a chassis that also contains a standard or custom server motherboard, wired to the sequencing apparatus for sequencing control and data acquisition. A tightly-integrated CPU+FPGA platform, as herein described, may be achieved in such a sequencer such as by simply installing one or more FPGA / interposer and / or 2024205108   25 Jul 2024 FPGA / CPU packages in CPU sockets of its existing motherboard, or alternatively by installing a new motherboard with both CPU(s) and FPGA(s), e.g., tightly coupled, as herein disclosed. Further, all of these packaging options may be configured to facilitate easy deployment of the tightly-integrated CPU+FPGA platform such as into a cloud accessible and / or datacenter server rack, which include compact / dense servers with very high reliability / availability.

[00540] Hence, in accordance with the teachings herein, there are many processing stages for data from DNA (or RNA) sequencing to mapping and aligning to sorting and / or de-duplicating to variant calling, which can vary depending on the primary and / or secondary and / or tertiary processing technologies employed and their applications. Such processing steps may include one or more of: signal processing on electrical measurements from a sequencer, an image processing on optical measurements from the sequencer, base calling using processed signal or image data to determine the most likely nucleotide sequence and confidence scores, filtering sequenced reads with low quality or polyclonal clusters, detecting and trimming adapters, key sequences, barcodes, and low quality read ends, as well as De novo sequence assembly, generating and / or utilizing De Bruijn graphs and / or sequence graphs, e.g., De Bruijn and sequence graph construction, editing, trimming, cleanup, repair, coloring, annotation, comparison, transformation, splitting, splicing, analysis, subgraph selection, traversal, iteration, recursion, searching, filtering, import, export, including mapping reads to a reference genome, aligning reads to candidate mapping locations in the reference genome, local assembly of reads mapped to a reference region, sorting reads by aligned position, marking and / or removing duplicate reads, including PCR or optical duplicates, re-alignment of multiple overlapping reads for indel consistency, base quality score recalibration, variant calling (single sample or joint), structural variant analysis, copy number variant analysis, somatic variant calling (e.g., tumor sample only, matched tumor / normal, or tumor / unmatched normal, etc.), RNA splice junction detection, RNA alternative splicing analysis, RNA transcript assembly, RNA transcript expression analysis, RNA differential expression analysis, RNA variant calling, DNA / RNA difference analysis, DNA methylation analysis and calling, variant quality score recalibration, variant filtering, variant annotation from known variant databases, sample contamination detection and estimation, phenotype prediction, disease testing, treatment response prediction, custom treatment design, ancestry and mutation history analysis, population DNA analysis, genetic marker identification, encoding genomic data into standard formats and / or compression files 2024205108   25 Jul 2024 (e.g. FASTA, FASTQ, SAM, BAM, VCF, BCF), decoding genomic data from standard formats, querying, selecting or filtering genomic data subsets, general compression and decompression for genomic files (gzip, BAM compression), specialized compression and decompression for genomic data (CRAM), genomic data encryption and decryption, statistics calculation, comparison, and presentation from genomic data, genomic result data comparison, accuracy analysis and reporting, genomic file storage, archival, retrieval, backup, recovery, and transmission, as well as genomic database construction, querying, access management, data extraction, and the like.

[00541] All of these operations can be quite slow and expensive when implemented on traditional compute platforms. The sluggishness of such exclusively software implemented operations may be due in part to the complexity of the algorithms, but is typically due to the very large input and output datasets that results in high latency with respect to moving the data. The devices and systems disclosed herein overcome these problems, in part due to the configuration of the various hardware processing engines, acceleration by the various hardware implementations, and / or in part due to the CPU / FPGA tight coupling configurations. Accordingly, as can be seen with respect to FIG. 39, one or more, e.g., all of these operations, may be accelerated by cooperation of CPUs 1000 and FPGAs 7, such as in a distributed processing model, as described herein. For instance, in some cases (encryption, general compression, read mapping, and / or alignment), a whole operational function may be substantially or entirely implemented in custom FPGA logic (such as by hardware design methodology, e.g. RTL), such as where the CPU software mostly serves the function of compiling large data packets for preprocessing via worker threads 20, such as aggregating the data into various jobs to be processed by one or more hardware implemented processing engines, and feeding the various data inputs, such as in a first in first out format, to one or more of the FPGA engine(s) 13, and / or receives results therefrom.

[00542] For instance, as can be seen with respect to FIG. 39, in various embodiments, a worker thread generates various packets of job data that may be compiled and / or streamed into larger job packets that may be queued up and / or further aggregated in preparation for transfer, e.g., via a DDR3 to the FPGA 7, such as over a high bandwidth, low latency, point to point interconnect protocol, e.g., QPI 3. In particular instances, the data may be buffered in accordance with the particular data sets being transferred to the FPGA. Once the packaged data is received by the FPGA 7, such as in a cache coherent manner, it may be processed and sent to one or more specialized clusters 11 whereby it may further be directed to one or more 2024205108   25 Jul 2024 sets of processing engines for processing thereby in accordance with one or more of the pipeline operations herein described.

[00543] Once processed, results data may then be sent back to the cluster and queued up for being sent back over the tight coupling point to point interconnect to the CPU for post processing. In certain embodiments, the data may be sent to a de-aggregator thread prior to post processing. Once post processing has occurred, the data may be sent back to the initial worker thread 20 that may be waiting on the data. Such distributed processing is particularly beneficial for the functions herein disclosed above. Particularly, these functions are distinguishable by the facts that their algorithmic complexity (although having a very high net computational burden) are pretty limited, and they each may be configured so as to have a fairly uniform compute cost across their various sub-operations.

[00544] However, in various cases, rather than processing the data in large packets, smaller sub-routines or discrete function protocols or elements may be performed, such as pertaining to one or more functions of a pipeline, rather than performing the entire processing functions for that pipeline on that data. Hence, a useful strategy may be to identify one or more critical compute-intensive sub-functions in any given operation, and then implement that sub-function in custom FPGA logic (hardware acceleration), such as for the intensive sub-function(s), while implementing the balance of the operation, and ideally much or most of the algorithmic complexity, in software to run on CPUs / GPUs / QPUs, as described herein, such as with respect to FIG. 39.

[00545] Generally, it is typical of many genomic data processing operations that a small percentage of the algorithmic complexity accounts for a large percentage of the overall computing load. For instance, as a typical example, 20% of the algorithmic complexity for the performance of a given function may account for 90% of the compute load, while the remaining 80% of the algorithmic complexity may only account for 10% of the compute load. Hence, in various instances, the system components herein described may be configured so as to implement the high, e.g., 20% or more, complexity portion so as to be run very efficiently in custom FPGA logic, which may be a tractable and maintainable in a hardware design, and thus, may be configured for executing this in FPGA; which in turn may reduce the CPU compute load by 90%, thereby enabling 10x overall acceleration. Other typical examples may be even more extreme, such as where 10% of the algorithmic complexity may account for 98% of the compute load, in which case applying FPGA acceleration, as herein described, to the 10% complexity portion be even easier, but may also enable up to 50x net 2024205108   25 Jul 2024 acceleration. In various instances, where extreme accelerated processing is desired, one or more of these functions may be performed by a quantum processing unit.

[00546] However, such a “piecemeal” or distributed processing acceleration approaches may be more practical when implemented in a tightly integrated CPU / GPU+FPGA platform, rather than on a loosely integrated CPU / GPU+FPGA platform. Particularly, in a loosely integrated platform, the portion, e.g., the functions, to be implemented in FPGA logic may be selected so as to minimize the size of the input data to the FPGA engine(s), and to minimize the output data from the FPGA engine(s), such as for each data unit processed, and additionally may be configured so as to keep the software / hardware boundary tolerant of high latencies. In such instances, the boundary between the hardware and software portions may be forced, e.g., on the loosely-integrated platform, to be drawn through certain low-bandwidth / high-latency cut-points, which divisions may not otherwise be desirable when optimizing the partitioning of the algorithmic complexity and computational loads. This may often result either in enlarging the boundaries of the hardware portion, encompassing an undesirably large portion of the algorithmic complexity in the hardwired format, or in shrinking the boundaries of the hardware portion, undesirably excluding portions with dense compute load.

[00547] By contrast, on a tightly integrated CPU / GPU+FPGA platform, due to the cache-coherent shared memory and the high-bandwidth / low-latency CPU / GPU / FPGA interconnect, the low-complexity / high-compute-load portions of a genomic data processing operation can be selected very precisely for implementation in custom FPGA logic (e.g., via the hardware engine(s) described herein), with optimized software / hardware boundaries. In such an instance, even if a data unit is large at the desired software / hardware boundary, it can still be efficiently handed off to an FPGA hardware engine for processing, just by passing a pointer to the particular data unit. Particularly, in such an instance, as per FIG. 33B, the hardware engine 13 of the FPGA 7, may not need to access every element of the data unit stored within the DRAM 1014; rather, it can access the necessary elements, e.g., within the cache 1014a, with efficient small accesses over the low-latency interconnect 3’ serviced by the CPU / GPU cache, thereby consuming less aggregate bandwidth than if the entire data unit had to be accessed and / or transferred to the FPGA 7, such as by DMA of the DRAM 1014, over a loose interconnect 3, as per FIG. 33A.

[00548] In such instances, the hardware engine 13 can annotate processing results into the data unit in-place in CPU / GPU memory 1014, without streaming an entire copy of the 2024205108   25 Jul 2024 data unit by DMA to CPU / GPU memory. Even if the desired software / hardware boundary is not appropriate for a software thread 20 to make a high-latency, non-blocking queued handoff to the hardware engine 13, it can potentially make a blocking function call to the hardware engine 13, sleeping for a short latency until the hardware engine completes, the latency being dramatically reduced by the cache-coherent shared memory, the low-latency / high-bandwidth interconnect, and the distributed software / hardware coordination model, as in FIG. 33B.

[00549] In particular instances, because the specific algorithms and requirements of signal / image processing and base calling vary from one sequencer technology to another, and because the quantity of raw data from the sequencer’s sensor is typically gargantuan (this being reduced to enormous after signal / image processing, and to merely huge after base calling), such signal / image processing and base calling may be efficiently performed within the sequencer itself, or on a nearby compute server connected by a high bandwidth transmission channel to the sequencer. However, DNA sequencers have been achieving increasingly high throughputs, at a rate of increase exceeding Moore’s Law, such that existing Central Processing Unit (“CPU”) and / or Graphics Processing Unit “GPU” based signal / image processing and base calling, when implemented individually and alone, have become increasingly inadequate to the task. Nevertheless, since a tightly integrated CPU + FPGA and / or a GPU + FPGA and / or a GPU / CPU + FPGA platform can be configured to be compact and easily instantiated within such a sequencer, e.g., as CPU and / or GPU and / or FPGA chip positioned on the sequencer’s motherboard, or easily installed in a server adjacent to the sequencer, or a cloud-based server system accessible remotely from the sequencer, such a sequencer may be an ideal platform to offer the massive compute acceleration offered by the custom FPGA / ASIC hardware engines described herein.

[00550] For instance, the system provided herein may be configured so as to perform primary, secondary, and / or tertiary processing, or portions thereof so as to be implemented by an accelerated CPU, GPU, and / or FPGA; a CPU + FPGA; a GPU + FPGA; a GPU / CPU + FPGA; QPU; CPU / QPU; GPU / QPU; CPU and / or GPU and / or QPU + FPGA platform. Further, such accelerated platforms, e.g., including one or more FPGA and / or QPU hardware engines, are useful for implementation in cloud-based systems, as described herein. For example, signal / image processing, base calling, mapping, aligning, sorting, de-duplicating, and / or variant calling algorithms, or portions thereof, generally require large amounts of floating point and / or fixed-point math, notably additions and multiplications. These functions 2024205108   25 Jul 2024 can also be configured so as to be performed by one or more quantum processing circuits such as to be implemented in a quantum processing platform.

[00551] Particularly, large modern FPGAs / quantum circuits contain thousands of highspeed multiplication and addition resources. More particularly, these circuits may include custom engines that may be implemented on or by them, which custom engines may be configured to perform parallel arithmetic operations at rates far exceeding the capabilities of simple general CPUs. Likewise, simple GPUs, have more comparable parallel arithmetic resources. However, GPUs often have awkward architectural limitations and programming restrictions that may prevent them from being fully utilized. Accordingly, these FPGA and / or quantum processing and / or GPU arithmetic resources can be wired up or otherwise configured by design to operate in exactly the designed manner with near 100% efficiency, such as for performing the calculations necessary to execute the functions herein. Accordingly, GPU cards may be added to expansion slots on a motherboard with a tightly integrated CPU and / or FPGA, thereby allowing all three processor types to cooperate, although the GPU may still cooperate with all of its own limitations and the limitations of loose integration.

[00552] More particularly, in various instances, with respect to Graphics Processing Units (GPUs), a GPU can be configured so as to implement one or more of the functions, as herein described, so as to accelerate the processing speed of the underlying calculations necessary for preforming that function, in whole or in part. More particularly, a GPU may be configured to perform one or more tasks in a mapping, aligning, sorting, de-duplicating, and / or variant calling protocol, such as to accelerate one or more of the computations, e.g., the large amounts of floating point and / or fixed-point math, such as additions and multiplications involved therein, so as to work in conjunction with a server’s CPU and / or FPGA to accelerate the application and processing performance and shorten the computational cycles required for performing such functions. Cloud servers, as herein described, with GPU / CPU / FPGA cards may be configured so as to easily handle computeintensive tasks and deliver a smoother user experience when leveraged for virtualization. Such compute-intensive tasks can also be offloaded to the cloud, such as to be performed by a quantum processing unit.

[00553] Accordingly, if a tightly integrated CPU+FPGA or GPU+FPGA and / or CPU / GPU / FPGA with shared memory platform is employed within a sequencer, or attached or cloud based server, such as for signal / image processing, base calling, mapping, aligning, 2024205108   25 Jul 2024 sorting, de-duplicating, and / or variant calling functions, there may be an advantage achieved such as in an incremental development process. For instance, initially, a limited portion of the compute load, such as a dynamic programming function for base calling, mapping, aligning, sorting, de-duplicating, and / or variant calling may be implemented in one or more FPGA engines, where as other work may be done in the CPU and / or GPU expansion cards. However, the tight CPU / GPU / FPGA integration and shared memory model, herein presented, may be further configured, later, so as to make it easy to incrementally select additional compute-intensive functions for GPU, FPGA, and / or quantum acceleration, which may then be implemented as processing engines, and various of their functions may be offloaded for execution into the FPGA(s) and / or in some instances may be offloaded onto the cloud, e.g., for performance by a QPU, thereby accelerating signal / image / base calling / mapping / aligning / variant processing. Such incremental advances can be implemented as needed to keep up with the increasing throughput of various primary and / or secondary and / or tertiary processing technologies.

[00554] Hence, read mapping and alignment, e.g., of one or more reads to a reference genome, as well as sorting, de-duplicating, and / or variant calling may be benefited from such GPU and / or FPGA and / or QPU acceleration. Specifically, mapping and alignment and / or variant calling, or portions thereof, may be implemented partially or entirely as custom FPGA logic, such as with the “to be mapped and / or aligned and / or variant called” reads streaming from the CPU / GPU memory into the FPGA map / align / variant calling engines, and mapped and / or aligned and / or variant called read records streaming back out, which may further be streamed back on-board, such as in the performance of sorting and / or variant calling. This type of FPGA acceleration works on a loosely-integrated CPU / GPU+FPGA platform, and in the configurations described herein may be extremely fast. Nevertheless, there are some additional advantages that may be gained by moving to a tightly-integrated CPU / GPU / QPU + FPGA platform.

[00555] Accordingly, with respect to mapping and aligning and variant calling, in some embodiments, a shared advantage of a tightly-integrated CPU / GPU+FPGA and / or quantum processing platform, as described herein, is that the map / align / variant calling acceleration, e.g., hardware acceleration, can be efficiently split into several discrete compute-intensive operations, such as seed generation and / or mapping, seed chain formation, paired end rescue scans, gapless alignment, and gapped alignment (Smith-Waterman or Needleman-Wunsch), De Bruijn graph formation, performing a HMM computation, and the 2024205108   25 Jul 2024 like, such as where the CPU and / or GPU and / or quantum computing software performs lighter (but not necessarily less complex) tasks, and may make acceleration calls to discrete hardware and / or other quantum computing engines as needed. Such a model may be less efficient in a typical loosely-integrated CPU / GPU+FPGA platform, e.g., due to large amounts of data to transfer back and forth between steps and high latencies, but may be more efficient in a tightly-integrated CPU+FPGA, GPU + FPGA, and / or quantum computing platform with cache-coherent shared memory, high-bandwidth / low-latency interconnect, and distributed software / hardware coordination model. Additionally, such as with respect to variant calling, both Hidden Markov model (HMM) and / or dynamic programming (DP) algorithms, including Viterbi and forward algorithms, may be implemented in association with a base calling / mapping / aligning / sorting / de-duplicating operation, such as to compute the most likely original sequence explaining the observed sensor measurements, in a configuration so as to be well suited to the parallel cellular layout of FPGAs and quantum circuits described herein.

[00556] Specifically, an efficient utilization of hardware and / or software resources in a distributed processing configuration can result from reducing hardware and / or quantum computing acceleration to discrete compute-intensive functions. In such instances, several of the functions disclosed herein may be performed in a monolithic pure-hardware engine so as to be less compute intensive, but may nevertheless still be algorithmically complex, and therefore may consume large quantities of physical FPGA resources (lookup-tables, flipflops, block-RAMs, etc.). In such instances, moving a portion or all of various discrete functions to software could take up available CPU cycles, in return for relinquishing substantial amounts of FPGA area. In certain of these instances, the freed FPGA area can be used for establishing greater parallelism for the compute intensive map / align / variant call subfunctions, thus increasing acceleration, or for other genomic acceleration functions. Such benefits may also be achieved by implementing compute intensive functions in one or more dedicated quantum circuits for implementation by a quantum computing platform.

[00557] Hence, in various embodiments, the algorithmic complexity of the one or more functions disclosed herein may be somewhat lessened by being configured in a pure hardware or pure quantum computing implementation. However, some operations, such as comparing pairs of candidate alignments for paired-end reads, and / or performing subtle mapping quality (MAPQ) estimations, represent very low compute loads, and thus could benefit from more complex and accurate processing in CPU / GPU and / or quantum computing software. Hence, in general, reducing the hardware processing to specific compute-intensive 2024205108   25 Jul 2024 operations would allow more complex and accurate algorithms to be employed in the CPU / GPU portions.

[00558] Furthermore, in various embodiments, the whole or a part of the map / align / sorting / de-duplicating / variant calling operations, disclosed herein, could be configured in such a manner that the more algorithmically complex computations may be employed at high levels in hardware and / or via one or more quantum circuits, such as where the called compute-intensive hardware and / or quantum functions are configured to be performed in a dynamic or iterative order. Particularly, a monolithic pure-hardware / quantum processing design may be implemented in a manner so as to function more efficiently as a linear pipeline. For example, if during processing one Smith-Waterman alignment displayed evidence of the true alignment path escaping the scoring band, e.g., swath as described above, another Smith-Waterman alignment could be called to correct this. Hence, these configurations could essentially reduce the FPGA hardware / quantum acceleration to discrete functions, such as a form of procedural abstraction, which would allow higher level complexity to be built easily on top of it.

[00559] Additionally, in various instances, flexibility within the map / align / variant calling algorithms and features thereof may be improved by reducing hardware and / or quantum acceleration to discrete compute-intensive functions, and configuring the system so as to perform other, e.g., less intensive parts, in the software of the CPU and / or GPU. For instance, although hardware algorithms can be modified and reconfigured in FPGAs, generally such changes to the hardware designs, e.g., via firmware, may require several times as much design effort as similar changes to software code. In such instances, the computeintensive portions of mapping and alignment and sorting and de-duplicating, and / or variant calling, such as seed mapping, seed chain formation, paired end rescue scans, gapless alignment, gapped alignment, and HMM, which are relatively well-defined, are thus stable functions and do not require frequent algorithmic changes. These functions, therefore, may be suitably optimized in hardware, whereas other functions, which could be executed by CPU / GPU software, are more appropriate for incremental improvement of algorithms, which is significantly easier in software. However, once fully developed could be implemented in hardware. One or more of these functions may also be configured so as to be implemented in one or more quantum circuits of a quantum processing machine.

[00560] Accordingly, in various instances, variant calling (with respect to DNA or RNA, single sample or joint, germline or somatic, etc.) may also benefit from FPGA and / or 2024205108   25 Jul 2024 quantum acceleration, such as with respect to its various compute intensive functions. For instance, haplotype-based callers, which call bases on evidence derived from a context provided within a window around a potential variant, as described above, is often the most compute-intensive operation. These operations include comparing a candidate haplotype (e.g., a single-strand nucleotide sequence representing a theory of the true sequence of at least one of the sampled strands at the genome locus in question) to each sequencer read, such as to estimate a conditional probability of observing the read given the truth of the haplotype.

[00561] Such an operation may be performed via one or more of an MRJD, Pair Hidden Markov Model (pair-HMM), and / or a Pair-Determined Hidden Markov Model (PD-HMM) calculation that sums the probabilities of possible combinations of errors in sequencing or sample preparation (PCR, etc.) by a dynamic programming algorithm. Hence, with respect thereto, the system can be configured such that a pair-HMM or PD-HMM calculation may be accelerated by one or more, e.g., parallel, FPGA hardware or quantum processing engines, whereas the CPU / GPU / QPU software may be configured so as to execute the remainder of the parent haplotype-based variant calling algorithm, either in a loosely-integrated or tightly-integrated CPU+FPGA, or GPU+FPGA or CPU and / or GPU+FPGA and / or QPU platform. For instance, in a loose integration, software threads may construct and prepare a De Bruijn and / or assembly graph from the reads overlapping a chosen active region (a window or contiguous subset of the reference genome), extract candidate haplotypes from the graph, and queue up haplotype-read pairs for DMA transfer to FPGA hardware engines, such as for pair-HMM or PD-HMM comparison. The same or other software threads can then receive the pair-HMM results queued and DMA-transferred back from the FPGA into the CPU / GPU memory, and perform genotyping and Bayesian probability calculations to make final variant calls. Of course, one or more of these functions can be configured so as to be run on one or more quantum computing platforms.

[00562] For instance, as can be seen with respect to FIG. 38, the CPU / GPU 1000 may include one or more, e.g., a plurality, of threads 20a, 20b, and 20c, which may each have access to an associated DRAM 1014, which DRAM has work space 1014a, 1014b, and 1014c, within which each thread 20a, 20b, and 20c, may have access, respectively, so as to perform one or more operations on one or more data structures, such as large data structures. These memory portions and their data structures may be accessed, such as via respective cache portions 1014a’, such as by one or more processing engines 13a, 13b, 13c of the FPGA 7, which processing engines may access the referenced data structures such as in the 2024205108   25 Jul 2024 performance of one or more of the operations herein described, such as for mapping, aligning, sorting, and / or variant calling. Because of the high bandwidth, tight coupling interconnect 3, data pertaining to the data structures and / or related to the processing results may be shared substantially seamlessly between the CPU and / or GPU and / or QPU and / or the associated FPGA, such as in a cache coherent manner, so as to optimize processing efficiency.

[00563] Accordingly, in one aspect, as herein disclosed, a system may be provided wherein the system is configured for sharing memory resources amongst its component parts, such as in relation to performing some computational tasks or sub-functions via software, such as run by a CPU and / or GPU and / or QPU, and performing other computational tasks or sub functions via firmware, such as via the hardware of an associated chip, such as an FPGA and / or ASIC or structured ASIC. This may be achieved in a number of different ways, such as by a direct loose or tight coupling between the CPU / GPU / QPU and the chip, e.g., FPGA. Such configurations may be particularly useful when distributing operations related to the processing of large data structures, as herein described, that have large functions or subfunctions to be used and accessed by both the CPU and / or GPU and / or QPU and the integrated circuit. Particularly, in various embodiments, when processing data through a genomics pipeline, as herein described, such as to accelerate overall processing function, timing, and efficiency, a number of different operations may be run on the data, which operations may involve both software and hardware processing components.

[00564] Consequently, data may need to be shared and / or otherwise communicated, between the software component running on the CPU and / or GPU and / or the QPU and the hardware component embodied in the chip, e.g., an FPGA or ASIC. Accordingly, one or more of the various steps in the processing pipeline, or a portion thereof, may be performed by one device, e.g., the CPU / GPU / QPU, and one or more of the various steps may be performed by the other device, e.g., the FPGA or ASIC. In such an instance, the CPU and the FPGA need to be communicably coupled, such as by a point to point interconnect, in such a manner to allow the efficient transmission of such data, which coupling may involve the shared use of memory resources. To achieve such distribution of tasks and the sharing of information for the performance of such tasks, the CPU and / or GPU and / or QPU may be loosely or tightly coupled to each other and / or to an FPGA, or other chip set, and a workflow management system may be included so as to distribute the workload efficiently. 2024205108   25 Jul 2024

[00565] Hence, in particular embodiments, a genomics analysis platform is provided. For instance, the platform may include a motherboard, a memory, and plurality of integrated circuits, such as forming one or more of a CPU / GPU / QPU, a mapping module, an alignment module, a sorting module, and / or a variant call module. Specifically, in particular embodiments, the platform may include a first integrated circuit, such as an integrated circuit forming a central processing unit (CPU) and / or a graphics processing unit (GPU) that is responsive to one or more software algorithms that are configured to instruct the CPU / GPU to perform one or more sets of genomics analysis functions, as described herein, such as where the CPU / GPU includes a first set of physical electronic interconnects to connect with the motherboard. In other embodiments, a quantum processing unit is provided, wherein the QPU includes one or more quantum circuits that are configured for performing one or more of the functions disclosed herein. In various instances, a memory is provided where the memory may also be attached to the motherboard and may further be electronically connected with the CPU and / or GPU and / or QPU, such as via at least a portion of the first set of physical electronic interconnects. In such instances, the memory may be configured for storing a plurality of reads of genomic data, and / or at least one or more genetic reference sequences, and / or an index, e.g., such as a hash table, of the one or more genetic reference sequences.

[00566] Additionally, the platform may include one or more of a second integrated circuit(s), such as where each second integrated circuit forms a field programmable gate array (FPGA) or ASIC, or structured ASIC having a second set of physical electronic interconnects to connect with the CPU and the memory, such as via a point-to-point interconnect protocol. In such an instance, the FPGA (or structured ASIC) may be programmable by firmware to configure a set of hardwired digital logic circuits that are interconnected by a plurality of physical interconnects to perform a second set of genomics analysis functions, e.g., mapping, aligning, sorting, de-duplicating, variant calling, e.g., an HMM function, etc. Particularly, the hardwired digital logic circuits of the FPGA may be arranged as a set of processing engines to perform one or more pre-configured steps in a sequence analysis pipeline of the genomics analysis platform, such as where the set(s) of processing engines include one or more of a mapping and / or aligning and / or sorting and / or de-duplicating and / or variant calling module, which modules may be formed of the separate or the same subsets of processing engines.

[00567] For instance, with respect to variant calling, a pair-HMM or PD-HMM calculation is one of the most compute-intensive steps of a haplotype-based variant calling 2024205108   25 Jul 2024 protocol. Hence, variant calling speed may be greatly improved by accelerating this step in one or more FPGA or quantum processing engines, as herein described. However, there may be additional benefit in accelerating other compute-intensive steps in additional FPGA and / or QP engines, to achieve a greater speed-up of variant calling, or a portion thereof, or reduce CPU / GPU load and the number of CPU / GPU cores required, or both, as seen with respect to FIG. 38.

[00568] Additional compute-intensive functions, with respect to variant calling, that may be implemented in FPGA and / or quantum processing engines include: callable-region detection, where reference genome regions covered by adequate depth and / or quality of aligned reads are selected for processing; active-region detection, where reference genome loci with nontrivial evidence of possible variants are identified, and windows of sufficient context around these loci are selected as active regions for further processing; De-Bruijn or other assembly graph construction, where reads overlapping an active region and / or K-mers from those reads are assembled into a graph; assembly graph preparation, such as trimming low-coverage or low-quality paths, repairing dangling head and tail paths by joining them onto a reference backbone in the graph, transformation from K-mer to sequence representation of the graph, merging similar branches and otherwise simplifying the graph; extracting candidate haplotypes from the assembly graph; as well as aligning candidate haplotypes to the reference genome, such as by Smith-Waterman alignment, e.g., to determine variants (SNPs and / or indels) from the reference represented by each haplotype, and synchronize its nucleotide positions with the reference.

[00569] All of these functions may be implemented as high-performance hardware engines within the FPGA, and / or by one or more quantum circuits of a quantum computing platform. However, calling such a variety of hardware acceleration functions from many integration points in the variant calling software may become inefficient on a loosely-coupled CPU / GPU / QPU+FPGA platform, and therefore a tightly-integrated CPU / GPU / QPU+FPGA platform may be desirable. For instance, various stepwise processing methods such as: constructing, preparing, and extracting haplotypes from a De Bruijn graph, or other assembly graph, could strongly benefit from a tightly-integrated CPU / GPU / QPU+FPGA platform. Additionally, assembly graphs are large and complex data structures, and passing them repeatedly between the CPU and / or GPU and the FPGA could become resource expensive and inhibit significant acceleration. 2024205108   25 Jul 2024

[00570] Hence, an ideal model for such graph processing, employing a tightly-integrated CPU / GPU / QPU and / or FPGA platform, is to retain such graphs in cache-coherent shared memory for alternating processing by CPU and / or GPU and / or QPU software and FPGA hardware functions. In such an instance, a software thread processing a given graph may iteratively command various compute-intensive graph processing steps by a hardware engine, and then the software could inspect the results and determine the next steps between the hardware calls, such as exemplified in the process of FIG. 39. This processing model, may be controlled by a suitably configured workflow management system, and / or may be configured to correspond to software paradigms such as a data-structure API or an object-oriented method interface, but with compute intensive functions being accelerated by custom hardware and / or quantum processing engines, which is made practical by being implemented on a tightly-integrated CPU and / or GPU and / or QPU +FPGA platform, with cache-coherent shared memory and high-bandwidth / low-latency CPU / GPU / QPU / FPGA interconnects.

[00571] Accordingly, in addition to mapping and aligning sequenced reads to a reference genome, reads may be assembled “de novo,” e.g., without a reference genome, such as by detecting apparent overlap between reads, e.g., in a pileup, where they fully or mostly agree, and joining them into longer sequences, contigs, scaffolds, or graphs. This assembly may also be done locally, such as using all reads determined to map to a given chromosome or portion thereof. Assembly in this manner may also incorporate a reference genome, or segment of one, into the assembled structure.

[00572] In such an instance, due to the complexity of joining together read sequences that do not completely agree, a graph structure may be employed, such as where overlapping reads may agree on a single sequence in one segment, but branch into multiple sequences in an adjacent segment, as explained above. Such an assembly graph, therefore, may be a sequence graph, where each edge or node represents one nucleotide or a sequence of nucleotides that is considered to adjoin contiguously to the sequences in connected edges or nodes. In particular instances, such an assembly graph may be a k-mer graph, where each node represents a k-mer, or nucleotide sequence of (typically) fixed length k, and where connected nodes are considered to overlap each other in longer observed sequences, typically overlapping by k-1 nucleotides. In various methods there may be one or more transformations performed between one or more sequence graphs and k-mer graphs.

[00573] Although assembly graphs are employed in haplotype-based variant calling, and some of the graph processing methods employed are similar, there are important 2024205108   25 Jul 2024 differences. De novo assembly graphs are generally much larger, and employ longer k-mers. Whereas variant-calling assembly graphs are constrained to be fairly structured and relatively simple, such as having no cycles and flowing source-to-sink along a reference sequence backbone, de novo assembly graphs tend to be more unstructured and complex, with cycles, dangling paths, and other anomalies not only permitted, but subjected to special analysis. De novo assembly graph coloring is sometimes employed, assigning “colors” to nodes and edges signifying, for example, which biological sample they came from, or matching a reference sequence. Hence, a wider variety of graph analysis and processing functions need to be employed for de novo assembly graphs, often iteratively or recursively, and especially due to the size and complexity of de novo assembly graphs, processing functions tend to be extremely compute intensive.

[00574] Hence, as set forth above, an ideal model for such graph processing, on a tightly-integrated CPU / GPU / QPU+FPGA platform, is to retain such graphs in cache-coherent shared memory for alternating processing between the CPU / GPU / QPU software and FPGA hardware functions. In such an instance, a software thread processing a given graph may iteratively command various compute-intensive graph processing steps to be performed by a hardware engine, and then inspect the results to thereby determine the next steps to be performed by the hardware, such as by making appropriate hardware calls. Like above, this processing model, is greatly benefitted by implementation on a tightly-integrated CPU+FPGA platform, with cache-coherent shared memory and high-bandwidth / low-latency CPU / FPGA interconnect.

[00575] Additionally, as described herein below, tertiary analysis includes genomic processing that may follow graph assembly and / or variant calling, which in clinical applications may include variant annotation, phenotype prediction, disease testing, and / or treatment response prediction, as described herein. Reasons it is beneficial to perform tertiary analysis on such a tightly-integrated CPU / GPU / QPU+FPGA platform are that such a platform configuration enables efficient acceleration of primary and / or secondary processing, which are very compute intensive, and it is ideal to continue with tertiary analysis on the same platform, for convenience and reduced turnaround time, and to minimize transmission and copying of large genomic data files. Hence, either a loosely or tightly-integrated CPU / GPU / QPU+FPGA platform is a good choice, but a tightly coupled platform may include additional benefits because tertiary analysis steps and methods vary widely from one application to another, and in any case where compute-intensive steps slow down tertiary 2024205108   25 Jul 2024 analysis, custom FPGA acceleration of those steps can be implemented in an optimized fashion.

[00576] For instance, a particular benefit to tertiary analysis on a tightly-integrated CPU / GPU / QPU and / or FPGA platform is the ability to re-analyze the genomic data iteratively, leveraging the CPU / GPU / QPU and / or FPGA acceleration of secondary processing, in response to partial or intermediate tertiary results, which may benefit additionally from the tight integration configuration. For example, after tertiary analysis detects a possible phenotype or disease, but with limited confidence as to whether the detection is true or false, focused secondary re-analysis may be performed with extremely high effort on the particular reads and reference regions impacting the detection, thus improving the accuracy and confidence of relevant variant calls, and in turn improving the confidence in the detection call. Additionally, if tertiary analysis determines information about the ancestry or structural variant genotypes of the analyzed individual, secondary analysis may be repeated using a different or modified reference genome, which is more appropriate for the specific individual, thus enhancing the accuracy of variant calls and improving the accuracy of further tertiary analysis steps.

[00577] However, if tertiary analysis is done on a CPU-only platform after primary and secondary processing (possibly accelerated on a separate platform), then re-analysis with secondary processing tools is likely to be too slow to be useful on the tertiary analysis platform itself, and the alternative is transmission to a faster platform, which is also prohibitively slow. Thus, in the absence of any form of hardware or quantum acceleration on the tertiary analysis platform, primary and secondary processing must generally be completed before tertiary analysis begins, without the possibility of easy re-analysis or iterative secondary analysis and / or pipelining of analytic functions. But on an FPGA and / or quantum-accelerated platform, and especially a tightly-integrated CPU and / or GPU and / or QPU and / or FPGA platform where secondary processing is maximally efficient, iterative analysis becomes practical and useful.

[00578] Accordingly, as indicated above, the modules herein disclosed may be implemented in the hardware of the chip, such as by being hardwired therein, and in such instances their implementation may be such that their functioning may take place at a faster speed, with greater accuracy, as compared to when implemented in software, such as where there are minimal instructions to be fetched, read, and / or executed. Additionally, in various instances, the functions to be performed by one or more of these modules may be distributed 2024205108   25 Jul 2024 such that various of the functions may be configured so as to be implemented by the host CPU and / or GPU and / or QPU software, whereas in other instances, various other functions may be performed by the hardware of an associated FPGA, such as where the two or more devices perform their respective functions with one another such as in a seamless fashion. For such purposes, the CPU, GPU, QPU, and / or FPGA or ASIC or Structured ASIC may be tightly coupled, such as via a low latency, high bandwidth interconnect, such as a QPI, CCVI, CAPI, and the like. Accordingly, in some instances, the high computationally intensive functions to be performed by one or more of these modules may be performed by a quantum processor implemented by one or more quantum circuits.

[00579] Hence, given the unique hardware and / or quantum processing implementation, the modules of the disclosure may function directly in accordance with their operational parameters, such as without needing to fetch, read, and / or execute instructions, such as when implemented solely in CPU software. Additionally, memory requirements and processing times may be further reduced, such as where the communications within chip is via files, e.g., stored locally in the FPGA / CPU / GPU / QPU cache, such as a cache coherent manner, rather than through extensive accessing an external memory. Of course, in some instances, the chip and / or card may be sized so as to include more memory, such as more on board memory, so as to enhance parallel processing capabilities, thereby resulting in even faster processing speeds. For instance, in certain embodiments, a chip of the disclosure may include an embedded DRAM, so that the chip does not have to rely on external memory, which would therefore result in a further increase in processing speed, such as where a Burrows-Wheeler algorithm or De Brujin Graph may be employed, instead of a hash table and hash function, which may in various instances, rely on external, e.g., host memory. In such instances, the running of a portion or an entire pipeline can be accomplished in 6 or 10 or 12 or 15 or 20 minutes or less, such as from start to finish.

[00580] As indicated above, there are various different points where any given module can be positioned on the hardware, or be positioned remotely therefrom, such as on a server accessible on the cloud. Where a given module is positioned on the chip, e.g., hardwired into the chip, its function may be performed by the hardware, however, where desired, the module may be positioned remotely from the chip, at which point the platform may include the necessary instrumentality for sending the relevant data to a remote location, such as a server, e.g., quantum server, accessible via the cloud, so that the particular module’s functionality may be engaged for further processing of the data, in accordance with the user selected 2024205108   25 Jul 2024 desired protocols. Accordingly, part of the platform may include a web-based interface for the performance of one or more tasks pursuant to the functioning of one or more of the modules disclosed herein. For instance, where mapping, alignment, and / or sorting are all modules that may occur on the chip, in various instances, one or more of local realignment, duplicate marking, base quality core recalibration, and / or variant calling may take place on the cloud.

[00581] Particularly, once the genetic data has been generated and / or processed, e.g., in one or more primary and / or secondary processing protocols, such as by being mapped, aligned, and / or sorted, such as to produce one or more variant call files, for instance, to determine how the genetic sequence data from a subject differs from one or more reference sequences, a further aspect of the disclosure may be directed to performing one or more other analytical functions on the generated and / or processed genetic data such as for further, e.g., tertiary, processing, as depicted in FIGS. 40. For example, the system may be configured for further processing of the generated and / or secondarily processed data, such as by running it through one or more tertiary processing pipelines 700, such as one or more of a micro-array analysis pipeline, a genome, e.g., whole genome analysis pipeline, genotyping analysis pipeline, exome analysis pipeline, epigenome analysis pipeline, metagenome analysis pipeline, microbiome analysis pipeline, genotyping analysis pipeline, including joint genotyping, variants analyses pipeline, including structural variants pipelines, somatic variants pipelines, and GATK and / or MuTect2 pipelines, as well as RNA sequencing pipelines and other genetic analyses pipelines.

[00582] Additionally, in various instances, an additional layer of processing 800 may be provided, such as for disease diagnostics, therapeutic treatment, and / or prophylactic prevention, such as including NIPT, NICU, Cancer, LDT, AgBio, and other such disease diagnostics, prophylaxis, and / or treatments employing the data generated by one or more of the present primary and / or secondary and / or tertiary pipelines. For example, particular bioanalytic pipelines include genome pipelines, epigenome pipelines, metagenome pipelines, genotyping pipelines, variants, e.g., GATK / MuTect2 pipelines, and other such pipelines. Hence, the devices and methods herein disclosed may be used to generate genetic sequence data, which data may then be used to generate one or more variant call files and / or other associated data that may further be subject to the execution of other tertiary processing pipelines in accordance with the devices and methods disclosed herein, such as for particular 2024205108   25 Jul 2024 and / or general disease diagnostics as well as for prophylactic and / or therapeutic treatment and / or developmental modalities. See, for instance, FIGS. 41 B, C and 43.

[00583] As described above, the methods and / or systems herein presented may include the generating and / or the otherwise acquiring of genetic sequence data. Such data may be generated or otherwise acquired from any suitable source, such as by a NGS or “sequencer on a chip technology.” Once generated and / or acquired, the methods and systems herein may include subjecting the data to further processing such as by one or more secondary processing protocols 600. The secondary processing protocols may include one or more of mapping, aligning, and sorting of the generated genetic sequence data, such as to produce one or more variant call files, for example, so as to determine how the genetic sequence data from a subject differs from one or more reference sequences or genomes. A further aspect of the disclosure may be directed to performing one or more other analytical functions on the generated and / or processed genetic data, e.g., secondary result data, such as for additional processing, e.g., tertiary processing 700 / 800, which processing may be performed on or in association with the same chip or chipset as that hosting the aforementioned sequencer technology.

[00584] Accordingly, in a first instance, such as with respect to the generation, acquisition, and / or transmission of genetic sequence data, as set forth in FIGS. 37 - 41, such data may be produced either locally or remotely and / or the results thereof may then be directly processed, such as by a local computing resource 100, or may be transmitted to a remote location, such as to a remote computing resource 300, for further processing, e.g. for secondary and / or tertiary processing, see FIGS. 42. For instance, the generated genetic sequence data may be processed locally, and directly, such as where the sequencing and secondary processing functionalities are housed on the same chipset and / or within the same device on-site 10. Likewise, the generated genetic sequence data may be processed locally, and indirectly, such as where the sequencing and secondary processing functionalities occur separately by distinct apparatuses that share the same facility or location but may be separated by a space albeit communicably connected, such as via a local network 10. In a further instance, the genetic sequence data may be derived remotely, such as by a remote NGS, and the resultant data may be transmitted over a cloud based network 30 / 50 to an offsite remote location 300, such as separated geographically from the sequencer.

[00585] Specifically, as illustrated in FIG. 40A, in various embodiments, a data generation apparatus, e.g., nucleotide sequencer 110, may be provided on site, such as where 2024205108   25 Jul 2024 the sequencer is a “sequencer on a chip” or a NGS, wherein the sequencer is associated with a local computing resource 100 either directly or indirectly such as by a local network connection 10 / 30. The local computing resource 100 may include or otherwise be associated with one or more of a data generation 110 and / or a data acquisition 120 mechanism(s). Such mechanisms may be any mechanism configured for either generating and / or otherwise acquiring data, such as analog, digital, and / or electromagnetic data related to one or more genetic sequences of a subject or group of subjects, such as where the genetic sequence data is in a BCL or FASTQ file format.

[00586] For example, such a data generating mechanism 110 may be a primary processor such as a sequencer, such as a NGS, a sequencer on a chip, or other like mechanism for generating genetic sequence information. Further, such data acquisition mechanisms 120 may be any mechanism configured for receiving data, such as generated genetic sequence information; and / or together with the data generator 110 and / or computing resource 100 is capable of subjecting the same to one or more secondary processing protocols, such as a secondary processing pipeline apparatus configured for running a mapper, aligner, sorter, and / or variant caller protocol on the generated and / or acquired sequence data as herein described. In various instances, the data generating 110 and / or data acquisition 120 apparatuses may be networked together such as over a local network 10, such as for local storage 200; or may be networked together over a local and / or cloud based network 30, such as for transmitting and / or receiving data, such as digital data related to the primary and / or secondary processing of genetic sequence information, such as to or from a remote location, such as for remote processing 300 and / or storage 400. In various embodiments, one or more of these components may be communicably coupled together by a hybrid network as herein described.

[00587] The local computing resource 100 may also include or otherwise be associated with a compiler 130 and / or a processor 140, such as a compiler 130 configured for compiling the generated and / or acquired data and / or data associated therewith, and a processor 140 configured for processing the generated and / or acquired and / or compiled data and / or controlling the system 1 and its components, as herein described, such as for performing primary, secondary, and / or tertiary processing. For instance, any suitable compiler may be employed, however, in certain instances, further efficiencies may be achieved not only by implementing a tight-coupling configuration, such as discussed above, for the efficient and coherent transfer of data between system components, but may further be achieved by 2024205108   25 Jul 2024 implementing a just-in-time (JIT) computer language compiler configuration. Further, in certain instances, the processor 140 may include a workflow management system for controlling the functioning of the various system components with respect to generated, received, and / or data to be processed through the various stages of the platform pipelines.

[00588] Specifically, as used herein just-in-time (JIT) refers to a device, system, and / or method for converting acquired and / or generated file formats from one form to another. In a broad usage structure, the JIT system disclosed herein may include a compiler 130, or other computing architecture, e.g., a processing program, that may be implemented in a manner so as to convert various code from one form into another. For instance, in one implementation, a JIT compiler may function to convert bytecode, or other program code that contains instructions that must be interpreted, into instructions that can be sent directly to an associated processor 140 for near immediate execution, such as without the need for interpretation of the instructions by the particular machine language. Particularly, after a coding program, e.g., a Java program, has been written, the source language statements may be compiled by the compiler, e.g., Java compiler, into bytecode, rather than compiled into code that contains instructions that match any given particular hardware platform's processing language. This bytecode compiling action, therefore, is platform-independent code that can be sent to any platform and run on that platform regardless of its underlying processor. Hence, a suitable compiler may be a compiler that is configured so as to compile the bytecode into platform-specific executable code that may then be executed immediately. In this instance, the JIT compiler may function to immediately convert one file format into another, such as “on the fly”.

[00589] Hence, a suitably configured compiler, as herein described, is capable of overcoming various deficiencies in the art. Specifically, past compiling programs that were written in a specific language had to be recompiled and / or re-written dependent on each specific computer platform on which it was to be implemented. In the present compiling system, the compiler may be configured so as to only have to write and compile a program once, and once written in a particular form, may be converted into one or more other forms nearly immediately. More specifically, the compiler 130 may be a JIT, or in another similar dynamic translation compiler format, which is capable of writing instructions in a platform agnostic language that does not have to be recompiled and / or re-written dependent on the specific computer platform on which it is implemented. For instance, in a particular use model, the compiler may be configured for interpreting compiled bytecode, and / or other 2024205108   25 Jul 2024 coded instructions, into instructions that are understandable by a given particular processor for the conversion of one file format into another, regardless of computing platform. Principally, the JIT system herein is capable of receiving one genetic file, such as representing a genetic code, for example, where the file is a BCL or FASTQ file, e.g., generated from a genetic sequencer, and rapidly converting it into another form, such as into a SAM, BAM, and / or CRAM file, such as by using the methods disclosed herein.

[00590] Particularly, in various instances, the system herein disclosed may include a first and / or a second compiler 130a and 130b, such as a virtual compiling machine, that handles one or a plurality of bytecode instruction conversions at a time. For instance, using a Java type just-in-time compiler, or other suitably configured second compiler, within the present system platform, will allow for the compiling of instructions into bytecode that may then be converted into the particular system code, e.g., as though the program had been compiled initially on that platform. Accordingly, once the code has been compiled and / or (re-)compiled, such as by the JIT compiler(s) 130, it will run more quickly in the computer processor 140. Hence, in various embodiments, just-in-time (JIT) compilation, or other dynamic translation compilation, may be configured so as to be performed during execution of a given program, e.g., at run time, rather than prior to execution. In such an instance, this may include the step(s) of translation to machine code or translation into another format, which may then be executed directly, thereby allowing for one or more of ahead-of-time compilation (AOT) and / or interpretation.

[00591] More particularly, as implemented within the present system, a typical genome sequencing dataflow generally produces data in one or more file formats, derived from one or more computing platforms, such as in a BCL, FASTQ, SAM, BAM, CRAM, and / or VCF file format, or their equivalents. For instance, a typical DNA sequencer 110, e.g., an NGS, produces raw signals representing called bases that are designated herein as reads, such as in a BCL and / or FASTQ file, which may optionally be further processed, e.g., enhanced image processing, and / or compressed 150. Likewise, the reads of the generated BCL / FASTQ files may then be further processed within the system, as herein described, so as to produce mapping and / or alignment data, which produced data, e.g., of the mapped and aligned reads, may be in a SAM or BAM file format, or alternatively a CRAM file format. Further, the SAM or BAM file may then be processed, such as through a variant calling procedure, so as to produce a variant call file, such as a VCF file or gVCF file. Accordingly, all of these produced BCL, FASTQ, SAM, BAM, CRAM, and / or VCF files, once produced are 2024205108   25 Jul 2024 (extremely) large files that all need to be stored such as in system memory architecture locally 200 or remotely 400. The storage of any one of these files is expensive. The storage of all of these file formats is extremely expensive.

[00592] As indicated, just-in-time (JIT) or other dual compiling or dynamic translation compilation analysis, may be configured and deployed herein so as to reduce such high storage costs. For instance, a JIT analysis scheme may be implemented herein so as to store data in only one format (e.g., a compressed FASTQ or BAM, etc., file format), while providing access to one or more file formats (e.g., BCL, FASTQ, SAM, BAM, CRAM, and / or VCF, etc.). This rapid file conversion process may be effectuated by rapidly processing the genomic data utilizing the herein disclosed respective hardware and / or quantum acceleration platforms, e.g., such as for mapping, aligning, sorting, and / or variant calling (or component functions thereof, such as de-duplicating, HMM and Smith-Waterman, compression and decompression, and the like), in hardware engines on an integrated circuit, such as an FPGA, or by a quantum processor. Hence, by implementing JIT or similar analysis along with such acceleration, the genomic data can be processed in a manner so as to generate desired file formats on the fly, at speeds comparable to normal file access. Thus, considerable storage savings may be realized by JIT-like processing with little or no loss of access speed.

[00593] Particularly, two general options are useful for the underlying storage of the genomic data produced herein so as to be accessible for JIT-like processing, these include the storage of unaligned reads (e.g., that may include compressed FASTQ, or unaligned compressed SAM, BAM, or CRAM files), and the storage of aligned reads (e.g., that may include compressed BAM or CRAM files). However, since the accelerated processing disclosed herein allows any of the referenced file formats to be derived rapidly, e.g., on the fly, the underlying file format for storage may be selected so as to achieve the smallest compressed file size, thereby decreasing the expense of storage. Hence, because of the comparatively smaller file size for unprocessed, e.g., raw un-aligned, read data, there is an advantage to storing unaligned reads so that the data fields are minimized. Likewise, there is an advantage to storing the processed and compressed data, such as in a CRAM file format.

[00594] More particularly, in view of the rapid processing speeds achievable by the devices, systems, and methods of their use disclosed herein, in many instances, there may be no need to store mapped and / or alignment information for each and every read, because this information may be rapidly derived upon need, such as on the fly. Further, although a 2024205108   25 Jul 2024 compressed FASTQ (e.g. FASTQ.gz) file format is commonly used for storage of genetic sequence data, such unaligned read data may be stored in more advanced compressed formats as well, such as post mapping and / or aligning in SAM, BAM, or CRAM files, which may further reduce the file size, such as by use of compact binary representation and / or more targeted compression methods. Hence, these file formats may be compressed prior to storage, be decompressed after storage, and processed rapidly, such as on the fly, so as to convert one file format from another.

[00595] An advantage to storing aligned reads is that much or all of each read’s sequence content can be omitted. Specifically, system efficiency can be enhanced and storage space saved by only storing the differences between the read sequences and the selected reference genome, such as at indicated variant alignment positions of the read. More specifically, since differences from the reference are usually sparse, the aligned position and list of differences can often be more compactly stored than the original read sequence. Therefore, in various instances, the storage of an aligned read format, e.g., when storing data related to the differences of aligned reads, may be preferable to the storage of unaligned read data. In such an instance, if an aligned read and / or variant call format is used as the underlying storage format, such as in a JIT procedure, other formats, such as a SAM, BAM, and / or CRAM, compressed file formats, may also be used.

[00596] Along with the aligned and / or unaligned read file data to be stored, a wide variety of other data, such as metadata derived from the various computations determined herein, may also be stored. Such computated data may include read mapped, alignment and / or subsequent processing data, such as alignment scores, mapping confidence, edit distance from the reference, etc. In certain instances, such metadata and / or other extra information need not be retained in the underlying storage for JIT analysis, such as in those instances where it can be reproduced on the fly, such as by the accelerated data processing herein described.

[00597] With respect to metadata, this data may be a small file that instructs the system as to how to go backwards or forwards from one file format into conversion to another file format. Hence, the metadata file allows the system to create a bit-compatible version of any other file type. For instance, proceeding forward from an originating data file, the system need only access and implement the instructions of the metadata. Along with rapid file format conversion, JIT also enables rapid compression and / or decompression and / or storage, such as in a genomics dropbox memory cache. 2024205108   25 Jul 2024

[00598] As discussed in greater detail below, once sequence data is generated 110, it may be stored locally 200, and / or may be made accessible for storage remotely, such as in a cloud accessible dropbox-like memory cache 400. For example, once in the genomic dropbox, the data may appear as accessible on the cloud 50, and may then be further processed, e.g., substantially immediately. This is particularly useful when there is a plurality of mapping / aligning / sorting / variant calling systems 100 / 300, such as with one on either side of the cloud 50 interface facilitating the automatic uploading and processing of the data, which can be further processed such as using the JIT technology herein described.

[00599] For instance, an underlying storage format for JIT compiling and / or processing may contain only minimal data fields, such as read name, base quality scores, alignment position, and / or orientation in the reference, and a list of differences from the reference, such as where each field may be compressed in an optimal manner for its data type. Various other metadata may be included and / or otherwise associated with the storage file. In such an instance, the underlying storage for JIT analysis may be in a local file system 200, such as on hard disk drives and solid state drives, or a network storage resource such as a NAS or object or Dropbox like storage system 400. Particularly, when various file formats, such as BCL, FASTQ, SAM, BAM, CRAM, VCF, etc., have been produced for a genomic dataset, which may be submitted for JIT processing and / or storage, the JIT or other similar compiling and / or analysis system may be configured so as to convert the data to a single underlying storage format for storage. Additional data, such as metadata and / or other information (which may be small) necessary to reproduce all other desired formats by accelerated genomic data processing, may also be associated with the file and stored. Such additional information may include one or more of: a list of file formats to be reproduced, data processing commands to reproduce each format, unique ID (e.g., URL or MD5 / SHA hash) of reference genome, various parameter settings, such as for mapping, alignment, sorting, variant calling, and / or any other processing, as described herein, randomization seeds for processing steps, e.g., utilizing pseudo-randomization, to deterministically reproduce the same results, user Interface, and the like.

[00600] In various instances, the data to be stored and / or retrieved in a JIT or similar dynamic translation processing and / or analysis system may be presented to the user, or other applications, in a variety of manners. For instance, one option is to have the JIT analysis storage in a standard or custom “JIT object” file format, such as for storage and / or retrieval as a SAM, BAM, CRAM, or other custom file format, and provide user tools to rapidly convert 2024205108   25 Jul 2024 the JIT object into the desired format (e.g., in a local temporary storage 200) using the accelerated processing disclosed herein. Another option is to present the appearance of multiple file formats, such as BCL, FASTQ, SAM, BAM, CRAM, VCF, etc. to the user, and the user applications, in such a manner that the file system access to various file formats utilizes a JIT procedure, thus only one file type needs be saved, and from these file type, all other files can be generated on the fly. A further option is to make user tools that otherwise accept specific file formats (BCL, FASTQ, SAM, BAM, CRAM, VCF, etc.) that are able to be presented as a JIT object instead, and may automatically call for JIT analysis to obtain the data in the desired data format, e.g., BCL, FASTQ, SAM, BAM, CRAM, VCF, etc. automatically when called.

[00601] Accordingly, JIT procedures are useful for providing access to multiple file formats, e.g., BCL, FASTQ, SAM, BAM, CRAM, VCF, and the like, from a single file format by rapidly processing the underlying stored compressed file format. Additionally, JIT remains useful even if only a single file format is to be accessed, because compression is still achieved relative to storing the accessed format directly. In such an instance, the underlying file storage format may be different than the accessed file format, and / or may contain less metadata, and / or may be compressed more efficiently than the accessed format. Further, in such an instance, as discussed above, the file is compressed prior to storage, and decompressed upon retrieval, e.g., automatically.

[00602] In various instances, the methods of JIT analysis, as provided herein, may also be used for transmission of genomic data, over the internet or another network, to minimize transmission time and lessen consumed network bandwidth. Particularly, in one storage application, a single compressed underlying file format may be stored, and / or one or more formats may be accessed via decompression and / or accelerated genomic data processing. Similarly, in the transmission application, only a single compressed underlying file format need be transmitted, e.g., from a source network node to a destination network node, such as where the underlying format may be chosen primarily for smallest compressed file size, and / or where all desired file formats may be generated at the destination node by or for genomic data processing, such as on the fly. In this manner, only one compressed data file format need be used for storage and / or transfer, from which file format the other various file formats may be derived.

[00603] Accordingly, in view of FIG. 40A, hardware and / or quantum accelerated genomic data processing, as herein described, may be utilized in (or by) both the source 2024205108   25 Jul 2024 network node, to generate and / or compress the underlying format for transmission, and the destination network node, to decompress and / or generate other desired file formats by accelerated genomic data processing. Nevertheless, JIT or other dynamic translation analysis continues to be useful in the transmission application even if only one of the source node or the destination node utilizes hardware and / or quantum accelerated genomic data processing. For example, a data server that sends large amounts of genomic data may utilize hardware and / or quantum accelerated genomic data processing so as to generate the compressed underlying format for transmission to various destinations. In such instances, each destination may use slower software genomic data processing to generate other desired data formats. Hence, although the speed advantage of JIT analysis is lessened at the destination node, transmission time, and network utilization are still usefully reduced, and the source node is able to service many such transmissions efficiently due to its corresponding hardware and / or quantum accelerated genomic data processing apparatus.

[00604] Further, in another example, a data server that receives uploads of large amounts of genomic data, e.g., from various sources, may utilize hardware and / or quantum accelerated genomic data processing and / or storage, while the various source nodes may use slower software run on a CPU / GPU to generate the compressed underlying file format for transmission. Alternatively, hardware and / or quantum accelerated genomic data processing may be utilized by one or more intermediate network nodes, such as a gateway server, between the source and destination nodes, to transmit and / or receive genomic data in a compressed underlying file format, according to the JIT or other dynamic translation analysis methods, thus gaining the benefits of reduced transmission time and network utilization without overburdening the said intermediate network nodes with excessive software processing.

[00605] Hence, as can be seen with respect to FIG. 40A, in certain instances, the local computing resource 100 may include a compiler 130, such as a JIT compiler, and may further include a compressor unit 150 that is configured for compressing data, such as generated and / or acquired primary and / or secondary processed data (or tertiary data), which data may be compressed, such as prior to transfer over a local 10 and / or cloud 30 and / or hybrid cloud based 50 network, such as in a JIT analysis procedure, and which may be decompressed subsequent to transfer and / or prior to use.

[00606] As described above, in various instances, the system may include a first integrated and / or quantum circuit 100 such as for performing a mapping, aligning, sorting, 2024205108   25 Jul 2024 and / or variant calling operation, so as to generate one or more of mapped, aligned, sorted, deduplicated, and / or variant called results data. Additionally, the system may include a further integrated and / or quantum circuit 300 such as for employing the results data in the performance of one or more genomics and / or bioinformatics pipeline analyses, such as for tertiary processing. For instance, the result data generated by the first integrated and / or quantum circuit 100 may be used, e.g., by the first or a second integrated and / or quantum circuit 300, in the performance of a further genomics and / or bioinformatics pipeline processing procedure. Specifically, secondary processing of genomics data may be performed by a first hardware and / or quantum accelerated processor 100 so as to produce results data, and tertiary processing may be performed on that results data, such as where the further processing is performed by a CPU and / or GPU and / or QPU 300 that is operatively coupled to the first integrated circuit. In such an instance, the second circuit 300 may be configured for performing tertiary processing of the genomics variation data produced by the first circuit 100. Accordingly, the results data derived from the first integrated server acts as an analysis engine driving the further processing steps described herein with reference to tertiary processing, such as by the second integrated and / or quantum processing circuit 300.

[00607] However, the data generated in each of these primary and / or secondary and / or tertiary process steps may be immense, requiring very high resource and / or memory costs such as for storage, either locally 200 or remotely 400. For instance, in a first primary processing step, generated nucleic acid sequence data 110, such as in a BCL and / or FASTQ file format, may be received 120, such as from an NGS 110. Regardless of the file format of this sequence data, the data may be employed in a secondary processing protocol as described herein. The ability to receive and process primary sequence data directly from an NGS, such as in a BCL and / or FASTQ file format, is very useful. Particularly, instead of converting the sequence data file from the NGS, e.g., BCL, to a FASTQ file, the file may be directly received from the NGS, e.g., as a BCL file, and may be processed, such as by being received and converted by the JIT system, e.g., on the fly, into a FASTQ file that may then be processed, as described herein, such as to produce a mapped, aligned, sorted, deduped, and / or variant called results data that may then be compressed, such as into a SAM, BAM, and / or CRAM file, and / or may be subjected to further processing, such as by one or more of the disclosed genomics tertiary processing pipelines.

[00608] Accordingly, such data once produced needs to be stored in some manner. However, such storage is not only resource intensive, it is also costly. Specifically, in a 2024205108   25 Jul 2024 typical genomics protocol, the sequenced data once generated is stored as a large FASTQ file. Then, once processed such as by being subjected to a mapping and / or aligning protocol, a BAM file is created, which file is also typically stored, increasing the expense of genomic data storage, such as by having to store both a FASTQ and a BAM file. Further, once the BAM file is processed, such as by being subjected to variant calling protocol, a VCF file is produced, which VCF also typically needs to be stored. In such an instance, in order to adequately provide and make use of the generated genetic data, all three of the FASTQ, BAM, and VCF files may need to be stored, either locally 200 or remotely 400. Additionally, the original BCL file may also be stored. Such storage is inefficient as well as being memory resource intensive and expensive.

[00609] However, the computational power of the hardware and / or quantum processing architectures implemented herein, along with the JIT compilation, compression, and storage, greatly ameliorates these inefficiencies, resource costs, and expenses. For instance, in view of the methods implemented and the processing speeds achieved by the present accelerated integrated circuits, such as for the conversion of a BCL file to a FASTQ file, and then the conversion of a FASTQ file to a SAM or BAM file, and then the conversion of a BAM file to a CRAM and / or VCF file, and back again, the present system greatly reduces the number of computing resources and / or file sizes needed for the efficient processing and / or storage of such data. The benefits of these systems and methods are further enhanced by the fact that only one file format, e.g., a BCL, FASTQ, SAM, BAM, CRAM, and / or VCF, need be stored, from which all the other file formats may be derived and processed. Particularly, only one file format needs to be saved and from such file any of the other file formats may be generated rapidly, e.g., on the fly, in accordance with the methods disclosed herein, such as in a just in time, or JIT, compiling format.

[00610] For example, in accordance with typical prior methods, a large amount of computing resources, e.g., server farms and large memory banks, is needed for the processing and storage of FASTQ files being generated by a NGS sequencer. Particularly, in a typical instance, once the NGS produces the large FASTQ file, the server farm would then be employed to receive and convert the FASTQ file to a BAM and / or CRAM file, which processing may take up to a day or more. However, once produced, the BAM file itself must then be stored, requiring further time and resources. Likewise, the BAM or CRAM file may be processed in such a manner to generate a VCF, which may also take up another day or more, and which file will also need to be stored, thereby incurring further resource costs and 2024205108   25 Jul 2024 expenses. More particularly, in a typical instance, the FASTQ file for a human genome consumes about 90 GB of storage, per file. Likewise, a typical human genome BAM file may consume about 160 GB. The VCF file may also need to be stored, albeit such files are quite smaller than the FASTQ and / or BAM files. SAM and CRAM files may also be generated throughout the secondary processing procedures, and these too may need to be stored.

[00611] Prior to the technologies provided herein, it has been computationally intensive to go from one step to another, e.g., from one file format to another, and hence, all of the data for these file formats would typically have to be stored. This is in part due to the fact that if a user ever wanted to go back and regenerate one or more of the files, it would require a large amount of computing resources and time to re-do the processes involved to regenerate the various files thereby incurring a high monetary expense. Further, where these files are compressed before storage, such compression may take from about 2 to about 5 to about 10 or more hours, with about the same amount of time required for decompression, prior to reuse. Because of these high expenses, typical users would not compress such files prior to storage, and would also typically store all two, three or more file formats, e.g., BCL, FASTQ, BAM, VCF, incurring increased costs over increased time.

[00612] Accordingly, the JIT protocols employed herein make use of the accelerated processing speeds achieved by the present hardware and / or quantum accelerators, so as to realize enhanced efficiency, at reduced time and costs both for processing as well as for storage. Instead of storing 2, 3, or more copies of the same general data in different file formats, only one file format needs to be stored, and on the fly, any of the other file types can be regenerated, such as using the accelerated processing platforms discussed herein. Particularly, from storing a FASTQ file, the present devices and systems make it easy to go backwards to a BCL file, or forwards to a BAM file, and then further to a VCF, such as in under 30 minutes, such as within 20 minutes, or about within 15 or 10 minutes, or less.

[00613] Hence, using the pipelines and the speed of processing offered by the hardwired / quantum processing engines herein disclosed, only a single file format need be stored, while the other file formats may easily and rapidly be generated therefrom. So instead of needing to store all three file formats, a single file format need be stored from which any other file format may be regenerated such as on the fly, just in time for the further processing steps desired by the user. Consequently, the system may be configured for ease of use such that if a user simply interacts with a graphical user interface, such as presented at an associated display of the device, e.g., the user clicks on the FASTQ, BAM, VCF, etc. button 2024205108   25 Jul 2024 presented in the GUI, the desired file format may be presented, while in the background, one or more of the processing engines of the system may be performing the accelerated processing steps necessary for regenerating the requested file in the requested file format from the stored file.

[00614] Typically, one or more of a compressed version of a BCL, FASTQ, SAM, BAM, CRAM, and / or VCF file will be saved, along with a small metafile that includes all of the configurations of how the system was run to create the compressed and / or stored file. Such metafile data details how the particular file format, e.g., FASTQ and / or BAM file, was generated and / or what steps would be necessary for going backwards or forwards so as to generate any of the other file formats. This process is described in greater detail herein below. In a manner such as this the process can proceed forwards or be reversed going backwards using the configuration stored in the metafile. This can be about an 80% or more reduction in storage and economic cost if the computing function is bundled with the storage functions.

[00615] Accordingly, in view of the above and as can be seen with respect to FIG. 40A, a cloud based server system for data analytics and storage is provided. For instance, using a cloud accessible server system, as disclosed herein, a user may connect with a storage device, such as for the storage of input data. For example, a remote user may access the system so as to input genomics and / or bioinformatics data into the system, such as for storage and / or the processing thereof. Particularly, a remote user of the system, e.g., using local computing resource 100, may access the system 1 so as to upload genomic data, e.g., such as one or more sequenced genomes of one or more individuals. As described in detail below, the system may include a user interface, e.g., accessing a suitably configured API, which will allow a user to access the BioIT platform so as to upload data to be processed, control the parameters of the processing, and / or download output, e.g., results data, from the platform.

[00616] Specifically, the system may include an API, e.g., an S3 or “S3-like” object that allows access to one or more memories of the system, for the storage 400 and / or receipt of stored files. For instance, a cloud accessible API object may be present, such as where the API is configurable so as to store data files in the cloud 50, such as into one or more storage buckets 500, e.g., an S3 bucket. Accordingly, the system may be configured so as to allow a user to have access to remotely stored files, e.g., via an S3 or S3-like API, such as by accessing the API via a cloud based interface on a personal computing device. 2024205108   25 Jul 2024

[00617] Such an API therefore may be configured for allowing access to the cloud 50 to thereby connect the user with one or more of the cloud based servers 300 disclosed herein, such as to upload and / or download a given stored file, e.g., so as to make files accessible between the cloud server 300 and the local hard drive 100. This may be useful, for instance, to allow a remote user to provide, access data, and / or download data, on or from the server 300, and further to run one or more applications and / or calculations on that data, either locally 100 or on the server 300, and then to call the API to send the transformed data back to or from the cloud 50, e.g., for storage 200 and / or further processing. This is specifically useful for the retrieval, analyses, and storage of genomics data.

[00618] However, typical cloud based storage of data, e.g., “S3” storage, is expensive. This expense is increased when storing the large amounts of data associated with the fields of genomics and bioinformatics, where such costs often become prohibitive. Additionally, the time required to record, upload, and / or download the data for use, e.g., either locally 100 or remotely 300, and / or for storage 400 also makes such expensive cloud based storage solutions less attractive. The present solutions disclosed herein overcome these and other such needs.

[00619] Particularly, instead of going through a typical “S3” or other typical cloud based object API, presented herein, is an alternative S3-compatible API, which may be implemented so as to reduce the speed of transmission and / or the cost of storage of data. In such an instance, when a user wants to store a file, instead of going through a typical cloud based, e.g., S3, API, the alternative service API system, e.g., the proprietary S3 compatible API disclosed herein, will launch a compute instance, e.g., a CPU and / or FPGA instance of the system, which will function to compress the file, will generate a metadata index with respect to indicating what the data is and / or how the file was generated, etc., and will then store the compressed file via an S3 Compatible storage-like bucket 400. Accordingly, presented herein is a cloud-based 50 service that employs a compute instance 300, which may be launched by an alternative API, so as to compresses data before storage 400, and / or decompress data upon retrieval. In such an instance, what is stored, therefore, is not the actual file, but rather what is stored is a compressed version of the original file.

[00620] Specifically, in such instance, the initial file may be in a first format, which may be loaded into the system via the proprietary S3 compatible API, which receives the file, e.g., an F1 file, and may then perform a compute function on the file, and / or then compresses the file, such as via a suitably configured CPU / GPU / QPU / FPGA processing engine 300, 2024205108   25 Jul 2024 which then prepares the compressed file for storage, as a compressed, e.g., a compressed F1 file. However, when the compressed and stored file needs to be retrieved, it may then be decompressed, which decompressed file may then be returned to the user. The advantage of this accelerated compression and decompression system is that the storage 400 of the compressed file means an incredible savings in storage costs, which advantage is made possible by the computing and / or compressing functionalities achieved by the systems disclosed herein.

[00621] Hence, because of the rapid and efficient computing and / or compressing functionalities achieved by the present systems, the user need not even know that the file is being compressed before storage, and subsequently decompressed post storage and presented at the user’s interface. Particularly, the system functions so rapidly and efficiently that the user need not be aware of the multiplicity of compression, computation, and / or decompression steps that take place when storing and / or retrieving the requested data, to the user, this all appears seamless and timely. However, the fact that the present storage system will cost less and be more efficient than previous storage systems will be apparent.

[00622] Accordingly, in view of the above, object-based storage services are provided herein, wherein the storage services can be offered at lower costs, by combining a compute and / or compress instance along with a storage functionality. In such an instance, the typical storage costs can be substituted for computing costs, which are offered at a much lower level, because, as set forth herein, the computing costs may be implemented in an accelerated fashion such as by an FPGA and / or quantum computing platform 300, as described herein. Hence, the accelerated platforms disclosed herein can be configured as a rapid and efficient storage and retrieval system that allows for the rapid compressed storage of data that may be both compressed and stored as well as rapidly decompressed and retrieved at much lower costs and with greater efficiency and speed. This is particularly useful with respect to genomics data storage 400, and is compatible with the Just In Time processing functionalities disclosed herein, above. Therefore, in accordance with the devices, systems, and methods disclosed herein is an object storage service that may be provided, wherein the storage service implements a rapid compression functionality, such as genomics specific compression so as to store genomics processing results data.

[00623] More particularly, as can be seen with respect to FIG. 40A, in one exemplary implementation, the BioIT systems provided herein may be configured such that a pipeline server system 300, e.g., a portion thereof, receives the request at the API, e.g., S3 compatible 2024205108   25 Jul 2024 API, which is operably connected to a database 400 that is adapted for associating the initial (F1) file with the compressed version of the (CF1) file, e.g., based on the coupled metadata. Likewise, once the original CF1 files are decompressed and processed, the resulting results data (F2) files may then be compressed and stored as a CF2 file. Accordingly, when retrieval of the file is desired from the database 400, the server 300 has an API that has already associated the original file with the compressed file via appropriately configured metadata, hence, when retrieval is requested, a work flow management controller (WMS) of the system will launch the compute instance 300, which will launch the appropriate compute instance so as to perform any necessary computations and / or decompress the file for further processing, transmission, and / or presentation to the requesting user 100.

[00624] Hence, in various embodiments, an exemplary method may include one or more steps, in any logical order: 1) The request comes in through the API, e.g., S3 compatible API, 2) API communicates with the WMS, 3) the WMS populates the database and initiates the compute instance(s), 4) the compute instance(s) performs the requisite compression on the F1 file, and generates the characteristic metadata and / or other relevant file associations (X), e.g., to produce a CF1 X1 file, 4) thereby preparing the data for storage 400. This process may then be repeated for F2, F3, Fn files, e.g., other processed information, so that the WMS knows how the compressed file was generated, as well as where and how it was stored. It is to be noted that a unique feature of this system is that several different users 100 may be allowed to access the stored data 400 substantially simultaneously. For instance, the compression systems and methods disclosed herein are useful in conjunction with the BioT platforms disclosed herein, whereby at any time during the processing process the results data may be compressed and stored in accordance with the methods herein, and accessible to others, with the right permissions.

[00625] With respect to performing genomic analysis, a user 100 may access the system 300 herein, e.g., via a genomic analysis API such as an S3 or S3 compatible API, upload genomic data, such as in a BCL and / or FASTQ file or other file format, and thereby request the performance of one or genomics operations, such as a mapping, aligning, sorting, de-duplicating, variant calling, and / or other operations. The system 300 receives the request at a workflow manager API, the workflow manager system then assesses the incoming requests, indexes the jobs, forms a queue, allocates the resources, e.g., instance allocation, and generates the pipeline flow. Accordingly, when a request comes in and is preprocessed and queued, an instance allocator, e.g., API, will then spin up the various job specific 2024205108   25 Jul 2024 instances, described in greater detail herein below, in accordance with the work projects. Hence, once the jobs are indexed, queued, and / or stored in an appropriate database 400, the workflow manager will then pull the data from storage 400, e.g., S3 or S3 compatible storage, cycle up an appropriate instance, which retrieves the file, and runs the appropriate processes on the data to perform one or more of the requested jobs.

[00626] Additionally, where a plurality of jobs are requested to be performed on the data, requiring the performance of a plurality of instances, then once the first instance has performed its operations, the results data may be compressed and stored, such as in an appropriate memory instance, e.g., a first data base, such as an elastic or flexible storage device, so as to wait while the further pipeline instance(s) is spun up and retrieves the results data for further processing, such as in accordance with the systems and methods disclosed herein above. Further, as new requests come in and / or current jobs are being run, the workflow management system will constantly be updating the queue so as to allocate jobs to the appropriate instances, via an instance allocator API, so as to keep the data flowing through the system and the processes of the system running efficiently.

[00627] Likewise, the system 300 may constantly be taking the results data and storing the data 200 / 400, e.g., in a first or a second database, prior to further processing and / or transmission, such as transmission back to the original requestor 100 or a designated party. In certain instances, the results data may be compressed, as disclosed herein, prior to storage 400 and / or transmission. Further, as indicated above, the generated results data files when compressed may include appropriate meta data and / or other associated data, where in the results data may designated differently as it flows through the system, such as going from an F1 file to an F1C file to an F2 file, to an F2C, file, and so on, as the data is processed and moves through the platform pipeline e.g., as directed by a file associations API.

[00628] Accordingly, because of the proprietary dedicated APIs, as disclosed herein, the system may have a common backbone to which other services may be coupled and / or additional resources, e.g., instances, may be brought online so as to make sure all of the pipeline operations run smoothly and efficiently. Likewise, when desired the compressed and stored results data files may be called, whereby the workflow manager will spin up the appropriate compute and / or decompress database instance to decompress the results data for presentation to the requester. It is noted that in various instances, the specified compute and compress instance, as well as the specified compute and decompress instance, may be a single or multiple instances, and may be implemented as a CPU, FPGA, or a tightly coupled 2024205108   25 Jul 2024 CPU / FPGA, tightly coupled CPU / CPU, or tightly coupled FPGA / FPGA. In certain instances, one or more of these and the other instances disclosed herein may be implemented as a quantum processing unit.

[00629] Accordingly, in view of the disclosures herein, in one aspect, a device for performing one or more of a multiplicity of functions in performing genomics sequence analysis operations is provided. For instance, once the data has been received, e.g., by a remote user 100, and / or stored 400 within the cloud based system, the input data may be accessed by the WMS, and may be prepared for further processing, e.g., for secondary analysis, the results thereof may then be transmitted back to the local user 100, e.g., after being compressed, stored 400, and / or subjected to additional processing, e.g., tertiary processing by the system server 300.

[00630] In certain instances, the secondary processing steps disclosed herein, in particular implementations, may be performed by a local computing resource 100, and may be implemented by software and / or hardware, such as by being executed by a box-top computing resource 200, where the computing resource 200 includes a core of CPUs, such as from about 4 to about 14 to about 24 or more CPU cores, and may further include one or more FPGAs. The local box-top computing resource 100 may be configured to access a large storage block 200, such as 120 GBs of RAM memory, which access may be directly, such as by being directly coupled therewith, or indirectly, such as by being communicably coupled therewith over a local cloud based network 30.

[00631] Specifically, within a local system, data may be transmitted to or from the memory 200 via suitably configured SSD drives that are adapted for writing processing jobs data to, e.g., genomics jobs to be processed, and reading processed results data from the memory 200. In various embodiments, the local computing resource 100 may be communicably coupled to a sequencer 110 from where a BCL and / or FASTQ file may be obtained e.g., from the sequencer, and written to the SSD drivers, directly such as through a suitably configured interconnect. The local computing resource 100 may then perform one or more secondary processing operations on the data. For instance, in one embodiment, the local computing resource is a LINUX® server having 24 CPUs, which CPUs may be coupled to a suitably configurable FPGA that is adapted for performing one or more of the secondary processing operations disclosed herein. 2024205108   25 Jul 2024

[00632] Hence, in particular instances, the local computing device 100 may be a “work bench” computing solution having a BioIT chip set that is configured for performing one or more of secondary and / or tertiary processing on genetics data. For instance, as disclosed herein, the computing resource 100 may be associated with a PCIe card that is inserted into the computing device so as to thereby be associated with the one or more internal CPUs, GPUs, QPU cores and / or associated memories. Particularly, the components of the computing device 100 including the processing units, associated memories, and / or associated PCIe card(s), having one or more FPGA / ASIC chipsets therein, may be in communication with one another, all of which may be provided within a housing, such as in a box set manner that is typical within the art. More particularly, the box set may be configured for work-bench use, or in various instances, it may be configured and provided and / or usable within a remotely accessible server rack. In other embodiments, the CPU / FPGA / Memory chip sets and / or associated interconnect express card(s) can be associated within a Next Gen sequencing device so as to form one unit there with.

[00633] Accordingly, in one particular instance, a desktop box set may include a plurality of CPUs / GPUs / QPUs coupled to one or more FPGAs, such as 4 CPUs / GPUs, or 8, or 12, 16, 20, 22, or 24 CPUs, or more, which may be coupled to 1, or 2, or 3, or more FPGAs, such as within a single housing. Specifically, in one particular instance, a box set computing resource is provided wherein the computing resource includes 24 CPU cores, a reconfigurable FPGA, a database, e.g., 128x8 RAM, one or more SSDs, such as where the FPGA is adapted to be at least partially reconfigurable between operations, such as between performing mapping and aligning. Hence, in such an instance, BCL and / or FASTQ files generated by the sequencing apparatus 110 may be read into the CPU and / or transferred into the FPGA, for processing, and the results data thereof may be read back to the associated CPU via the SSD drives. Consequently, in this embodiment, the local computing system 100 may be configured to offload various high-compute functionalities to an associated FPGA, thereby enhancing speed, accuracy, and efficiency of bioinformatics processing. However, although a desktop box set solution 100 is useful, e.g., at a local facility, it may not be suitable for being accessed by a plurality of users that may be located remotely from the box set.

[00634] Particularly, in various instances, a cloud-based server solution 50 may be provided, such as where the server 300 may be accessible remotely. Accordingly, in particular instances, one or more of the integrated circuits (CPU, FPGA, QPU) disclosed 2024205108   25 Jul 2024 herein may be provided and configured for being accessed via a cloud 50 based interface. Hence, in particular instances, a work bench box set computing resource, as described above, may be provided where the box set configuration is adapted so as to be portable to the cloud and accessible remotely. However, such a configuration may not be sufficient for handling a large of amount of traffic from remote users. Accordingly, in other cases, one or more of the integrated circuits disclosed herein may be configured as a server based solution 300 configurable as part of a server rack, such as where the server accessible system is configured specifically for being accessed remotely, such as via the cloud 50.

[00635] For instance, in one embodiment, a computing resource, or local server 100, having one or more, e.g., a multiplicity, of CPU and / or GPU and / or QPU cores, and associated memories, may be provided in conjunction with one or more of the FPGAs / ASICs disclosed herein. Particularly, as indicated above, in one implementation, a desktop box set may be provided, wherein the box set includes an 18 to 20 to 24 or more CPU / GPU core box set having SSDs, 128 x 8 RAM, and one or more BioIT FPGA / ASIC circuits, and further includes a suitably configured communications module having transmitters, receivers, antennae, as well as WIFI, Bluetooth, and / or cellular communications capabilities that are adapted in a manner so as to allow the box set to be accessible remotely. In this implementation, such as where a single FPGA is provided, the FPGA(s) may be adapted for being reconfigured, such as partially reconfigured, between one or more of the various steps of the genomics analysis pipeline.

[00636] However, in other instances, a server system is provided and may include up to about 20 to 24 to 30 to 34 to 36 or more CPU / GPU cores and about 972 GB of RAM, or more, which may be associated with one or more, such as about two or four or about six or about eight or more FPGAs, which FPGAs may be configurable as herein described. For instance, in one implementation, the one or more FPGAs may be adapted for being reconfigured, such as partially reconfigured, between one or more of the various steps of the genomics analysis pipeline. However, in various other implementations, a set of dedicated FPGAs may be provided, such as where each FPGA is dedicated for performing a specific BioIT operation, such as mapping, aligning, variant calling, etc., thereby obviating the reconfiguration step.

[00637] Accordingly, in various instances, one or more FPGAs may be provided, such as where the FPGA(s) are adapted so as to be reconfigurable between various pipeline operations. However, in other instances, one or more of the FPGAs may be configured so as 2024205108   25 Jul 2024 to be dedicated to performing one or more functions without the need to be partially or fully configured. For instance, the FPGAs provided herein may be configured so as to be dedicated to performing one or more computationally intensive operations in the BioIT pipeline, such as where one FPGA is provided and dedicated to performing a mapping operation, and another FPGA is provided and configured for performing an alignment operation, although, in some instances, a single FPGA may be provided and configured for being at least partially reconfigured between performing both a mapping and an alignment operation.

[00638] Additionally, other operations in the pipeline that may also be performed by reconfigurable or dedicated FPGAs may include performing a BCL conversion / transposition operation, a Smith-Waterman operation, an HMM operation, a local realignment operation, and / or various other variant calling operations. Likewise, various of the pipeline operations may be configured for being performed by one or more of the associated CPUs / GPUs / QPUs of the system. Such operations may be one or more less computationally intensive operations of the pipeline, such as for preforming a sorting, deduplication, and other variant calling operations. Hence, the overarching system may be configured for performing a combination of operations part by CPU / GPU / QPU, and part by hardware, such as by an FPGA / ASIC of the system.

[00639] Accordingly, as can be seen with respect to FIG. 40B, in various implementations of the cloud based system 50, the system may include a plurality of computing resources, including a plurality of instances, and / or levels of instances, such as where the instances and / or layers of instances are configured for performing one or more of the BioIT pipeline of operations discloed herein. For instance, various CPU / GPU / QPU and / or hardwired integrated circuit instances may be provided for performing dedicated functions of the genomic pipeline analysis provided herein. For example, various FPGA instances may be provided for performing dedicated genomic analysis operations, such as an FPGA instance for performing mapping, another for performing aligning, another for performing local realignment and / or other Smith-Waterman operations, another for performing HMM operations, and the like.

[00640] Likewise, various CPU / GPU / QPU instances may be provided for performing dedicated genomic analysis operations, such as CPU / GPU / QPU instance for performing signal processing, sorting, de-duplication, compression, various variant calling operations, and the like. In such instances, an associated memory or memories may be provided, such as between the various computation steps of the pipeline, for receiving results data as it is 2024205108   25 Jul 2024 computed, compiled, and processed throughout the system, such as between the various CPU and / or FPGA instances and / or layers thereof. Further, it is to be noted that the size of the various CPU and / or FPGA instances may vary dependent on the computational needs of the cloud based system, and may range from small to medium to large to very large, and the number of CPU / GPU / QPU and FPGA / ASIC instances may vary likewise.

[00641] Additionally, as can be seen with respect to FIG. 40B, the system may further include a workflow manager that is configured for scheduling and directing the movement of data throughout the system and from one instance to another and / or from one memory to another. In some cases, the memory may be a plurality of memories that are dedicated memories that are instance specific, and in other cases the memory may be one or more memories that are configured to be elestic and therefore capable of being switched from one instance to another, such as a switchable elastic block storage memory. In yet other instances, the memory may be instance non-specific and therefore capable of being communicably coupled to a plurality of instances, such as for elastic file storage.

[00642] Further, the workflow manager may be a dedicated instance itslef such as a CPU / GPU / QPU core that is dedicated and / or configured for determining what jobs need to be performed, and when and what resources will be utilized in the performance of those jobs, as well as for queuing up the jobs and directing them from resource to resource, e.g., instance to instance. The workflow manager may include or may otherwise be configured as a load estimator and / or form an elastic control node that is a dedicated instance that may be run by a processor, e.g. a CPU / GPU / QPU core. In various instances, the workflow manager may have a database connected to it, which may be configured for managing all the jobs that need to be, are being, or have been processed. Hence, the WMS manager may be configured for detecting and managing how data flows throughout the system, determining how to allocate system resources, and when to bring more resources online.

[00643] As indicated above, in certain instances, both a work bench and / or server based solution may be provided where the computing device includes a plurality of X CPU core servers having a size Y that may be configured to feed into one or more FPGAs with a size of Z, where X, Y, and Z are numbers that may vary depending on the processing needs of the system, but should be selected and / or otherwise configured for being optimized, e.g., 10, 14, 18, 20, 24, 30, etc. For instance, typical system configurations are optimized for performing the BioIT operations of the system herein described. Specifically, certain system configurations have been optimized so as to maximize the flow of data from various 2024205108   25 Jul 2024 CPU / GPU / QPU instances to various integrated circuits, such as FPGAs, of the system, where the size of the CPU and / or FPGA may vary in relation to one another based on the processing needs of the system. For example, one or more of the CPU and / or FPGA may have a size that is relatively small, medium, large, extra-large, or extra-extra-large. More specifically, the system architecture may be configured in such a manner that the CPU / FPGA hardware are sized and configured to run in an optimally efficient manner so as to keep both instance platforms busy during all run times, such as where the CPUs outnumber the FPGA(s) 4 to 1, 8 to 1, 16 to 1, 32 to 1, 64 to 2, etc.

[00644] Hence, although it is generally good to have large FPGA capabilities, however, it may not be efficient to have a high capacity FPGA to process data, if there is not enough data needing to be processed being fed into the system. In such an instance, only a single or a partial FPGA may be implemented. Particularly, in an ideal arrangement, the workflow management system directs the flow of data to identified CPUs and / or FPGAs that are configured in such a manner as to keep the system and its components computing full time. For instance, in one exemplary configuration, one or more, e.g., 2, 3, or 4 or more CPU / GPU / QPU cores may be configured to feed data into a small, medium, large, extra-large FPGA, or a portion thereof. Specifically, in one embodiment, a CPU specific instance may be provided, such as for performing one or more of the BioIT processing operations disclosed herein, such as where the CPU instance is cloud accessible and includes up to 4, 8, 16, 24, 30, 36 CPU cores, which cores may or may not be configured for being operably coupled to a portion of one or more FPGAs.

[00645] For example, a cloud accessible server rack 300 may be provided wherein the server includes a CPU core instance having about 4 CPU cores to about 16 to about 24 CPU cores that are operably connectable to an FPGA instance. For instance, an FPGA instance may be provided, such as where an average size of an FPGA is X, and the included FPGA may be of a size of about 1 / 8X, X, 2.5X up to 8X, or even about 16X, or more. In various instances, additional CPU / GPU / QPU cores and / or FPGAs may be included, and / or provided as a combined instance, such as where there is a large amount of data to process, and where the number of CPU cores is selected so as to keep the FPGA(s) full time busy. Hence, the ratio of the CPUs to FPGA(s) may be proportioned by being combined in a manner to optimize data flow, and thus, the system may be configured so as to be elastically scaled up or down as needs be, e.g., to minimize expense while optimizing utilization based on workflow. 2024205108   25 Jul 2024

[00646] However, where the CPU(s) do not generate enough work to keep the FPGA busy and / or fully utilized, the configuration will be less than ideal. Provided herein, therefore, is a flexible architecture of one or more instances, which may be directly coupled together, or capable of being coupled together, in a manner that is adapted such that the CPU / FPGA software / hardware are run efficiently so as to ensure the present CPUs / GPUs / QPUs optimally feed the available FPGA(s), and / or a portion thereof, in such a manner to keep both instance platforms busy during all run times. Pursuantly, allowing such a system to be accessible from the cloud will ensure a plurality of data being provided to the system so as to be queued up by the workflow manager and directed to the specific CPU / FPGA resources that are configured and capable of receiving and processing the data in an optimally efficient manner.

[00647] For instance, in some configurations, cloud accessible instances may include a plurality of numbers and sizes of CPUs / GPUs / QPUs, and additionally, there may be cloud accessible instances that include a plurality of numbers and sizes of FPGAs (or ASICs) and / or QPUs. There may even be instances that have a combination of these instances. However, in various iterations, the provided CPU / GPU / QPU and / or FPGA / QPU and / or mixed instances, may have too many of one instance and / or to less of the other instance for efficiently running the present BioIT pipeline processing platforms disclosed herein. Accordingly, herein presented, are systems and architectures, flexible combinations of the same, and / or methods for implementing them for the efficient formation and use of a bioinformatics and / or genomics processing platform of pipelines, such as is made accessible via the cloud 50.

[00648] In such systems, the number and configurations of the selected CPU(s) / GPUs / QPUs may be selected and configured to process the less computationally intensive operations, and the number and configurations of FPGA(s) and / or QPUs may be adapted for handling the computationally intensive tasks, such as where the data is seamlessly passed back and forth between the CPU / GPU / QPU and FPGA / QPU instances. Additionally, one or more memories may be provided for the storing of data, e.g., results data, between the various steps of the procedures and / or between the various different instance types, thereby avoiding substantial period of instance latency. Specifically, during mapping and aligning, very little of the CPU / GPU is utilized, because of the intensive nature of the computations, these tasks are configured for being performed by the hardware implementations. Likewise, during variant calling, the tasks may be split in such a way as to be roughly fairly distributed between the CPU / FPGA instances in their tasks, such as where Smith-Waterman and HMM 2024205108   25 Jul 2024 operations may be performed by the hardware, and various other operations may be performed by software run on one or more CPU / GPU / QPU instances.

[00649] Accordingly, the architectural parameters set forth herein are not necessarily limited to one-set architecture, but rather the system is configured so as to have more flexibility for organizing its implementations, and relying on the workflow manager to determine what instances are active when, how, and for how long, and directing which computations are performed on which instances. For instance, the number of CPUs and / or FPGAs to be brought online, and operationally coupled together, should be selected and configured in such a manner that the activated CPUs and FPGAs, as well as their attendant software / hardware, are kept optimally busy. Particularly, the number of CPUs, and their functioning, should be configured so as to keep the number of FPGAs, or a portion thereof, full time busy, such that the CPUs are optimally and efficiently feeding the FPGA(s) so as to keep both instances and their component parts running proficiently.

[00650] Hence, in this manner, the work flow management controller of the system may be configured for accessing the workflow and organizing and dividing it in such a manner that the tasks that may be more optimally performed by the CPUs / GPUs / QPUs are directed to the number of CPUs necessary so as to optimally perform those operations, and that the tasks that may be more optimally performed by the FPGA(s) / ASICs / QPUs are directed to the number of FPGAs necessary so as to optimally perform those operations. An elastic and / or an efficient memory may further be included for efficiently transmitting the results data of these operations from one instance to another. In this manner, a combination of machines and memories may be configured and combined so as to be optimally scaled based on the extent of the work to be performed, and the optimal configuration and usage of the instances so as to best perform that work efficiently and more cost effectively.

[00651] Specifically, the cloud based architectures set forth herein shows that various known deficiencies in previous architectural offerings may cause inefficiencies that can be overcome by flexibly allowing more CPU / GPU / QPU core instances to access various different hardware instances, e.g., of FPGAs, or portions thereof, that have been organized in a more intentional manner so to be able to dedicate the right instance to performing the appropriate functions so as to be optimized by being implemented in that format. For instance, the system may be configured such that there is a greater proportion of available CPU / GPU instances that may be accessible remotely so as to be full time busy producing results data that can be optimally fed into the available FPGA / QPU instance(s) so as to keep 2024205108   25 Jul 2024 the selected FPGA instance(s) full time busy. Therefore, it is desirable to provide a structured architecture that is as efficient as possible and is full time busy. It is to be noted that configurations where too few CPUs feed into too many FPGAs such that one or more of the FPGAs are being underutilized is not efficient and should be avoided.

[00652] In one implementation, as can be seen with respect to FIG. 40B, the architecture can be configured so as to virtually include several different layers or levels, such as a first level having a first number of X CPU cores, e.g., from 4 to about 30 CPU cores, and a second level having from 1 to 12 or more FPGA instances, where the size of the FPGAs may range from small to medium to large, etc. A third level of CPU cores and / or a fourth level of further FPGAs, and so on, may also be included. Hence, there are many available instances in the cloud based server 300, such as instances that simply include CPUs or GPUs and / or instances that include FPGAs and / or combinations of them, such as in one or more levels described herein. Accordingly, in a manner such as this, the architecture may be flexibly or elastically organized so that the most intensive, specific computing functions are performed by the hardware instances or QPUs, and those functions that can be run through the CPUs, are directed to the appropriate CPU / GPU at the appropriate level for general processing purposes, and where necessary the number of CPU / FPGA instances may be increased or decreased within the system as needs be.

[00653] For example, the architecture can be elastically sized to both minimize system expense while at the same time maximizing optimal utilization. Specifically, the architecture may be configured to maximize efficiency and reduce latency by combining the various instances on various different virtual levels. Particularly, a plurality, e.g., a significant and / or all, of the Level 1 CPU / GPU instances can be configured to feed into the various Level 2 FPGA instances that have been specifically configured to perform specific functions, such as a mapping FPGA and an aligning FPGA. In a further level, one or more additional (or the same as Level I) CPUs may be provided, such as for performing a sorting and / or deduplicating operations and / or various variant calling operations. Further still, one or more additional layers of FPGAs may be configured for performing a Needleman-Wunsch, SmithWaterman, an HMM, variant calling operation, and the like. Hence, the first level CPUs can be engaged to form an initial level of a genomics analysis, such as for performing general processing steps, including the queuing up and preparing of data for further pipeline analysis, which data once processed by one or a multiplicity of CPUs, can be fed into one or more 2024205108   25 Jul 2024 further levels of dedicated FPGA instances, such as where the FPGA instance is configured for performing intensive computing functions.

[00654] In this manner, in a particular implementation, the CPU / GPU instances in the pipeline route their data, once prepared, to the one or two mapping and aligning Level 2 FPGA instances. Once the mapping has been performed the result data may be stored in a memory and / or then fed into an aligning instance, where aligning may be performed, e.g., by at least one dedicated Level 2 FPGA instance. Likewise, the processed mapped and aligned data may then be stored in a memory and / or directed to a Level 3 CPU instance for further processing, which may be the same Level 1 or a different instance, such as for performing a less processing intense genomics analysis function, such as for performing a sorting function. Additionally, once the Level 3 CPUs have performed their processing, the resultant data may then be forwarded either back up to other Level 2 instances of the FPGAs, or to a Level 4 FPGA instance, such as for further genomics processing intense functions, such as for performing a Needleman-Wunsch (NW), Smith-Waterman (SW) processing function, e.g., at a NW or SW dedicated FPGA instance. Likewise, once the SW analysis has been performed, such as by an SW dedicated FPGA, then the processed data may be sent to one or more associated memories and / or further down the processing pipeline, such as to another, e.g., Level 4 or 5, or back up to Level 1 or 3, CPU and / or FPGA instance, such as for performing HMM and / or Variant Calling analysis, such as in a dedicated FPGA and / or further layer of CPU processing core.

[00655] In a manner such as this latency and efficiency issues can be overcome by combining the various different instances, on one or more different levels, so as to provide a pipeline platform for genomics processing. Such a configuration may involve more than a scaling and / or combining instances, the instances may be configured so that they specialize in performing dedicated functions. In such an instance, the Mapping FPGA instance only performs mapping, and likewise the aligning FPGA instance only performs aligning, and so on, rather than a single instance performing end-to-end processing of the pipeline. Albeit, in other configurations, one or more of the FPGAs may be at least partially reconfigured, such as between performing pipeline tasks. For instance, in certain embodiments, as the genomics analyses to be performed herein is a multi-step process, the code of on FPGA may be configured so as to be changed halfway through processing process, such as when the FPGA completes the mapping operation, it may be reconfigured so as to perform one or more of aligning, variant calling, Smith-Waterman, HMM, and the like. 2024205108   25 Jul 2024

[00656] Hence, the pipeline manager, e.g., workflow management system, may function to manage the queue of genomic processing requests being formulated by the Level I CPU instances so as to be broken down into discrete jobs, aggregated, and be routed to the appropriate job specific CPU and then to the job specific FPGA instances for further processing, such as for mapping and / or aligning, e.g., at Level 2, which mapped and aligned data once processed can be sent backwards or forwards to the next level of CPU / FPGA processing of the results data, such as for the performance of various steps in the variant calling module.

[00657] For instance, the variant calling function may be divided into a plurality of operations, which can be performed in software, then forwarded to Smith-Waterman and / or HMM processing in one or more FPGA hardware instances, and then may be sent to a CPU for continued variant calling operations, such as where the entire platform is elastically and / or efficiently sized and implemented to minimize cost of the expensive FPGA instances, while maximizing utilization, minimizing latency, and therefore optimizing operations. Accordingly, in this manner, less hardware instances are needed because of their pure processing capabilities and hardwired specificity, and therefore, the number of FPGAs to the number of CPUs may be minimized, and their use, e.g., of the FPGAs, may be maximized, and therefore, the system optimized so as to keep all instances full time busy. Such a configuration is optimally designed for genomics processing analysis, especially for mapping, aligning, and variant calling.

[00658] An additional structural element that may be included, e.g., as an attachment, to the pipeline architecture, disclosed herein, is one or more elastic and / or efficient memory modules, which may be configured to function for providing block storage of the data, e.g., results data, as it is transitioned throughout the pipeline. Accordingly, one or more Elastic Block Data Storage (EBDS) and / or one or more efficient (flexible) block data storage modules may be inserted between one or more of the processing levels, e.g., between the different instances and / or instance levels. In such an instance, the storage device may be configured such that as data gets processed and results obtained, the processed results may be directed to the storage device for storage prior to being routed to the next level of processing, such as by a dedicated FPGA processing module. The same storage device may be employed between all instances, or instance levels, or a multiplicity of storage devices may be employed between the various instances and / or instance levels, such as for storing and / or compiling and / or for queuing of results data. Accordingly, one or more memories may be 2024205108   25 Jul 2024 provided in such a manner that the various instances of the system may be coupled to and / or have access to the same memory so as to be able to see and access the same or similar files. Hence, one or more elastic memories (memories capable of being coupled to a plurality of instances sequentially) and / or efficient memories (memories capable of being coupled to a plurality of instances simultaneously) may be present whereby the various instances of the system are configured to read and write to the same or similar memory.

[00659] For instance, in one exemplary embodiment with respect to configurations employing such elastic memories, prior to sending data directly from one instance and / or one level of processing to another, the data may be routed to an EBDS, or other memory device or structure, e.g., an efficient memory block, for storage and thereafter routed to the appropriate hardwired-processing module. Specifically, a block storage module may be attached to a node for memory storage where data can be written to the BSD for storage at one level, and the BSD may be flipped to another node for routing the stored data to the next processing level. In this manner, one or more, e.g., multiple, BDS modules may be included in the pipeline and configured for being flipped from one node to another so as to participate in the transitioning of data throughout the pipeline.

[00660] Further, as indicated above, a more flexible File Storage Device may be employed, such as a device that is capable of being coupled to one or more instances concurrently, such as without having to be switched from one to the other. In a manner such as this, the system may be elastically scaled at each level of the system, such as where at each level there may be a different number of nodes for processing the data at that level, and once processed the results data can be written to one or more associated EBDS devices that may then be switched to the next level of the system so as to make the stored data available to the next level of processors for the performance of their specific tasks at that level.

[00661] Accordingly, there are many steps in the processing pipeline, e.g., at its attendant nodes, as data is prepared for processing, e.g., preprocessing, which data once it is prepared is directed to an appropriate processing instance at one level where results data may be generated, then the result data may be stored, e.g., within an EDS device, queued and prepared for the next stage of processing by being flipped to the next node of instances and routed to the next instance for processing by the next order of FPGA and / or CPU processing instances, where further results data may be generated, and again once generated the results data may be directed either back to the same or forward to the next level of EDS for storage prior to being advanced to the next stage of processing. 2024205108   25 Jul 2024

[00662] Particularly, in one specific implementation, flow through the pipeline may look like the following: CPU (e.g., a 4 CPU core, or C4 instance): data prepared (queued and / or stored); FPGA (e.g. a 2XL FPGA - 1 / 8 of a full server, or an F1 instance): Mapping, temporary storage; FPGA (e.g. a 2XL FPGA - 1 / 8 of a full server, or an F1 instance): aligning, temporary storage; CPU: sorting, temporary storage; CPU: de-duplication, temporary storage; CPU: variant calling 1, temporary storage; FPGA (e.g., an F1 or a 16XL, or F2 instance): Smith-Waterman, temporary storage; FPGA (e.g. F1 or F2 instance): HMM, temporary storage; CPU: variant calling 2, temporary storage; CPU: VCGF, temporary storage, and so on. Additionally, a work flow management system may be included to control and / or direct the flow of data through the system, such as where the WMS may be implemented in a CPU core, such as a 4 core CPU, or C4 instance. It is noted, one or more of these steps may be performed in any logical order and may be implemented by any suitably configured resource such as implemented in software and / or hardware, in various different combinations. And it is to be noted that any of these operations may be performed on one or more CPU instances and one or more FPGA instances on one or more theoretical levels of processing, such as to form the BioIT processing described herein.

[00663] As indicated, a work flow manager may be included, such as where the WMS is implemented in one or more CPU cores. Hence, in various instances, the WMS may have a database operationally coupled to it. In such an instance, the database includes the various operations or jobs to be queued, pending jobs, as well as the history of all jobs previously or currently to be performed. As such, the WMS monitors the system and database to identify any new jobs to be performed. Consequently, when a pending job is identified, the WMS initiates a new analysis protocol on the data and farms it out to the appropriate instance node(s). Accordingly, the workflow manager keeps track of and knows where all the input files are, either stored, being processed, or to be stored, and therefore, directs and instructs the instances of the various processing nodes to access respective files at a given location, to begin reading files, to begin implementing processing instructions, and where to write results data. And, hence, the WMS directs the systems as to the passing results data to down line processing nodes. The WMS also determines when new instance needs to be fired up and brought online so as to allow for the dynamic scaling of each step or level of processing. Hence, the WMS identifies, organizes, and directs discrete jobs that have to be performed at each level, and further directs the results data being written to the memory to be stored, and 2024205108   25 Jul 2024 once one job is completed, another node fires up, reads the next job, and performs the next iterative operation.

[00664] In a manner such as this, the input jobs may be spread across a lot of different instances, which instances can be scaled, e.g., independently or collectively, by including less or more and more instances. These instances may be employed to build nodes so as to more efficiently balance the use of resources, where such instances may comprise a partial or full instance. The workflow manager may also direct and / or control the use of one or more memories, such as in between the processing steps disclosed herein. The various instances may also include complimentary programing so as to allow them to communicate with each other and / or the various memories, so as to virtualize the server. The WMS may also include a load estimator so as to elastically control the usage of the nodes.

[00665] Further, with respect to the use of memories, one or more EBDS, or other suitably configured data and / or file storage devices, may be attached to one or more of the various nodes, e.g., between the various levels of instances, such as for temporary storage between the various different processing steps. Hence, the storage device may be a single storage device configured for being coupled to all of the various instances, e.g., an efficient memory block, such as elastic file storage, or may be multiple storage devices, such as one storage device per instance or instance type that is switchable between instances, e.g., elastic block storage device. Accordingly, in a manner such as this, each level of processing instances and / or memory may be elastically scaled on an as needed basis, such as between each of the different nodes or levels of nodes, such as for processing one or several genomes.

[00666] In view of the architecture herein, one or a multiplicity of genomes may be introduced into the system for processing, such as from one or more lanes of a flow cell of a Next Gen Sequencer, as indicated in FIG. 1. Specifically, providing a cloud based server system 300, as herein described, will allow a multiplicity of jobs to be piled up and / or queued for processing, which jobs may be processed by the various different instances of the system simultaneously or sequentially. Hence, the pipeline may be configured to support a multiplicity of jobs being processed by a virtual matrix of processors that are coupled to suitably configured memory devices so as to facilitate the efficient processing and data from one instance to another. Further, as indicated, a single memory device may be provided, where the memory device is configured for being coupled to a plurality of different instance, e.g., at the same time. In other instances, the memory device may be an elastic type memory device that may be configured for being coupled to a first instance, e.g., at a single time, and 2024205108   25 Jul 2024 then being reconfigured and / or otherwise decoupled from the first instance, and switched to a second instance.

[00667] As such, in one implementation, one or more elastic block storage devices may be included and the system may be configured so as to include a switching control mechanism. For instance, a switch controller may be included and configured so as to control the functioning of such memory devices as they switch from one instance to another. This configuration may be arranged so as to allow the transfer of data through the pipeline of dedicated processors, thereby increasing the efficiency of the system, e.g., among all of the instances, such as by flowing the data through the system, allowing each level to be scaled independently and to bring processors online as needed to efficiently scale.

[00668] Additionally, the workflow management system algorithm may be configured so as to determine the number of jobs, the number of resources to process those jobs, the order of processing, and directs the flow of the data from one node to another by the flipping or switching of one or more flexible switching devices, and where needed can bring additional resources online to handle an increase in workflow. It is to be noted that this configuration may be adapted so as to avoid the copying of data from one instance to the next to the next, which is inefficient and takes up too much time. Rather, by flipping the elastic storage from one set of instances to another, e.g., pulling it from one node and attaching to a second node, can greatly enhance the efficiency of the system. Further, in various instances, instead of employing EBSD, one or more elastic file storage devices, e.g., single memory devices capable of being coupled to a multiplicity of instances without needing to be flipped from one to another, may be employed, so as to further enhance the transmission of data between instances, making the system even more efficiency. Additionally, it is to be noted, as indicated earlier herein, in another configuration the CPUs of the architecture can be directly to one another. Likewise, the various FPGAs may be directly coupled together. And, as indicated above, the CPUs can be directly coupled to the FPGAs, such as where such coupling is via a tight coupling interface as described above.

[00669] Accordingly, with respect to user storage and accessing of the generated results data, from a system wide perspective, all of the generated results data need not be stored. For instance, the generated results data will typically be in a particular file format, e.g., a BCL, FASTQ, SAM, BAM, CRAM, VCF file. However, each one of these files is extensive and the storage of all of them would consume a lot of memory thereby incurring a lot of expense. Nevertheless, an advantage of the present devices, systems, and methods 2024205108   25 Jul 2024 herein, all of these files need not be stored. Rather, given the rapid processing speeds and / or the rapid compression and decompression rates achievable by the components and methods of the system, only a single file format, e.g., a compressed file format, need be stored, such as in the cloud based database 400. Specifically, only a single data file format need be stored, from which file format, implementing the devices and methods of the system, all other file formats may be derived. And, because of the rapid compression and decompression rates achieved by the system, it is typically a compressed file, e.g., a CRAM file.

[00670] Particularly, as can be seen with respect to FIG. 40A, in one implementation, a user of a local computing resource 100 may upload data, such as genomics data, e.g., a BCL and / or FASTQ file, into the system via the cloud 50 for receipt by the cloud based computing resource, e.g., server 300. The server 300 will then either temporarily store the data 400, or will begin processing the data in accordance with the jobs request by the user 100. When processing the input data, the computing resource 300 will thereby generate results data, such as in a SAM or BAM and / or VCF file. The system may then store one or more of these files, or it may compress one or more of these files and store those. However, in order to lower cost and more efficiently make use of the resources, the system may store a singe, e.g., compressed, file, from which file all other file formats may be generated, such as by using the devices and methods herein disclosed. Accordingly, the system is configured for generating data files, e.g., results data, which may be stored on a server 300 associated database 400 that is accessible via the cloud 50, in a manner that is cost effective.

[00671] Accordingly, using a local computing resource 100, a user of the system may log on and access the cloud 50 based server 300, may upload data to the server 300 or database 400, and may request one or more jobs be performed on that data. The system 300 will then perform the requested jobs and store the results data in database 400. As noted, in particular instances, the system 300 will store the generated results data in a single file format, such as a CRAM file. Further, with the click of a button, the user can access the stored file, and with another click of a button, all of the other file formats may then be made accessible. For instance, in accordance with the methods disclosed herein, given the systems rapid processing capabilities, which would then be processed and generated behind the scene, e.g., on the fly, thus cutting down on both processing time and burden as well as storage costs, such as where the computing and the storage functions are bundled together.

[00672] Particularly, there are two parts of this efficient and rapid storage process that are enabled by the speed of performing the accelerated operations herein disclosed. More 2024205108   25 Jul 2024 particularly, because the various processing operations of mapping, aligning, sorting, deduplicating, and / or variant calling, may be implemented in a hardwired and / or quantum processing configuration, the production of results data, in one or more file formats, may be achieved rapidly. Additionally, because of the close coupling architectures disclosed herein, a seamless compression and storing of the results data, e.g., in a FASTQ, SAM, BAM, CRAM, VCF file format, is further achieved.

[00673] Further still, because of the accelerated processing provided by the devices of the system, and because of their seamless integration with the associated storage devices, the data that results from the processing operations of the system, which data is to be stored, may be both efficiently compressed prior to storage and decompressed subsequent to storage. Such efficiencies thereby lower storage costs and / or the penalties related to decompression of files before use. Accordingly, because of these advantages, the system may be configured so as to enable seamless compression and storing of only a single file type, with on-the-fly regeneration of any of the other file types, as needed or requested by the user. For instance, a BAM file, or a compressed SAM or CRAM file associated therewith, may be be stored, and from that file the others may be generated, e.g., in a forward or a reverse direction, such as to reproduce a VCF or FASTQ or BCL file, respectively.

[00674] For instance, in one embodiment, a FASTQ file may originally be input into the system, or otherwise generated, and stored. In such an instance, when going in the forward direction, a checksum of the file may be taken. Likewise, once result data is produced, when going backward, another checksum may be generated. These checksums may then be used to ensure that any further file formats to be generated and / or recreated by the system, in the forward or reverse direction, match identically to one another and / or their compressed file formats. In a manner such as this it may be ensured that all of the necessary data is stored, in as efficient as manner as possible, and the WMS knows exactly where the data is stored, in what file format it is stored in, what the original file format was in, and from this data the system can regenerate any file format in an identical manner going forwards or backwards between file formats (once the template is originally generated).

[00675] Hence, the speed advantage of the “just in time” compiling is enabled in part by the hardware and / or quantum implemented generation of the relevant files, such as in generating a BAM file from a previously generated FASTQ file. Particularly, compressed BAM files, including SAM and CRAM files, are not typically stored within a database because of the increased time it takes prior to processing to decompress the compressed 2024205108   25 Jul 2024 stored file. However, the JIT system allows this to be done without substantial penalties. More particularly, implementing the devices and processes disclosed herein, not only can generated sequence data be compressed and decompressed rapidly, e.g., almost instantaneously, it may also be stored efficiently. Additionally, from the stored file, in whatever file format it is stored, any of the other file formats may be regenerated in mere moments.

[00676] Hence, as can be seen with reference to FIG. 40C, when the accelerated hardware and / or quantum processing performs various secondary processing procedures, such as mapping and aligning, sorting, de-duplicating, and variant calling, a further step of compression may also be performed, such as in an all in one process, prior to storage in the compressed form. Then when the user desires to analyze or otherwise use the compressed data, the file may be retrieved, decompressed, and / or converted from one file format to another, and / or be analyzed, such as by the JIT engine(s) being loaded into the hardwired processor, or configured within the quantum processor, and subjecting the compressed file to one or more procedures of the JIT pipeline.

[00677] Accordingly, in various instances, where the system includes an associated FPGA, the FPGA can be fully or partially reconfigured, and / or a quantum processing engine may be organized, so as to perform a JIT procedure. Particularly, the JIT module can be loaded into the system and / or configured as one or more engines, which engines may include one or more compression engines 150 that are configured for working in the background. Hence, when a given file format is called, the JIT-like system may perform the necessary operations on the requested data so as to produce a file in the requested format. These operations may include compression and / or decompression as well as conversion so as to derive the requested data in the identified file format.

[00678] For instance, when genetic data is generated, it is usually produced in a raw data format, such as a BCL file, which then may get converted into a FASTQ file, e.g., by the NGS that generates the data. However, with the present system, the raw data files, such as in BCL or other raw file format, may be streamed or otherwise transmitted into the JIT module, which can then convert the data into a FASTQ file and / or into another file format. For example, once a FASTQ file is generated, the FASTQ file may then be processed, as disclosed herein, and a corresponding BAM file may be generated. And likewise, from the BAM file a corresponding VCF may be generated. Additionally, SAM and CRAM files may also be generated during appropriate steps. Each one of these steps may be performed very 2024205108   25 Jul 2024 rapidly, especially once the appropriate file format has once been generated. Hence, once the BCL file is received, e.g., straight from the sequencer, the BCL can be converted into a FASTQ file or be directly converted into a SAM, BAM, CRAM, and / or VCF file, such as by a hardware and / or quantum implemented mapping / aligning / sorting / variant calling procedure.

[00679] For example, in one use model, on a typical sequencing instrument, a large number of different subject’s genomes may be loaded into individual lanes of a single sequencing instrument to be run in parallel. Consequently, at the end of the run, a large number of diverse BCL files, derived from all the different lanes and representing the whole genomes of each of the different subjects, are generated in a multiplex complex. Accordingly, these multiplexed BCL files may then be de-multiplexed, and respective FASTQ files may be generated representing the genetic code for each individual subject. For instance, if in one sequencing run N BCL files are generated, these files will need to be de-multiplexed, layered, and stitched together for each subject. This stitching is a complex process where each subject’s genetic material is converted to BCL files, which may then be converted to a FASTQ file or used directly for mapping, aligning, and / or sorting, variant calling, and the like. This process may be automated so as to greatly speed up the various steps of the process.

[00680] Further, as can be seen with respect to FIG. 40A, once this data has been generated 110, and therefore needs to be stored, e.g., in which ever file format is selected, the data may be stored in a password protected and / or encrypted memory cache, such as in a dedicated genomics dropbox-like memory 400. Accordingly, as the generated and / or processed genetic data comes off of the sequencer, the data may be processed and / or stored and made available to other users on other systems, such as in a dropbox-like cache 400. In such an instance, the automated bioinformatics analysis pipeline system may then access the data in the cache and automatically begin processing it. For example, the system may include a management system, e.g., a workflow management system 151, having a controller, such as a microprocessor or other intelligence, e.g., artificial intelligence, that manages the retrieving of the BCL and / or FASTQ files, e.g., from the memory cache, and then directs the processing of that information, so as to generate a BAM, CRAM, SAM, and / or VCF, thereby automatically generating and outputting the various processing results and / or storing the same in the dropbox memory 400.

[00681] A unique benefit of JIT processing, as implemented within this use model, is that JIT allows the various genetic files produced to be compressed, e.g., prior to data storage, 2024205108   25 Jul 2024 and to be decompressed rapidly prior to usage. Hence, JIT processing can compile and / or compress and / or store the data as it is coming off the sequencer, where such storage is in a secure genomic dropbox memory cache. This genomic dropbox cache 400 may be a cloud 50 accessible memory cache that is configured for the storing of genomics data received from one or more automated sequencers 110, such as where the sequencer(s) are located remotely from the memory cache 400.

[00682] Particularly, once the sequence data has been generated 110, e.g., by a remote NGS, it may be compressed 150 for transmission and / or storage 400, so as to reduce the amount of data that is being uploaded to and stored in the cloud 50. Such uploading, transmission, and storage may be performed rapidly because of the data compression 150 that takes place in the system, such as prior to transmission. Additionally, once uploaded and stored in the cloud based memory cache 400, the data may then be retrieved, locally 100 or remotely 300, so as to be processed in accordance with the devices, systems, and methods of the BioIT pipeline disclosed herein, so as to generate a mapping, aligning, sorting, and / or variant call file, such as a SAM, BAM, and / or CRAM file, which may then be stored, along with a metafile that sets forth the information as to how the generated file, e.g., SAM, BAM, CRAM, etc. file, was produced.

[00683] Hence, when taken together with the metadata, the compressed SAM, BAM, and / or CRAM file may then be processed to produce any of the other file formats, such as FASTQ and / or VCF files. Accordingly, as discussed above, on the fly, JIT can be used to regenerate the FASTQ file or VCF from the compressed BAM file and vice versa. The BCL file can also be regenerated in like manner. It is to be noted that SAM and CRAM files can likewise be compressed and / or stored and can be used to produce one or more of the other file formats. For instance, a CRAM file, which can be un-CRAMed, can be used to produce a variant call file, and likewise for the SAM file. Hence, only the SAM, BAM and / or CRAM file need be saved and from these files, the other file formats, e.g., VCF, FASTQ, BCL files, can be reproduced.

[00684] Accordingly, as can be seen with respect to FIG. 40A, a mapping and / or aligning and / or sorting and / or variant calling instrument 110, e.g., a work bench computer, may be on-site 100 and / or another second corresponding instrument 300 may be located remotely and made accessible in the cloud 50. This configuration, along with the devices and methods disclosed herein, is adapted to enable a user to rapidly perform a BioIT analysis “in the cloud”, as herein disclosed, so as to produce results data. The results data may then be 2024205108   25 Jul 2024 processed so as to be compressed, and once compressed, the data may be configured for transmittal, e.g., back to the local computing resource 100, or may be stored in the cloud 400, and made accessible via a cloud based interface by the local computing resource 100. In such an instance, the compressed data may be a SAM, BAM, CRAM, and / or VCF file.

[00685] Specifically, the second computing resource 300 may be another work-bench solution, or it may be a server configured resource, such as where the computing resource is accessible via the cloud 50, and is configured for performing mapping and / or aligning and / or sorting and / or variant calling instrument. In such an instance, a user may requests the cloudbased server 300 perform one or more BioIT jobs on uploaded data, e.g., BCL and / or FASTQ data. In this instance, the server 300 will then access the stored and / or compressed file(s) and may process the data so as to rapidly process that data and generate one or more results data, which data may then be compressed and / or stored. Additionally, from the results data file one or more BCL, FASTQ, SAM, BAM, VCF, or other file formats may be generated, e.g., on the fly, using JIT processing. This configuration thereby alleviates the typical transfer speed bottleneck.

[00686] Hence, in various embodiments, the system 1 may include, a first mapping and / or aligning and / or sorting and / or variant calling instrument 100, which may be positioned locally 100, such as for local data production, compression 150, and / or storage 200; and a second instrument 300 may be positioned remotely and associated in the cloud 50, whereby the second instrument 300 is configured for receiving the generated and compressed data and storing it, e.g., via an associated storage device 400. Once stored, the data may be accessed decompression and conversion of the stored files into one or more of the other file formats.

[00687] Therefore, in one implementation of the system, data e.g., raw sequence data such as in a BCL or FASTQ file format, which is generated by a data generating apparatus, e.g., a sequencer 110, may be uploaded and stored in the cloud 50, such as in an associated genomics dropbox-like memory cache 400. This data may then be accessed directly by the first mapping and / or aligning and / or sorting and / or variant calling instrument 100, as described herein, or may be accessed indirectly by the server resource 300, which may then process the sequence data to produce mapped, aligned, sorted, and / or variant results data.

[00688] Accordingly, in various embodiments, one or more of the storage devices herein disclosed may be configured so as to be accessible, with the appropriate permissions, via the cloud. For instance, various of the results data of the system may be compressed 2024205108   25 Jul 2024 and / or stored in a memory, or other suitably configured database, where the database is configured as a genomics dropbox cache 400, such as where various results data may be stored in a SAM, BAM, CRAM and / or VCF file, which may be accessible remotely. Specifically, it is to be noted that, with respect to FIG 40A, a local instrument 100 may be provided, where the local instrument may be associated with the sequencing instrument 110 itself, or it may be remote therefrom but and associated with the sequencing instrument 110 via a local cloud 30, and the local instrument 100 may further be associated with a local storage facility 200 or remote memory cache 400, such as where the remote memory cache is configured as the genomics dropbox. Further, in various instance, a second mapping and / or aligning and / or sorting and / or variant calling instrument 300, e.g., a cloud based instrument, with the proper authorities, may also be connected with the genomics dropbox 400, so as to access the files, e.g., compressed files, stored thereby the local computing resource 100, and may then decompress those files to make the results available for further, e.g., secondary or tertiary, processing.

[00689] Accordingly, in various instances, the system may be streamlined such that as data is generated and comes off of the sequencer 110, such as in raw data format, it may either be immediately uploaded into the cloud 50 and stored in a genomics dropbox 400, or it may be transmitted to a BioIT processing system 300 for further processing and / or compression prior to being uploaded and stored 400. Once stored within the memory cache 400, the system may then immediately queue up the data for retrieval, compression, decompression, and / or for further processing such as by another associated BioIT processing apparatus 300, which when processed into results data may then be compressed and / or stored 400 for further use later. At this point, a tertiary processing pipeline may be initiated whereby the stored results data from secondary processing may be decompressed and used such as for tertiary analysis, in accordance with the methods disclosed herein.

[00690] Hence, in various embodiments, the system may be pipelined such that all of the data that comes off of the sequencer 110 may either be compressed, e.g., by a local computing resource 100, prior to transfer and / or storage 200, or the data may be transferred directly into the genomics dropbox folder for storage 400. Once received thereby, the stored data may then substantially immediately be queued for retrieval and compression and / or decompression, such as by a remote computing resource 300. After being decompressed the data may substantially immediately be available for processing such as for mapping, aligning, sorting, and / or variant calling to produce secondarily processed results data that may then be 2024205108   25 Jul 2024 re-compressed for storage. Afterward, the compressed secondary results data may then be accessed, e.g., in the genomics dropbox 400, be decompressed, and / or be used in one or more tertiary processing procedures. As the data may be compressed when stored and substantially immediately decompressed when retrieved, it is available for use by many different systems and in many different bioanalytical protocols at different times, simply by accessing the dropbox storage cache 400.

[00691] Therefore, in such manners as these, the BioIT platform pipelines presented herein may be configured so as to offer incredible flexibility of data generation and / or analysis, and are adapted to handle the input of particular forms of genetic data in multiple formats so as to process the data and produce output formats that are compatible for various downstream analysis. Accordingly, as can be seen with respect to FIG. 40C, presented herein are devices, systems, and methods for performing genetic sequencing analysis, which may include one or more of the following steps: First, a file input is received, the input may be in one or more of a FASTQ or BCL or other form of genetic sequence file format, such as in a compressed file format, which file may then be decompressed, and / or processed through a number of steps disclosed herein so as to generate a VCF / gVCF, which file may then be compressed and / or stored and / or transmitted. Such compression and / or decompression may occur at any suitable stage throughout the process.

[00692] For instance, once a BCL file is received, it may be subjected to a pipeline of analyses, such as in a sequential manner as disclosed herein. For example, once received, the BCL file may be converted and / or de-multiplexed such as into a FASTQ and / or FASTQgz file format, which file may be sent to a mapping and / or aligning module, e.g., of a sever 300, so as to be mapped and / or aligned in accordance with the apparatuses and their methods of use described herein. Additionally, in various instances, the mapped and aligned data, such as in a SAM or BAM file format, may be position sorted and / or any duplications can be marked and removed. The files may then be compressed, such as to produce a CRAM file, e.g., for transmission and / or storage, or may be forwarded to a variant calling, e.g., HMM, module, to be processed so as to produce a variant call file, VCF or gVCF.

[00693] More specifically, as can be seen with respect to FIGS. 40C and 40D, in certain instances, the file to be received by the system may be streamed or otherwise transferred to the system directly from the sequencing apparatus, e.g., NGS 110, and as such the transferred file may be in a BCL file format. Where the received file is in a BCL file format it may be converted, and / or otherwise de-multiplexed, into a FASTQ file for 2024205108   25 Jul 2024 processing by the system, or the BCL file may be processed directly. For instance, the platform pipeline processors can be configured to receive BCL data that is streamed directly from the sequencer, as described with respect to FIG. 1, or it may receive data in a FASTQ file format. However, receiving the sequence data directly as it is streamed off of the sequencer is useful because it enables the data to go directly from raw sequencing data to being directly processed, e.g., into one or more of a SAM, BAM, and / or VCF / gVCF for output.

[00694] Accordingly, once the BCL and / or the FASTQ file is received, e.g., by a computing resource 100 and / or 300, it may be mapped and / or aligned by the computing resource, which mapping and / or aligning may be performed on single end or paired end reads. For instance, once received, the sequence data may be compiled into reads, for analysis, such as with read lengths that may range from about 10 or about 20, such as 26, or 50, or 100, or 150 bp or less up to about 1K, or about 2.5K, or about 5K, even about 10K bp or more. Likewise, once mapped and / or aligned the sequence may then be sorted, such as position sorted, such as through binning by reference range and / or sorting of the bins by reference position. Further, the sequence data may be processed via duplicate marking, such as based on the starting position and CIGAR string, so as to generate a high quality duplicate report, and any marked duplicates may be removed at this point. Consequently, a mapped and aligned SAM file may be generated, which may be compressed so as to form a BAM / CRAM file, such as for storage and / or further processing. Furthermore, once the BAM / CRAM file has been retrieved, the mapped and / or aligned sequence data may be forwarded to a variant calling module of the system, such as a haplotype variant caller with reassembly, which in some instances, may employ one or more of a Smith-Waterman Alignment and / or Hidden Markov Model that may be implemented in a combination of software and / or hardware, so as to generate a VCF.

[00695] Hence, as seen in FIG. 40D, the system and / or one or more of its components may be configured so as to be able to convert BCL data to FASTQ or SAM / BAM / CRAM data formats, which may then be sent throughout the system for further processing and / or data reconstruction. For instance, once the BCL data is received and / or converted into a FASTQ file and de-multiplexed and / or deduped, the data may then be forwarded to one or more of the pipeline modules disclosed herein, such as for mapping and / or aligning, which dependent on the number of samples being processed will result in the production of one or more, e.g., several, SAM / BAM files. These files may then be sorted, de-duped, and 2024205108   25 Jul 2024 forwarded to a variant calling module, so as to produce one or more VCF files. These steps may be repeated for greater context and accuracy. For example, once the sequence data is mapped or aligned, e.g., to produce a SAM file, the SAM file may then be compressed into one or more BAM files, which may then be transmitted to a VCF engine so as to be converted throughout the processing of the system to a VCF / gVCF, which may then be compressed into a CRAM file. Consequently, the files to be output along the system may be a Gzip and / or CRAM file.

[00696] Particularly, as can be seen with respect to FIGS. 40C and 40D, one or more of the files, once generated may be compressed and / or transferred from one system component to another, e.g., from a local 100 to a remote resource 300, and once received may then be decompressed, e.g., if previously compressed, or converted / de-multiplexed. More particularly, once a BCL file is received, either by a local 100 or remote 300 resource, it may be converted into a FASTQ file that may then be processed by the integrated circuit(s) of the system, so as to be mapped and / or aligned, or may be transmitted to a remote resource 300 for such processing. Once mapped and / or aligned, the resulting sequence data, e.g., in a SAM file format, may be processed further such as by being compressed one or more times, e.g., into a BAM / CRAM file, which data may then be processed by position sorting, duplicate marking, and / or variant calling, the results of which, e.g., in a VCF format, may then be compressed once more and / or stored and / or transmitted, such as from a remote resource 300 to local 100 resource.

[00697] More particularly, the system may be adapted so as to process BCL data directly, thereby eliminating a FASTQ file conversion step. Likewise, the BCL data may be fed directly to the pipeline to produce a unique output VCF file per sample. Intermediate SAM / BAM / CRAM files can also be generated on demand. The system, therefore, may be configured for receiving and / or transmitting one or more data files, such as a BCL or FASTQ data file containing sequence information, and processing the same so as to produce a data file that has been compressed, such as a SAM / BAM / CRAM data file.

[00698] Accordingly, as can be seen with respect to FIG. 41A, a user may want to access the compressed file and convert it to an original version of the generated BCL 111c and / or FASTQ file 111d, such as for subjecting the data to further, e.g., more advanced, signal processing 111b, such as for error correction. Alternatively, the user may access the raw sequence data, e.g., in a BCL or FASTQ file format 111, and subject that data to further processing, such as for mapping 112 and / or aligning 113 and / or other related functions 2024205108   25 Jul 2024 114 / 115. For instance, the results data from these procedures may then be compressed and / or stored and / or subjected to further processing 114, such as for sorting 114a, de-duplication 114b, recalibration 114c, local realignment 114d, and / or compression / decompression 114e. The same or another user may then want to access the compressed form of the mapped and / or aligned results data and then run another analysis on the data, such as to produce one or more variant calls 115, e.g., via HMM, Smith-Waterman, Conversion, etc., which may then be compressed and / or stored. An additional user of the system may then access the compressed VCF file 116, decompress it, and subject the data to one or more tertiary processing protocols.

[00699] Further, a user may want to do a pipeline compare. The mapping / aligning / sorting / variant calling is useful for preforming various genomic analysis. For instance, if a further DNA or RNA analysis, or some other kind of analysis, is afterward desired, a user may want to run the data through another pipeline, and hence having access to the regenerated original data file is very useful. Likewise, this process may be useful such as where a different SAM / BAM / CRAM file may be desired to be created, or recreated, such as where there is a new or different reference genome generated, and hence it may be desired to re-do the mapping and aligning to the new reference genome.

[00700] Storing the compressed SAM / BAM / CRAM files is further useful because it allows a user of the system 1 to take advantage of the fact that a reference genome forms the backbone of the results data. In such an instance, it is not the data that agrees with the reference that is important, but rather how the data disagrees with the reference. Hence, only that data that disagrees with the reference is essential for storage. Consequently, the system 1 can take advantage of this fact by storing only what is important and / or useful to the users of the system. Thus, the entire genomic file (showing agreement and disagreement with the reference), or a sub-portion of it (showing only agreement or disagreement with the reference), may be configured for being compressed and stored. It may be seen, therefore, that as only the differences and / or variations between the reference and the genome being examined are the most useful to examine, in various embodiments, only these differences need be stored, as anything that is the same as the reference need not be reviewed again. Accordingly, since any given genome differs only slightly from a reference, e.g., 99% of human genomes are typically identical, after the BAM file is created, it is only the variations between the reference genome that need be reviewed and / or saved. 2024205108   25 Jul 2024

[00701] Additionally, as can be seen with respect to FIG. 41B, another useful component of a cloud accessible system 1, provided herein, is a workflow management controller 151, which may be used to automate the system flow. Such system animation may include utilizing the various system componentry to access data, either locally 100 or remotely 300, as and / or where it becomes available and then substantially automatically subjecting the data to further processing steps, such with respect to the BioIT pipelines disclosed herein. Accordingly, the workflow management controller 151 is a core automation technology for directing the various pipelines of the system, e.g., 111, 112, 113, 114, and / or 115, and in various instances may employ an artificial intelligence component 121a.

[00702] For instance, the system 1 may include an artificial intelligence (A / I) module that is configured to analyze the various data of the system, and in response thereto to communicate its findings with the workflow management system 151. Particular, in various instances, the A / I module may be configured for analyzing the various genomic data presented to the system, as well as the results data that is generated by the processing of that data, so as to identify and determine various relationships between that data and / or with any other data that may be entered into the system. More particularly, the A / I module may be configured for analyzing various genomic data in correspondence with a plurality of other factors, so as to determine any relationship, e.g., effect based relationships, between the various factors, e.g., data points, which may be informative as to the effects of the considered factors on the determined genomic data, e.g., variance data, and vice-versa.

[00703] Specifically, as described in greater detail below, the A / I module may be configured to correlate the genomics data of a subject generated by the system with any electronic medical records, for that subject or others, so as to determine any relationships between them and / or any other relevant factors and / or data. Accordingly, such other data that may be used by the system in determining any relevant effects and / or relationships that these factors may have on a subject and / or their genomic data and / or health include: NIPT data, NICU data, Cancer related data, LDT data, Environmental and / or Ag Bio data, and / or other such data. For instance, further data to be analyzed may be derived by such other factors as environmental data, clad data, microbiom data, methylation data, structural data, e.g., chimeric or mate read data, germline variants data, allele data, RNA data, and other such data related to a subject’s genetic material. Hence, the A / I module may be used to link various related data flowing through the system to the variants determined in the genome of one or more subjects along with one or more other possible related effect based factors. 2024205108   25 Jul 2024

[00704] Particularly, the A / I engine may be configured to be run on a CPU / GPU / QPU, and / or it may be configured to be run as an accelerated AI engine, which may be implemented in an FPGA and / or Quantum Processing Unit. Specifically, the AI engine may be associated with one or more, e.g., all, of the various databases of the system, so as to allow the AI engine to explore and process the various data flowing through the system. Additionally, where a subject whose genome is being processed gives the appropriate authorization to access both genomic and patient record data, the system is then configured for correlating the various data sets one with the other, and may further mine the data to determine various significant correspondences, associations, and or relationships.

[00705] More specifically, the A / I module may be configured so as to implement a machine learning protocol with respect to the input data. For instance, the genomics data of a plurality of subjects that is generated from the analyses being performed herein may be stored in a database. Likewise, with the appropriate authorizations and authentications, the Electronic Medical / Health Records (EMR), for the subject’s whose genomic DNA has been processed, may be obtained, and may likewise be stored in the database. As described in greater detail below, the processing engine(s) may be configured to analyze the subjects genomic data, as well as their EMR data, so as to determine any correlations between the two. These correlations will then be explored, observed relationships strengthened, and the results thereof may be used to more effectively and more efficiently perform the various functions of the system.

[00706] For example, the AI processing engine may access the genomic data of the subject, in correlation with the known diseases or conditions of those subjects, and from this analysis, the AI module may learn to perform predictive correlations based on that data, so as to become more and more capable of predicting the presence of disease and / or other similar conditions in other individuals. Particularly, by determining such correlations between the genomes of others with their EMR, e.g., with respect to the presence of disease markers, the A / I module may learn to identify such correlations, e.g., system determined disease markers, in the genomes of others, thereby being able to predict the possibility of a disease or other identifiable conditions. More particularly, by analyzing a subject’s genome in comparison to known or determined genetic disease markers, and / or by determining variance in the subject’s genome, and / or further, by determining a potential relationship between the genomic data and the subject’s health condition, e.g., EMR, the A / I module may be able draw conclusions not only for the subject being sampled, but for others who may be sampled in the 2024205108   25 Jul 2024 future. This can be done, e.g., in a systematic manner, on a subject by subject basis, or may be done within populations and / or within geographically distinct locations.

[00707] More particularly, with respect to the present systems, a pileup of reads is produced. The pileup may overlap regions known to have a higher probability of a significant variance. Accordingly, the system on one hand will analyze the pileup to determine the presence of variance, while at the same time, based on its previous findings, will already know the likelihood that a variance should or should not be there, e.g., it will have an initial prediction as to what the answer should be. Whether or not the expected variance is or is not there will be informative when analyzing that region of the genomes of others. For instance, this may be one data point in a sum of data points being used by the system to make better variant calls, and / or better associating those variants with one or more disease states or other health conditions.

[00708] For example, in an exemplary learning protocol, the A / I analysis may include taking an electronic image of a pileup of one or more regions in a genome, such as for those regions suspected of coding for one or more health conditions, and associating that image with the known variance calls form other pileups, such as where those variance may be known or not known to be related to disease states. This may be done again and again with the system learning to process the information, make the appropriate associations, and make the correct calls quicker and quicker, and with greater accuracy. Once this has been performed for various, e.g., all, of the known regions of the genome suspected of causing disease, the same may be repeated for the rest of the genome, e.g., until the whole genome has been reviewed. Likewise, this may be repeated again and again for a plurality of sample genomes, over and over, so as to train the system, e.g., the variant caller, so as to make more accurate calls, sooner, and with greater efficiency, and / or to allow the tertiary processing module to better identify unhealthy conditions.

[00709] Accordingly, the system receives many inputs with known answers, performs the analysis and computes the answer, and thereby learns from the process, e.g., renders an image of a pileup, with respect to one genome, and then learns to make a call based on another genome, sooner and sooner, as it is more readily determined that future pileups resemble the previously captured images that are known to be related to unhealthy conditions. Thus, the system may be configured so as to learn to make predictions as to the presence of variants, e.g., based on pattern recognitions, ad / or predicting the relationship between the presence of those variance with one or more medical conditions. 2024205108   25 Jul 2024

[00710] More specifically, the more the system performs partial or whole genome analyses, and determines the relationship between variations and various conditions, e.g., in a plurality of samples, the better at making predictions, e.g., based on partial or whole genome images of pileups, the system becomes. This is useful when predicting diseased states based on images of pileups and / or other read analysis, and may include the building of a correlation between one or more of the EMR (including phenotypic data), the pileup image, and / or known variants (genotypic data) and / or disease states or conditions, e.g., from which the predictions may be made. In various instances, the system may include a transcription function, so as to be able to transcribe any of the physical notes that may be a part of the subject’s medical record, so as to include that data within the associations.

[00711] In one use model, a subject may have a mobile tracker and / or sensor, such as mobile phone or other computing device, which may be configured for both tracking the location of the subject as well as for sensing the environmental and / or physiological conditions of the user at that location. Other sensed data may also be collected. For instance, the mobile computing device may include a GPS tracker, and / or its location may be determined by triangulation by cellular towers, and may further be configured for transmitting its collected data, e.g., via cellular, WIFI, Bluetooth, or other suitably configured communications protocol. Hence, the mobile device may track and categorize environmental data pertaining to the geographical locations, environmental conditions, physiological status, and other sensed data of the subject owner of the mobile computer encounters in their daily life. The collected location, environmental, physiological, health data, and / or other associated data, e.g., ZNA data, may then be transmitted, e.g., regularly and periodically, to one or more of the system databases herein, wherein the collected ZNA data may be correlated with the subject’s patient history, e.g., EMR records, and / or their genomic data, as determined by the system herein.

[00712] Likewise, in various instances, one or more of these data may be forwarded from the ZNA collection and analysis platform, to a central repository, e.g., at a government facility, so as to be analyzed on a greater, e.g., nationwide, scale, such as in accordance with the Artificial Intelligence disclosed herein. For instance, the database, e.g., governmental controlled database, may have recorded environmental data to which the environmental data of the subject may be compared. For example, in one exemplary instance, a NICU test may be performed on a mother, a father, and their child, and then throughout the lives of the three, their environmental and genomic and medical record data may be continually collected and 2024205108   25 Jul 2024 correlated with one another and / or on or more models, such as over the lifespan of the individuals, especially with respect to the onset of mutations, such as due to environmentally impactful factors. This data collection may be performed over the life of the individual, and may be performed on a family as whole basis, so as to better build a data collection database and to better predict the effects of such factors on genetic variation, and vice versa.

[00713] Accordingly, the workflow management controller 151 allows the system 1 to receive inputs from one or more sources, such as one or multiple sequencing instruments, e.g., 110a, 110b, 110c, etc., and multiple inputs from a single sequencing instrument 110, where the data being received represents the genomes of multiple subjects. In such instances, the workflow management controller 151 not only keeps track of all of the incoming data, but it also efficiently organizes and facilitates the secondary and / or tertiary processing of the received data. Accordingly, the workflow management controller 151 allows the system 1 to seamlessly connect to both small and large sequencing centers, where all kinds of genetic material may be coming through one or more sequencing instruments 110 at the same time, all of which may be transferred into the system 1, such as over the cloud 50.

[00714] More specifically, as can be seen with respect to FIG. 41A, in various instances, one or a multiplicity of samples may be received within the system 1, and hence the system 1 may be configured for receiving and efficiently processing the samples, either sequentially or in parallel, such as in a multi sample processing regime. Accordingly, to streamline and / or automate multi sample processing, the system may be controlled by a comprehensive Workflow Management System (WMS) or LIMS (laboratory information management system) 151. The WMS 151 enables users to easily schedule multiple workflow runs for any pipeline, as well as to adjust or accelerate NGS analysis algorithms, platform pipelines, and their attendant applications.

[00715] In such an instance, each run sequence may have a bar code on it indicating the type of sequence it is, the file format, and / or what processing steps have been performed, and what processing steps need to be performed. For instance, the bar code may include a manifest indicating “this is a genome run, of subject X, in file format Y, so this data has to go through pipeline Z,” or likewise may indicate “this is A’s result data that needs to go in this reporting system.” Accordingly, as the data is received, processed, and transmitted through the system, the bar codes and results will get loaded into the workflow management system 151, such as LIMS (laboratory information management system). LIMS, in this instance, may 2024205108   25 Jul 2024 be a standard tool that is employed for the management of laboratories, or it may be a specifically designed tool used for managing process flow.

[00716] In any instance, the workflow management controller 151 tracks a bar-coded sample from when it arrives in a given site, e.g., for storage and / or processing, until the results are sent out to the user. Particularly, the workflow management controller 151 is configured to track all data as it flows through the system end-to-end. More particularly, as the sample comes in, the bar code associated with the sample is read, and based on that reading the system determines what the requested work flows are, and prepares the sample for processing. Such processing may be simple, such as being run through a single genome pipeline, or it may be more complex, such as by being run through multiple, e.g., five pipelines, that need to be stitched together. In one particular model the generated or received data may be run through the system to produce processed data, the processed data may then be run through a GATK equivalent module, the results may be compared, and then the sample may be transmitted to another pipeline for further, e.g., tertiary processing 700. See FIG. 41B.

[00717] Hence, the system as a whole can be run in accordance with several different processing pipelines. In fact, many of the system processes can be interconnected, where the workflow manager 151 is notified or otherwise determines that a new job is pending, quantifies the job matrices, identifies available resources for performing the required analyses, loads the job into the system, receives the data coming in, e.g., off the sequencer 110, loads it in, and then processes it. Particularly, once the workflow is set up, it can be saved, and then a modified bar code gets assigned to that workflow, and the automated process takes place in accordance with the directives of the workflow.

[00718] Prior to the present automated workflow management system 151, it would take a number of Bioinformaticians a long period of time to configure and set up the system, and its component parts, and it would then require further time for actually running the analysis. To make matters more complicated, the system would have to be reconfigured prior to receiving the next sample to analyze, requiring even more time to reconfigure the system for analyzing the new sample set. With the technology disclosed herein the system can be entirely automated. The present system, particularly, is configured so as to automatically receive multiple samples, map them to multiple different workflows and pipelines, and run them on the same or multiple different system cards. 2024205108   25 Jul 2024

[00719] Accordingly, the workflow management system 151 reads the job requirements of the bar codes, allocates resources for performing the jobs, e.g., regardless of location, updates the sample barcode, and directs the samples to the allocated resources, e.g., processing units, for processing. Hence, it is the workflow manager 151 that determines the secondary 600 and / or tertiary 700 analyses protocols that will be run on the received samples. These processing units are resources that are available for delineating and performing the operations allocated to each data set. Particularly, the work flow controller 151 controls the various operations associated with receiving and reading the sample, determining jobs, allocating resources for the performance of those jobs, e.g., secondary processing, connecting all system components, and advancing the sample set through the system from component to component. The controller 151, therefore, acts to manage the overall system from start to finish, e.g., from sample receipt to VCF generation, and / or through to tertiary processing, see FIG. 41B.

[00720] In additional instances, as can be seen with respect to FIG. 41C, the system 1 may include a further tier of processing modules 800, such as configured for rendering additional processing, e.g., of the secondary and / or tertiary processing results data, such as for diagnosis, disease and / or therapeutic discovery, and / or prophylaxis thereof. For instance, in various instances, an additional layer of processing 800 may be provided, such as for disease diagnostics, therapeutic treatment, and / or prophylactic prevention 70, such as including NIPT 123a, NICU 123b, Cancer 123c, LDT 123d, AgBio 123e, and other such disease diagnostics, prophylaxis, and / or treatments employing the data generated by one or more of the present primary and / or secondary and / or tertiary pipelines.

[00721] Accordingly, herein presented is a system 1 for producing and using a local 30 and / or global hybrid 50 cloud network. For instance, presently, the local cloud 30 is used primarily for private storage, such as at a remote storage location 400. In such an instance, the computing of data is performed locally 100 by a local computing resource 140, and where storage needs are extensive, the local cloud 30 may be accessed so as to store the data generated by the local computing resource 140, such as by use of a remote private storage resource 400. Hence, generated data is typically managed wholly on site locally 100. In other embodiments, data may be generated, computed, and managed completely offsite by securely connecting to a remote computing resource 300 via a private cloud interface 30.

[00722] Particularly, in a general implementation of a bioinformatics analysis platform, the local computing 140 and / or storage 200 functions are maintained locally on site 2024205108   25 Jul 2024 100. However, where storage needs exceed local storage capacity, the data may be uploaded via a local cloud access 30 so as to be stored privately off site 400. Further, where there is a need for stored data 400 to be made available to other remote users, such data may be transferred and made available via a global cloud 50 interface for remote storage 400 thereby, but for global access. In such an instance, where the computing resources 140 required for performance of the computing functions are minimal, but the storage requirements extensive, the computing function 140 may be maintained locally 100, while the storage function 400 may be maintained remotely, e.g., for either private or global access, with the fully processed data being transferred back and forth between the local processing function 140, such as for local processing only, and the storage function 400, such as for the remote storage 400 of the processed data, such as by employing the JIT protocols disclosed herein above.

[00723] For instance, this may be exemplified with respect to the sequencing function 110, such as with a typical NGS, where the data generation and / or computing resource 100 is configured for performing the functions required for the sequencing of the genetic material so as to produce genetic sequenced data, e.g., reads, which data is produced onsite 100 and / or transferred onsite locally 30. These reads, once generated, such as by the onsite NGS, may then be transferred, e.g., as a BCL or FASTQ file, over the cloud network 30, such as for storage 400 at a remote location 300 in a manner so as to be recalled from the cloud 30 when necessary, such as for further processing. For example, once the sequence data has been generated and stored, e.g., 400, the data may then be recalled, e.g. for local usage, such as for the performance of one or more of secondary 600 and / or tertiary 700 processing functions, that is at a location remote from the storage facility 400, e.g., locally 100. In such an instance, the local storage resource 200 serves merely as a storage cache where data is placed while waiting transfer to or from the cloud 30 / 50, such as to or from the remote storage facility 400.

[00724] Likewise, where the computing function is extensive, such as requiring one or more remote computing servers or computing cluster cores 300 for processing the data, and where the storage demands for storing the processed data 200 are relatively minimal, as compared to the computing resources 300 required to process the data, the data to be processed may be sent, such as over the cloud 30, so as to be processed by a remote computing resource 300, which resource may include one or more cores or clusters of computing resources, e.g., one or more super computing resources. In such an instance, once the data has been processed by the cloud based computer core 300, the processed data may then be transferred over the cloud network 30 so as to be stored locally 200 and made readily 2024205108   25 Jul 2024 available for use by the local computing resource 140, such as for local analysis and / or diagnostics. Of course, the remotely generated data 300 may also be stored remotely 400.

[00725] This may further be exemplified with respect to a typical secondary processing function 600, such as where the pre-processed sequenced data, e.g., read data, is stored locally 200, and is accessed, such as by the local computing resource 100, and transmitted over the cloud internet 30 to a remote computing facility 300 so as to be further processed thereby, e.g., in a secondary 600 or tertiary 700 processing function, to obtain processed results data that may then be sent back to the local facility 100 for storage 200 thereby. This may be the case where a local practitioner generates sequenced read data using a local data generating resource 110, e.g., automated sequencer, so as to produce a BCL or FASTQ file, and then sends that data over the network 50 to a remote computing facility 300, which then runs one or more functions on that data, such as a Burrows-Wheeler transform or Needlemen-Wunsch and / or Smith-Waterman alignment function on that sequence data, so as to generate results data, e.g., in a SAM file format, that may then be compressed and transmitted over the internet 30 / 50, e.g., as a BAM file, to the local computing resource 100 so as to be examined thereby in one or more local administered processing protocols, such as for producing a VCF, which may then be stored locally 200. In various instances the data may also be stored remotely 400.

[00726] What is needed, however, is a seamless integration between the engagement between local 100 and remote 300 computer processing as well as between local 200 and remote 400 storage, such as in the hybrid cloud 50 based system presented herein. In such an instance, the system can be configured such that local 100 and remote 300 computing resources are configured so as to run seamlessly together, such that data to be processed thereby can be allocated real time to either the local 200 or the remote 300 computing resource without paying an extensive penalty due to transfer rate and / or in operational efficiency. This may be the case, for instance, where the software and / or hardware and / or quantum processing to be deployed or otherwise run by the computing resources 100 and 300 are configured so as to correspond to one another and / or are the same or functionally similar, e.g., the hardware and / or software is configured in the same manner so as to run the same algorithms in the same manner on the generated and / or received data.

[00727] For instance, as can be seen with respect to FIG. 41A a local computing resource 100 may be configured for generating or for receiving generated data, and therefore may include a data generating mechanism 110, such as for primary data generation and / or 2024205108   25 Jul 2024 analysis 500, e.g., so as to produce a BCL and / or a FASTQ sequence file. This data generating mechanism 110 may be or may be associated with a local computer 100, as described herein throughout, having a processor 140 that may be configured to run one or more software applications and / or may be hardwired so as to perform one or more algorithms such as in a wired configuration on the generated and / or acquired data. For example, the data generating mechanism 110 may be configured for one or more of generating data, such as sequencing data 111. In various embodiments, the generated data may be sensed data 111a, such as data that is detectable as a change in voltage, ion concentration, electromagnetic radiation, and the like; and / or the data generating mechanism 110 may be configured for generating and / or processing signal, e.g., analog or digital signal data, such as data representing one or more nucleotide identities in a sequence or chain of associated nucleotides. In such an instance, the data generating mechanism 110, e.g., sequencer 111, may further be configured for performing preliminarily processing on the generated data so as for signal processing 111b or to perform one or more base call operations 111c, such as on the data so as to produce sequence identity data, e.g., a BCL and / or FASTQ file 111d.

[00728] It is to be noted that in this instance, the produced data 111 may be generated locally and directly, such as by a local data generating 110 and / or computing resource 140, e.g., an NGS or sequencer on a chip. Alternatively, the data may be produced locally and indirectly, e.g., by a remote computing and / or generating resource, such as a remote NGS. The data 111, e.g., in BCL and / or FASTQ file format, once produced may then be transferred indirectly over the local cloud 30 to the local computing resource 100 such as for secondary processing 140 and / or storage thereby in a local storage resource 200, such as while awaiting further local processing 140. In such an instance, where the data generation resource is remote from the local processing 100 and / or storage 200 resources, the corresponding resources may be configured such that the remote and / or local storage, remote and local processing, and / or communicating protocols employed by each resource may be adapted to smoothly and / or seamlessly integrate with one another, e.g., by running the same, similar, and / or equivalent software and / or by having the same, similar, and / or equivalent hardware configurations, and / or employing the same communications and / or transfer protocols, which, in some instances, may have been implemented at the time of manufacture or later thereto.

[00729] Specifically, in one implementation, these functions may be implemented in a hardwired configuration such as where the sequencing function and the secondary processing function are maintained upon the same or associated chip or chipset, e.g., such as where the 2024205108   25 Jul 2024 sequencer and secondary processor are directly interconnected on a chip, as herein described. In other implementations, these functions may be implemented on two or more separate devices via software, e.g., on a quantum processor, CPU, or GPU that has been optimized to allow the two remote devices to communicate seamlessly with one another. In other implementations, a combination of optimized hardware and software implementations for performing the recited functions may also be employed.

[00730] More specifically, the same configurations may be implemented with respect to the performance of the mapping, aligning, sorting, variant calling, and / or other functions that may be deployed by the local 100 and / or remote 300 computing resources. For example, the local computing 100 and / or remote 300 resources may include software and / or hardware configured for performing one or more secondary 600 tiers of processing functions 112-115, and / or or tertiary tiers 700 / 800 of processing functions, on locally and / or remotely generated data, such as genetic sequence data, in a manner that the processing and results thereof may be seamlessly shared with one another and / or stored thereby. Particularly, the local computing function 100 and / or the remote computing function 300 may be configured for generating and / or receiving primary data, such as genetic sequence data, e.g., in a BCL and / or a FASTQ file format, and running one or more secondary 600 and / or tertiary 700 processing protocols on that generated and / or acquired data. In such an instance, one or more of these protocols may be implemented in a software, hardware, or combinational format, such as run on a quantum processor, a CPU, and / or a GPU. For instance, the data generating 110 and / or the local 100 and / or the remote 300 processing resource may be configured for performing one or more of a mapping operation 112, an alignment operation 113, variant calling 115, or other related function 114 on the acquired or generated data in software and / or in hardware.

[00731] Accordingly, in various embodiments, the data generating resource, such as the sequencer 111, e.g., NGS or sequencer on a chip, whether implemented in software and / or in hardware, or a combination of the same, may further be configured to include an initial tier of processors 500 such as a scheduler, various analytics, comparers, graphers, releasers, and the like, so as to assist the data generator 111, e.g., sequencer, in converting biological information into raw read data, such as in a BCL or FASTQ file format 111d. Further, the local computing 100 resource, whether implemented in software and / or in hardware, or a combination of the same, may further be configured to include a further tier of processors 600 such as may include a mapping engine 112, or may otherwise include 2024205108   25 Jul 2024 programming for running a mapping algorithm on the genetic sequence data, such as for performing a Burrows-Wheeler transform and / or other algorithms for building a hash table and / or running a hash function 112a on said data, such as for hash seed mapping, so as to generate mapped sequence data. Further still, the local computing 100 resource whether implemented in software and / or in hardware, or a combination of the same, may further be configured to include an initial tier of processors 600 such as may also include an alignment engine 113, as herein described, or may otherwise include programming for running an alignment algorithm on the genetic sequence data, e.g., mapped sequenced data, such as for performing a gapped and / or gapless Smith-Waterman alignment, and / or Needleman-Wunsch, or other like scoring algorithm 113a on said data, so as to generate aligned sequence data.

[00732] The local computing 100 and / or data generating resource 110 may also be configured to include one or more other modules 114, whether implemented in software and / or in hardware, or a combination of the same, which may be adapted to perform one or more other processing functions on the genetic sequence data, such as on the mapped and / or aligned sequence data. Thus, the one or more other modules may include a suitably configured engine 114, or otherwise include programming, for running the one or more other processing functions such as a sorting 114a, de-duplication 114b, recalibration 114c, local realignment 114d, duplicate marking 114f, Base Quality Score Recalibration 114g function(s) and / or a compression function (such as to produce a SAM, Reduced BAM, and / or a CRAM compression and / or decompression file) 114e, in accordance with the methods herein described. In various instances, one or more of these processing functions may be configured as one or more pipelines of the system 1.

[00733] Likewise, the system 1 may be configured to include a module 115, whether implemented in software and / or in hardware, or a combination of the same, which may be adapted for processing the data, e.g., the sequenced, mapped, aligned, and / or sorted data in a manner such as to produce a variant call file 116. Particularly, the system 1 may include a variant call module 115 for running one or more variant call functions, such as a Hidden Markov Model (HMM) and / or GATK function 115a such as in a wired configuration and / or via one or more software applications, e.g., either locally or remotely, and / or a converter 115b for the same. In various instances, this module may be configured as one or more pipelines of the system 1.

[00734] In particular embodiments, as set forth in FIG. 41B, the system 1 may include a local computing function 100 that may be configured for employing a computer processing 2024205108   25 Jul 2024 resource 150 for performing one or more further processing functions on data, e.g., BCL and / or FASTQ data, generated by the system data generator 110 or acquired by the system acquisition mechanism 120 (as described herein), such as by being transferred thereto, for instance, by a third party 121, such as via a cloud 30 or hybrid cloud network 50. For example, a third-party analyzer 121 may deploy a remote computing resource 300 so as to generate relevant data in need of further processing, such as genetic sequence data or the like, which data may be communicated to the system 1 over the network 30 / 50 so as to be further processed. This may be useful, for instance, where the remote computing resource 300 is a NGS, configured for taking raw biological data and converting it to a digital representation thereof, such as in the form of one or more FASTQ files containing reads of genetic sequence data; and where further processing is desired, such as to determine how the generated sequence of an individual differs from that of one or more reference sequences, as herein described, and / or it is desired to subject the results thereof to furthered, e.g., tertiary, processing.

[00735] In such an instance, the system 1 may be adapted so as to allow one or more parties, e.g., a primary and / or secondary and / or third party user, to access the associated local processing resources 100, and / or a suitably configured remote processing resource 300 associated therewith, in a manner so as to allow the user to perform one or more quantitative and / or qualitative processing functions 152 on the generated and / or acquired data. For instance, in one configuration, the system 1 may include, e.g., in addition to primary 500 and / or secondary 600 processing pipelines, a third tier of processing modules 700 / 800, which processing modules may be configured for performing one or more processing functions on the generated and / or acquired primary and / or secondary processed data.

[00736] Particularly, in one embodiment, the system 1 may be configured for generating and / or receiving processed genetic sequence data 111 that has been either remotely or locally mapped 112, aligned 113, sorted 114a, and / or further processed 114 so as to generate a variant call file 116, which variant call file may then be subjected to further processing such as within the system 1, such as in response to a second and / or third party analytics requests 121. More particularly, the system 1 may be configured to receive processing requests from a third party 121, and further be configured for performing such requested secondary 600 and / or tertiary processing 700 / 800 on the generated and / or acquired data. Specifically, the system 1 may be configured for producing and / or acquiring genetic sequence data 111, may be configured for taking that genetic sequence data and mapping 2024205108   25 Jul 2024 112, aligning 113, and / or sorting 114a it and processing it to produce one or more variant call files (VCFs) 116, and additionally the system 1 may be configured for performing a tertiary processing function 700 / 800 on the data, e.g., with respect to the one or more VCFs generated or received by the system 1.

[00737] Particularly, the system 1 may be configured so as to perform any form of tertiary processing 700 on the generated and / or acquired data, such as by subjecting it to one or more pipeline processing functions 700 such as to generate genome, e.g., whole genome, data 122a, epigenome data 122b, metagenome data 122c, and the like, including genotyping, e.g., joint genotyping, data 122d, variants analyses data, including GATK 122e and / or MuTect2 122f analysis data, among other potential data analytic pipelines, such as a microarray analysis pipeline, exome analysis pipeline, microbiome analysis pipeline, RNA sequencing pipelines, and other genetic analyses pipelines. Further, the system 1 may be configured for performing an additional tier of processing 800 on the generated and / or processed data, such as including one or more of non-invasive prenatal testing (NIPT) 123a, N / P ICU 123b, cancer related diagnostics and / or therapeutic modalities123c, various laboratory developed tests (LDT) 123d, agricultural biological (Ag Bio) applications 123e, or other such health care related 123f processing function. See FIG. 41C.

[00738] Hence, in various embodiments, where a primary user may access and / or configure the system 1 and its various components directly, such as through direct access therewith, such as through the local computing resource 100, as presented herein, the system 1 may also be adapted for being accessed by a secondary party, such as is connected to the system 1 via a local network or intranet connection 10 so as to configure and run the system 1 within the local environment. Additionally, in certain embodiments, the system may be adapted for being accessed and / or configured by a third party 121, such as over an associated hybrid-cloud network 50 connecting the third party 121 to the system 1, such as through an application program interface (API), accessible as through one or more graphical user interface (GUI) components. Such a GUI may be configured to allow the third-party user to access the system 1, and using the API to configure the various components of the system, the modules, associated pipelines, and other associated data generating and / or processing functionalities so as to run only those system components necessary and / or useful to the third party and / or requested or desired to be run thereby.

[00739] Accordingly, in various instances, the system 1 as herein presented may be adapted so as to be configurable by a primary, secondary, or tertiary user of the system. In 2024205108   25 Jul 2024 such an instance, the system 1 may be adapted to allow the user to configure the system 1 and thereby to arrange its components in such a manner as to deploy one, all, or a selection of the analytical system resources, e.g., 152, to be run on data that is either generated, acquired, or otherwise transferred to the system, e.g., by the primary, secondary, or third party user, such that the system 1 runs only those portions of the system necessary or useful for running the analytics requested by the user to obtain the desired results thereof. For example, for these and other such purposes, an API may be included within the system 1 wherein the API is configured so as to include or otherwise be operably associated with a graphical user interface (GUI) including an operable menu and / or a related list of system function calls from which the user can select and / or otherwise make so as to configure and operate the system and its components as desired.

[00740] In such an instance, the GUI menu and / or system function calls may direct the user selectable operations of one or more of a first tier of operations 600 including: sequencing 111, mapping 112, aligning 113, sorting 114a, variant calling 115, and / or other associated functions 114 in accordance with the teachings herein, such as with relation to the primary and / or secondary processing functions herein described. Further, where desired the GUI menu and / or system function calls may direct the operations of one or more of a second tier of operations 700 including: a genome, e.g., whole genome, analysis pipeline 122a, epigenome pipeline 122b, metagenome pipeline 122c, a genotyping, e.g., joint, genotyping pipeline 122d, variants pipelines, e.g., GATK 122e and / or MuTect2 122f analysis pipelines, including structural variants pipelines, as well as other tertiary analyses pipelines, such as a micro-array analysis pipeline, exome analysis pipeline, microbiome analysis pipeline, RNA sequencing pipelines, and other genetic analyses pipelines. Furthermore, where desired the GUI menu and system function calls may direct the user selectable operations of one or more of a third tier of operations 800 including: non-invasive prenatal testing (NIPT) 123a, N / P ICU 123b, cancer related diagnostics and / or therapeutic modalities 123c, various laboratory developed tests (LDT) 123d, agricultural biological (Ag Bio) applications 123e, or other such health care related 123f processing functions.

[00741] Accordingly, the menu and system function calls may include one or more primary, secondary, and / or tertiary processing functions, so as to allow the system and / or its component parts to be configured such as with respect to performing one or more data analysis pipelines as selected and configured by the user. In such an instance, the local computing resource 100 may be configured to correspond to and / or mirror the remote 2024205108   25 Jul 2024 computing resource 300, and / or likewise the local storage resource 200 may be configured to correspond and / or mirror the remote storage resource 400 so that the various components of the system may be run and / or the data generated thereby may be stored either locally or remotely in a seamless distributed manner as chosen by the use of the system 1. Additionally, in particular embodiments, the system 1 may be made accessible to third parties, for running proprietary analysis protocols 121a on the generated and / or processed data, such as by running through an artificial intelligence interface designed to find correlations there between.

[00742] The system 1 may be configured so as to perform any form of tertiary processing on the generated and / or acquired data. Hence, in various embodiments, a primary, secondary, or tertiary user may access and / or configure any level of the system 1 and its various components either directly, such as through direct access with the computing resource 100, indirectly, such as via a local network connection 30, or over an associated hybrid-cloud network 50 connecting the party to the system 1, such as through an appropriately configured API having the appropriate permissions. In such an instance, the system components may be presented as a menu, such as a GUI selectable menu, where the user can select from all the various processing and storage options desired to be run on the user presented data. Further, in various instances, the user may upload their own system protocols so as to be adopted and run by the system so as to process various data in a manner designed and selected for by the user. In such an instance, the GUI and associated API will allow the user to access the system 1 and using the API add to and configure the various components of the system, the modules, associated pipelines, and other associated data generating and / or processing functionalities so as to run only those system components necessary and / or useful to the party and / or requested or desired to be run thereby.

[00743] With respect to FIG. 41C, one or more of the above demarcated modules, and their respective functions and / or associated resources, may be configured for being performed remotely, such as by a remote computing resource 300, and further be adapted to be transmitted to the system 1, such as in a seamless transfer protocol over a global cloud based internet connection 50, such as via a suitably configured data acquisition mechanism 120. Accordingly, in such an instance, a local computing resource 100 may include a data acquisition mechanism 120, such as configured for transmitting and / or receiving such acquired data and / or associated information. 2024205108   25 Jul 2024

[00744] For instance, the system 1 may include a data acquisition mechanism 120 that is configured in a manner so as to allow the continued processing and / or storage of data to take place in a seamless and steady manner, such as over a cloud based network 50 where the processing functions are distributed both locally 100 and / or remotely 300. Likewise, where one or more of the results of such processing may be stored locally 200 and / or remotely 400, such that the system seamlessly allocates to which local or remote resource a given job is to be sent for processing and / or storage regardless of where the resource is physically positioned. Such distributed processing, transferring, and acquisition may include one or more of sequencing 111, mapping 112, aligning 113, sorting 114a, duplicate marking 114c, deduplication, recalibration 114d, local realignment 114e, Base Quality Score Recalibration 114f function(s) and / or a compression function 114g, as well as a variant call function 116, as herein described. Where stored locally 200 or remotely 400, the processed data, in whatever state it is in in the process may be made available to either the local 100 or remote processing 300 resources, such as for further processing prior to re-transmission and / or re-storage.

[00745] Specifically, the system 1 may be configured for producing and / or acquiring genetic sequence data 111, may be configured for taking that genetic sequence data and processing it locally 140, or transferring the data over a suitably configured cloud 30 or hybrid cloud 50 network such as to a remote processing facility for remote processing 300. Further, once processed the system 1 may be configured for storing the processed data remotely 400 or transferring it back for local storage 200. Accordingly, the system 1 may be configured for either local or remote generation and / or processing of data, such as where the generation and / or processing steps may be from a first tier of primary and / or secondary processing functions 600, which tier may include one or more of: sequencing 111, mapping 112, aligning 113, and / or sorting 114a so as to produce one or more variant call files (VCFs) 116.

[00746] Further, the system 1 may be configured for either local or remote generation and / or processing of data, such as where the generation and / or processing steps may be from a second tier of tertiary processing functions 700, which tier may include one or more of generating and / or acquiring data pursuant to a genome pipeline 122a, epigenome pipeline 122b, metagenome pipeline 122c, a genotyping pipeline 122d, variants, e.g., GATK 122e and / or MuTect2, analysis 122f pipeline, as well as other tertiary analyses pipelines, such as a micro-array analysis pipeline, a microbiome analysis pipeline, an exome analysis pipeline, as well as RNA sequencing pipelines and other genetic analyses pipelines. Additionally, the 2024205108   25 Jul 2024 system 1 may be configured for either local or remote generation and / or processing of data, such as where the generation and / or processing steps may be from a third tier of tertiary processing functions 800, which tier may include one or more of generating and / or acquiring data related to and including: non-invasive prenatal testing (NIPT) 123a, N / P ICU 123b, cancer related diagnostics and / or therapeutic modalities 123c, various laboratory developed tests (LDT) 123d, agricultural biological (Ag Bio) applications 123e, or other such health care related 123f processing functions.

[00747] In particular embodiments, as set forth in FIG. 41C, the system 1 may further be configured for allowing one or more parties to access the system and transfer information to or from the associated local processing 100 and / or remote 300 processing resources as well as to store information either locally 200 or remotely 400 in a manner that allows the user to choose what information get processed and / or stored where on the system 1. In such an instance, a user can not only decide what primary, secondary, and / or tertiary processing functions get performed on generated and / or acquired data, but also how those resources get deployed, and / or where the results of such processing gets stored. For instance, in one configuration, the user may select whether data is generated either locally or remotely, or a combination thereof, whether it is subjected to secondary processing, and if so, which modules of secondary processing it is subjected to, and / or which resource runs which of those processes, and further may determine whether the then generated or acquired data is further subjected to tertiary processing, and if so, which modules and / or which tiers of tertiary processing it is subjected to, and / or which resource runs which of those processes, and likewise, where the results of those processes are stored for each step of the operations.

[00748] Particularly, in one embodiment, the user may configure the system 1 of FIG. 41A so that the generating of genetic sequence data 111 takes place remotely, such as by an NGS, but the secondary processing 600 of the data occurs locally 100....

Claims

1. A genomics analysis platform for executing a sequence analysis pipeline, thegenomics analysis platform comprising:a set of first server instances and a set of second server instances connected with a data communication network, each first server instance having at least one central processing unit (CPU) that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of the sequence analysis pipeline, each second server instance having at least one field programmable gate array (FPGA), each FPGA being configured by firmware to arrange a set of hardwired digital logic circuits that are interconnected by a plurality of physical electrical interconnects to form a set of processing engines to perform a second set of genomic processing steps of the sequence analysis pipeline; andan elastic reconfigurable storage connectable with the set of first server instances and the set of second server instances via the data communication network, the elastic reconfigurable storage being switchable between one or more of the set of first server instances and one or more of the set of second server instances for read and write access by successively active server instances of the set of first server instances or second server instances.

2. The genomics analysis platform in accordance with claim 1, further comprisingan elastic controller having load estimator logic to estimate a data load of the sequence analysis pipeline to be performed by the set of first server instances or the set of second server instances, the elastic control node further being configured to instantiate a number of the first server instances or the second server instances based on the estimated data load.

3. The genomics analysis platform in accordance with claim 2, wherein the loadestimator logic is further configured to instantiate the number of the first server instances or the second server instances to be instantiated to optimize an efficiency of the genomics analysis platform for processing the data load.

4. The genomics analysis platform in accordance with claim 3, further comprising a2024205108   25 Jul 2024set of third server instances, each third server instance having at least one graphical processing unit (GPU) that is responsive to one or more graphical processing algorithms that are configured to instruct the GPU to perform a third set of genomic processing steps of the sequence analysis pipeline, and wherein the reconfigurable storage is connected with the set of third server instances via the data communication network.

5. The genomics analysis platform in accordance with claim 3, wherein the secondset of genomic processing steps includes mapping and aligning, and the second set of results data includes one or more of a mapped and aligned read.

6. The genomics analysis platform in accordance with claim 5,wherein the aligning includes performing a Smith-Waterman operation.

7. The genomics analysis platform in accordance with claim 1, further comprisingan on-demand cloud computing platform comprising a set of server computers and a set of databases, the set of server computers defining a virtual set of server computer instances that is configurable to provide the set of first server instances and the set of second server instances, and the set of databases defining a virtual database storage that is configurable to provide the reconfigurable storage.

8. A genomics analysis platform for executing a sequence analysis pipeline, thegenomics analysis platform comprising:one or more of a first server instance, each first server instance having at least one central processing unit (CPU) forming a compute node of the genomic analysis platform, each CPU being responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of the sequence analysis pipeline;one or more of a second server instance, each second server instance having at least one field programmable gate array (FPGA), each FPGA being configured by firmware to arrange a set of hardwired digital logic circuits that are interconnected by a plurality of physical electrical interconnects to form a set of processing engines to perform a second set of genomic processing steps of the sequence analysis pipeline; and an elastic reconfigurable storage external to the one or more first server2024205108   25 Jul 2024instances and second server instances, the reconfigurable storage being communicably switchable between the one or more first server instances and the second server instances to receive and store result data of the first or second set of genomic processing steps of the sequence analysis pipeline, and provide access to the result data by a next server instance.

9. The genomics analysis platform in accordance with claim 8, further comprisingan elastic controller having load estimator logic to estimate a data load of the sequence analysis pipeline to be performed by the set of first server instances or the set of second server instances, the elastic control node further being configured to instantiate a number of the first server instances or the second server instances based on the estimated data load.

10. The genomics analysis platform in accordance with claim 9, wherein the load estimator logic is further configured to instantiate the number of the first server instances or the second server instances to be instantiated to optimize an efficiency of the genomics analysis platform for processing the data load.

11. The genomics analysis platform in accordance with claim 10, further comprising an on-demand cloud computing platform comprising a set of server computers and a set of databases, the set of server computers defining a virtual set of server computer instances that is configurable to provide the set of first server instances and the set of second server instances, and the set of databases defining a virtual database storage that is configurable to provide the reconfigurable storage.Illumina, Inc.Patent Attorneys for the Applicant / Nominated Person SPRUSON & FERGUSON

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