Method and apparatus for operating a semiconductor memory

Abstract

The present invention relates to an apparatus and method for operating a semiconductor memory, characterized by the following features: ‑ the semiconductor memory is operated in a first operating state and / or a second operating state according to an application set for the semiconductor memory; ‑ in the first operating state, the semiconductor memory stores a machine code of the application; and ‑ in the second operating state, the semiconductor memory stores application data of the application.

Description

Technical Field

[0001] The invention relates to a method for operating a semiconductor memory and further relates to a corresponding microcontroller (μC), a corresponding computer program and a corresponding storage medium. Background Art

[0002] In microelectronic devices, any data memory is referred to as a semiconductor memory, which comprises a microelectronic storage structure in or on a semiconductor crystal. According to the prior art, semiconductor memories are integrated into integrated circuits and are able to store data in the form of binary electronic switching states.

[0003] Newer developments aim to transfer the known storage principle from conventional magnetic core memories to high-density non-volatile memories in a microelectronic manner. The relevant technology is known to those skilled in the art as magnetoresistive random access memory (MRAM).

[0004] DE 198 43 350 A1 discloses an electronic component, in particular a chip component, which has: at least one first magnetoresistive element arranged on a substrate, which performs a sensor function; and at least one second magnetoresistive element arranged on the substrate, which performs a memory function. Summary of the invention

[0005] The invention provides a method for operating a semiconductor memory, a corresponding microcontroller, a corresponding computer program and a corresponding storage medium according to the independent claims.

[0006] One specific embodiment is based here on the basic idea that conventional electronic control devices, in particular in motor vehicle electronics, place high demands on the capacity of either flash memory (for example in engine control) or volatile direct access memory (for example in radar applications or for battery control), depending on the application.

[0007] The proposed concept also takes into account the fact that MRAM could replace the flash memory used according to the prior art. Such magnetic memories are characterized by very high cycle times, since rewriting them does not load the material as in the case of flash or phase change memory (PCM).

[0008] The advantage of the proposed solution is that a single chip can be used for RAM and as code memory under certain marginal conditions, since each application utilizes other properties of the magnetic memory.

[0009] Advantageous developments and improvements of the basic idea described in the independent claim are possible by means of the measures mentioned in the dependent claims. It can therefore be provided that a non-volatile memory (NVM) is used for machine code or as a RAM substitute in an application-dependent manner. This is not possible without problems either in the case of flash memory or in the case of PCM, since the achievable number of cycles and writing speeds are too low.

[0010] According to another aspect, it can be provided that the NVM is selectively used as a code memory with a relatively small number of write cycles within the scope of engine control or as a RAM, for example for radar applications, which require up to 600 million write cycles at a data rate of approximately 2 Mbyte per 15 milliseconds, but for this only require retention of less than 50 milliseconds.

[0011] This variant utilizes the characteristics of the system: new data should be processed in a cycle duration of less than 50 milliseconds and it is not necessary to keep the data available for a longer period. For this reason, in such an application, the influence of the number of write cycles on the retention is basically insignificant. In a similar way, for example, a battery control system can also benefit from the configuration of the invention.

[0012] According to another aspect, a volatile direct access memory can be additionally provided on the microchip according to the invention. The chip obtained in this way can be used in the most diverse areas. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Exemplary embodiments of the invention are shown in the drawings and are explained in more detail in the following description.

[0014] Figure 1 A flow chart showing a method according to one embodiment;

[0015] Figure 2 and Figure 3 Two application scenarios of a microcontroller according to one specific embodiment are shown schematically. DETAILED DESCRIPTION

[0016] Figure 1The basic idea of ​​the proposed concept is illustrated: The application of the semiconductor memory provided determines (11) its operating mode. If, for example, this is an engine control, the semiconductor memory is used for the more likely long-term storage of machine code, so that a write access is only necessary during control operation to update the application. In this first operating state (12), access to the memory content is guaranteed for many years without information loss (retention).

[0017] If the intended application is, on the other hand, for example, a radar or a battery management system, the semiconductor memory thus facilitates the short-term storage of signal data which are typically overwritten cyclically with a cycle duration of less than 50 milliseconds, but this naturally requires a short memory cycle time. In this second operating state (13), it is conceivable that less requirements are placed on the storage.

[0018] The method (10) can be implemented, for example, in a microcontroller (20), such as Figure 2 As illustrated in the schematic diagram of . In addition to the MRAM (22) operated according to the invention, the microcontroller (20) here also includes a conventional volatile direct access memory (23) and a main processor (21), which is electrically connected not only to the MRAM (22) but also to the volatile direct access memory (23). As can be clearly seen from the figure, the MRAM (22) is completely used to store machine code (24) in the first operating state (12), while the data is only stored in the conventional direct access memory (23). In contrast, in the second operating state (13), most of the data is stored in the MRAM (22) itself.

[0019] It is understood that instead of MRAM it is possible to use a resistive direct access memory (RRAM) or another non-volatile memory technology having the characteristics outlined without departing from the scope of the present invention.

Claims

1. A method (10) for operating a semiconductor memory, Features The following features: - the semiconductor memory is a non-volatile semiconductor memory and is operated in a first operating state (12) and / or a second operating state (13) according to a set application of the semiconductor memory; - in the first operating state (12), the semiconductor memory stores the machine code (24) of the application for a long period of time until a new machine code for updating the application is obtained; and In the second operating state (13), the semiconductor memory is used as a RAM replacement at a write rate comparable to a RAM and for short-term storage of application data (25) of the application with a short memory cycle time.

2. The method (10) according to claim 1, Features The following features: - In the second operating state (13), the application data (25) are periodically overwritten.

3. The method (10) according to claim 2, It is characterized by the following features: The overwriting is carried out with a cycle duration of at most 50 milliseconds.

4. The method (10) according to any one of claims 1 to 3, Features At least one of the following characteristics: - if the application is engine control, the semiconductor memory is operated in the first operating state (12), and If the application is a radar or a battery management system, the semiconductor memory is operated in the second operating state (13). 5 . A computer program product containing machine-readable instructions, the computer program product being designed to carry out the method ( 10 ) according to claim 1 .

6. A machine-readable storage medium on which the computer program product according to claim 5 is stored.

7. Microcontroller (20), Features The following features: - the microcontroller (20) comprises a non-volatile semiconductor memory, and The microcontroller ( 20 ) is designed to carry out the method ( 10 ) according to one of claims 1 to 4 .

8. The microcontroller (20) according to claim 7, It is characterized by the following features: - the microcontroller (20) further comprises a main processor (21) and a volatile direct access memory, and - The main processor (21) is electrically connected to the non-volatile semiconductor memory and the volatile direct access memory.

9. The microcontroller (20) according to claim 7 or 8, Features One of the following characteristics: - the non-volatile semiconductor memory comprises a magnetoresistive direct access memory, or -The non-volatile semiconductor memory comprises a resistive direct access memory.

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