Selective deposition of metal-organic frameworks

Abstract

A method (200) for selectively forming a low-k dielectric film (140) on an exposed dielectric position (130) in a substrate (10), the method (200) comprising: selectively depositing (210) a metal-containing film (110) on the exposed dielectric position (130) using an area selective deposition method using one or more deposition cycles; providing (220) at least one organic ligand vapor to the deposited metal-containing film (110) at least once to cause a gas phase chemical reaction, thereby obtaining a metal-organic framework (140), the metal-organic framework (140) being a low-k dielectric film (140), wherein the low-k dielectric film (140) has a gap (142) at a position where the metal-containing film is not deposited.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor structures and methods for forming these structures. More specifically, the present invention relates to methods for selectively forming low-k dielectric structures on exposed dielectric locations in a substrate. The present invention also relates to substrate structures having dielectric regions covered by a low-k dielectric film, and to semiconductor devices containing such structures. Background Art

[0002] As feature sizes in advanced interconnects approach sub-20nm, precise alignment of adjacent metallization layers connected by vias becomes critical to the reliability of ULSI devices. One of the key issues in shrinking via pitch is the increasing impact of overlay errors caused by the photolithography steps. Since the required small-scale overlays are inherently challenging, these requirements should be mitigated by modifying existing patterning schemes.

[0003] Overlay error scaling is slow and does not meet the tolerances of the rapidly shrinking channel dimensions, which raises concerns about the reliability of correct channel placement. Although several self-alignment schemes have been proposed, including area-selective deposition by ALD, one of the key issues in these schemes is that there is no clear method to date for selectively depositing low-k dielectric films (silicon oxide with a k value below 3.9). Therefore, ALD AlO is usually used. x , HfO x 、ZrO x High-k dielectrics are used to perform DoD (dielectric-on-dielectric) selective deposition. These dielectrics have k values ​​above 9, and the k values ​​of these dielectrics increase the total RC delay of the interconnect as an intermetallic dielectric after the channel is highly integrated into the metallization layer. In addition, the limited selectivity of the area selective deposition ALD method leads to the formation of defects, such as dielectric phase nucleation on the top of the metal line. This limits the thickness of the ALD dielectric, and the presence of defects can cause an increase in the channel contact resistance, while the thickness of the ALD dielectric can be selectively increased (selectivity window).

[0004] Therefore, there is a need for methods for selectively forming low-k dielectric structures on exposed dielectric locations on a substrate, there is a need for substrate structures having dielectric regions covered by low-k dielectric films, and there is a need for semiconductor devices including such structures. Summary of the invention

[0005] Embodiments of the present invention are directed to providing a good method for selectively forming a low-k dielectric structure on exposed dielectric locations on a substrate; providing a good substrate structure having a dielectric region covered by a low-k dielectric film; and providing a semiconductor device including such a structure.

[0006] The above objects are achieved by the method and device of the present invention.

[0007] In a first aspect, embodiments of the present invention relate to a method for selectively forming a low-k dielectric film on exposed dielectric locations in a substrate. The method comprises:

[0008] selectively depositing a metal-containing film on exposed dielectric locations using an area selective deposition method using one or more deposition cycles;

[0009] The vapor of at least one organic ligand is provided at least once to the deposited metal-containing film to cause a gas phase chemical reaction, thereby obtaining a metal-organic framework, which is a low-k dielectric film, wherein the low-k dielectric film has gaps at locations where the metal-containing film is not deposited.

[0010] An advantage of embodiments of the present invention is that the resulting metal-organic framework is a low-k dielectric. Therefore, a low-k dielectric can be grown on a dielectric. The method can be used, for example, to form interconnects using metal in a substrate that is located between dielectric locations in the substrate. These interconnects are then located in gaps in the low-k dielectric film. Since the film is a low-k dielectric film, the final capacitance and therefore the final RC constant will also be less than the final capacitance and final RC constant of a high-k dielectric that has been formed on the exposed dielectric locations.

[0011] In an embodiment of the present invention, a metal-containing film is grown on top of another dielectric and subsequently converted to a metal-organic framework (MOF) by providing at least one organic ligand vapor. An advantage of embodiments of the present invention is that only thin metal-containing films (e.g., <5 nm) are required because the metal-containing film undergoes volume expansion when converted to a MOF. Therefore, an advantage of embodiments of the present invention is that the selectivity requirements for the deposition of the metal-containing film are significantly reduced.

[0012] Furthermore, one advantage of embodiments of the present invention is that by forming a MOF, the porosity is increased compared to the initially deposited metal-containing film, which results in a reduction in the k value. Thus, a low-k dielectric film can be obtained at the dielectric site.

[0013] In addition, an advantage of embodiments of the present invention is that the MOF crystallizes during exposure to the organic linker. Thus, in embodiments of the present invention, crystals can be obtained that are edge-aligned with the dielectric sites where the MOF is formed, and thus no CD loss occurs during the anisotropic growth of the MOF. This is particularly true because the organic ligands are provided in the gas phase. Therefore, the building blocks of the coordinated metal ions generated by the addition of the organic linker will have a shorter diffusion length due to the absence or very limited amount of solvent. Therefore, low-k dielectric films can be selectively deposited on the exposed dielectric sites.

[0014] In an embodiment of the present invention, the area selective deposition method is an atomic layer deposition (ALD) method.

[0015] In an embodiment of the present invention, the metal-containing film is deposited so that it contains at least one metal ion or metal ion cluster selected from the following group: Zn, Fe, In, Co, Cu, Mn, Li, B, Cd, Hg, Mg, Al, Zr, Hf, Ti, Ta and Pr.

[0016] In an embodiment of the present invention, depositing the metal-containing film includes exposing the metal-containing film to an oxidizing agent, thereby forming a metal oxide.

[0017] In an embodiment of the present invention, the metal oxide may include, for example, one or more of the following elements: AlO x 、ZrO x , HfO x , ZnO, CoO x Or any other oxide of a metal from the following group: Zn, Fe, In, Co, Cu, Mn, Li, B, Cd, Hg, Mg, Al, Zr, Hf, Ti, Ta and Pr.

[0018] In an embodiment of the present invention, said at least one ligand is azole-based.

[0019] In an embodiment of the invention, said at least one ligand is a carboxylic acid.

[0020] In an embodiment of the invention, the number of deposition cycles is less than 150 or even less than 10.

[0021] Each deposition cycle may include an ALD deposition step followed by an oxidation step.

[0022] The method according to an embodiment of the present invention may further comprise the following steps:

[0023] applying an etch stop layer over the low-k dielectric film and the metal contacts between the dielectric locations;

[0024] depositing a gap-fill low-k dielectric on the etch stop layer so that the gap-fill low-k dielectric fills the gap in the low-k dielectric film;

[0025] Covering the gap-filled low-k dielectric with a hard mask;

[0026] patterning the hard mask, the gap-fill low-k dielectric, and the etch stop layer to form at least one opening toward the metal contact;

[0027] A metallization layer is applied to form at least one via in contact with a metal contact.

[0028] One advantage of embodiments of the present invention is that channels can be formed in gaps in low-k dielectric films by patterning and applying metallization layers. Since the low-k dielectric film is achieved by anisotropic growth of MOFs, no CD loss occurs and thus the gap space where the channel will be deposited is not reduced. The low-k dielectric film in this case forms an interlayer low-k dielectric at the channel height of the metallization layer.

[0029] After passivation with an etch stop layer and deposition of a gap-fill low-k dielectric, the channel pattern is sequentially transferred into these layers in a self-aligned manner, thus relaxing the requirements on lithographic overlay tolerance.

[0030] In an embodiment of the invention, the low-k dielectric film thus acts as an interlayer low-k dielectric at the metallization layer channel height. It is advantageous that the intermediate layer is a low-k dielectric, since this can reduce the final capacitance and RC delay.

[0031] One advantage of embodiments of the present invention is that interconnects with feature sizes as low as 40nm or even 20nm or even 10nm can be generated. This is achieved by self-aligned channel patterning using a metal-organic framework that selectively forms a low-k intermetallic dielectric at the channel height.

[0032] In a second aspect, embodiments of the present invention relate to a substrate structure comprising:

[0033] a substrate having a major surface including a metal region and a dielectric region,

[0034] wherein the dielectric region is covered by a low-k dielectric film, wherein gaps exist in the low-k dielectric film at some locations of the metal region, and wherein the low-k dielectric film is a metal-organic framework.

[0035] In an embodiment of the present invention, the thickness of the low-k dielectric film is between 1 and 250 nm.

[0036] In an embodiment of the present invention, the k value of the low-k dielectric film is less than 4.

[0037] In an embodiment of the invention, at least one of the gaps is filled with metal, thereby forming a via in contact with the underlying metal region.

[0038] In an embodiment of the present invention, the low-k dielectric film is covered by a gap-fill low-k dielectric comprising a pattern that is in electrical contact with at least one metal region through at least one via.

[0039] In a third aspect, embodiments of the present invention relate to a semiconductor device comprising a substrate structure according to embodiments of the present invention for interconnecting individual devices of the semiconductor device.

[0040] Particular and preferred aspects of the invention are set out in the accompanying independent and dependent claims. Features of the dependent claims may be combined with features of the independent claims and with features of other dependent claims as appropriate and not exclusively as explicitly set out in the claims.

[0041] These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 A cross-section of an exemplary substrate structure obtained after deposition of a metal-containing film according to an embodiment of the present invention is shown.

[0043] Figure 2 A cross-section of an exemplary substrate structure obtained after a gas phase conversion step according to an embodiment of the present invention is shown.

[0044] Figure 3 A cross-section of an exemplary substrate structure obtained after applying an etch stop layer according to an embodiment of the present invention is shown.

[0045] Figure 4 A cross-section of an exemplary substrate structure after depositing a gap-fill low-k dielectric and covering the gap-fill low-k dielectric with a hard mask is shown in accordance with an embodiment of the present invention.

[0046] Figure 5 A cross-section of an exemplary substrate structure obtained after applying a patterning step according to an embodiment of the present invention is shown.

[0047] Figure 6 A cross section of an exemplary substrate structure obtained after application of a metallization layer according to an embodiment of the present invention is shown.

[0048] Figure 7 A flow chart showing method steps according to an embodiment of the invention is shown.

[0049] Any reference signs in the claims should not be construed as limiting the scope.The same reference signs in different drawings denote the same or similar elements. DETAILED DESCRIPTION

[0050] The present invention will be described with respect to specific embodiments and with reference to certain drawings, but the invention is not limited thereto but only by the claims. The drawings described are merely schematic and non-limiting. In the drawings, the dimensions of some elements may be exaggerated and not drawn to scale for illustrative purposes. The dimensions and relative dimensions do not necessarily correspond to actual simplifications for practicing the present invention.

[0051] In addition, in the specification and claims, the terms top, below, etc. are used for descriptive purposes and not necessarily for describing relative positions. It should be understood that the terms so used are interchangeable under appropriate conditions, and the embodiments of the invention described herein can be operated in orientations other than those described or shown herein.

[0052] It should be noted that the term "comprising" used in the claims should not be understood as being limited to the means listed below, and does not exclude other elements or steps. Therefore, it should be understood as indicating the presence of the features, integrations, steps or components, but this does not exclude the presence or addition of one or more other features, integrations, steps or components or their combination. Therefore, the scope of the expression "a device comprising means A and B" should not be limited to a device consisting only of components A and B. It means that in the present invention, the only relevant components of the device are A and B.

[0053] The phrases "one embodiment" or "an embodiment" appearing in this specification indicate that at least one embodiment of the present invention includes a particular feature, structure, or characteristic in combination with the embodiment. Therefore, the phrases "in one embodiment" or "in an embodiment" appearing in various places in this specification do not necessarily all refer to the same embodiment, but may refer to different embodiments. In addition, it will be apparent to those skilled in the art from this disclosure that in one or more embodiments, the specific features, structures, or characteristics may be combined in any suitable manner.

[0054] Similarly, it should be understood that in the description of exemplary embodiments of the present invention, various features of the present invention are sometimes combined together in a single embodiment, figure, or description thereof for the purpose of improving the efficiency of the description of the present disclosure and assisting in the understanding of one or more various inventive aspects. However, this disclosure method should not be understood to reflect the following intention: the claimed invention requires more features than the statements in the claims. On the contrary, as reflected in the attached claims, the inventive aspects are manifested in less than all the features of a single preceding embodiment. Therefore, the claims attached after the specific embodiment are expressly incorporated into the specific embodiment, and each claim stands on its own to represent a separate embodiment of the present invention.

[0055] In addition, although some embodiments described herein include some but not other features contained in other embodiments, those skilled in the art will understand that it is intended to combine the features of different embodiments into the scope of the present invention and form different embodiments. For example, in the appended claims, any claimed embodiment can be used in any combination.

[0056] In the description provided, many specific details are set forth. However, it should be understood that embodiments of the present invention may be implemented without considering these specific details. In other instances, well-known methods, structures, and techniques are not shown in detail in order not to hinder the understanding of this description.

[0057] In embodiments of the present invention involving low-k dielectrics, low-k dielectrics refer to dielectrics having k values ​​below 4 or even below 3.9. The k value may be, for example, between 2 and 3, for example around 2.5.

[0058] In a first aspect, embodiments of the present invention are directed to a method 200 for selectively forming a low-k dielectric film 140 on exposed dielectric locations 130 in a substrate 10. Figure 7 The flowchart in illustrates various possible steps of this method. Figures 1 to 6 Portions of integrated circuit layers are illustrated, representing various steps of an exemplary method according to an embodiment of the invention.

[0059] The method 200 according to an embodiment of the present invention includes a step of depositing 210 a metal-containing film 110 selectively at exposed dielectric locations 130 using an area selective deposition (ASD) method using one or more deposition cycles. Figure 1 1 shows a cross section of an exemplary substrate structure obtained after this deposition step. It shows metal contacts 120 (e.g., Cu, Co, Ru, W) between dielectric locations 130 (e.g., SiO2), and metal-containing films 110 (e.g., ZnO, ZrO2) on exposed dielectric locations 130. x ).

[0060] The method 200 according to an embodiment of the present invention further includes providing 220 times at least one vapor of an organic ligand to the deposited metal-containing film 110 to cause a gas phase chemical reaction, thereby obtaining a metal-organic framework (MOF) 140, which is a low-k dielectric film 140, wherein the low-k dielectric film 140 has a gap 142 at a location where the metal-containing film is not deposited. The chemical reaction causes the metal-containing film 110 to be consumed and converted into an anisotropic layer of the metal-organic framework 140. The advantage of vapor phase precursors is that they are compatible with CMOS processing. An advantage of an embodiment of the present invention is that the metal-containing film 110 is converted into a MOF with a low k value by providing 220 times at least one vapor of an organic ligand to the deposited metal-containing film 110 to cause a gas phase chemical reaction to obtain a metal-organic framework (MOF). By adding the precursor, the metal-containing film expands and becomes porous, thereby resulting in a low-k MOF. The possible volume expansion is in the range of 5 to 20. For example, the metal-containing film can be thinner than 5 nm, or even thinner than 2 nm, or even 1 nm or thinner. For example, a metal-containing film with a thickness of 1 nm can result in a MOF with a thickness of 20 nm. A MOF thickness of 250 nm can be achieved. Since the thickness requirement for the metal-containing film is limited, only a limited number of deposition cycles are required.

[0061] In an embodiment of the present invention, an organic ligand is provided in the gas phase. Therefore, owing to the absence or only presence of a very limited amount of solvent, the building block of the coordinated metal ion generated by adding an organic linking agent will have a shorter diffusion length. In some conversion processes, the by-product of the reaction is water or alcohol. Although they mainly can evaporate in the conversion process, they can play a role in the assembling of the metal-organic skeleton layer. In an embodiment of the present invention, the part can be based on azoles. In an embodiment of the present invention, the part can be a carboxylic acid.

[0062] In a second aspect, embodiments of the present invention relate to a substrate structure 100, comprising: a substrate 10 having a major surface comprising a metal region 120 and a dielectric region 130, wherein the dielectric region 130 is covered by a low-k dielectric film 140, and wherein gaps 142 exist in the low-k dielectric film at some locations of the metal region 120, and wherein the low-k dielectric film 140 is a metal-organic framework. The low-k MOF can be distinguished from a high-k dielectric by material analysis. In the prior art substrate structure, the high-k dielectric covers the dielectric region 130.

[0063] Figure 21 shows a cross section of an exemplary substrate structure 100 according to an embodiment of the present invention. The substrate structure 100 is obtained after the gas phase conversion step 220. It shows a low-k dielectric film 140 that is a selective and anisotropic MOF layer. It also shows gaps 142 located at locations where no metal-containing film is deposited. The selective formation of the metal-organic framework is achieved by selectively growing a metal-containing film 110 (e.g., AlO x 、ZrO x , HfO x , ZnO, CoO x The region selective deposition method can be atomic layer deposition or molecular layer deposition.

[0064] Since ultra-low k values ​​are not strictly required in embodiments of the present invention (ie, k values ​​below 4 are sufficient in some cases), the metal-organic framework does not necessarily need to be crystalline. Amorphous or nanocrystalline metal-organic frameworks may be sufficient.

[0065] In an embodiment of the invention, the low-k dielectric film has a k value below 4. In an embodiment of the invention, the MOF is a microporous dielectric. The dielectric constant can vary with the framework composition and its topology (and with the presence or absence of guest molecules in the pores). Examples of MOFs with k values ​​below 4 are, among others: MOF-5, HKUST-1, ZIF-8, ZIF-67.

[0066] With regard to area selective deposition, it is preferred that the MOF 140 does not react with the exposed metal in the metal region 120 (e.g., metal lines). In an embodiment of the present invention, the CVD MOF process is compatible with SAM (self-assembled monolayer) / polymer passivation of the metal in the metal region 120, since such passivation has already occurred for ASD ALD metal oxides. The interaction between the organic ligand and the metal surface of the metal region 120 can be prevented by, for example, the SAM / polymer passivation maintained after ASD of the metal-containing film. However, the interaction between the exposed metal and the organic linker is not a necessary condition for a successful and selective conversion process. It will depend on the specific pairing of the exposed / oxidized metal and the organic linker and the conversion conditions (e.g., temperature). If there is no (significant) chemical reaction between the suitable metal surface and the organic ligand under the conversion conditions, the conversion can be said to be compatible with the proposed scheme. Thus, compatibility can be achieved by selecting organic ligands whose reaction with the exposed metal surface is not thermodynamically favorable or whose reaction with the exposed metal surface can be prevented by steric hindrance by the SAM / polymer passivation inherited from the previous ASD step. The temperature of the conversion treatment can be as low as 100°C (or even lower, such as as low as 80°C), which is compatible with a wide range of commonly used SAM / polymer passivation layers. For example, in the case of the Zn-based MOF ZIF-8, the lowest boundary of the conversion temperature for forming the MOF can be as low as 100°C, or even as low as 80°C.

[0067] WO 2015 / 166015 aims to address the problems associated with solvent-based solutions used in forming MOF membranes by alternatively using vapor phase precursors.

[0068] The method according to an embodiment of the present invention may be applied in a self-aligned channel patterning method, wherein the metal-organic framework 140 is used as a low-k intermetallic dielectric and is selectively formed at the channel height of the metallization layer.

[0069] In the context of interconnect applications, the target thickness of the selectively grown low-k dielectric 140 is in the range of 10-100 nm. To achieve relatively large pitch sizes, even a thickness of 250 nm may be required. This thickness range can be achieved by depositing a thin (e.g., <5 nm, or even 2 nm, or even 1 nm) metal-containing precursor film 110, wherein the desired thickness of the metal-containing precursor film depends on the metal ion density in the precursor film and the volume expansion of the specific metal-organic framework.

[0070] A method according to an embodiment of the present invention may include applying 230 an etch stop layer 150 on the low-k dielectric film 140 and on the metal contacts 120 between the dielectric locations 130 . Figure 3FIG. 1 shows a cross section of an exemplary substrate structure 100 according to an embodiment of the present invention. The substrate structure 100 is obtained after applying an etch stop layer 150. It shows the etch stop layer 150 (e.g., SiN) on the low-k dielectric film 140 and on the metal contact 120. x ).

[0071] The method according to an embodiment of the present invention may further include depositing 240 a gap-filling low-k dielectric 160 on the etch stop layer 150 so that the gap-filling low-k dielectric 160 fills the gap 142 in the low-k dielectric film. After this step, a step of covering 250 the gap-filling low-k dielectric 160 with a hard mask 170 may be performed. Figure 4 A cross section of an exemplary substrate structure 100 is shown after depositing 240 a gap-fill low-k dielectric 160 and covering 250 the gap-fill low-k dielectric 160 with a hard mask 170 in accordance with an embodiment of the present invention.

[0072] After passivation with an etch stop layer 150 and deposition of a gap-fill low-k dielectric 160, the channel pattern is successively transferred into these layers in a self-aligned manner, thereby relaxing the requirements on the lithography overlay tolerance.

[0073] Thus, a method according to an embodiment of the present invention may include patterning 260 the hard mask 170 , the gap-fill low-k dielectric 160 , and the etch stop layer 150 to form at least one opening toward the metal contact 120 . Figure 5 A cross-section of an exemplary substrate structure 100 is shown after applying a patterning step.

[0074] The method according to an embodiment of the invention may further comprise applying 270 a metallization layer resulting in at least one via 180 in contact with a metal contact. Figure 6 A cross section of an exemplary substrate structure 100 is shown after application of a metallization layer 180. Thus, a complete metallization layer N+1 is obtained on metallization layer N (after chemical mechanical planarization).

[0075] These method steps according to embodiments of the present invention may be implemented as a self-aligned patterning scheme in back-end processing.

[0076] Figure 7 Various possible steps of a method according to an embodiment of the present invention are shown. It shows a step 210 of selectively depositing a metal-containing film using one or more deposition cycles, followed by a step 220 of providing vapor of at least one organic ligand at least once. Each of these steps can be performed more than once. The sequence of deposition 210 of the metal-containing film and providing 220 of the vapor can also be performed cyclically. Figure 7Optional steps 230-270 are also shown.

[0077] An advantage of embodiments of the present invention is that the formed metal-organic framework 140 has an excellent combination of very low dielectric constant (even below 2.5) and relatively high Young's modulus (MOF is able to handle a wide range of YM values ​​from below 1 GPa to above 20 GPa).

[0078] An advantage of embodiments of the present invention is that the volume expansion associated with the conversion of the metal-containing film 110 into the metal-organic framework 140 can alleviate the selectivity requirements for the area-selective deposition process because a limited amount of selectively deposited metal precursor is required to form a relatively thick porous material compared to prior art methods, which more typically deposit high-k dielectric films on exposed dielectric locations.

[0079] It is also an advantage of embodiments of the present invention that a wide range of different MOFs can be formed by combining different transition metal precursor films with organic ligands (examples of transition metals of particular interest for using MOFs in interconnects are: Zn, Al, Hf, Zr, Sr, Co, Cu, Ni).

[0080] In summary, the method according to an embodiment of the present invention is based on sequential area selective deposition (ASD) of a metal-containing film 110 on an exposed dielectric site, wherein a metal-organic framework (MOF) 140 is formed by a continuous gas phase chemical reaction between the metal-containing film 110 and an organic ligand vapor. The exposed dielectric site may be a low-k dielectric site.

[0081] In a third aspect, embodiments of the invention relate to semiconductor devices comprising a substrate structure according to embodiments of the invention. The substrate structure may, for example, be part of a BEOL structure. Thus, the metal-organic framework may function as an interlayer low-k dielectric at the height of the metallization layer channel.

Claims

1. A method (200) for forming a substrate structure (100) comprising an interconnect, the method (200) comprising: - providing a substrate (10) comprising exposed dielectric locations (130) and metal contacts (120) located between the exposed dielectric locations (130); - selectively depositing (210) a metal-containing film (110) on said exposed dielectric locations (130) using an area selective deposition method using one or more deposition cycles; - providing (220) at least once vapor of at least one organic ligand to the deposited metal-containing film (110) to cause a gas phase chemical reaction, thereby obtaining a low-k dielectric film (140), wherein the low-k dielectric film (140) has a gap (142) at a location where the metal-containing film is not deposited; - applying (230) an etch stop layer (150) on the low-k dielectric film (140) and the metal contacts (120) located between the dielectric locations (130); - depositing (240) a gap-filling low-k dielectric (160) on the etch stop layer (150) so that the gap-filling low-k dielectric (160) fills the gap (142) in the low-k dielectric film; - covering (250) the gap-filled low-k dielectric (160) with a hard mask (170); - patterning (260) the hard mask (170), the gap-fill low-k dielectric (160) and the etch stop layer (150) to form at least one opening toward the metal contact (120); - Applying (270) a metallization layer, forming at least one channel (180) in contact with the metal contact.

2. The method (200) according to claim 1, characterized in that: The area selective deposition method (210) is an atomic layer deposition method.

3. The method (200) according to claim 1 or 2, characterized in that: The metal-containing film (110) is deposited (210) so that the metal-containing film (110) contains at least one metal ion or metal ion cluster selected from the following group: Zn, Fe, In, Co, Cu, Mn, Li, B, Cd, Hg, Mg, Al, Zr, Hf, Ti, Ta and Pr.

4. The method (200) according to claim 1 or 2, characterized in that: Depositing (210) the metal-containing film (110) includes exposing the metal-containing film (110) to an oxidizing agent to form a metal oxide.

5. The method (200) according to claim 1 or 2, characterized in that: The at least one ligand is azole-based.

6. The method (200) according to claim 1 or 2, characterized in that: The at least one ligand is a carboxylic acid.

7. The method (200) according to claim 1 or 2, characterized in that: The number of deposition cycles is less than 150 or even less than 10.

8. A substrate structure (100) formed by the method of any one of claims 1-7.

9. The substrate structure (100) according to claim 8, characterized in that: The thickness of the low-k dielectric film (140) is in the range of 1 to 250 nm.

10. The substrate structure (100) according to claim 8 or 9, characterized in that: The low-k dielectric film has a k value lower than 4.

11. A semiconductor device comprising the substrate structure (100) according to any one of claims 8 to 10 for interconnecting individual devices of the semiconductor device.

Images