Low frequency oscillator with ultra-low short circuit current

Abstract

The present application discloses a low frequency oscillator with ultra-low short circuit current. In the described example, a sawtooth waveform generator (301, 303) generates a sawtooth waveform with a first rise time. A comb waveform circuit (320) has a power supply terminal, which is coupled to receive the sawtooth waveform (vsup) from the output of the sawtooth waveform generator. The comb waveform circuit generates a comb waveform (310) in response to the sawtooth waveform. The comb waveform has a second rise time that is faster than the first rise time.

Description

Technical Field

[0001] The present application relates to low power oscillator circuits. Background Art

[0002] As the "Internet of Things" (IoT) becomes more prevalent, small portable or autonomous devices are powered by micro batteries or energy harvesting systems. In such devices, minimal power consumption is important. In many such devices, oscillators operating at low frequencies may be used. In many cases, the low frequency oscillator does not need to have good accuracy. Summary of the invention

[0003] In the described example, a sawtooth waveform generator generates a sawtooth waveform having a first rise time. A comb waveform circuit has a power supply terminal coupled to receive the sawtooth waveform from an output of the sawtooth waveform generator. The comb waveform circuit generates a comb waveform in response to the sawtooth waveform. The comb waveform has a second rise time that is faster than the first rise time. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] FIG1 is a block diagram of a conventional kHz oscillator.

[0005] FIG. 2 is a set of waveforms illustrating the operation of the oscillator of FIG. 1 .

[0006] Figure 3 is a block diagram of a kHz oscillator including a comb waveform generator for reducing short circuit current.

[0007] Figure 4 It is shown Figure 3 A set of waveforms for the operation of the oscillator.

[0008] Figure 5 yes Figure 3 A more detailed block diagram of a kHz oscillator.

[0009] Figure 6 Yes, you can Figure 3 Schematic diagram of the comb waveform generator used in .

[0010] Figure 7 Yes, you can Figure 3 Schematic diagram of another comb waveform generator used in .

[0011] Figure 8 Yes, you can Figure 3 Schematic diagram of another comb waveform generator used in .

[0012] Fig. 9 It is shown Figure 8 A set of voltage curves for the operation of a kHz oscillator.

[0013] Fig.10is a schematic diagram of a kHz oscillator including a duty cycle bias generator.

[0014] Fig.11 It is shown Fig.10 A set of curves for the operation of the duty cycle bias generator.

[0015] Fig.12 It is shown Fig.10 A set of waveforms for the operation of the oscillator.

[0016] Fig.13 It is shown Fig.10 A set of curves showing the operating frequency of a kHz oscillator over a range of parameters.

[0017] Fig.14 It is shown Fig.10 A set of curves showing the power consumption of a kHz oscillator over a range of parameters.

[0018] Fig.15 It is shown Figure 3 , Figure 7 , Figure 8 and Fig.10 Flowchart of the operation of the kHz oscillator.

[0019] Fig.16 is a block diagram of an example system including a low power oscillator. DETAILED DESCRIPTION

[0020] In the drawings, like elements are denoted by like reference numerals for consistency.

[0021] Small, low-power devices can be used in a wide range of applications, such as: residential and industrial sensors, medical implants, smart cards, IoT nodes and other applications. For such applications, low "standby" or "quiescent current" (Iq) is required. In order to achieve an Iq of only a few nanoamperes (nA), S / H techniques (sample and hold) running on very low frequency clocks can provide good results. For example, oscillators that generate low frequency clock signals can operate in the range of less than 10Khz.

[0022] For many applications, the oscillator generating the low frequency clock does not need to have good accuracy, but needs to have very low current consumption, since the oscillator must operate continuously and therefore contribute to Iq.

[0023] A relaxation oscillator is a conventional low frequency oscillator architecture. A relaxation oscillator is a nonlinear electronic oscillator circuit that produces a non-sinusoidal repetitive output signal, such as a triangle wave or a square wave. The circuit may include a feedback loop that includes a device that repeatedly charges a capacitor or an inductor through a resistor until it reaches a threshold level and then discharges it again. Examples of such devices include: (a) a switching device, such as a transistor, a comparator, a relay, or an operational amplifier; and (b) a negative resistance device, such as a tunnel diode. The period of the oscillator depends on the time constant of the capacitor or inductor circuit. The switching device switches rapidly between a charging mode and a discharging mode, and thus produces a discontinuously varying repetitive waveform, which may be referred to as a sawtooth waveform.

[0024] The sawtooth signal has very slow signal transitions, which may result in large short-circuit currents in the digital circuits of the feedback loop that tracks the sawtooth signal. Such short-circuit currents may limit ultra-low power operation in oscillators below 10 kHz.

[0025] Example embodiments include a comb waveform generator circuit for tracking a sawtooth signal and producing very fast voltage transitions, thereby reducing short-circuit currents in subsequent digital buffers. As described in more detail below, the comb waveform generator circuit adds zero additional current to conventional circuits. Instead of connecting the sawtooth signal directly to the input of a CMOS (complementary metal oxide semiconductor) inverter / buffer, the sawtooth signal is converted to a fast edge comb waveform by passing a slow sawtooth waveform through a PMOS (p-type MOS) transistor. By connecting the fast edge waveform to the CMOS inverter input, the short-circuit current in the CMOS inverter is greatly reduced. Therefore, extremely small short-circuit currents are achieved by faster edge rates at the buffer / inverter input.

[0026] Figure 1 is a block diagram of a conventional kHz oscillator. Figure 2 is a set of waveforms illustrating the operation of the oscillator of Figure 1. In this specification, the term "kHz oscillator" refers to a low frequency oscillator operating in the range typically below 10 kHz, although some examples may operate at frequencies above 10 kHz.

[0027] In this example, a sawtooth waveform is generated by a capacitor 101, which is charged by a current source 102 and discharged by a switching element 103. The switching element 103 is controlled by a double-edge one-shot circuit 104. A CMOS inverter 105 receives a sawtooth signal v1 on a signal line 110, which is shown by a curve 210 of FIG. 2 , and generates an output signal v2 on a signal line 111, which is shown by a curve 211 of FIG. 2 . A flip-flop 106 toggles in response to each falling edge of the sawtooth signal v1 to generate a square wave signal Φ on a signal line 112, which is shown by a curve 212 of FIG. 2 . The square wave signal Φ can then be used to initiate each activation of the switching device 103.

[0028] Assuming that the oscillator 100 operates at about 1kHz, the rising transition time of each pulse of the sawtooth signal v1 is about 0.5ms. This causes the inverter 105 to switch slowly, as indicated by the curve 211 in FIG. 2. This slow switching of the digital device can generate a "short-circuit" current when the pull-up transistor and the pull-down transistor in the output stage of the device are turned on at the same time. The current source 102 can be the only component that generates a continuous quiescent current, which can be only a few nanoamperes, but the short-circuit current can cause an average current consumption of 100nA or more of the oscillator 100.

[0029] In another type of low frequency oscillator, a technique based on transistor leakage may be used to reduce current consumption, but this technique is not stable for operation over a wide range of temperatures (eg, -40°C to 125°C).

[0030] In another type of low frequency oscillator, a slow ramp signal (such as a sawtooth signal) is received as input by a current biased comparator. This eliminates the short circuit current, but it requires additional bias current and reference voltage for the comparator. Therefore, in this type of oscillator, Iq is usually more than 5nA.

[0031] Figure 3 is a block diagram of a kHz oscillator 300 including a comb waveform generator 320 for reducing short circuit current in inverter 305 and inverter 308 . Figure 4 is a set of waveforms illustrating the operation of the oscillator 300. By configuring the inverter 305 to operate in a current-starved mode, a reduction in short-circuit current can be achieved. This can be accomplished by supplying power to the inverter 305 via the current source 321. In this way, the short-circuit current can be limited to a maximum value that the current source 321 can provide. This configuration causes the inverter 305 to trip at a point near the NMOS transistor threshold voltage (nch Vt) of the NMOS transistors in the output stage of the inverter 305. The NMOS transistor 1035 ( Fig.10) is an example. However, only with this improvement, the short-circuit current generated in the inverter 305 and the inverter 308 may remain higher than the desired value.

[0032] As a further improvement, the comb waveform generator 320 generates a comb waveform v1 with sharp edges (which can be received as input by the buffer / inverter 305) in response to the slow sawtooth waveform generated by the capacitor 301. Figure 4 As shown by curve 409 , comb waveform generator 320 consumes zero additional current (beyond the current consumed to generate the sawtooth waveform at node 309 ).

[0033] In this example, a sawtooth waveform is generated at node 309 by capacitor 301, which is charged by current source 302 and discharged by switch element 303. Switch element 303 is controlled by double-edge one-shot circuit 304 (pulse waveform generator), which generates a periodic pulse signal "D-mono" on signal line 313, as shown in FIG. Figure 4 304. The switch element 303 may be a MOS transistor or another type of switch device that can be controlled by the one-shot circuit 304. The comb waveform generator 320 receives the sawtooth signal from the node 309 and generates a comb waveform v1 on the signal line 310 in response thereto. The CMOS inverter 305: (a) receives the comb waveform signal v1 on the signal line 310, which is Figure 4 and (b) generating an output signal v2 on the signal line 311, which is Figure 4 The flip-flop 306 flips in response to each falling edge of the sawtooth signal v1 to generate a square wave signal Φ on the signal line 312, which is represented by Figure 4 The square wave signal Φ is then fed back to the one-shot circuit 304 to trigger each activation of the switch element 303 .

[0034] like Figure 4 As shown, the rise time of the signal v1 shown by curve 410 is much faster than the rise time of the sawtooth signal “vsup” shown by curve 409. Therefore, Figure 3 The inverter 305 of is switched quickly to produce the output signal v2, and the short circuit current is significantly reduced (compared to the configuration receiving the sawtooth signal as input through the inverter 305). Similarly, because the signal v2 has a fast rise time and fall time, Figure 3 The inverter 308 switches rapidly with insignificant short circuit current.

[0035] Figure 3Two buffer stages are shown, which are inverter 305 and inverter 308. In another example, these buffers can be implemented in a different configuration. For example, two non-inverting buffers can be used. Another example has only a single buffer stage.

[0036] In this example, the inverter 305 is configured to operate in an undercurrent mode using a current source 321 to reduce the short circuit current. In another example, the current source 321 can be omitted, and if the short circuit current is low enough, the inverter 305 can be operated in a normal full power mode due to the fast switching provided by the comb waveform generator 320. For example, when the inverter 305 is operated in the undercurrent mode, the oscillator 300 can draw an average current of 2.7 nA. In contrast, when the inverter 305 is operated in the full power mode, in one example, an average current of approximately 5 nA can be drawn.

[0037] Figure 5 yes Figure 3 3. More detailed block diagram of kHz oscillator 300 of FIG. 3. In this example, comb waveform generator 320 includes inverter 530, which receives at input a single-shot signal D-mono on signal line 313. The output of inverter 530 generates a comb waveform v1 on signal line 310. Inverter 530 receives its supply voltage (vsup) in the form of a sawtooth waveform from node 309, as Figure 4 As shown in curve 409.

[0038] In this example, with a Vdd supply voltage of 1.4V and a charging current for capacitor 301 set to 1.2nA via current source 302, the total average current of oscillator 300 is approximately 2.7nA.

[0039] Figure 6 Yes, you can Figure 3 Schematic diagram of the comb waveform generator 320 used in . In this example, the comb waveform generator 320 includes a p-type MOS (PMOS) transistor 631 and an n-type MOS (NMOS) transistor 632, which are connected in series to implement the inverter 530, such as Figure 5 As shown. The source terminal of the PMOS transistor 631 is connected to the signal line 309 and receives the sawtooth waveform vsup. The drain terminal of the PMOS transistor 631 is connected to the drain terminal of the NMOS transistor 632. The source terminal of the NMOS transistor 632 is coupled to the power bus Vss, which is usually connected to the ground. The gate inputs of the two MOS transistors 631 and 632 are connected to receive the single trigger signal D-mono on the signal line 313.

[0040] Reference again Figure 4, signal D-mono 413 remains low while sawtooth waveform vsup 409 ramps up. This causes NMOS transistor 632 ( Figure 6 ) remains off. As the sawtooth waveform 409 continues to rise, Figure 6 The PMOS transistor 631 is turned on and quickly pulls up the signal line 310 ( Figure 6 ) on the output signal v1, such as Figure 4 As shown in the pulse 414 in the signal line 310 ( Figure 6 ) flows through inverter 305 and inverter 308 ( Figure 6 ) and triggers the flip-flop 306 to flip, which triggers the single-shot circuit 304 ( Figure 6 ) to generate Figure 4 Pulse 415 turns on NMOS transistor 632 ( Figure 6 ) to pull the signal v1 on the signal line 310 low. Pulse 415 also turns on switch 303 ( Figure 6 ), which makes capacitor 301 ( Figure 6 ) discharge.

[0041] Figure 7 Yes, you can Figure 3 Schematic diagram of another exemplary comb waveform generator 720 used in . In this example, the comb waveform generator 720 includes a PMOS transistor 731 and an NMOS transistor 732, which are connected in series to implement an inverter 730. The inverter 730 is similar to , except that the gate input of the NMOS transistor 732 is connected to receive the one-shot signal D-mono on the signal line 313, and the gate input of the PMOS transistor 731 is connected to the reference voltage "Vref". Figure 5 Inverter 530. In this example, vsup on signal line 309 must rise to a value exceeding Vref before PMOS transistor 731 turns on to pull up signal v1 on output 710. In this way, reference voltage Vref sets the peak voltage height of comb waveform v1 on signal line 710. As Vref becomes higher, the peak value of signal v1 on signal line 710 becomes higher.

[0042] Figure 8 Yes, you can Figure 3 Schematic diagram of another comb waveform generator 820 used in. Fig. 9 It is shown Figure 8 A set of voltage curves for the operation of a kHz oscillator 800. This example uses a current sink 802 to charge a capacitor 801, causing the sawtooth supply voltage vsup on the signal line 809 to ramp down, as shown in FIG. Fig. 9 The curve 909 is shown. Then Figure 3In a manner similar to the operation of oscillator 300 , switching device 803 discharges capacitor 801 in response to control signal “D-mono” generated on signal line 813 by one-shot circuit 804 . Fig. 9 The curve 913 in FIG. 8 shows the signal D-mono on the signal line 813. The signal Φ on the signal line 812 is given by Fig. 9 In this example, a negative comb spike is formed on the signal line 810, as shown in the curve 912 in FIG. Fig. 9 As shown in the curve 910. A positive comb-shaped peak is formed on the signal line 811, as shown in Fig. 9 As shown in curve 911.

[0043] In this example, comb waveform generator 820 includes a PMOS transistor 831 and an NMOS transistor 832, which are connected in series to implement, for example, an inverter 830. Inverter 830 may be similar to FIG. 8 except that the gate input for PMOS transistor 831 is connected to receive a one-shot signal D-mono on signal line 813, and the gate input for NMOS transistor 832 is connected to a reference voltage "Vref". Figure 5 Inverter 530. When the signal D-mono on signal line 813 is low, PMOS transistor 831 turns on and pulls up the output signal v1 on signal line 810. This may cause a brief short circuit current to pass through transistor 832, but the duration of the D-mono pulse width is very small compared to the clock period (i.e., 50nS vs. 500us), so the impact on the overall average Iq is very small. In this example, before NMOS transistor 832 turns on to pull down output 810, vsup on signal line 809 must drop below the reference voltage Vref. In this way, the reference voltage Vref sets the peak voltage height of the comb waveform v1 on signal line 810. As Vref becomes lower, the peak value of the signal v1 on signal line 810 becomes higher.

[0044] Fig.10 is a schematic diagram of a kHz oscillator 1000 including a duty cycle bias generator 1040. Fig.11 It is shown Fig.10 A set of curves for the operation of the duty cycle bias generator. Fig.12 It is shown Fig.10 In this example, the oscillator 1000 is similar to Figure 6 The oscillator 300 generates a square wave clock signal Φ on the signal line 312, such as Fig.12 As shown in curve 1212.

[0045] The bias generator 1040 generates a bias voltage (vb) which is coupled to the gate of the PMOS transistor 1002 to form a current source to provide a charging current to the capacitor 301. The one-shot circuit 304 generates a pulse (eg, Fig.12 As shown in the curve 1213 of FIG. 1214 , the pulse controls the switching element 303. Therefore, a sawtooth waveform is formed on the signal line 309, and the sawtooth waveform is a comb waveform generator inverter 530 ( Figure 5 ) provides electricity, such as Fig.12 As shown in curve 1209.

[0046] Initially, the bias generator 1040 is reset by an active low power on reset (PORZ) signal, such as Fig.11 1064. The reset signal can be used to control a number of switches (coupled to various nodes within the bias generator 1040) to set or clear the nodes to an initial state. After the signal porz is de-asserted / invalid (having a high logic level), the bias generator 1040 begins operation. The current flowing through transistors 1060, 1062 and resistor 1063 forms a voltage divider at node 1064. A bias voltage (vb) is established across capacitor 1043 coupled to node 1064, as shown in FIG. Fig.11 The delayed "reference ready" signal (Iref_rdy) is asserted by charging a capacitor (not shown), as shown in FIG. Fig.11 As indicated by curve 1152 in , indicating that the bias generator is operating and the bias signal vb is stable.

[0047] Counter 1041 is coupled to receive a clock signal Φ on signal line 312 and is configured to output a bias enable (bias_en) pulse on signal line 1042 every N cycles of the clock signal Φ. This example has a counter, but other examples may have different types of known or later developed delay circuits to generate periodic pulses. The bias enable signal can be used to control several switches, such as switches 1046 and 1047, using bias generator 1040. Switches 1046, 1047 can be configured to conduct only during the time when the pulse on the bias enable signal on signal line 1042 is valid. When switches 1046, 1047 are in a non-conducting state, the current flowing through transistors 1060, 1061, and 1062 is blocked, and thus the power consumption of bias generator 1040 is minimized. During each time period when no current flows through transistors 1060, 1062, 1062, capacitor 1043 maintains the bias voltage at an approximately stable value. Initially, counter 1041 is disabled and the bias enable signal on line 1042 remains active until the reference ready signal is asserted.

[0048] The oscillator 1000 operates at a frequency determined by the capacitance C of the capacitor, the current amplitude (I) provided by the current source 1002, and the threshold voltage (VtN1) of the NMOS transistor 1035 forming the inverter 305, as shown in Expression (1).

[0049]

[0050] As described in more detail above, the comb waveform generator 530 generates a fast rising pulse v1 on the signal line 1010, such as Fig.12 In this example, the bias voltage vb is also coupled to the gate of the PMOS transistor 1021 to form a current source that provides power to the inverter 305, thereby causing the inverter 305 to operate in a current shortage mode, as shown in FIG. Figure 3-Figure 6 In response to the comb waveform v1, the inverter 305 generates a negative pulse signal v2 on the signal line 1011, as shown in FIG. Fig.12 As shown in curve 1211 in .

[0051] refer to Fig.12 , the period of the clock signal Φ is approximately 1.0ms and the frequency is approximately 1kHz. Fig.13 It is shown Fig.10 A set of curves of operating frequency of a kHz oscillator over a range of parameters. Curve 1371 represents nominal process parameters, while curve 1372 represents strong process parameters, and curve 1373 represents weak process parameters. In this example, at a nominal temperature of 30°C, the oscillator operates at 1 kHz. However, a fairly wide range of oscillator frequencies may occur over a range of temperatures and process parameters. As described above, some applications for low power systems may not be sensitive to variations such as those described herein.

[0052] Fig.14 It is shown Fig.10 A set of curves for the power consumption of a kHz oscillator of 1470 kHz over a range of parameters. Curve 1471 represents nominal process parameters, while curve 1472 represents strong process parameters, and curve 1473 represents weak process parameters. In this example, at a nominal temperature of 30°C and an operating voltage of 1.4V, the oscillator wastes approximately 3.8nW at an average current of 2.7nA.

[0053] Fig.15 It is shown Figure 3 , Figure 7 , Figure 8 and Fig.10 Flow chart of the operation of the kHz oscillator. As further described above, Figure 3 , Figure 7 and Figure 8The oscillator is a relaxation oscillator in which a capacitive or inductive element is repeatedly charged and discharged under the control of a switching device. The period of the oscillator depends on the time constant of the capacitor or inductor circuit. The switching device switches rapidly between the charging mode and the discharging mode and thus produces a discontinuously varying repetitive waveform, which may be referred to as a sawtooth waveform. At 1502, a sawtooth waveform is generated by using a square wave generated by the oscillator that is fed back to control the switching device.

[0054] At 1504, a comb waveform generator converts the sawtooth waveform into a comb waveform including periodic pulses. The sawtooth waveform has a relatively slow rise time, but each pulse of the comb waveform has a relatively fast rise time and fall time. The comb waveform generator can be implemented using a dual transistor inverter circuit powered by the sawtooth waveform. A pulse signal can be received as an input by the inverter. When the pulse signal and the sawtooth waveform reach a sufficient amplitude, the output of the inverter will quickly transition to form each pulse of the comb waveform. The pulse signal can be the same signal that controls the switching device of the sawtooth waveform generator.

[0055] At 1506, the digital buffer converts the comb waveform into a digital signal. Figure 3 As described, if the input signal has a slow transition, a short-circuit current may be generated in the output stage of the digital buffer. Therefore, by providing a comb waveform to the digital buffer, the short-circuit current is significantly reduced.

[0056] At 1508, a square wave is generated in response to the comb waveform. As further described above, a flip-flop can be used to flip between two logic levels when clocked by the comb waveform. The resulting square waveform can then be used to control a switching device of the sawtooth waveform generator. For example, a one-shot timing circuit can be flipped at each rise or, alternatively, each fall of the square waveform. The one-shot circuit can be configured to generate a short pulse each time it is triggered. The short pulse can be used to control the switching device and can be received as an input by the comb waveform generator buffer circuit.

[0057] System Example

[0058] Fig.16 is a block diagram of an example system 1600 including a low power oscillator 1681 as described herein. For example, the low frequency oscillator 1681 may be similar to Fig.101600. The oscillator 1681 can be coupled to the processing logic 1682 to provide a clock signal used by the processing logic 1682. The processing logic 1682 can be any known or later developed processing logic that requires a low frequency clock signal to operate. Similarly, the oscillator 1681 can be coupled to the sensing logic 1683 for use by the sensing logic 1683. The sensing logic 1683 can be any of a variety of known or later developed circuits or interfaces that can be used to sense external conditions, parameters, signals, etc. The processing logic 1682 can be coupled to the sensing logic 1683 and control the operation of the sensing logic 1683. In addition, the system 1600 may include additional interface logic and storage circuits.

[0059] Energy storage device 1680 provides energy to oscillator 1681 and other circuits within system 1600. In some examples, energy storage device 1680 may be a battery. In other examples, energy storage device 1680 may be a capacitor or inductor that is charged by energy scavenged from the surrounding environment, such as by near-field coupling, light energy, thermal energy, vibration energy, etc. Low-power operation of oscillator 1681 conserves power that can be used for energy storage device 1680.

[0060] System 1600 may be fabricated on an integrated circuit (IC) die using known or later developed fabrication techniques, and may be packaged as an IC package using known or later developed packaging techniques.

[0061] Other Examples

[0062] In the described example, the low power oscillator operates at a frequency of about 1 kHz. In other examples, the operating frequency can be higher or lower. For example, another low power oscillator can operate at a frequency of about 10 kHz.

[0063] Various configurations of inverting buffers are described herein. In other examples, non-inverting buffers may be used.

[0064] In the described example, the trigger logic module generates a square wave signal. In another example, an alternative type of state machine can be used to generate a square wave.

[0065] In another example, a square wave having other than a 50 / 50 on / off cycle may be implemented.

[0066] In the described example, the comb waveform generator is coupled to a relaxation oscillator.In another example, a comb waveform generator (as described herein) can be coupled to another type of digital circuit that can benefit from fast rise time signals to reduce short circuit currents within the digital logic.

[0067] In this specification, the term "couple" and its derivatives are intended to refer to indirect, direct, optical, and / or wireless electrical connections. Thus, if a first device couples to a second device, that connection may be through a direct electrical connection, through an indirect electrical connection via other devices and connections, through an optical electrical connection, and / or through a wireless electrical connection.

[0068] Modifications in the described examples are possible, and other examples are possible, within the scope of the claims.

Claims

1. An integrated circuit, or IC, comprising: a sawtooth waveform generator having a generator output, the sawtooth waveform generator being configured to generate a sawtooth waveform at the generator output, the sawtooth waveform having a first rise time; as well as a comb waveform circuit having a power supply input and a circuit output, the power supply input being coupled to the generator output and the comb waveform circuit being configured to generate a comb waveform at the circuit output in response to the sawtooth waveform, the comb waveform having a second rise time that is faster than the first rise time; The comb waveform circuit comprises: A p-type field effect transistor, namely a PFET, has a first drain, a first source and a first gate, The first source is coupled to the power supply input and the first drain is coupled to the circuit output; as well as An n-type field effect transistor, namely, an NFET, has a second drain, a second source, and a second gate, The second source is adapted to be coupled to a supply voltage, and the second drain is coupled to the first drain.

2. The IC of claim 1 , wherein the sawtooth waveform generator has a generator input, the comb waveform circuit has a circuit input, the generator output is a first generator output, the IC further comprises a pulse waveform generator having a second generator output, the pulse waveform generator is configured to generate a periodic pulse waveform at the second generator output, the generator input is coupled to the second generator output, and the circuit input is coupled to the second generator output.

3. The IC of claim 2, wherein the first gate and the second gate are coupled to the circuit input.

4. The IC of claim 2, wherein one of the first gate and the second gate is coupled to the circuit input, and a different one of the first gate and the second gate is adapted to be coupled to a reference voltage.

5. The IC of claim 1, wherein the IC further comprises: a buffer having a buffer input and a buffer output, the buffer input being coupled to the circuit output; a flip-flop having a clock input, a data input, and a flip-flop output, the clock input being coupled to the buffer output, the flip-flop output being coupled to the data input, and the flip-flop being configured to toggle the flip-flop output in response to the clock input; as well as Feedback logic is coupled between the flip-flop output and the sawtooth waveform generator.

6. The IC of claim 5, wherein the buffer comprises serially connected inverters, and at least one of the serially connected inverters has a power supply terminal adapted to be coupled to a current source.

7. An oscillator circuit, comprising: a sawtooth waveform generator having a first generator output, the sawtooth waveform generator being configured to generate a sawtooth voltage signal at the first generator output; a comb waveform generator having a power supply input and a second generator output, the power supply input being coupled to the first generator output; a buffer having a buffer input and a buffer output, the buffer input coupled to the second generator output; a flip-flop having a clock input, a data input, and a flip-flop output, the clock input being coupled to the buffer output, the flip-flop output being coupled to the data input, and the flip-flop being configured to toggle the flip-flop output in response to the clock input; as well as Feedback logic is coupled between the flip-flop output and the sawtooth waveform generator.

8. The oscillator circuit of claim 7, wherein the comb waveform generator comprises an inverter having a power supply terminal, an inverter input, and an inverter output, wherein the power supply terminal is coupled to the power supply input and the inverter output is coupled to the second generator output.

9. The oscillator circuit of claim 8, wherein the inverter comprises: a p-type field effect transistor, or PFET, having a first drain, a first source, and a first gate, the first source being coupled to the power supply terminal and the first drain being coupled to the inverter output; as well as An n-type field effect transistor, or NFET, has a second drain, a second source, and a second gate, the second source being adapted to be coupled to a supply voltage and the second drain being coupled to the first drain.

10. The oscillator circuit of claim 9, wherein the sawtooth waveform generator has a first generator input, the comb waveform generator has a second generator input, the oscillator circuit further comprises a pulse waveform generator having a third generator output, the pulse waveform generator being configured to generate a periodic pulse waveform at the third generator output, the first generator input being coupled to the third generator output, and the second generator input being coupled to the third generator output.

11. The oscillator circuit of claim 10, wherein the first gate and the second gate are coupled to the second generator input.

12. The oscillator circuit of claim 10, wherein one of the first gate and the second gate is coupled to the second generator input, and a different one of the first gate and the second gate is adapted to be coupled to a reference voltage.

13. The oscillator circuit of claim 7, wherein the buffer comprises inverters connected in series.

14. The oscillator circuit of claim 13, wherein at least one of the series-connected inverters has a supply terminal adapted to be coupled to a current source.

15. A method of operating a circuit, the method comprising: generating a sawtooth waveform having a first rise time in response to a periodic signal; as well as converting the sawtooth waveform into a comb waveform having a second rise time faster than the first rise time by using the sawtooth waveform to power a buffer circuit using current from the sawtooth waveform; The converting of the sawtooth waveform into the comb waveform includes receiving the sawtooth waveform at a source of a transistor of the buffer circuit, receiving a reference voltage at a gate of the transistor, and generating the comb waveform at a drain of the transistor.

16. The method of claim 15, wherein the transistor is a first transistor, the method further comprising receiving a pulse signal at a gate of a second transistor of the buffer circuit, a drain of the second transistor being connected to the drain of the first transistor, and a source of the second transistor being adapted to be coupled to a power supply voltage.

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