DC-DC converter and method for controlling a DC-DC converter

Abstract

The present application relates to a DC-DC converter and a method for controlling a DC-DC converter. The DC-DC converter includes: a transformer; a switch unit located on the primary side of the transformer; a synchronous rectification unit located on the secondary side of the transformer; and a control unit configured to control the moment of turning on and off the synchronous rectification unit; wherein the control unit includes: an excitation signal generating subunit configured to generate an excitation signal related to a start signal of the primary side when the DC-DC converter is turned on; and a delay time control subunit configured to use the excitation signal to delay the synchronous rectification unit by a first predetermined time relative to the moment when the DC-DC converter is turned on and turn on.

Description

Technical Field

[0001] The present disclosure relates to the field of power supplies, and in particular to a DC-DC converter with parallel startup and pre-bias functions and a method for controlling the DC-DC converter. Background Art

[0002] When multiple power modules are connected in parallel, each power supply starts and shuts down at different times, so when one of the power supplies is turned on and off, there will be a pre-bias voltage at the output of the power supply. When a voltage source is connected to the output of the power supply, if the power supply does not have a pre-bias function, the voltage on the load will be lowered when the power supply is started and shut down, causing energy to be recharged and damage the power supply components. The current pre-bias circuit is complex and has poor reliability, and there is still a reverse current when the output voltage is equal to the pre-bias voltage. Summary of the invention

[0003] A brief overview of the disclosure is given below in order to provide a basic understanding of certain aspects of the disclosure. However, it should be understood that this overview is not an exhaustive overview of the disclosure. It is not intended to identify the key or important parts of the disclosure, nor is it intended to limit the scope of the disclosure. Its purpose is simply to give certain concepts of the disclosure in a simplified form as a prelude to a more detailed description given later.

[0004] In view of the above problems, an object of the present disclosure is to provide a DC-DC converter and a method for controlling the DC-DC converter that can solve one or more disadvantages in the prior art.

[0005] According to one aspect of the present disclosure, a DC-DC converter is provided, which may include: a transformer; a switch unit located on the primary side of the transformer; a synchronous rectification unit located on the secondary side of the transformer; and a control unit configured to control the moment when the synchronous rectification unit is turned on and off; wherein the control unit includes: an excitation signal generating subunit configured to generate an excitation signal related to the start signal of the primary side when the DC-DC converter is turned on; and a delay time control subunit configured to enable the synchronous rectification unit to be turned on by delaying a first predetermined time relative to the moment when the DC-DC converter is turned on by using the excitation signal.

[0006] According to another aspect of the present disclosure, a method for controlling a DC-DC converter is provided, wherein the DC-DC converter includes a transformer, a switch unit located at the primary side of the transformer, and a synchronous rectification unit located at the secondary side of the transformer, wherein the method includes: based on the turning on of the DC-DC converter, an excitation signal related to the start-up signal of the primary side can be generated; and by using the excitation signal, the synchronous rectification unit can be turned on with a delay of a first predetermined time relative to the moment when the DC-DC converter is turned on.

[0007] According to other aspects of the present disclosure, a computer program code and a computer program product for implementing the method according to the present disclosure are also provided, as well as a computer-readable storage medium having the computer program code for implementing the method according to the present disclosure recorded thereon.

[0008] Other aspects of the embodiments of the present disclosure are given in the following description, wherein the detailed description is used to fully disclose the preferred embodiments of the embodiments of the present disclosure without imposing limitations thereon. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The above and other purposes, features and advantages of the present disclosure will be more easily understood by referring to the following description of the embodiments of the present disclosure in combination with the accompanying drawings. In the accompanying drawings, the same or corresponding technical features or components will be represented by the same or corresponding reference numerals.

[0010] Figure 1 It is a schematic structural diagram of a DC-DC converter with a hot-swap circuit in the prior art.

[0011] Figure 2 It is a schematic structural diagram of a parallel DC-DC converter in the prior art.

[0012] Figure 3 It is a schematic structural diagram of a master-slave power supply in the prior art.

[0013] Figure 4 is a schematic block diagram illustrating a DC-DC converter according to one embodiment of the present disclosure.

[0014] Figure 5 is a schematic circuit diagram illustrating a DC-DC converter according to one embodiment of the present disclosure.

[0015] Figure 6 is a timing diagram illustrating signal waveforms when the DC-DC converter according to an embodiment of the present disclosure is turned on.

[0016] Figure 7 is a timing diagram illustrating signal waveforms when the DC-DC converter according to an embodiment of the present disclosure is turned off.

[0017] Figure 8 is a schematic circuit diagram illustrating a DC-DC converter according to another embodiment of the present disclosure.

[0018] Fig. 9 is a schematic circuit diagram illustrating a DC-DC converter according to another embodiment of the present disclosure.

[0019] Fig.10 is a schematic circuit diagram illustrating a DC-DC converter according to another embodiment of the present disclosure.

[0020] Fig.11 is a schematic circuit diagram illustrating a DC-DC converter according to another embodiment of the present disclosure.

[0021] Fig.12 is a schematic circuit diagram illustrating parallel startup of DC-DC converters according to an embodiment of the present disclosure.

[0022] Fig.13 is a flowchart showing an example of a process of a method for controlling a DC-DC converter according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0023] In order to more clearly describe the DC-DC converter according to the embodiment of the present disclosure, a DC-DC converter in the prior art is first described.

[0024] Figure 1 It is a schematic structural diagram of a DC-DC converter with a hot-swap circuit in the prior art.

[0025] Figure 1 The DC-DC converter shown includes a transformer, a switch unit located at the primary side of the transformer, and a synchronous rectification unit located at the secondary side of the transformer. Figure 1 As shown, Vin+ and Vin- represent the positive input terminal and the negative input terminal of the switch unit, respectively, Vout+ and Vout- represent the positive and negative output terminals of the DC-DC converter, respectively, Np and Ns1 represent the primary winding and the secondary winding of the transformer, respectively, and PWM is the driving signal of the synchronous rectification unit.

[0026] At the output end of the DC-DC converter without pre-bias function, a hot-swap circuit, namely, a MOS field effect transistor Q1, can be connected in series to prevent energy recharge from occurring when the DC-DC converter is started and shut down, thereby preventing damage to the components of the DC-DC converter. That is, when the DC-DC converter is turned on and off, the delay time of Q1's opening and closing is controlled by the control circuit of Q1, namely, the MOSfet control circuit, thereby preventing other parallel DC-DC converters from establishing output voltage first and recharge through the output end to damage the components.

[0027] However, in Figure 1 In the DC-DC converter shown, adding a MOS field effect transistor Q1 will increase the cost. In addition, adding a MOSfet control circuit will make the circuit complicated. In addition, the efficiency of the DC-DC converter will be reduced when outputting a large current.

[0028] Figure 2 It is a schematic structural diagram of a parallel DC-DC converter in the prior art.

[0029] In a parallel DC-DC converter system, such as Figure 2 As shown, #1 and #2 are two parallel DC-DC converters.

[0030] Each DC-DC converter includes a transformer, a switch unit located on the primary side of the transformer, and a synchronous rectification unit located on the secondary side of the transformer. Figure 2 As shown, Vin+ and Vin- represent the positive input terminal and negative input terminal of the switch unit, respectively, Vout+ and Vout- represent the positive and negative output terminals of the DC-DC converter, respectively, Np and Ns1 represent the primary winding and secondary winding of the transformer, VCC is the auxiliary power supply of the secondary side, R1 and R2 are resistors, Vp is the bias voltage of the output end of a single DC-DC converter, and Vo is the output voltage of the DC-DC converter. PWM_in is the input signal of the Mosfet driver, PWM_out is the output signal of the Mosfet driver and is the driving signal of the synchronous rectification unit, and the Enable signal is the enable signal; when the Enable signal is at a low level, the Mosfet driver has no output, and when the Enable signal is at a high level, the output signal PWM_out of the Mosfet driver is the same as the input signal PWM_in.

[0031] exist Figure 2 In each DC-DC converter shown, Vp and capacitor C1 are connected in series with the positive pin of the comparator, so that the positive pin voltage of the comparator can reflect the change of the Vp voltage. The negative pin of the comparator is connected to the reference voltage REF. The comparator compares the positive pin voltage with the negative pin voltage, i.e., the reference voltage, to control the working state of the synchronous rectifier on the secondary side.

[0032] When the DC-DC converter is started, the voltage of the positive pin of the comparator is less than the voltage of the negative pin, the Enable signal is output at a low level, and the synchronous rectification unit works in the Schottky diode state. When the output voltage Vo of the DC-DC converter is lower than Vp, the Vp voltage remains unchanged and the Enable signal remains at a low level. When the output voltage Vo of the DC-DC converter is higher than Vp, the Vp voltage begins to rise, then the voltage of the positive pin of the comparator is greater than the voltage of the negative pin, the Enable signal changes from a low level to a high level, and the synchronous rectification unit switches from the Schottky diode state to the synchronous rectification state.

[0033] Figure 2 The parallel DC-DC converter shown can be used in an open-loop system, but the disadvantage is that when multiple DC-DC converters are connected in parallel, the start-up and shutdown time points of each DC-DC converter are inconsistent, and the Vp value will be affected by the output of other DC-DC converters. That is, although the output voltage Vo of a DC-DC converter is still lower than Vp, the Vp value may be affected by the output of other DC-DC converters and raised, and the Enable signal changes from a low level to a high level, so that the synchronous rectification MOSFET switches to the synchronous rectification state, causing energy backflow to damage the module.

[0034] Figure 3 It is a schematic structural diagram of a master-slave power supply in the prior art.

[0035] In a parallel power supply system, one power supply can be assigned as the master first and connected directly to the current sharing bus, and the remaining power supplies are slaves and obtain current signals from the current sharing bus. Figure 3 In the example, #1 is the master, working in voltage control mode, #2 is the slave, V in is the input voltage, V o is the output voltage, n p and n s They are the primary winding and the secondary winding, I_ BUS The signal representing the current sharing bus, I o represents the output current, R1 and R2 are resistors.

[0036] like Figure 3 As shown, the output current signal of the slave is compared with the signal of the current sharing bus through the error amplifier and then compensated to the reference voltage Ref. By adjusting the output voltage V o , and ultimately achieve the purpose of current sharing.

[0037] Figure 3The advantage of the master-slave power supply shown is that accurate current sharing can be achieved. The disadvantage is that if the master fails, the entire system will be completely paralyzed, and the wide-band voltage control loop is easily disturbed by noise, so the connection between the master and the slave should be as short as possible, which cannot be achieved in an open-loop converter.

[0038] In order to solve one or more of the above-mentioned shortcomings in the prior art, the technical solution of the present disclosure is proposed on the basis of taking efficiency, space and cost into consideration.

[0039] The present disclosure is described below with reference to block diagrams, circuit diagrams, etc. of devices according to embodiments of the present disclosure. It should be noted that for the purpose of clarity, the representation and description of components and processes that are not related to the present disclosure and are known to those of ordinary skill in the art are omitted in the drawings and descriptions. The terms used herein are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure.

[0040] Figure 4 is a schematic block diagram illustrating a DC-DC converter according to one embodiment of the present disclosure.

[0041] like Figure 4 As shown, the DC-DC converter 50 according to the embodiment of the present disclosure may include a transformer 501; a switch unit 502 located at the primary side of the transformer 501; a synchronous rectification unit 503 located at the secondary side of the transformer 501; and a control unit 504, the control unit 504 is configured to control the moment of turning on and off the synchronous rectification unit 503. The control unit 504 may include: an excitation signal generating subunit 5041, configured to generate an excitation signal related to the start signal of the primary side when the DC-DC converter 50 is turned on; and a delay time control subunit 5042, configured to use the excitation signal so that the synchronous rectification unit 503 can be turned on by delaying a first predetermined time relative to the moment when the DC-DC converter 50 is turned on.

[0042] exist Figure 4 In FIG. 5 , Vin+ and Vin- represent the positive input terminal and the negative input terminal of the switch unit 502, respectively, Vout+ and Vout- represent the positive and negative output terminals of the DC-DC converter 50, respectively, and Np and Ns1 represent the primary winding and the secondary winding of the transformer 501, respectively. The synchronous rectification unit 503 may include a MOS field effect transistor. For the convenience of description, the synchronous rectification unit 503 is described as equivalent to a MOS field effect transistor.

[0043] When the DC-DC converter 50 is turned on, the excitation signal generating subunit 5041 may generate an excitation signal related to the start signal of the primary side; and the delay time controlling subunit 5042 of the control unit 504 may use the excitation signal to enable the synchronous rectification unit 503 to be turned on by a first predetermined time delay relative to the moment when the DC-DC converter 50 is turned on. That is, the control unit 504 may control the synchronous rectification unit 503 to be turned on by a predetermined time delay relative to the moment when the DC-DC converter 50 is turned on, according to the excitation signal related to the start signal of the primary side generated when the DC-DC converter 50 is turned on, thereby preventing energy recharge from occurring when the DC-DC converter 50 is started and damaging the components of the DC-DC converter 50.

[0044] Preferably, the delay time control subunit 5042 may be further configured to, in response to the disappearance of the excitation signal, cause the synchronous rectification unit 503 to be turned off with a delay of a second predetermined time relative to the moment when the DC-DC converter 50 is turned off.

[0045] As an example, when the DC-DC converter 50 is turned off, the start signal of the primary side disappears, and the above-mentioned excitation signal also disappears accordingly. The delay time control subunit 5042 can delay the synchronous rectification unit 503 from being turned off by a predetermined time relative to the moment when the DC-DC converter 50 is turned off, thereby preventing energy backflow from occurring when the DC-DC converter 50 is turned off, thereby preventing damage to the components of the DC-DC converter 50.

[0046] Figure 5 is a schematic circuit diagram illustrating a DC-DC converter 50 according to one embodiment of the present disclosure.

[0047] Preferably, in the DC-DC converter 50 according to an embodiment of the present disclosure, the secondary side of the transformer 501 may have a first winding Ns1 and a second winding Ns2, wherein the first winding Ns1 may be connected to the synchronous rectification unit 503, the excitation signal generating subunit 5041 may include a second winding Ns2, a first diode D1 and a capacitor C1 connected in series, wherein the positive polarity end of the second winding Ns2 is connected to the anode of the first diode D1, the negative polarity end of the second winding Ns2 is connected to one end of the capacitor C1, the cathode of the first diode D1 is connected to the other end of the capacitor C1, and the excitation signal generating subunit 5041 may be further configured to use the second winding Ns2 for coupling to generate an excitation signal when the DC-DC converter 50 is turned on.

[0048] like Figure 5As shown, when the DC-DC converter 50 according to the embodiment of the present disclosure is turned on, in the excitation signal generating subunit 5041, an excitation signal related to the start signal of the primary side is generated through coupling through the second winding Ns2, and the excitation signal turns on the first diode D1. When the DC-DC converter 50 is turned off, the start signal of the primary side disappears, and the excitation signal also disappears quickly.

[0049] like Figure 5 As shown, the PWM_p signal is a driving signal of the MOS field effect transistor in the switch unit 502. By way of example and not limitation, the primary start signal may be the PWM_p signal. In addition, the primary start signal may also be a signal on the primary winding Np of the transformer 501 or a start signal of the DC-DC converter 50.

[0050] Preferably, the DC-DC converter 50 according to the embodiment of the present disclosure may further include: a driving unit 505, which may be configured to drive the synchronous rectification unit 503 to turn the synchronous rectification unit 503 on and off, wherein the control unit 504 may control the moment when the synchronous rectification unit 503 is turned on and off via the driving unit 505.

[0051] like Figure 5 As shown, PWM_in is the input signal of the driving unit 505, PWM_out is the output signal of the driving unit 505, and PWM_out is the driving signal of the synchronous rectification unit 503, that is, the driving unit 505 can drive the synchronous rectification unit 503 through PWM_out to turn the synchronous rectification unit 503 on and off. The Enable signal is the enable signal of the driving unit 505, and the Enable signal is controlled by the control unit 504. In the time period when the synchronous rectification unit 503 is turned off in the control unit 504, the Enable signal is at a low level, so that the driving unit 505 has no output; and in the time period when the synchronous rectification unit 503 is turned on in the control unit 504, the Enable signal is at a high level, so that the output signal PWM_out of the driving unit 505 is the same as the input signal PWM_in. By way of example and not limitation, PWM_in can be a signal that is phase-synchronized with PWM_p. By way of example and not limitation, the above-mentioned excitation signal can be a PWM_in signal.

[0052] It should be noted that the DC-DC converter 50 according to the embodiment of the present disclosure may not control the moment of turning on and off the synchronous rectification unit 503 via the driving unit 505, but may directly control the moment of turning on and off the synchronous rectification unit 503. However, for the sake of clarity, the following description is taken as an example of the moment when the DC-DC converter 50 controls the synchronous rectification unit 503 to be turned on and off via the driving unit 505.

[0053] Preferably, in the DC-DC converter 50 according to the embodiment of the present disclosure, the delay time control subunit 5042 may include an auxiliary power supply VCC, a voltage regulator diode D2, a capacitor C2, and a MOS field effect transistor Q3. The voltage regulator diode D2 is connected in parallel with the capacitor C2, the gate of the MOS field effect transistor Q3 is connected to the voltage regulator diode D2, the drain is connected to the output end of the control unit 504, and the source is grounded, and the delay time control subunit 5042 may be configured to charge the capacitor C2 with the auxiliary power supply VCC under the excitation of the excitation signal, so that the charging voltage of the capacitor C2 is equal to the sum of the voltage regulator value of the voltage regulator diode D2 and the threshold voltage of the MOS field effect transistor Q3 from the time when the excitation signal is generated to the time when the first predetermined time passes.

[0054] The following combination Figure 5 , specifically describing the operation of each component in the control unit 504 when the DC-DC converter 50 is turned on.

[0055] When the DC-DC converter 50 is turned on, the Ns2 winding receives the start-up signal of the primary side as an excitation signal and VCC begins to build up. The excitation signal turns on the first diode D1, so that the gate of the MOS field effect transistor Q1 is at a high level, the MOS field effect transistor Q1 is turned on, and then the gate of the MOS field effect transistor Q2 is at a low level, and the MOS field effect transistor Q2 is turned off. VCC charges the capacitor C2 through the resistor R5, and the cathode voltage D2_cathode of D2 (i.e., the charging voltage of the capacitor C2) slowly increases from 0 and becomes V at the time point (t=t1) from the generation of the excitation signal (t=0) to the first predetermined time t1. m1 (V m1 is the sum of the voltage regulation value of the voltage regulator diode D2 and the threshold voltage of the MOS field effect transistor Q3), that is, the threshold voltage of the MOS field effect transistor Q3 is reached at t=t1, thereby the MOS field effect transistor Q3 is turned on, the MOS field effect transistor Q4 is turned off, and the Enable signal changes to a high level after being maintained at a low level for the first predetermined time t1.

[0056] When VCC charges capacitor C2 through resistor R5, the cathode voltage D2_cathode of D2 is as shown in equation (1).

[0057]

[0058] In formula (1), V CC represents the voltage value of the auxiliary power supply VCC, R5 and R6 represent the resistance values ​​of resistors R5 and R6 respectively, C2 represents the capacitance value of capacitor C2, V Zrepresents the voltage regulation value of the Zener diode D2, and VG(th) represents the threshold voltage of the MOS field effect transistor Q3.

[0059] V m1 The formula is shown in equation (2).

[0060] V m1 =V z +V G(th) (2)

[0061] By replacing D2_cathode in formula (1) with Vm1 in formula (2), the first predetermined time t1 can be calculated.

[0062] Preferably, after the first predetermined time, the output voltage of the DC-DC converter 50 is higher than the pre-bias voltage. Figure 5 Set the pre-bias voltage between Vout+ and Vout-.

[0063] As a specific example, before t=t1, Enable is at a low level, PWM_out has no output, and the synchronous rectification unit 503 works in a Schottky state, so that the output voltage of the DC-DC converter 50 increases. After t=t1, the output voltage is higher than the pre-bias voltage, Enable is at a high level, PWM_out has an output, that is, PWM_out is the same as PWM_in, and the synchronous rectification unit 503 is switched to the synchronous rectification working state.

[0064] Figure 6 is a timing diagram illustrating signal waveforms when the DC-DC converter 50 according to an embodiment of the present disclosure is turned on.

[0065] like Figure 6 As shown, it is assumed that at time t=0, the DC-DC converter 50 is turned on and generates a driving signal PWM_p for the MOS field effect transistor in the switch unit 502. The input signal PWM_in of the drive unit 505 is phase-synchronized with PWM_p. Starting from t=0, the cathode voltage D2_cathode of D2 slowly increases from 0 and becomes V m1 Before t=t1, Enable is at a low level, and PWM_out has no output. After t=t1, the output voltage of the DC-DC converter 50 is higher than the pre-bias voltage, Enable is at a high level, and PWM_out has an output, that is, PWM_out is the same as PWM_in. In addition, after t=t1, the cathode voltage D2_cathode of D2 can continue to rise directly to Figure 6 The voltage V s Among them, V S The formula is shown in equation (3).

[0066]

[0067] It can be seen from the above description that the control unit 504 in the DC-DC converter 50 according to the embodiment of the present disclosure is simple in design and easy to implement, and the electronic components used are only resistors, capacitors, MOS field effect transistors, etc., so the price cost of the control unit 504 is low. In addition, no power components are used in the control unit 504, so the power consumption is very low. Furthermore, the DC-DC converter 50 uses the parasitic body diode in the MOS tube of the synchronous rectification unit 503 through the control unit 504 to realize the parallel startup of multiple open-loop DC-DC converters (for a specific description of the parallel startup of the DC-DC converter according to the embodiment of the present disclosure, please refer to the following combined Fig.12 and has a pre-bias startup function.

[0068] Preferably, the delay time control subunit 5042 can be configured to discharge the first capacitor C2 when the excitation signal disappears, so that at the time point from the disappearance of the excitation signal to the passage of the second predetermined time, the discharge voltage of the first capacitor C2 is equal to the sum of the voltage regulation value of the Zener diode D2 and the threshold voltage of the MOS field effect transistor Q3.

[0069] As a specific example, when the DC-DC converter 50 is turned off, the start-up signal on the primary side disappears, and the excitation signal on the Ns2 winding also disappears quickly. VCC will remain at a high level for a period of time due to the effect of capacitor C3. Since the excitation signal on the Ns2 winding disappears, the gate of the MOS field effect transistor Q1 becomes a low level, so the MOS field effect transistor Q1 is disconnected, and the MOS field effect transistor Q2 is turned on. The capacitor C2 discharges through the resistor R4. From the moment the excitation signal disappears, the cathode voltage D2_cathode of D2 drops rapidly from Vs. When t=t2, the cathode voltage D2_cathode of D2 becomes V m2 (V m2 When the gate voltage of the MOS field effect transistor Q3 is lower than its threshold voltage, the MOS field effect transistor Q3 is turned off, and the MOS field effect transistor Q4 is turned on, Enable is quickly pulled down to a low level, and the synchronous rectification unit 503 is turned off and thus operates in the Schottky state.

[0070] When capacitor C2 is discharged through resistor R4, cathode voltage D2_cathode of D2 is as shown in equation (4).

[0071]

[0072] V m2The formula is shown in equation (5).

[0073] V m2 =V z +V G(th) (5)

[0074] Substituting Vm2 in formula (5) for D2_cathode in formula (4), the second predetermined time t2 can be calculated.

[0075] By the way, in Figure 5 In addition to the components mentioned above, there are also resistors R1, R2, R3, R7 and R8, which will not be described in detail here.

[0076] Figure 7 is a timing diagram illustrating signal waveforms when the DC-DC converter 50 according to an embodiment of the present disclosure is turned off.

[0077] like Figure 7 As shown, assuming that at time t=0, the DC-DC converter 50 receives a shutdown signal, the drive signal PWM_p of the MOS field effect transistor in the switch unit 502 disappears or lasts for a period of time, and the input signal PWM_in of the drive unit 505 also disappears quickly or lasts for a period of time or continues. Figure 7 , which is clearly illustrated in the figure. When the excitation signal disappears, the cathode voltage D2_cathode of D2 starts to drop from Vs. Before t=t2, Enable is high level, PWM_out has output, that is, PWM_out is the same as PWM_in. After t=t2 (that is, the cathode voltage D2_cathode of D2 becomes Vm2), Enable becomes low level, and PWM_out has no output.

[0078] It can be seen from the above description that in the DC-DC converter 50 according to the embodiment of the present disclosure, the delay time of the turn-on and turn-off of the synchronous rectification unit 503 can be adjusted without interfering with each other, thereby overcoming the defect of the existing DC-DC converter that it occupies a large space and improving the efficiency of the DC-DC converter 50.

[0079] In addition to the above-described embodiments, the DC-DC converter may also be implemented in other ways.

[0080] Figure 8 is a schematic circuit diagram illustrating a DC-DC converter 80 according to another embodiment of the present disclosure.

[0081] Figure 8 The DC-DC converter 80 and Figure 5The difference between the DC-DC converter 50 and the control unit 804 is that the specific circuit structure of the control unit 504 is different, and the repeated description is omitted here. Figure 8 As shown, the control unit 804 includes an excitation signal generating subunit 8041 and a delay time control subunit 8042. The circuit structure of the delay time control subunit 8042 is substantially the same as that of the delay time control subunit 5042, so the detailed description of the delay time control subunit 8042 is omitted here.

[0082] In the DC-DC converter 80 according to an embodiment of the present disclosure, the secondary side of the transformer 501 has a first winding Ns1, wherein the first winding Ns1 is connected to the synchronous rectification unit 503, the excitation signal generating subunit 8041 may include a first winding Ns1, a first diode D1 and a capacitor C1 connected in series, wherein the positive polarity end of the first winding Ns1 is connected to the anode of the first diode D1, the negative polarity end of the first winding Ns1 is connected to one end of the capacitor C1, the cathode of the first diode D1 is connected to the other end of the capacitor C1, and the excitation signal generating subunit 8041 may be configured to generate an excitation signal through the first winding Ns1 when the DC-DC converter 80 is turned on.

[0083] Fig. 9 is a schematic circuit diagram illustrating a DC-DC converter 90 according to another embodiment of the present disclosure.

[0084] Fig. 9 The DC-DC converter 90 and Figure 5 The difference between the DC-DC converter 50 and the control unit 904 is that the specific circuit structure of the control unit 504 is different, and the repeated description is omitted here. Fig. 9 As shown, the control unit 904 includes an excitation signal generating subunit 9041 and a delay time control subunit 9042. The circuit structure of the delay time control subunit 9042 is substantially the same as that of the delay time control subunit 5042, so the detailed description of the delay time control subunit 9042 is omitted here.

[0085] In the DC-DC converter 90 according to an embodiment of the present disclosure, the secondary side of the transformer 501 has a first winding Ns1 and a second winding Ns3, wherein the first winding Ns1 is connected to the synchronous rectification unit 503, the excitation signal generating subunit 9041 may include a second winding Ns3, a first diode D1 and a capacitor C1, wherein the positive polarity end of the second winding Ns3 is connected to the anode of the first diode D1 and is also connected to the positive pole of the auxiliary power supply VCC of the secondary side, the negative polarity end of the second winding Ns3 is connected to one end of the capacitor C1 and is also connected to the negative pole of the auxiliary power supply VCC, the cathode of the first diode D1 is connected to the other end of the capacitor C1, and the excitation signal generating subunit 9041 may be configured to generate an excitation signal through the second winding Ns3 when the DC-DC converter 90 is turned on.

[0086] Fig.10 is a schematic circuit diagram illustrating a DC-DC converter 10 according to another embodiment of the present disclosure.

[0087] Fig.10 The DC-DC converter 10 and Figure 5 The difference between the DC-DC converter 50 and the control unit 104 is that the specific circuit structure of the control unit 504 is different, and the repeated description is omitted here. Fig.10 As shown, the control unit 104 includes an excitation signal generating subunit 1041 and a delay time controlling subunit 1042. The circuit structure of the delay time controlling subunit 1042 is substantially the same as that of the delay time controlling subunit 5042, so the detailed description of the delay time controlling subunit 1042 is omitted here.

[0088] In the DC-DC converter 10 according to the embodiment of the present disclosure, the transformer 501 has an isolation unit 1011, and the excitation signal generating subunit 1041 may include the isolation unit 1011, a first diode D1 and a capacitor C1, wherein the isolation unit 1011 is connected to the anode of the first diode D1, the cathode of the first diode D1 is connected to one end of the capacitor C1, the primary start signal may be the drive signal PWM_p of the switch unit 502, and the excitation signal generating subunit 1041 may be configured to generate an excitation signal through the isolation unit 1011 when the DC-DC converter 10 is turned on.

[0089] Fig.11 is a schematic circuit diagram illustrating a DC-DC converter 11 according to another embodiment of the present disclosure.

[0090] Fig.11 The DC-DC converter 11 and Figure 5The difference between the DC-DC converter 50 in FIG. 1 and FIG. 2 is that the specific circuit structure of the control unit 114 is different from that of the control unit 504, and the description of the repeated parts is omitted here. Fig.11 As shown, the control unit 114 includes an excitation signal generating subunit 1141 and a delay time control subunit 1142. The circuit structure of the delay time control subunit 1142 is substantially the same as that of the delay time control subunit 5042, so the detailed description of the delay time control subunit 1142 is omitted here.

[0091] In the DC-DC converter 11 according to an embodiment of the present disclosure, the transformer 501 has an isolation unit 1111, and the excitation signal generating subunit 1141 may include the isolation unit 1111, a first diode D1 and a capacitor C1, wherein the isolation unit 1111 is connected to the anode of the first diode D1, the cathode of the first diode D1 is connected to one end of the capacitor C1, the primary start signal may be the primary power-on signal S-On / Off, and the excitation signal generating subunit 1141 may be configured to generate an excitation signal through the isolation unit 1111 when the DC-DC converter 11 is turned on.

[0092] Fig.12 is a schematic circuit diagram illustrating parallel startup of DC-DC converters according to an embodiment of the present disclosure. Fig.12 , converter #1 and converter #2 are shown in parallel. At startup, under the action of the control unit 504, the synchronous rectification MOS tubes in the synchronous rectification unit 503 are all working in the body diode rectification state before the output voltage of converter #1 and converter #2 reaches the predetermined value Vo, that is, from the generation of the excitation signal (t=0) to the first predetermined time point t1. Therefore, even if one of the converters is started first and reaches Vo due to different startup times, it will not flow back to other converters and damage other converters, thereby realizing the parallel startup function of multiple open-loop DC-DC converters.

[0093] In addition, the present disclosure also provides the following embodiments of a method for controlling a DC-DC converter.

[0094] Fig.13 is a flow chart showing an example of a process of a method for controlling a DC-DC converter according to an embodiment of the present disclosure. Fig.13 As shown, the method 13 for controlling a DC-DC converter according to an embodiment of the present disclosure includes an excitation signal generating step S131 and a delay time controlling step S132.

[0095] The DC-DC converter includes a transformer, a switch unit located at a primary side of the transformer, and a synchronous rectification unit located at a secondary side of the transformer.

[0096] In the excitation signal generating step S131 , an excitation signal related to the start-up signal of the primary side may be generated based on the activation of the DC-DC converter.

[0097] In the delay time control step S132 , the synchronous rectification unit can be turned on with a delay of a first predetermined time relative to the moment when the DC-DC converter is turned on.

[0098] That is, in the method 13 for controlling the DC-DC converter, the synchronous rectification unit can be controlled to be turned on by a predetermined time delay relative to the moment when the DC-DC converter is turned on, according to the excitation signal related to the primary side start signal generated when the DC-DC converter is turned on. In this way, energy back injection is prevented from occurring when the DC-DC converter is started, thereby damaging the components of the DC-DC converter.

[0099] Preferably, in the delay time control step S132, in response to the disappearance of the excitation signal, the synchronous rectification unit can be turned off with a delay of a second predetermined time relative to the moment when the DC-DC converter is turned off.

[0100] As a specific example, when the DC-DC converter is turned off, the start signal of the primary side disappears, and the above-mentioned excitation signal also disappears accordingly. In the delay time control step S132, the synchronous rectification unit is turned off after a predetermined time delay relative to the moment when the DC-DC converter is turned off. In this way, it is possible to prevent energy recirculation from occurring when the DC-DC converter is turned off, thereby damaging the components of the DC-DC converter.

[0101] In the foregoing specification, the present disclosure has been described with reference to specific embodiments. However, it will be appreciated by those skilled in the art that various modifications and changes may be made without departing from the scope of the present disclosure as defined in the claims.

Claims

1. A DC-DC converter (50, 80, 90, 10, 11), comprising: Transformer (501); A switch unit (502) located on the primary side of the transformer (501); a synchronous rectification unit (503) located on the secondary side of the transformer (501); as well as A control unit (504, 804, 904, 104, 114) is configured to control the timing of turning on and off the synchronous rectification unit (503), The DC-DC converter (50, 80, 90, 10, 11) is characterized in that the control unit (504, 804, 904, 104, 114) comprises: An excitation signal generating subunit (5041, 8041, 9041, 1041, 1141) is configured to generate an excitation signal related to the start-up signal of the primary side when the DC-DC converter (50, 80, 90, 10, 11) is turned on; and The delay time control subunit (5042, 8042, 9042, 1042, 1142) is configured to use the excitation signal to make the synchronous rectification unit (503) turn on after a delay of a first predetermined time relative to the moment when the DC-DC converter (50, 80, 90, 10, 11) is turned on, The delay time control subunit (5042, 8042, 9042, 1042, 1142) is further configured to, in response to the disappearance of the excitation signal, cause the synchronous rectification unit (503) to be turned off with a delay of a second predetermined time relative to the moment when the DC-DC converter (50, 80, 90, 10, 11) is turned off.

2. The DC-DC converter (50, 80, 90, 10, 11) according to claim 1, wherein: The delay time control subunit (5042, 8042, 9042, 1042, 1142) includes an auxiliary power supply (VCC), a voltage regulator diode (D2), a first capacitor (C2) and a MOS field effect transistor (Q3). The voltage stabilizing diode (D2) is connected in parallel with the first capacitor (C2), The gate of the MOS field effect transistor (Q3) is connected to the voltage stabilizing diode (D2), the drain is connected to the output terminal of the control unit (504, 804, 904, 104, 114), and the source is grounded, and The delay time control subunit (5042, 8042, 9042, 1042, 1142) is configured to enable the auxiliary power supply (VCC) to charge the first capacitor (C2) under the stimulation of the excitation signal, so that from the time when the excitation signal is generated to the time when the first predetermined time passes, the charging voltage of the first capacitor (C2) is equal to the sum of the stabilization value of the voltage-regulating diode (D2) and the threshold voltage of the MOS field effect transistor (Q3).

3. The DC-DC converter (50, 80, 90, 10, 11) according to claim 2, wherein: After the first predetermined time, the output voltage of the DC-DC converter (50, 80, 90, 10, 11) is higher than the pre-bias voltage.

4. The DC-DC converter (50, 80, 90, 10, 11) according to claim 2, wherein: The delay time control subunit (5042, 8042, 9042, 1042, 1142) is configured to discharge the first capacitor (C2) when the excitation signal disappears, so that at the time point from the disappearance of the excitation signal to the passage of the second predetermined time, the discharge voltage of the first capacitor (C2) is equal to the sum of the zener voltage value of the zener diode (D2) and the threshold voltage of the MOS field effect transistor (Q3).

5. The DC-DC converter (50, 80, 90, 10, 11) according to claim 1, wherein: The secondary side of the transformer (501) has a first winding (Ns1) and a second winding (Ns2), wherein the first winding (Ns1) is connected to the synchronous rectification unit (503), The excitation signal generating subunit (5041) comprises the second winding (Ns2), a first diode (D1) and a second capacitor (C1) connected in series, wherein the positive polarity end of the second winding (Ns2) is connected to the anode of the first diode (D1), the negative polarity end of the second winding (Ns2) is connected to one end of the second capacitor (C1), and the cathode of the first diode (D1) is connected to the other end of the second capacitor (C1); The excitation signal generating subunit (5041) is further configured to generate the excitation signal by coupling with the second winding (Ns2) when the DC-DC converter (50) is turned on.

6. The DC-DC converter (50, 80, 90, 10, 11) according to claim 1, wherein: The secondary side of the transformer (501) has a first winding (Ns1), wherein the first winding (Ns1) is connected to the synchronous rectification unit (503), The excitation signal generating subunit (8041) comprises the first winding (Ns1), the first diode (D1) and the second capacitor (C1) connected in series, wherein the positive polarity end of the first winding (Ns1) is connected to the anode of the first diode (D1), the negative polarity end of the first winding (Ns1) is connected to one end of the second capacitor (C1), the cathode of the first diode (D1) is connected to the other end of the second capacitor (C1), and The excitation signal generating subunit (8041) is further configured to generate the excitation signal through the first winding (Ns1) when the DC-DC converter (80) is turned on.

7. The DC-DC converter (50, 80, 90, 10, 11) according to claim 1, wherein: The secondary side of the transformer (501) has a first winding (Ns1) and a second winding (Ns3), wherein the first winding (Ns1) is connected to the synchronous rectification unit (503), The excitation signal generating subunit (9041) comprises the second winding (Ns3), a first diode (D1) and a second capacitor (C1), wherein the positive polarity end of the second winding (Ns3) is connected to the anode of the first diode (D1) and is also connected to the positive electrode of the auxiliary power supply (VCC) of the secondary side, the negative polarity end of the second winding (Ns3) is connected to one end of the second capacitor (C1) and is also connected to the negative electrode of the auxiliary power supply (VCC), the cathode of the first diode (D1) is connected to the other end of the second capacitor (C1), and The excitation signal generating subunit (9041) is further configured to generate the excitation signal through the second winding (Ns3) when the DC-DC converter (90) is turned on.

8. The DC-DC converter (50, 80, 90, 10, 11) according to claim 1, wherein: The transformer (501) has an isolation unit (1011), The excitation signal generating subunit (1041) comprises the isolation unit (1011), a first diode (D1) and a second capacitor (C1), wherein the isolation unit (1011) is connected to the anode of the first diode (D1), the cathode of the first diode (D1) is connected to one end of the second capacitor (C1), The primary side start signal is a driving signal of the switch unit (502), and The excitation signal generating subunit (1041) is further configured to generate the excitation signal through the isolation unit (1011) when the DC-DC converter (10) is turned on.

9. The DC-DC converter (50, 80, 90, 10, 11) according to claim 1, wherein: The transformer (501) has an isolation unit (1111), The excitation signal generating subunit (1141) comprises the isolation unit (1111), a first diode (D1) and a second capacitor (C1), wherein the isolation unit (1111) is connected to the anode of the first diode (D1), the cathode of the first diode (D1) is connected to one end of the second capacitor (C1), The start signal of the primary side is a power-on signal of the primary side, and The excitation signal generating subunit (1141) is further configured to generate the excitation signal through the isolation unit (1111) when the DC-DC converter (11) is turned on.

10. The DC-DC converter (50, 80, 90, 10, 11) according to claim 1, further comprising: a driving unit (505) configured to drive the synchronous rectification unit (503) to turn the synchronous rectification unit (503) on and off, The control unit (504, 804, 904, 104, 114) controls the timing of turning on and off the synchronous rectification unit (503) via the driving unit (505).

11. A method for controlling a DC-DC converter, the DC-DC converter comprising a transformer, a switch unit located at a primary side of the transformer, and a synchronous rectification unit located at a secondary side of the transformer, the method comprising: an excitation signal generating step, based on the activation of the DC-DC converter, generating an excitation signal related to the start-up signal of the primary side, The method is characterized in that the method further comprises: a delay time control step, using the excitation signal to make the synchronous rectification unit turn on with a delay of a first predetermined time relative to the moment when the DC-DC converter is turned on; Wherein, in the delay time control step, in response to the disappearance of the excitation signal, the synchronous rectification unit is turned off with a delay of a second predetermined time relative to the moment when the DC-DC converter is turned off.

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