A method and system for testing voltage sag tolerance

Abstract

A method and system for testing voltage sag tolerance include: placing a device under test in a test environment with a voltage amplitude of zero, using a dichotomy method to find the longest tolerance time; determining whether the device under test is a Class I or Class II tolerance device by increasing the voltage amplitude based on the longest tolerance time; and testing the device under test using a preset method based on the type of the device under test to obtain a tolerance curve. This solution first categorizes the device under test into Class I and Class II devices based on the longest tolerance time, and adopts corresponding testing methods based on the tolerance curve characteristics of different device types, thereby improving testing speed. This solution also considers the shape characteristics of the tolerance curve of the device under test by testing Class I and Class II devices using their respective testing methods, thereby improving test accuracy.

Description

Technical Field

[0001] The present invention relates to the technical field of voltage sag tolerance testing, and in particular to a method and system for testing voltage sag tolerance. Background Art

[0002] With the development of power technology and the advancement of smart grid construction, the power system is undergoing tremendous changes. On the one hand, the widespread use of new equipment such as programmable logic controllers, computers, and inverters is placing increasingly stringent demands on grid power quality. On the other hand, the massive influx of distributed power sources, power electronics, and impact loads is directly or indirectly harming grid power quality. Among the currently defined power supply disturbances, voltage sag is the most frequently complained about power quality issue, resulting in production interruptions and significant economic losses. Due to the widespread use of voltage sag-sensitive devices in the power grid, there is an urgent need for a precise voltage sag tolerance testing method.

[0003] At present, the main methods for testing the voltage sag tolerance capability of equipment include top-down, left-to-right and closed test methods. In addition, relevant scholars have also proposed step-by-step testing method and dichotomy method.

[0004] The top-down method is a commonly used test method. In each test cycle, the voltage sag amplitude starts at 85% and is gradually reduced in 5% increments until the test point reaches the critical point where the fault criteria are triggered. The voltage sag duration is then reduced to the next predetermined value, and the voltage sag amplitude is repeated until all predetermined durations have been tested. The left-to-right method maintains the voltage sag amplitude constant and varies the voltage sag duration from the minimum to the maximum until the voltage sag duration reaches the maximum or the EUT fails. The voltage sag amplitude is then reduced to the next predetermined value, and the duration is repeated until all predetermined durations have been tested. The closed-loop test method first determines the maximum voltage interruption tolerance of the EUT. The maximum sag duration is then set, and the sag amplitude is gradually reduced from 85% in 5% increments until the critical point is found. Continue to reduce the duration and enter the next cycle. The initial point of the sag amplitude is no longer 85%, but starts from a point 5% greater than the previous critical amplitude. It is still reduced to the critical point at 5% intervals, and the cycle is repeated multiple times until the tolerance characteristic curve of the equipment is obtained. These three test methods recommend a small number of test points, resulting in relatively low test accuracy. Among them, the top-down method and the closed test method cannot accurately measure the voltage withstand capability of AC contactors, for example, because the critical withstand time and voltage sag amplitude of such a withstand curve show a non-monotonic relationship. The top-down method and the closed test method can only measure monotonically changing curves.

[0005] The step-by-step test method starts at 0V, maintains the amplitude constant, and then changes the voltage sag duration from the set minimum to the maximum, in 5ms steps, until the voltage sag reaches the maximum or the device under test fails. The voltage sag amplitude is then increased in 1% steps to the next test point, and the duration repeats. The duration within the sag amplitude cycle increases until all preset amplitudes are measured. While this method can plot the withstand curve for any device and offers high test accuracy, its small step size significantly increases the workload, making it unsuitable for measuring multiple devices.

[0006] The binary method maintains the voltage sag amplitude constant and uses this binary method to determine the voltage sag test time points. First, the minimum and maximum voltage sag durations are tested. If the device trips differently at the two durations, the next test duration is the median of these two durations. The next test duration is the median of the durations at which the device trips differently from the previous one, and so on, until the difference between two adjacent test time points is within 5ms. If the device does not trip at the maximum duration, it is considered to be able to withstand voltage sags of this magnitude. This method can measure all types of withstand curves and improves the accuracy of the vertical portion of the withstand curve to a certain extent, but the accuracy of the horizontal portion remains low. For devices with rectangular withstand curves, this method requires more testing and does not significantly improve the accuracy of the test results.

[0007] Different devices under test have different critical tolerance times. If the tolerance of the devices under test is not considered and the binary method is used to find the critical voltage amplitude value and then the self-enclosed method is used to find the critical test time value, the test workload will be large and the accuracy of the test results will be low. Summary of the Invention

[0008] In order to solve the problem of the lack of a fast and high-precision method for testing voltage sag tolerance in the prior art, the present invention provides a method and system for testing voltage sag tolerance, comprising:

[0009] Place the device under test in a test environment with a voltage amplitude of 0, and use the dichotomy method to find the longest withstand time of the device under test when the voltage is interrupted for a short time;

[0010] Based on the maximum tolerance time, determining whether the device under test is a Class I tolerance device or a Class II tolerance device by increasing the voltage amplitude;

[0011] Based on the type of the test device, the test device is tested using a preset method to obtain a tolerance curve.

[0012] Preferably, determining whether the device under test is a Class I tolerance device or a Class II tolerance device by increasing the voltage amplitude based on the longest tolerance time includes:

[0013] reducing the maximum tolerance time by a preset time length, and gradually increasing the voltage amplitude by a preset step length;

[0014] If the device does not fail, it is a Class I withstand device; if it fails, it is a Class II withstand device.

[0015] Preferably, the testing of the device under test by a preset method based on the type of the device under test to obtain a tolerance curve includes:

[0016] If the device under test is a Class I tolerance device, a Class I tolerance curve is obtained by fixing the test time and changing the voltage amplitude;

[0017] If the device under test is a Class II tolerance device, a Class II tolerance curve is obtained by keeping the voltage amplitude constant and changing the test time.

[0018] Preferably, obtaining a Class I tolerance curve by fixing the test time and changing the voltage amplitude includes:

[0019] Step 1-1: Under a preset test time, keep the test time unchanged, and based on a preset voltage amplitude, change the voltage amplitude by dichotomy to obtain a critical test point;

[0020] Step 1-2: Based on step 1-1, reduce the test time by a set time, change the voltage amplitude by a self-sealing method, and obtain a critical test point;

[0021] Step 1-3: Repeat steps 1-2 for a set number of times until the test time is equal to the maximum tolerance time, and obtain n critical test points;

[0022] Step 1-4: Connect all the critical test points obtained in step 1-1, step 1-2 and step 1-3 to obtain a Class I tolerance curve.

[0023] Preferably, if the device under test is a Class II tolerance device, obtaining a Class II tolerance curve by setting a constant voltage amplitude and changing the test time includes:

[0024] Step 2-1: Under a preset test time, keep the test time unchanged, and based on a preset voltage amplitude, change the voltage amplitude by dichotomy to obtain a critical test point;

[0025] Step 2-2: Based on step 2-1, reduce the test time to the maximum tolerance time, change the voltage amplitude through the self-sealing method, and obtain the critical test point;

[0026] Step 2-3: Based on step 2-2, the voltage amplitude is reduced by a set step size, and the test time is changed by a dichotomy method to obtain a critical test point;

[0027] Step 2-4: Repeat steps 2-3 for a set number of times until the voltage amplitude decreases to 0, thereby obtaining n critical test points;

[0028] Step 2-5: Connect all the critical test points obtained in step 2-1, step 2-2, step 2-3 and step 2-4 to obtain a Class II tolerance curve.

[0029] Preferably, the method of keeping the test time unchanged and changing the voltage amplitude by dichotomy based on the preset voltage amplitude under the preset test time to obtain the critical test point includes:

[0030] The device under test is subjected to a preset test time, the test time is kept unchanged, and the voltage amplitude is changed by a dichotomy method, so that the amplitude deviation between the test points of the device under test is gradually reduced;

[0031] When the amplitude deviation is within the set accuracy, the average voltage amplitude of the two test points is taken as the critical test point.

[0032] Preferably, the step of reducing the voltage amplitude by a set step size and changing the test time by a dichotomy method to obtain a critical test point includes:

[0033] After reducing the voltage amplitude by a set step size, the voltage amplitude is kept unchanged, and the test time is changed by a dichotomy method so that the time difference between the test points of the device under test is gradually reduced;

[0034] When the time difference is within the set accuracy, the time average of the two test points is taken as the critical test point.

[0035] The preset voltage amplitude is 85% of the voltage amplitude.

[0036] Preferably, the preset duration is 5ms;

[0037] The preset step size is 5% of the voltage amplitude.

[0038] A voltage sag tolerance testing system, comprising:

[0039] Maximum withstand time determination module: The device under test is placed in a test environment with a voltage amplitude of 0, and the maximum withstand time of the device under test in the event of a short voltage interruption is found through a binary search method.

[0040] Equipment classification module: Based on the maximum tolerance time, by increasing the voltage amplitude, determining whether the equipment under test is a Class I tolerance equipment or a Class II tolerance equipment;

[0041] Curve formulation module: Based on the type of the test device, the test device is tested using a preset method to obtain a tolerance curve.

[0042] Preferably, the device classification module includes:

[0043] Test environment setting submodule: reducing the maximum tolerance time by a preset time length, and gradually increasing the voltage amplitude by a preset step length;

[0044] Judgment submodule: If the receiving device does not fail, it is a Class I tolerance device; if a failure occurs, it is a Class II tolerance device.

[0045] Preferably, the curve formulation module includes:

[0046] Class I tolerance curve formulation submodule: If the device under test is a Class I tolerance device, a Class I tolerance curve is obtained by fixing the test time and changing the voltage amplitude;

[0047] Class II tolerance curve formulation submodule: If the device under test is a Class II tolerance device, the Class II tolerance curve is obtained by setting the voltage amplitude and changing the test time.

[0048] Preferably, the Class I tolerance curve formulation submodule includes:

[0049] Type I binary calculation unit: Under the pre-set test time, the test time remains unchanged, and based on the pre-set voltage amplitude, the voltage amplitude is changed by binary division to obtain the critical test point;

[0050] Class I self-enclosed calculation unit: Based on the voltage amplitude obtained in the Class I binary calculation unit, the test time is reduced by a set duration, and the voltage amplitude is changed by the self-enclosed method to obtain the critical test point;

[0051] Type I cycle unit: repeats the self-sealing method operation in the Type I self-sealing calculation unit a set number of times until the test time is equal to the maximum tolerance time, and obtains n critical test points;

[0052] Class I curve formulation unit: connects all the obtained critical test points to obtain a Class I tolerance curve.

[0053] Compared with the existing technology, the present invention has the following advantages: The longest tolerance time of the device under test is determined by a binary search method in a test environment with a voltage amplitude of 0; based on the longest tolerance time, the voltage amplitude is increased to determine whether the device under test is a Class I or Class II tolerance device; and based on the type of the device under test, the device under test is tested using a preset method to obtain a tolerance curve. This solution first divides the device under test into Class I and Class II devices based on the longest tolerance time, and adopts corresponding testing methods based on the tolerance curve characteristics of different device types, thereby improving testing speed. This solution also considers the tolerance level of the device under test by testing Class I and Class II devices using their respective test methods, thereby improving test accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] Figure 1 This is a flow chart of a method for testing voltage sag tolerance according to the present invention;

[0055] Figure 2 This is a judgment block diagram of the test method of the present invention;

[0056] Figure 3 This is a Class I curve test diagram of an embodiment of the present invention;

[0057] Figure 4 This is a Type II curve test diagram of an embodiment of the present invention;

[0058] Figure 5 This is a test effect diagram of the frequency converter in an embodiment of the present invention;

[0059] Figure 6 This is a test effect diagram of the AC contactor in an embodiment of the present invention. DETAILED DESCRIPTION

[0060] In order to better understand the present invention, the present invention is further described below with reference to the accompanying drawings and examples.

[0061] Example 1:

[0062] This embodiment provides a method for testing voltage sag tolerance, the method flow chart is as follows: Figure 1 shown.

[0063] S1: Place the device under test in a test environment with a voltage amplitude of 0 and use the dichotomy method to find the longest tolerance time.

[0064] In order to improve the test speed of the test scheme and obtain a tolerance curve with higher accuracy, the tolerance curves are divided into two categories (i.e., Category I and Category II) based on the differences in tolerance curves of different devices. Different test methods are applied according to the characteristics of different types of tolerance curves to improve the test speed and accuracy of the test scheme.

[0065] The technical solution is as follows:

[0066] Use the dichotomy method to find the maximum withstand time t of the equipment under test to short-term voltage interruption 0max , i.e. cycle 1, if the device still does not trip within the maximum duration, then it can be considered that the device can withstand the voltage sag of this magnitude.

[0067] S2: Based on the longest tolerance time, determine whether the device under test is a Class I tolerance device or a Class II tolerance device by increasing the voltage amplitude.

[0068] Set the voltage sag time to a value close to but less than t 0max The value (it is recommended that the value is higher than t 0max The voltage sag is kept constant for 5ms, and the amplitude of the voltage sag changes from the set minimum value (specified in the test plan) to the maximum value (also specified in the test plan) until the voltage sag reaches the maximum value or the device under test fails, i.e., cycle 2. If the device does not fail, the tolerance curve of the device is Class I, and its tolerance curve test diagram is as shown in the figure below. Figure 3 Otherwise, it is Class II, and its tolerance curve test diagram is as shown in Figure 4 shown.

[0069] S3: Based on the type of the test device, the test device is tested using a preset method to obtain a tolerance curve.

[0070] The test method judgment block diagram in this step is as follows Figure 2 shown.

[0071] For the Class I tolerance curve, the critical test point in the test plan can be quickly found through the dichotomy method in loop 3. Then, the steps of the closed test method are followed, and the duration is gradually reduced until the tolerance characteristic curve of the inverter is obtained.

[0072] For the type II curve, a new loop / test strategy is adopted, in which the first test point is the point with the largest amplitude and the longest duration in the plan. The critical test point can be quickly found by bisection. After that, the t 0max The critical point corresponding to the moment t 0max The vertical coordinate of the corresponding critical test point is U2. Reset the maximum test time to t 0max , the amplitude step is 5%, and the amplitude variation range is 0~U2. Keep the voltage sag amplitude as the maximum to be measured, and use the dichotomy method to determine the critical time point. First, set the voltage sag duration to Conduct tests and determine the critical trip point in the interval based on the test results. Still in the range The next duration point is the median of the determined interval. The next test duration point is the median of this median time point and the last time point where the device tripped. This continues in this order until the difference between two adjacent test time points is no more than 2ms. The amplitude is reduced and the next cycle is entered until the inverter's tolerance curve is obtained.

[0073] Example 2:

[0074] This embodiment provides a system for testing voltage sag tolerance, the system comprising:

[0075] Maximum withstand time determination module: The device under test is placed in a test environment with a voltage amplitude of 0, and the maximum withstand time of the device under test in the event of a short voltage interruption is found through a binary search method.

[0076] Equipment classification module: Based on the maximum tolerance time, by increasing the voltage amplitude, determining whether the equipment under test is a Class I tolerance equipment or a Class II tolerance equipment;

[0077] Curve formulation module: Based on the type of the test device, the test device is tested using a preset method to obtain a tolerance curve.

[0078] The device classification module includes:

[0079] Test environment setting submodule: reducing the maximum tolerance time by a preset time length, and gradually increasing the voltage amplitude by a preset step length;

[0080] Judgment submodule: If the receiving device does not fail, it is a Class I tolerance device; if a failure occurs, it is a Class II tolerance device.

[0081] The curve formulation module includes:

[0082] Class I tolerance curve formulation submodule: If the device under test is a Class I tolerance device, a Class I tolerance curve is obtained by fixing the test time and changing the voltage amplitude;

[0083] Class II tolerance curve formulation submodule: If the device under test is a Class II tolerance device, the Class II tolerance curve is obtained by setting the voltage amplitude and changing the test time.

[0084] The Class I tolerance curve formulation submodule includes:

[0085] Type I binary calculation unit: Under the pre-set test time, the test time remains unchanged, and based on the pre-set voltage amplitude, the voltage amplitude is changed by binary division to obtain the critical test point;

[0086] Class I self-enclosed calculation unit: Based on the voltage amplitude obtained in the Class I binary calculation unit, the test time is reduced by a set duration, and the voltage amplitude is changed by the self-enclosed method to obtain the critical test point;

[0087] Type I cycle unit: repeats the self-sealing method operation in the Type I self-sealing calculation unit a set number of times until the test time is equal to the maximum tolerance time, and obtains n critical test points;

[0088] Class I curve formulation unit: connects all the obtained critical test points to obtain a Class I tolerance curve.

[0089] The Class II tolerance curve formulation submodule includes:

[0090] Type II binary calculation unit: Under the pre-set test time, the test time remains unchanged, and based on the pre-set voltage amplitude, the voltage amplitude is changed by binary division to obtain the critical test point;

[0091] Type II self-enclosed calculation unit: reduces the test time to the maximum tolerance time, changes the voltage amplitude through the self-enclosed method, and obtains the critical test point;

[0092] A type II binary calculation sub-unit: based on the voltage amplitude obtained by the second self-enclosed calculation unit, the voltage amplitude is reduced by a set step size, and the test time is changed by a binary method to obtain a critical test point;

[0093] Type II cycle unit: repeats the binary division operation in the Type II binary division calculation sub-unit for a set number of times until the voltage amplitude decreases to 0, thereby obtaining n critical test points;

[0094] Class II curve formulation unit: connects all the critical test points obtained to obtain a Class II tolerance curve.

[0095] The Class I bisection unit and Class II bisection unit include:

[0096] A binary calculation subunit: keeps the test time constant under a preset test time of the device under test and changes the voltage amplitude by binary method, so that the amplitude deviation between the test points of the device under test is gradually reduced;

[0097] Precision judgment subunit: when the amplitude deviation is within the set precision, the average voltage amplitude of the two test points is taken as the critical test point.

[0098] The type II binary calculation sub-unit includes:

[0099] A binary calculation sub-subunit: after reducing the voltage amplitude by a set step size, keeping the voltage amplitude unchanged, and changing the test time by binary division, so that the time difference between the test points of the device under test is gradually reduced;

[0100] Accuracy judgment sub-subunit: when the time difference is within the set accuracy, the time average of the two test points is taken as the critical test point.

[0101] The preset voltage amplitude is 85% of the voltage amplitude.

[0102] The preset duration is 5ms;

[0103] The preset step size is 5% of the voltage amplitude.

[0104] Example 3:

[0105] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. In order to verify the applicability of this method to type I and II curves, a frequency converter and an AC contactor were tested respectively.

[0106] This embodiment follows part of the test plan in the IEEE 1668 standard, and its test parameters are set as follows: the amplitude variation range is 0-85%, the minimum time T min The maximum test time T is set to 0s and the amplitude step is 1%. max The maximum test time of the Type II tolerance curve is 0.2s. max 2s.

[0107] First, use the dichotomy method to find the maximum tolerance time t of the tested equipment to short-term voltage interruption 0max If the device does not trip within the maximum duration, then it can be considered that the device can withstand the voltage sag of this magnitude. Find the time t 0max Finally, set the voltage sag time to a value close to but less than t 0max The value (recommended ratio t 0max The voltage sag duration is maintained constant, and the voltage sag amplitude is varied from a set minimum value (specified in the test plan) to a maximum value (also specified in the test plan) until the voltage sag reaches its maximum value or the equipment under test fails. This determines the type of withstand curve, namely, Class I and Class II. Optimal test methods are employed based on the characteristics of different withstand curves. The principles and specific steps of these methods are detailed below.

[0108] The flow chart of the entire testing process is as follows Figure 2 The specific steps are as follows:

[0109] Step 1: Set the voltage amplitude to 0 and test the device for the maximum duration Tmax If the device does not fail within the maximum duration, according to the IEEE 1668 standard, it can be considered that the device can withstand the voltage interruption of that duration and has a strong tolerance, so the test is stopped.

[0110] Step 2: If the maximum duration T max If the next device fails, the amplitude remains unchanged and the fault duration of the next test point is If the device fails at time T1, let T max =T1, the next duration test point is If the device does not fail at time T1, let T min =T1, the next duration test point is And so on until T min With T max If the difference is less than 2ms, the maximum withstand time of short-term voltage interruption is obtained. After the test is completed, T max With T min The value of is restored to the initial value.

[0111] Step 3: Set the voltage sag time to t = t 0max -5ms, keep the voltage sag time constant, and change the voltage sag amplitude from the set minimum value 0 to 85% of the maximum value until the voltage sag reaches the maximum value or the equipment under test fails. If a failure occurs, the tolerance curve is Class I, otherwise the tolerance curve is Class II.

[0112] Step 4: Test the point with the largest amplitude and duration in the plan, i.e. point (T max , V max ), if the device fails, it means that the device's tolerance is very weak, so stop the test.

[0113] Step 5: If the device fails, set V max =85%, V min =0, the duration remains unchanged and the next test amplitude is If the device fails under the amplitude V1, let V min =V1, the next amplitude test point is If the device is not faulty, let V max =V1, the next amplitude test point is And so on until V min With V max If the difference is less than 2%, the duration is T max The critical amplitude of the withstand voltage is For the Class I tolerance curve, jump to step 6; for the Class II tolerance curve, jump to step 7.

[0114] Step 6: Reduce the duration t to And let T max = t, keep the duration unchanged, the initial point of the sag amplitude is from the point 1% greater than the previous critical amplitude, and decreases to the critical point at an interval of 1%, and so on. After 8 cycles (which can be defined according to the accuracy requirements), let t = t 0max , and the duration of the sag is measured to be t 0max The test ends when the critical point is reached.

[0115] Step 7: Set the duration to t 0max , keep the duration unchanged, the initial point of the sag amplitude is 1% greater than the previous critical amplitude, and decreases to the critical point at 1% intervals, find t 0max The vertical coordinate of the corresponding critical test point is U2, and the maximum test time is set to t 0max , 5% amplitude step, and an amplitude range of 0 to U2. Set the voltage amplitude to the maximum value to be measured and use the dichotomy method to determine the critical time point for the voltage sag test (the test steps are the same as step 2). After determining the critical time point under this amplitude, reduce the amplitude and enter the next cycle until the voltage reaches 0, ending the test.

[0116] The method provided by this solution is used to test the tolerance curve of the inverter and compare it with the test results of the step-by-step test method. The effect diagram is shown in the figure below. Figure 5 As shown; the tolerance curve of the AC contactor is tested and compared with the test results of the step-by-step test method. The effect diagram is shown in Figure 6 shown.

[0117] Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0118] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0119] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the steps in the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0120] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0121] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0122] The above are merely embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention are included in the scope of the claims of the present invention to be approved.

Claims

1. A method for testing voltage sag tolerance, characterized in that: include: Place the device under test in a test environment with a voltage amplitude of 0, and use the dichotomy method to find the longest withstand time of the device under test when the voltage is interrupted for a short time; Based on the maximum tolerance time, determining whether the device under test is a Class I tolerance device or a Class II tolerance device by increasing the voltage amplitude; Based on the type of the test device, the test device is tested using a preset method to obtain a tolerance curve; The method of testing the device under test by a preset method based on the type of the device under test to obtain a tolerance curve includes: If the device under test is a Class I tolerance device, a Class I tolerance curve is obtained by fixing the test time and changing the voltage amplitude; If the device under test is a Class II tolerance device, a Class II tolerance curve is obtained by fixing the voltage amplitude and changing the test time; The method of obtaining a Class I tolerance curve by fixing the test time and changing the voltage amplitude includes: Step 1-1: Under a preset test time, keep the test time unchanged, and based on a preset voltage amplitude, change the voltage amplitude by dichotomy to obtain a critical test point; Step 1-2: Based on step 1-1, reduce the test time by a set time, change the voltage amplitude by a self-sealing method, and obtain a critical test point; Step 1-3: Repeat steps 1-2 for a set number of times until the test time is equal to the maximum tolerance time, and obtain n critical test points; Step 1-4: Connect all the critical test points obtained in steps 1-1, 1-2, and 1-3 to obtain a Class I tolerance curve; If the device under test is a Class II tolerance device, a Class II tolerance curve is obtained by setting a constant voltage amplitude and changing the test time, including: Step 2-1: Under a preset test time, keep the test time unchanged, and based on a preset voltage amplitude, change the voltage amplitude by dichotomy to obtain a critical test point; Step 2-2: Based on step 2-1, reduce the test time to the maximum tolerance time, change the voltage amplitude through the self-sealing method, and obtain the critical test point; Step 2-3: Based on step 2-2, the voltage amplitude is reduced by a set step size, and the test time is changed by a dichotomy method to obtain a critical test point; Step 2-4: Repeat steps 2-3 for a set number of times until the voltage amplitude decreases to 0, thereby obtaining n critical test points; Step 2-5: Connect all the critical test points obtained in step 2-1, step 2-2, step 2-3 and step 2-4 to obtain a Class II tolerance curve.

2. The method according to claim 1, wherein The determining, based on the longest tolerance time, whether the device under test is a Class I tolerance device or a Class II tolerance device by increasing the voltage amplitude includes: reducing the maximum tolerance time by a preset time length, and gradually increasing the voltage amplitude by a preset step length; If the equipment under test does not fail, it is a Class I withstand device; if a failure occurs, it is a Class II withstand device.

3. The method according to claim 1, wherein The method of maintaining the test time unchanged under the preset test time and changing the voltage amplitude by a dichotomy method based on the preset voltage amplitude to obtain the critical test point includes: The device under test is subjected to a preset test time, the test time is kept unchanged, and the voltage amplitude is changed by a dichotomy method, so that the amplitude deviation between the test points of the device under test is gradually reduced; When the amplitude deviation is within the set accuracy, the average voltage amplitude of the two test points is taken as the critical test point.

4. The method according to claim 1, wherein The step of reducing the voltage amplitude by a set step size and changing the test time by a dichotomy method to obtain a critical test point includes: After reducing the voltage amplitude by a set step size, the voltage amplitude is kept unchanged, and the test time is changed by a dichotomy method so that the time difference between the test points of the device under test is gradually reduced; When the time difference is within the set accuracy, the time average of the two test points is taken as the critical test point; The preset voltage amplitude is 85% of the voltage amplitude.

5. The method according to claim 2, wherein The preset duration is 5ms; The preset step size is 5% of the voltage amplitude.

6. A voltage sag tolerance test system, characterized in that: The system comprises: Maximum withstand time determination module: The device under test is placed in a test environment with a voltage amplitude of 0, and the maximum withstand time of the device under test in the event of a short voltage interruption is found through a binary search method. Equipment classification module: Based on the maximum tolerance time, by increasing the voltage amplitude, determining whether the equipment under test is a Class I tolerance equipment or a Class II tolerance equipment; Curve formulation module: based on the type of the test device, the test device is tested by a preset method to obtain a tolerance curve; The curve formulation module includes: Class I tolerance curve formulation submodule: If the device under test is a Class I tolerance device, a Class I tolerance curve is obtained by fixing the test time and changing the voltage amplitude; Class II tolerance curve formulation submodule: If the device under test is a Class II tolerance device, the Class II tolerance curve is obtained by fixing the voltage amplitude and changing the test time; The Class I tolerance curve formulation submodule includes: Type I binary calculation unit: Under the pre-set test time, the test time remains unchanged, and based on the pre-set voltage amplitude, the voltage amplitude is changed by binary division to obtain the critical test point; Class I self-enclosed calculation unit: Based on the voltage amplitude obtained in the Class I binary calculation unit, the test time is reduced by a set duration, and the voltage amplitude is changed by the self-enclosed method to obtain the critical test point; Type I cycle unit: repeats the self-sealing method operation in the Type I self-sealing calculation unit a set number of times until the test time is equal to the maximum tolerance time, and obtains n critical test points; Class I curve formulation unit: connecting all the obtained critical test points to obtain a Class I tolerance curve; The Class II tolerance curve formulation submodule includes: Type II binary calculation unit: Under the pre-set test time, the test time remains unchanged, and based on the pre-set voltage amplitude, the voltage amplitude is changed by binary division to obtain the critical test point; Type II self-enclosed calculation unit: reduces the test time to the maximum tolerance time, changes the voltage amplitude through the self-enclosed method, and obtains the critical test point; Type II binary calculation sub-unit: based on the voltage amplitude obtained by the second self-enclosed calculation unit, the voltage amplitude is reduced by a set step size, and the test time is changed by binary division to obtain a critical test point; Type II cycle unit: repeats the binary division operation in the Type II binary division calculation sub-unit for a set number of times until the voltage amplitude decreases to 0, thereby obtaining n critical test points; Class II curve formulation unit: connects all the critical test points obtained to obtain a Class II tolerance curve.

7. The system according to claim 6, wherein: The device classification module includes: Test environment setting submodule: reducing the maximum tolerance time by a preset time length, and gradually increasing the voltage amplitude by a preset step length; Judgment submodule: If the device under test does not fail, it is a Class I tolerance device; if a failure occurs, it is a Class II tolerance device.

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