An undervoltage protection circuit with low static current and dynamic filtering function

Abstract

An undervoltage protection circuit with low static current and having a dynamic filtering function, comprising a power supply voltage positively correlated current generating circuit, a power supply voltage negatively correlated current generating circuit, a current comparison circuit and a dynamic filtering circuit. The power supply voltage positively and negatively correlated current generating circuits are used to generate two paths of currents that are positively correlated and negatively correlated with the power supply voltage respectively, and the undervoltage protection signal is generated by comparing the magnitudes of the two paths of currents through the current comparison circuit. At the same time, the current negatively correlated with the power supply voltage can also be used to implement the dynamic filtering function, that is, the filtering time increases with the increase of the power supply voltage.

Description

Technical Field

[0001] The present invention relates to an undervoltage circuit, and particularly to an undervoltage protection circuit with low static current and dynamic filtering function, belonging to the field of analog integrated circuit (chip) design. Background Art

[0002] If the power supply voltage fluctuates greatly when the chip is working, an undervoltage protection circuit is usually required to ensure the stable and normal operation of the system. Under normal working conditions, the power supply voltage provided by the power supply system will continuously decrease due to the consumption of the load. When the input voltage drops to a certain extent, some sub-circuits will not be able to work properly, especially the digital logic control circuit is prone to misoperation. To prevent this phenomenon, an undervoltage latch circuit needs to be set. The undervoltage latch circuit is also called low voltage latch. When the power supply voltage drops to a certain limit value due to some reason, the undervoltage latch circuit can force the chip output to be in a safe state under non-working conditions. When the power supply voltage rises to a certain value above the limit value, the chip resumes normal operation. In addition, some chips will work in a state of instantaneous large current for a long time, such as several amperes, which will increase the power supply noise, and the power supply will have a relatively narrow drop pulse. The undervoltage protection circuit will sense the drop of the power supply and turn off the working state of the chip, but this will reduce the working efficiency of the chip. Therefore, the undervoltage protection circuit needs to have a certain ability to resist power supply noise, that is, it needs to include an undervoltage filtering circuit.

[0003] Figure 1 The traditional undervoltage protection circuit with filtering function is composed of a power supply voltage sampling circuit, a reference voltage circuit, a voltage comparator circuit and a filtering circuit. The sampling circuit generally uses a resistor voltage division form to obtain the proportional voltage value of the power supply VCC. The reference circuit generally uses a Zener reference or a bandgap reference as the reference voltage of the comparator. The filtering circuit generally uses a filter composed of a current source and a capacitor, or a filter composed of a resistor and a capacitor. The comparator output is also used as a feedback signal to control the sampling circuit, so that the negative threshold is lower than the positive threshold, and the difference between the two is the hysteresis voltage, whose function is to stabilize the output of the undervoltage protection circuit and prevent oscillation. When the sampling voltage exceeds the reference voltage, the voltage locking circuit outputs a high-level control signal to allow the chip to work normally; when the sampling voltage is lower than the reference voltage, the undervoltage locking circuit outputs a low-level control signal to turn off the working state of the chip; when the power supply has a downward fluctuation, the comparator outputs a negative pulse. If the width of this negative pulse is less than the filtering time of the filtering circuit, the negative pulse will be filtered out and the output OUT will not change. If the width of the negative pulse is greater than the filtering time of the filtering circuit, the output OUT will have a chip turn-off signal.

[0004] Figure 2It is a circuit diagram of the applicant's prior applications "An Undervoltage Lockout Circuit with Dynamic Filtering Function" with application numbers 2018108430970 and 2018212126112. The dynamic filtering circuit in it generates a current proportional to VCC by sampling the power supply VCC signal. This current is then added to a constant current source to generate a current inversely proportional to VCC. This current inversely proportional to the power supply voltage serves as the charging current for the filtering delay capacitor, thus constituting the dynamic filtering circuit. The filtering time of this dynamic filtering circuit is directly proportional to the power supply voltage, that is, the smaller the power supply voltage, the smaller the filtering time. Compared with the filtering circuit of the traditional undervoltage protection circuit, the filtering time of the traditional filtering circuit has a relatively small correlation with the power supply voltage, and the low-voltage turn-off speed is slow. The advantage of the dynamic filtering circuit is that it can more accurately reflect the state of the power supply voltage, that is, it can more accurately distinguish what is power supply noise and what is the low-voltage state, and at the same time has the ability to resist power supply noise and a relatively small low-power-supply-voltage turn-off speed, thereby reducing the occurrence of chip failures and improving the working efficiency of the chip.

[0005] In summary, in order to enhance the power supply noise resistance of the undervoltage protection circuit, the traditional undervoltage protection circuit adds an R-C or I-C type filtering circuit. However, the traditional filtering circuit sacrifices the low-power-supply-voltage turn-off speed. Therefore, applications 2018108430970 and 2018212126112 invented a dynamic filtering circuit that has both a noise filtering function and a relatively fast low-power-supply-voltage turn-off speed. Generally, circuit performance needs to be compromised with static power consumption, chip area, etc. Although the above prior art improves the circuit performance, it sacrifices in terms of static power consumption and chip area. Summary of the Invention

[0006] To solve the technical defects existing in the above prior art, that is, the contradictory relationships among circuit performance, power consumption, and area, the present invention provides an undervoltage protection circuit with low static current and dynamic filtering. A current positively correlated with the power supply (the current increases as the power supply voltage increases) is formed by applying the power supply voltage across a resistor. Then, the current positively correlated with the power supply is used to generate a current negatively correlated with the power supply (the current decreases as the power supply voltage increases) through a current-voltage-current conversion circuit. Then, the positively correlated current and the negatively correlated current are compared. If the positively correlated current is less than the negatively correlated current, it indicates that the power supply voltage is too low, thereby generating an undervoltage protection signal. At the same time, the current negatively correlated with the power supply can also be used to achieve the dynamic filtering function, that is, the filtering time increases as the power supply voltage increases.

[0007] To achieve the above-mentioned invention object, the technical solution adopted by the present invention is as follows: An undervoltage protection circuit with low static current and having a dynamic filtering function, characterized in that: it includes a power supply voltage positively correlated current generation circuit (001), a power supply voltage negatively correlated current generation circuit (002), a current comparison circuit (003) and a dynamic filtering circuit (004). The current positively correlated with the power supply voltage generated by the power supply voltage positively correlated current generation circuit (001) and the current negatively correlated with the power supply voltage generated by the power supply voltage negatively correlated current generation circuit (002) are input into the current comparison circuit (003) for comparison to generate an undervoltage protection signal and input it into the dynamic filtering circuit (004). At the same time, the current negatively correlated with the power supply voltage is also used to achieve dynamic filtering in the dynamic filtering circuit (004). As the power supply voltage increases, the negatively correlated current gradually decreases until it becomes zero;

[0008] The power supply voltage positively correlated current generation circuit (001) includes four ports, namely a power supply VCC port, a ground port, a first output port (200) and a second output port (201);

[0009] The power supply voltage negatively correlated current generation circuit (002) includes six ports, namely a power supply VCC port, a ground port, an undervoltage protection signal feedforward input port (202), an input port connected to the first output port (200) of the power supply voltage positively correlated current generation circuit, a third output port (203) and a fourth output port (204);

[0010] The current comparison circuit (003) includes five ports, namely a power supply VCC port, a ground port, an input port connected to the fourth output port (204) of the power supply voltage negatively correlated current generation circuit, an input port connected to the second output port (201) of the power supply voltage positively correlated current generation circuit, and an output port (205);

[0011] The dynamic filtering circuit (004) includes five ports, namely a power supply VCC port, a ground port, an input port connected to the third output port (203) of the power supply voltage negatively correlated current generation circuit, an input port connected to the output port (205) of the current comparison circuit (003), and a filtered undervoltage protection signal output port. This output port also serves as a feedforward output and is connected to the feedforward input port (202) of the power supply voltage negatively correlated current generation circuit (002). The filtering time of the dynamic filtering circuit (004) is controlled by the output current of the third output port (203) of the power supply voltage negatively correlated current generation circuit (002) and changes with the change of the power supply voltage. The greater the drop in the power supply voltage, the smaller the filtering time, realizing dynamic filtering.

[0012] The power supply voltage positively correlated current generation circuit (001) at least includes a resistor R1, an NMOS transistor NM1, an NMOS transistor NM2, and an NMOS transistor NM3. One end of the resistor R1 is connected to the power supply VCC, and the other end of the resistor R1 is connected to the drain and gate of the NMOS transistor NM1, the gate of the NMOS transistor NM2, and the gate of the NMOS transistor NM3. The source of the NMOS transistor NM1, the source of the NMOS transistor NM2, and the source of the NMOS transistor NM3 are all grounded. The drain of the NMOS transistor NM2 serves as the first output port (200) of the power supply voltage positively correlated current generation circuit (001), and the drain of the NMOS transistor NM3 serves as the second output port (201) of the power supply voltage positively correlated current generation circuit (001).

[0013] The power supply voltage negatively correlated current generation circuit (002) includes an NMOS transistor NM4, a PMOS transistor PM1, a PMOS transistor PM2, a PMOS transistor PM3, and a PMOS transistor PM4, as well as resistors R2, R3, and R21. The sources of the PMOS transistor PM1, the PMOS transistor PM2, the PMOS transistor PM3, the PMOS transistor PM4, and one end of the resistor R21 are all connected to the power supply VCC. The other end of the resistor R21 is connected to one end of the resistor R2 and the drain of the PMOS transistor PM1. The other end of the resistor R2 is connected to the gate of the NMOS transistor NM4 and the first output port (200) of the power supply voltage positively correlated current generation circuit (001). The gate of the PMOS transistor PM1 is the undervoltage protection signal feed-forward input port (202). The drain and gate of the PMOS transistor PM2 are interconnected and connected to the gate of the PMOS transistor PM3, the gate of the PMOS transistor PM4, and the drain of the NMOS transistor NM4. The source of the NMOS transistor NM4 is grounded through the resistor R3. The drain of the PMOS transistor PM3 is the fourth output port (204) of the power supply voltage negatively correlated current generation circuit (002), and the drain of the PMOS transistor PM4 is the third output port (203) of the power supply voltage negatively correlated current generation circuit (002).

[0014] The current comparison circuit (003) at least includes an inverter INV1. The input of the inverter INV1 is simultaneously connected to the fourth output port (204) of the power supply voltage negatively correlated current generation circuit (002) and the second output port (201) of the power supply voltage positively correlated current generation circuit (001). The output of the inverter INV1 is the output port (205) of the current comparison circuit (003).

[0015] The dynamic filtering circuit (004) includes an inverter INV2, an inverter INV3, and a capacitor C1. The input of the inverter INV2 is connected to the output port (205) of the current comparison circuit (003). The power supply terminal of the inverter INV2 is connected to the third output port (203) of the power supply voltage negatively correlated current generation circuit (002). The output of the inverter INV2 is connected to the input of the inverter INV3 and one end of the capacitor C1. The other end of the capacitor C1 is grounded. The output of the inverter INV3 is the output terminal of the dynamic filtering circuit (004), which is also the output port of the undervoltage protection signal.

[0016] The NMOS transistor NM1, the NMOS transistor NM2, and the NMOS transistor NM3 in the power supply voltage positively correlated current generation circuit (001) can be respectively replaced by NPN bipolar junction transistors Q1, Q2, and Q3. One end of the resistor R1 is connected to the power supply VCC, and the other end of the resistor R1 is connected to the collector and base of the NPN bipolar junction transistor Q1, the base of the NPN bipolar junction transistor Q2, and the base of the NPN bipolar junction transistor Q3. The emitters of the NPN bipolar junction transistor Q1, the NPN bipolar junction transistor Q2, and the NPN bipolar junction transistor Q3 are all grounded. The collector of the NPN bipolar junction transistor Q2 serves as the first output port (200) of the power supply voltage positively correlated current generation circuit (001), and the collector of the NPN bipolar junction transistor Q1 serves as the second output port (201) of the power supply voltage positively correlated current generation circuit (001).

[0017] In addition to including the resistor R1, the NMOS transistor NM1, the NMOS transistor NM2, and the NMOS transistor NM3, the power supply voltage positively correlated current generation circuit (001) can also be additionally provided with NMOS transistors NM5 and NM6. The NMOS transistor NM5 is arranged between the resistor R1 and the NMOS transistor NM1. The drain and gate of the NMOS transistor NM5 are connected to the gate of the NMOS transistor NM6 and the other end of the resistor R1. The source of the NMOS transistor NM5 is connected to the drain and gate of the NMOS transistor NM1, the gate of the NMOS transistor NM2, and the gate of the NMOS transistor NM3. The drain of the NMOS transistor NM6 serves as the first output port (200) of the power supply voltage positively correlated current generation circuit (001), and the source of the NMOS transistor NM6 is connected to the drain of the NMOS transistor NM2, and the remaining connection relationships remain unchanged.

[0018] The NMOS transistor NM4 in the power supply voltage negatively correlated current generating circuit (002) can be replaced by an NPN BJT transistor Q4. The other end of the resistor R2 is connected to the base of the NPN BJT transistor Q1 and the first output port (200) of the power supply voltage positively correlated current generating circuit (001). The drain and gate of the PMOS transistor PM2 are interconnected and connected to the gate of the PMOS transistor PM3, the gate of the PMOS transistor PM4, and the collector of the NPN BJT transistor Q1. The emitter of the NPN BJT transistor Q1 is grounded through the resistor R3, and the remaining connection relationships remain unchanged.

[0019] In addition to including an inverter INV1, the current comparison circuit (003) can also be additionally provided with a PMOS transistor PM5, a PMOS transistor PM6, an NMOS transistor NM7, and an NMOS transistor NM8. The source of the PMOS transistor PM5 and the source of the PMOS transistor PM6 are both connected to the power supply VCC. The gate of the PMOS transistor PM5 and the gate of the PMOS transistor PM6 are interconnected and connected to the fourth output port (204) of the power supply voltage negatively correlated current generating circuit (002). The gate of the NMOS transistor NM7 and the gate of the NMOS transistor NM8 are interconnected and connected to the second output port (201) of the power supply voltage positively correlated current generating circuit (001). The source of the NMOS transistor NM7 and the source of the NMOS transistor NM8 are both grounded. The drain of the PMOS transistor PM6 is connected to the drain of the NMOS transistor NM8 and the input end of the inverter INV1. The output of the inverter INV1 is the output port (205) of the current comparison circuit (003).

[0020] Advantages and beneficial effects of the present invention:

[0021] (1) Compared with the applicant's prior applications 2018108430970 and 2018212126112, the present invention adopts a completely new circuit structure. The structure of the present invention does not include an independent reference circuit and a sampling circuit, but integrates the reference circuit and the sampling circuit into other circuit modules. It adopts a power supply positively correlated current generating circuit and a power supply negatively correlated current generating circuit with lower power consumption and more concise structure. Moreover, the original complex voltage comparator circuit is replaced by a simple current comparison circuit, which has a faster response speed, especially a very fast turn-off speed even at low power supply voltages, thus being able to avoid the occurrence of faults.

[0022] (2) The dynamic filter circuit in the applicant's prior applications needs other circuit structures in addition to the delay module to implement the dynamic filtering function, while the filter circuit in the present invention only includes a delay module. The dynamic current source required by the delay module comes from the power supply negatively correlated current generating circuit. The power supply negatively correlated current is used as the reference comparison current and the filter charging current, and its current drops to zero after the power supply voltage rises to a certain value. Therefore, the same dynamic filtering function as the prior application can be achieved without additional circuit structures.

[0023] (3) In terms of static power consumption, static power consumption will be generated in the reference circuit, the adopted circuit, the comparator, and the dynamic filtering circuit in the prior application. However, the static power consumption in the circuit structure of the present invention is mainly generated by the positive power supply related current generation circuit. Therefore, compared with the prior art, the overall static current of the circuit structure of the present invention is very low. At the same time, the present invention structure uses a small number of devices and also has the advantages of a small layout area, saving chip costs. Description of the Drawings

[0024] Figure 1 is the structural diagram of a traditional undervoltage protection circuit;

[0025] Figure 2 is the undervoltage lockout circuit with dynamic filtering function of the applicant's 2018108430970 and 2018212126112;

[0026] Figure 3 is the block diagram of the undervoltage protection circuit with low static current and dynamic filtering function of the present invention;

[0027] Figure 4 is the circuit diagram of the undervoltage protection circuit with low static current and dynamic filtering function of the present invention;

[0028] Figure 5 is Figure 4 the undervoltage protection circuit diagram in which the positive correlation current generation circuit and the negative correlation current generation circuit adopt another implementation circuit;

[0029] Figure 6 is Figure 4 the undervoltage protection circuit diagram in which the positive correlation current generation circuit adopts another implementation circuit;

[0030] Figure 7 is Figure 4 the undervoltage protection circuit diagram in which the current comparison circuit in

[0031] Figure 8 is the comparison of the comparison current varying with the power supply voltage, the filtering time varying with the power supply voltage, and the comparison with the traditional structure in the present invention;

[0032] Figure 9 is the comparison of the static current and layout area of the present invention with the traditional structure and the prior art patents;

[0033] Figure 10 is the working waveform of the undervoltage protection circuit of the present invention. Detailed Embodiments

[0034] The principles and features of the present invention will be described below with reference to the accompanying drawings. The examples given are only used to explain the present invention and are not intended to limit the scope of the present invention.

[0035] See Figure 3 For the undervoltage protection circuit with low static current and dynamic filtering of the present invention, it includes a power supply positive-correlated current generation circuit (001), a power supply negative-correlated current generation circuit (002), a current comparison circuit (003) and a dynamic filtering circuit (004). The power supply positive-correlated current generation circuit (001) outputs two current signals 200 and 201, which are respectively connected to the power supply negative-correlated current generation circuit (002) and the current comparison circuit (003). The power supply negative-correlated current generation circuit (002) outputs two current signals 204 and 203, which are respectively connected to the current comparison circuit (003) and the dynamic filtering circuit (004). The output control signal 205 of the current comparison circuit (003) controls the dynamic filtering circuit (004), and the output of the dynamic filtering circuit (004) is fed back to the power supply negative-correlated current generation circuit (002).

[0036] The power supply voltage positive-correlated current generation circuit (001) includes four ports, namely the power supply VCC port, the ground port and two current output ports 200 and 201. The power supply voltage negative-correlated current generation circuit (002) includes six ports, namely the power supply VCC port, the ground port, the undervoltage protection signal feedforward input port 202, the input port connected to the current output port 200 of the power supply voltage positive-correlated current generation circuit and two current output ports 203 and 204. The current comparison circuit (003) includes five ports, namely the power supply VCC port, the ground port, the input port connected to the current output port 204 of the power supply voltage negative-correlated current generation circuit, the input port connected to the current output port 201 of the power supply voltage positive-correlated current generation circuit and the control signal output port 205. The dynamic filtering circuit (004) includes five ports, namely the power supply VCC port, the ground port, the input port connected to the current output port 203 of the power supply voltage negative-correlated current generation circuit, the input port connected to the control signal output port 205 of the current comparison circuit (003) and the filtered undervoltage protection signal output port. This output port also serves as the feedforward output and is connected to the feedforward input port 202 of the power supply voltage negative-correlated current generation circuit (002).

[0037] See Figure 4, the positive power supply current generation circuit (001) consists of NMOS transistors NM1, NM2, NM3 and resistor R1. Through R1 and NM1, the power supply VCC is converted into a current approximately proportional to VCC, and two current signals are output through a current mirror to the negative power supply current generation circuit (002) and the current comparison circuit (003) respectively. The negative power supply current generation circuit (002) consists of PMOS transistors PM1 - PM4, NMOS transistor NM4, and resistors R2, R21, R3. First, the current 200 is converted into a voltage signal through resistors R2 and R21, and this voltage decreases as VCC increases. Then, through the action of NM4 and R3, the voltage signal is converted into a current signal, and this current decreases as the power supply VCC increases. Finally, two currents 204 and 203 are output through a current mirror to the current comparison circuit (003) and the filtering circuit (004) respectively. The current comparison circuit (003) consists of only one inverter INV1. By comparing the currents 201 and 204, an undervoltage signal 204 is generated. When the current 201 is greater than 204 (assuming that NM3 and PM3 are both operating in the saturation region at this time), that is, when the power supply VCC is relatively high, the input terminal of INV1 is in a discharging state until it reaches a low level, and the output 205 is at a high level. Conversely, when 201 is less than 204, the output 205 is at a low level. The dynamic filtering circuit (004) consists of inverters INV2, INV3 and capacitor C1. The filtering time of the dynamic filtering circuit (004) is controlled by the output current 203 of the negative power supply voltage current generation circuit (002), and it changes with the change of the power supply voltage. The greater the decrease in the power supply voltage, the smaller the filtering time, realizing dynamic filtering. The positive power supply current generation circuit (001) outputs two current signals 200 and 201, which are connected to the negative power supply current generation circuit (002) and the current comparison circuit (003) respectively. The negative power supply current generation circuit (002) outputs two current signals 204 and 203, which are connected to the current comparison circuit (03) and the dynamic filtering circuit (004) respectively. The output control signal 205 of the current comparison circuit (003) controls the dynamic filtering circuit (004), and the output of the dynamic filtering circuit (004) is fed back to the negative power supply current generation circuit (002).

[0038] Assume that the width-to-length ratios of NM1, NM2, and NM3 are the same, and the width-to-length ratios of PM2, PM3, and PM4 are the same. Then the magnitudes of the currents at ports 200, 201, 203, and 204 are (let the currents at ports 200, 201, 203, and 204 be I 200 、I 201 、I 203 、I 204 , and the gate-source voltages of NM1 and NM4 are V GS1 、V GS4 ):

[0039]

[0040] When I 201 <I 204 is in an undervoltage state, and when I 201 >I 204 is in a non-undervoltage state, so let I 201 =I 204 , the undervoltage threshold voltage (V UV ) can be obtained as follows:

[0041]

[0042] The filtering time t flt is (assuming the input threshold voltage of the inverter INV2 is V TH ):

[0043]

[0044] It can be seen from the above formula that the power supply positive correlation current I 200 increases with the increase of VCC. If R2 > R1, the power supply negative correlation current I 203 can be obtained, and I 203 decreases with the increase of the power supply VCC; the undervoltage threshold is related to V GS1 , V GS4 and the resistance ratio. By adjusting the resistance size and ratio, the desired undervoltage threshold can be obtained, and partial temperature drift can be balanced. R21 can be used to adjust the difference between the undervoltage drop threshold and the rise threshold, that is, the hysteresis voltage; since V TH increases with the increase of VCC, and at the same time I 203 decreases with the increase of VCC, therefore, the filtering time t flt increases with the increase of VCC, realizing the dynamic filtering function.

[0045] Refer to Figure 5 , different from Figure 4 , in the power supply positive correlation current generation circuit (001), the NMOS transistors NM1, NM2, and NM3 can be replaced by the NPN bipolar junction transistors Q1, Q2, and Q3, and the NM4 in the power supply negative correlation current generation circuit (002) can be replaced by the bipolar junction transistor Q4. Assuming that the emitter junction areas and numbers of Q1, Q2, and Q3 are the same, and the width-to-length ratios of PM2, PM3, and PM4 are the same, and the base-emitter voltages of Q1 and Q4 are V BE1 and V BE4 respectively, the currents I 200 , I 201 , I 203 , I 204 sizes and the undervoltage threshold V UV can be obtained as follows:

[0046]

[0047] According to the above formula, the desired current and undervoltage threshold voltage can be obtained by adjusting the resistance, and at the same time, the dynamic filtering function can be obtained.

[0048] See Figure 6 , different from Figure 4 , the NM5 and NM6 transistors are added to the positive power supply related current generation circuit (001). Assuming that the width-to-length ratios of NM1, NM2, NM3, NM5, and NM6 are the same, and the width-to-length ratios of PM2, PM3, and PM4 are the same, the current magnitudes at ports 200, 201, 203, and 204 are (assuming the currents at ports 200, 201, 203, and 204 are I 200 , I 201 , I 203 , I 204 , and the gate-source voltages of NM1 and NM4 are V GS1 , V GS4 ):

[0049]

[0050] Let I 201 = I 204 , the undervoltage threshold voltage (V UV ) can be obtained as:

[0051]

[0052] The filtering time t flt is (assuming the input threshold voltage of the inverter INV2 is V TH ):

[0053]

[0054] It can be seen from the above formula that the positive power supply related current I 200 increases with the increase of VCC. If R2 > R1, the negative power supply related current I 203 can be obtained, and I 203 decreases with the increase of the power supply VCC; the undervoltage threshold is related to V GS1 , V GS4 and the resistance ratio. By adjusting the resistance size and ratio, the desired undervoltage threshold can be obtained, and partial temperature drift can be balanced. R21 can be used to adjust the difference between the undervoltage drop threshold and the rise threshold, that is, the hysteresis voltage; since V TH increases with the increase of VCC, and at the same time I 203 decreases with the increase of VCC, therefore, the filtering time t flt increases with the increase of VCC, realizing the dynamic filtering function.

[0055] The above-mentioned Figure 4 , 5 , in 6, the replacement schemes in the positive power supply related current generation circuit (001) and the negative power supply related current generation circuit (002) can be implemented simultaneously or separately and non-simultaneously.

[0056] As Figure 7 shown, it is another implementation circuit different from the current comparison circuit (003) of Figure 4 , 5 , 6. The current comparison circuit (003) in Figure 4 , 5 , 6 has only one inverter INV1 structure. The pull-up current and pull-down current of the input branch determine the level of the output signal of the inverter INV1. The negative power supply related current 204 decreases with the increase of VCC, and the positive power supply related current 201 increases with the increase of VCC. An undervoltage protection signal is generated by comparing the magnitudes of the negative power supply related current and the positive power supply related current. Compared with Figure 4 , 5 , 6, PMOS transistors PM5 and PM6 and NMOS transistors NM7 and NM8 are added in Figure 7 . The working principle is as follows: The current 201 is replicated proportionally through the current mirrors PM5 and PM6 (the ratio is the ratio of the width-to-length ratios of PM5 and PM6), and the current 204 is replicated proportionally through the current mirrors NM7 and NM8. The replicated currents flow into the input terminal of the inverter INV1 together. If the replicated current of 201 is greater than the replicated current of 204, the input terminal of INV1 is at a high level and the output 205 is at a low level; otherwise, 205 is at a high level. The purpose of adding the current mirrors is to prevent crosstalk between signals, such as the interference of the signal at the input terminal of INV1 with the currents 201 and 204, but this will increase part of the static current.

[0057] Referring to Figure 8 , it is the working waveform of the output signal of an undervoltage protection circuit with low static current and dynamic filtering according to the present invention changing with the power supply voltage (VCC). In Fig. a, the curves of the positive correlation current I 201 and the negative correlation current I 204 changing with the power supply VCC are shown. The VCC corresponding to the intersection point of the two is the undervoltage threshold voltage (V CCUV ); In Fig. b, the curve of the undervoltage filtering time changing with VCC is shown. Compared with the traditional circuit structure, the slope of the change of the filtering time of the present invention is larger, so the effect of undervoltage filtering is better.

[0058] Figure 9 shows the comparison between the present invention and the prior art. Figure 9 (a) The static power consumption and Figure 9 (b) The layout area are much better than the prior art.

[0059] Figure 10 This is the working waveform of the undervoltage protection circuit of the present invention when it varies with the power supply voltage (VCC). The results show that the undervoltage protection circuit of the present invention can use the positive and negative correlation currents of the power supply voltage to achieve the output of the undervoltage signal. When the power supply voltage VCC exceeds the forward undervoltage threshold (V CCUV+ ), the output of the undervoltage protection signal is high level; if for some reason the power supply voltage VCC is lower than the reverse undervoltage threshold (V CCUV- ), then the output of the undervoltage protection signal is low level, prohibiting the subsequent circuit from working and avoiding abnormal chip functions when the power supply voltage changes slightly.

[0060] The above are only the preferred examples of the present invention and are not limited to the present invention. For those skilled in the art, various changes and modifications can be made to the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. An undervoltage protection circuit with low static current and having a dynamic filtering function, characterized in that: it includes a power supply voltage positively correlated current generation circuit (001), a power supply voltage negatively correlated current generation circuit (002), a current comparison circuit (003) and a dynamic filtering circuit (004). The current positively correlated with the power supply voltage generated by the power supply voltage positively correlated current generation circuit (001) and the current negatively correlated with the power supply voltage generated by the power supply voltage negatively correlated current generation circuit (002) are compared in the current comparison circuit (003) to generate an undervoltage protection signal which enters the dynamic filtering circuit (004). At the same time, the current negatively correlated with the power supply voltage is also used to achieve dynamic filtering in the dynamic filtering circuit (004). As the power supply voltage increases, the negatively correlated current gradually decreases until it becomes zero; The power supply voltage positively correlated current generation circuit (001) includes four ports, namely the power supply VCC port, the ground port, the first output port (200) and the second output port (201); The power supply voltage negatively correlated current generation circuit (002) includes six ports, namely the power supply VCC port, the ground port, the undervoltage protection signal feedforward input port (202), the input port connected to the first output port (200) of the power supply voltage positively correlated current generation circuit, and the third output port (203) and the fourth output port (204); The current comparison circuit (003) includes five ports, namely the power supply VCC port, the ground port, the input port connected to the fourth output port (204) of the power supply voltage negatively correlated current generation circuit, the input port connected to the second output port (201) of the power supply voltage positively correlated current generation circuit, and the output port (205); The dynamic filtering circuit (004) includes five ports, namely the power supply VCC port, the ground port, the input port connected to the third output port (203) of the power supply voltage negatively correlated current generation circuit, the input port connected to the output port (205) of the current comparison circuit (003), and the filtered undervoltage protection signal output port. This output port also serves as a feedforward output and is connected to the feedforward input port (202) of the power supply voltage negatively correlated current generation circuit (002). The filtering time of the dynamic filtering circuit (004) is controlled by the output current of the third output port (203) of the power supply voltage negatively correlated current generation circuit (002) and changes with the change of the power supply voltage. The greater the drop in the power supply voltage, the smaller the filtering time, realizing dynamic filtering.

2. The undervoltage protection circuit with low static current and having a dynamic filtering function according to claim 1, characterized in that: The power supply voltage positively correlated current generating circuit (001) at least includes a resistor R1, an NMOS transistor NM1, an NMOS transistor NM2, and an NMOS transistor NM3. One end of the resistor R1 is connected to the power supply VCC, and the other end of the resistor R1 is connected to the drain and gate of the NMOS transistor NM1, the gate of the NMOS transistor NM2, and the gate of the NMOS transistor NM3. The source of the NMOS transistor NM1, the source of the NMOS transistor NM2, and the source of the NMOS transistor NM3 are all grounded. The drain of the NMOS transistor NM2 serves as the first output port (200) of the power supply voltage positively correlated current generating circuit (001), and the drain of the NMOS transistor NM3 serves as the second output port (201) of the power supply voltage positively correlated current generating circuit (001).

3. The under-voltage protection circuit with low static current and having a dynamic filtering function according to claim 1, characterized in that: The power supply voltage negatively correlated current generating circuit (002) includes an NMOS transistor NM4, a PMOS transistor PM1, a PMOS transistor PM2, a PMOS transistor PM3, and a PMOS transistor PM4, as well as resistors R2, R3, and R21. The sources of the PMOS transistor PM1, the PMOS transistor PM2, the PMOS transistor PM3, the PMOS transistor PM4, and one end of the resistor R21 are all connected to the power supply VCC. The other end of the resistor R21 is connected to one end of the resistor R2 and the drain of the PMOS transistor PM1. The other end of the resistor R2 is connected to the gate of the NMOS transistor NM4 and the first output port (200) of the power supply voltage positively correlated current generating circuit (001). The gate of the PMOS transistor PM1 is the under-voltage protection signal feed-forward input port (202). The drain and gate of the PMOS transistor PM2 are interconnected and connected to the gate of the PMOS transistor PM3, the gate of the PMOS transistor PM4, and the drain of the NMOS transistor NM4. The source of the NMOS transistor NM4 is grounded through the resistor R3. The drain of the PMOS transistor PM3 is the fourth output port (204) of the power supply voltage negatively correlated current generating circuit (002), and the drain of the PMOS transistor PM4 is the third output port (203) of the power supply voltage negatively correlated current generating circuit (002).

4. The under-voltage protection circuit with low static current and having a dynamic filtering function according to claim 1, characterized in that: The current comparison circuit (003) at least includes an inverter INV1. The input of the inverter INV1 is simultaneously connected to the fourth output port (204) of the power supply voltage negatively correlated current generating circuit (002) and the second output port (201) of the power supply voltage positively correlated current generating circuit (001). The output of the inverter INV1 is the output port (205) of the current comparison circuit (003).

5. The under-voltage protection circuit with low static current and having a dynamic filtering function according to claim 1, characterized in that: The dynamic filtering circuit (004) includes an inverter INV2, an inverter INV3, and a capacitor C1. The input of the inverter INV2 is connected to the output port (205) of the current comparison circuit (003). The power supply terminal of the inverter INV2 is connected to the third output port (203) of the power supply voltage negatively correlated current generation circuit (002). The output of the inverter INV2 is connected to the input of the inverter INV3 and one end of the capacitor C1. The other end of the capacitor C1 is grounded. The output of the inverter INV3 is the output terminal of the dynamic filtering circuit (004), which is also the output port of the undervoltage protection signal.

6. The undervoltage protection circuit with low static current and having a dynamic filtering function according to claim 2, wherein: In the power supply voltage positively correlated current generation circuit (001), the NMOS transistors NM1, NM2, and NM3 are respectively replaced by NPN-type BJT transistors Q1, Q2, and Q3. One end of the resistor R1 is connected to the power supply VCC, and the other end of the resistor R1 is connected to the collector and base of the NPN-type BJT transistor Q1, the base of the NPN-type BJT transistor Q2, and the base of the NPN-type BJT transistor Q3. The emitters of the NPN-type BJT transistor Q1, the NPN-type BJT transistor Q2, and the NPN-type BJT transistor Q3 are all grounded. The collector of the NPN-type BJT transistor Q2 serves as the first output port (200) of the power supply voltage positively correlated current generation circuit (001), and the collector of the NPN-type BJT transistor Q1 serves as the second output port (201) of the power supply voltage positively correlated current generation circuit (001).

7. The undervoltage protection circuit with low static current and having a dynamic filtering function according to claim 2, wherein: In addition to the resistor R1, the NMOS transistors NM1, NM2, and NM3, the power supply voltage positively correlated current generation circuit (001) further includes NMOS transistors NM5 and NM6. The NMOS transistor NM5 is disposed between the resistor R1 and the NMOS transistor NM1. The drain and gate of the NMOS transistor NM5 are connected to the gate of the NMOS transistor NM6 and the other end of the resistor R1. The source of the NMOS transistor NM5 is connected to the drain and gate of the NMOS transistor NM1, the gate of the NMOS transistor NM2, and the gate of the NMOS transistor NM3. The drain of the NMOS transistor NM6 serves as the first output port (200) of the power supply voltage positively correlated current generation circuit (001), and the source of the NMOS transistor NM6 is connected to the drain of the NMOS transistor NM2, and the remaining connection relationships remain unchanged.

8. The undervoltage protection circuit with low static current and having a dynamic filtering function according to claim 3, wherein: In the power supply voltage negatively correlated current generating circuit (002), the NMOS transistor NM4 is replaced by an NPN BJT transistor Q4. The other end of the resistor R2 is connected to the base of the NPN BJT transistor Q1 and the first output port (200) of the power supply voltage positively correlated current generating circuit (001). The drain and gate of the PMOS transistor PM2 are interconnected and connected to the gate of the PMOS transistor PM3, the gate of the PMOS transistor PM4, and the collector of the NPN BJT transistor Q1. The emitter of the NPN BJT transistor Q1 is grounded through the resistor R3, and the remaining connection relationships remain unchanged.

9. The under-voltage protection circuit with low static current and having a dynamic filtering function according to claim 4, characterized in that: In addition to including an inverter INV1, the current comparison circuit (003) further includes a PMOS transistor PM5, a PMOS transistor PM6, an NMOS transistor NM7, and an NMOS transistor NM8. The source of the PMOS transistor PM5 and the source of the PMOS transistor PM6 are both connected to the power supply VCC. The gate of the PMOS transistor PM5 and the gate of the PMOS transistor PM6 are interconnected and connected to the fourth output port (204) of the power supply voltage negatively correlated current generating circuit (002). The gate of the NMOS transistor NM7 and the gate of the NMOS transistor NM8 are interconnected and connected to the second output port (201) of the power supply voltage positively correlated current generating circuit (001). The source of the NMOS transistor NM7 and the source of the NMOS transistor NM8 are both grounded. The drain of the PMOS transistor PM6 is connected to the drain of the NMOS transistor NM8 and the input terminal of the inverter INV1. The output of the inverter INV1 is the output port (205) of the current comparison circuit (003).

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