Intelligent power supply circuit, DSP processing method and system

Abstract

The present invention discloses an intelligent power supply circuit, including: a power module, a load, a voltage acquisition sensor and a DSP processor; the controlled end of the power module is connected to the control end of the DSP processor, the output end of the power module is connected to the power supply end of the load, the acquisition end of the voltage acquisition sensor is connected to the output end of the load, and the output end of the voltage acquisition sensor is connected to the input end of the DSP processor; wherein the power module includes three identical inverter full-bridge submodules; the second output end of the first inverter full-bridge submodule, the second output end of the second inverter full-bridge submodule, and the second output end of the third inverter full-bridge submodule are connected, so the power module has four output ends. The present invention also discloses a DSP processing method and system, which adopts multiple embodiments to solve the problem that different electrical devices in the prior art require different charging devices and are incompatible.

Description

Technical Field

[0001] The present invention relates to the technical field of power supply, and in particular to an intelligent power supply circuit, a DSP processing method and a system. Background Art

[0002] At present, the common smart chargers on the market can only provide charging modes and corresponding algorithms based on the characteristics of a certain load. However, this multi-mode charging often has several fixed charging voltages and currents in stages, and there will be certain energy losses at the critical points of switching between different power outputs.

[0003] Most existing smart chargers have fixed multi-level outputs and can only output AC or DC. Different charging devices are required for different electrical devices and are not compatible. Summary of the invention

[0004] The embodiments of the present invention provide an intelligent power supply circuit, a DSP processing method and a system, which can effectively solve the problem in the prior art that different electrical devices require different charging devices and are incompatible.

[0005] An embodiment of the present invention provides an intelligent power supply circuit, comprising: a power supply module with multiple power outputs, a load, a voltage acquisition sensor for collecting power from the load, and a DSP processor for determining the type of the load according to the power collected by the voltage acquisition sensor and controlling the power supply to output corresponding alternating current or direct current;

[0006] The controlled end of the power module is connected to the control end of the DSP processor, the output end of the power module is connected to the power supply end of the load, the acquisition end of the voltage acquisition sensor is connected to the output end of the load, and the output end of the voltage acquisition sensor is connected to the input end of the DSP processor;

[0007] Wherein, the power module includes three identical full-bridge inverter submodules;

[0008] The first full-bridge inverter submodule includes: four identical switch tubes, a first variable capacitor and a first power supply end; the input end of the first switch tube is connected to the output end of the third switch tube, the output end of the first switch tube is connected to the output end of the second switch tube, the input end of the second switch tube is connected to the output end of the fourth switch tube, the input end of the third switch tube is connected to the input end of the fourth switch tube, and the output end of the second switch tube and the input end of the fourth switch tube are respectively connected to the first power supply end;

[0009] The first output end of the first full-bridge inverter module is connected between the input end of the first switch tube and the output end of the third switch tube, and the second output end of the first full-bridge inverter module is connected between the input end of the second switch tube and the output end of the fourth switch tube through the first variable capacitor;

[0010] The second full-bridge inverter submodule includes: four identical switch tubes, a second variable capacitor and a second power supply end; the input end of the fifth switch tube is connected to the output end of the seventh switch tube, the output end of the fifth switch tube T5 is connected to the output end of the sixth switch tube, the input end of the sixth switch tube is connected to the output end of the eighth switch tube, the input end of the seventh switch tube is connected to the input end of the eighth switch tube, and the output end of the sixth switch tube and the input end of the eighth switch tube are respectively connected to the second power supply end;

[0011] The first output end of the second full-bridge inverter module is connected between the input end of the fifth switch tube T5 and the output end of the seventh switch tube, and the second output end of the second full-bridge inverter module is connected between the input end of the sixth switch tube and the output end of the eighth switch tube through the second variable capacitor;

[0012] The third full-bridge inverter submodule includes: four identical switch tubes, a third variable capacitor and a third power supply end; the input end of the ninth switch tube is connected to the output end of the eleventh switch tube, the output end of the ninth switch tube is connected to the output end of the tenth switch tube, the input end of the tenth switch tube is connected to the output end of the twelfth switch tube, the input end of the eleventh switch tube is connected to the input end of the twelfth switch tube, and the output end of the tenth switch tube and the input end of the twelfth switch tube are respectively connected to the third power supply end;

[0013] The first output end of the third full-bridge inverter module is connected between the input end of the ninth switch tube and the output end of the eleventh switch tube, and the second output end of the third full-bridge inverter module is connected between the input end of the tenth switch tube and the output end of the twelfth switch tube through the third variable capacitor;

[0014] The second output end of the first full-bridge inverter module, the second output end of the second full-bridge inverter module, and the second output end of the third full-bridge inverter module are connected.

[0015] Compared with the prior art, the embodiment of the present invention discloses an intelligent power supply circuit, which identifies the type of power supply required by the load through a DSP processor, and then according to the three full-bridge inverter sub-modules arranged in the power module, enables the same power module to output not only AC power but also DC power, thereby achieving the purpose of using one intelligent power supply circuit to charge various types of electrical devices.

[0016] As an improvement of the above solution, the first variable capacitor includes: a first diode, a second diode, a third diode, a fourth diode, a first P-type MOS transistor, a second P-type MOS transistor and a first capacitor;

[0017] The anode of the first diode is connected to the drain of the first P-type MOS tube, the cathode of the first diode is connected to the cathode of the second diode, the source of the first P-type MOS tube is connected to the source of the second P-type MOS tube, the drain of the second P-type MOS tube is connected to the anode of the second diode, the anode of the third diode is connected to the source of the first P-type MOS tube, the cathode of the third diode is connected to the drain of the first P-type MOS tube, the anode of the fourth diode is connected to the source of the second P-type MOS tube, and the cathode of the fourth diode is connected to the drain of the second P-type MOS tube;

[0018] The first end of the first capacitor is connected to the cathode of the first diode, and the second end of the first capacitor is connected to the source of the first P-type MOS transistor;

[0019] The first end of the first variable capacitor is connected between the anode of the first diode and the drain of the first P-type MOS transistor, and the first end of the second variable capacitor is connected between the drain of the second P-type MOS transistor and the anode of the second diode.

[0020] As an improvement of the above solution, the second variable capacitor includes: a fifth diode, a sixth diode, a seventh diode, an eighth diode, a third P-type MOS transistor, a fourth P-type MOS transistor and a second capacitor;

[0021] The anode of the fifth diode is connected to the drain of the third P-type MOS tube, the cathode of the fifth diode is connected to the cathode of the sixth diode, the source of the third P-type MOS tube is connected to the source of the fourth P-type MOS tube, the drain of the fourth P-type MOS tube is connected to the anode of the sixth diode, the anode of the seventh diode is connected to the source of the third P-type MOS tube, the cathode of the seventh diode is connected to the drain of the third P-type MOS tube, the anode of the eighth diode is connected to the source of the fourth P-type MOS tube, and the cathode of the eighth diode is connected to the drain of the fourth P-type MOS tube;

[0022] The first end of the second capacitor is connected to the cathode of the fifth diode, and the second end of the second capacitor is connected to the source of the third P-type MOS transistor;

[0023] The first end of the first variable capacitor is connected between the anode of the fifth diode and the drain of the third P-type MOS transistor, and the first end of the second variable capacitor is connected between the drain of the fourth P-type MOS transistor and the anode of the sixth diode.

[0024] As an improvement of the above solution, the third variable capacitor includes: a ninth diode, a tenth diode, an eleventh diode, a twelfth diode, a fifth P-type MOS transistor, a sixth P-type MOS transistor and a third capacitor;

[0025] The anode of the ninth diode is connected to the drain of the fifth P-type MOS tube, the cathode of the ninth diode is connected to the cathode of the tenth diode, the source of the fifth P-type MOS tube is connected to the source of the sixth P-type MOS tube, the drain of the sixth P-type MOS tube is connected to the anode of the tenth diode, the anode of the eleventh diode is connected to the source of the fifth P-type MOS tube, the cathode of the eleventh diode is connected to the drain of the fifth P-type MOS tube, the anode of the twelfth diode is connected to the source of the sixth P-type MOS tube, and the cathode of the twelfth diode is connected to the drain of the sixth P-type MOS tube;

[0026] A first end of the third capacitor is connected to the cathode of the ninth diode, and a second end of the third capacitor is connected to the source of the fifth P-type MOS transistor;

[0027] The first end of the first variable capacitor is connected between the anode of the ninth diode and the drain of the fifth P-type MOS transistor, and the first end of the second variable capacitor is connected between the drain of the sixth P-type MOS transistor and the anode of the tenth diode.

[0028] Another embodiment of the present invention provides a DSP processing method, which is applied to the intelligent power supply circuit, and includes the following steps:

[0029] In response to identifying that the load is a DC load, the load selects any one of the first output end of the first full-bridge inverter submodule, the first output end of the second full-bridge inverter submodule, the first output end of the third full-bridge inverter submodule, and the second output end of the first full-bridge inverter submodule of the intelligent power supply circuit;

[0030] In response to identifying that the load is a single-phase AC load, the load selects any one of the first output end of the first full-bridge inverter submodule, the first output end of the second full-bridge inverter submodule, the first output end of the third full-bridge inverter submodule, and the second output end of the first full-bridge inverter submodule of the intelligent power supply circuit;

[0031] In response to identifying that the load is a three-phase AC load, the three phases of the load respectively select the first output end of the first full-bridge inverter submodule, the first output end of the second full-bridge inverter submodule, and the first output end of the third full-bridge inverter submodule of the intelligent power supply circuit.

[0032] As an improvement of the above solution, the method further includes:

[0033] In response to identifying that the load is a three-phase AC load, if the load has a neutral line, the neutral line is connected to the second output terminal of the first full-bridge inverter submodule.

[0034] As an improvement of the above solution, in response to identifying that the load is a DC load, after the load selects the first output end of the first full-bridge inverter submodule of the intelligent power supply circuit, the first output end of the second full-bridge inverter submodule, any one of the first output end of the third full-bridge inverter submodule, and the second output end of the first full-bridge inverter submodule, the method further includes:

[0035] After detecting that the positive and negative electrodes of the load are connected in reverse, controlling the PWM signals of the controlled end of the first switch tube and the controlled end of the fourth switch tube to be low level, and controlling the first switch tube and the fourth switch tube to be turned off;

[0036] The PWM signals of the controlled end of the second switch tube and the controlled end of the third switch tube are controlled to be high level, and the first switch tube and the fourth switch tube are controlled to be turned on.

[0037] Another embodiment of the present invention provides a DSP processing system, including the DSP processing method.

[0038] Compared with the prior art, the DSP processing method and system disclosed in the embodiment of the present invention, after identifying the load type (i.e., DC load, single-phase AC load, three-phase AC load), controls the power supply module to select different output terminals to achieve the purpose of outputting different types of currents. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 It is a structural schematic diagram of an intelligent power supply circuit provided by an embodiment of the present invention;

[0040] Figure 2 It is a structural schematic diagram of a power supply module in an intelligent power supply circuit provided by an embodiment of the present invention;

[0041] Figure 3 It is a schematic diagram of the structure of a variable capacitor in an intelligent power supply circuit provided by an embodiment of the present invention;

[0042] Figure 4 It is a flowchart of a DSP processing method provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0043] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0044] See also Figure 1 , is a structural diagram of an intelligent power supply circuit provided by an embodiment of the present invention.

[0045] The embodiment of the present invention provides an intelligent power supply circuit, comprising: a power supply module 1 with multiple power outputs, a load 2, a voltage acquisition sensor 3 for collecting power from the load 2, and a DSP processor 4 for determining the type of the load 2 according to the power collected by the voltage acquisition sensor 3 and controlling the power supply to output corresponding alternating current or direct current;

[0046] The controlled end of the power module 1 is connected to the control end of the DSP processor 4, the output end of the power module 1 is connected to the power supply end of the load 2, the acquisition end of the voltage acquisition sensor 3 is connected to the output end of the load 2, and the output end of the voltage acquisition sensor 3 is connected to the input end of the DSP processor 4;

[0047] See also Figure 2 , wherein the power module 1 includes three identical full-bridge inverter sub-modules;

[0048] The first full-bridge inverter submodule includes: four identical switch tubes, a first variable capacitor and a first power supply end; the input end of the first switch tube T1 is connected to the output end of the third switch tube T3, the output end of the first switch tube T1 is connected to the output end of the second switch tube T2, the input end of the second switch tube T2 is connected to the output end of the fourth switch tube T4, the input end of the third switch tube T3 is connected to the input end of the fourth switch tube T4, and the output end of the second switch tube T2 and the input end of the fourth switch tube T4 are respectively connected to the first power supply end;

[0049] The first output end of the first full-bridge inverter module is connected between the input end of the first switch tube T1 and the output end of the third switch tube T3, and the second output end of the first full-bridge inverter module is connected between the input end of the second switch tube T2 and the output end of the fourth switch tube T4 through the first variable capacitor;

[0050] The second full-bridge inverter submodule includes: four identical switch tubes, a second variable capacitor and a second power supply end; the input end of the fifth switch tube T5 is connected to the output end of the seventh switch tube T7, the output end of the fifth switch tube T5 is connected to the output end of the sixth switch tube T6, the input end of the sixth switch tube T6 is connected to the output end of the eighth switch tube, the input end of the seventh switch tube T7 is connected to the input end of the eighth switch tube T8, and the output end of the sixth switch tube T6 and the input end of the eighth switch tube T8 are respectively connected to the second power supply end;

[0051] The first output end of the second full-bridge inverter module is connected between the input end of the fifth switch tube T5 and the output end of the seventh switch tube T7, and the second output end of the second full-bridge inverter module is connected between the input end of the sixth switch tube T6 and the output end of the eighth switch tube T8 through the second variable capacitor;

[0052] The third full-bridge inverter submodule includes: four identical switch tubes, a third variable capacitor and a third power supply end; the input end of the ninth switch tube T9 is connected to the output end of the eleventh switch tube T11, the output end of the ninth switch tube T9 is connected to the output end of the tenth switch tube T10, the input end of the tenth switch tube T10 is connected to the output end of the twelfth switch tube T12, the input end of the eleventh switch tube T11 is connected to the input end of the twelfth switch tube T12, and the output end of the tenth switch tube T10 and the input end of the twelfth switch tube T12 are respectively connected to the third power supply end;

[0053] The first output end of the third full-bridge inverter module is connected between the input end of the ninth switch tube T9 and the output end of the eleventh switch tube T11, and the second output end of the third full-bridge inverter module is connected between the input end of the tenth switch tube T10 and the output end of the twelfth switch tube T12 through the third variable capacitor;

[0054] The second output end of the first full-bridge inverter module, the second output end of the second full-bridge inverter module, and the second output end of the third full-bridge inverter module are connected.

[0055] In this embodiment, the switch tubes are all N-type MOS tubes and diodes, the source of the N-type MOS tube is connected to the positive electrode of the diode, the drain of the N-type MOS tube is connected to the negative electrode of the diode, the input end of the switch tube is the source of the N-type MOS tube, and the output end of the switch tube is the drain of the N-type MOS tube. The voltage acquisition sensor 3 is a Hall sensor.

[0056] Working principle:

[0057] The voltage of the load 2 is collected by the voltage collection sensor 3 and sent to the DSP processor 4. The DSP processor 4 identifies the type of power supply required by the load 2, and then according to the three full-bridge inverter sub-modules set in the power module 1, the same power module 1 can output not only AC power but also DC power, thereby achieving the purpose of using one intelligent power supply circuit to charge various types of electrical devices.

[0058] As an improvement of the above solution, the first variable capacitor includes: a first diode, a second diode, a third diode, a fourth diode, a first P-type MOS transistor, a second P-type MOS transistor and a first capacitor;

[0059] The anode of the first diode is connected to the drain of the first P-type MOS tube, the cathode of the first diode is connected to the cathode of the second diode, the source of the first P-type MOS tube is connected to the source of the second P-type MOS tube, the drain of the second P-type MOS tube is connected to the anode of the second diode, the anode of the third diode is connected to the source of the first P-type MOS tube, the cathode of the third diode is connected to the drain of the first P-type MOS tube, the anode of the fourth diode is connected to the source of the second P-type MOS tube, and the cathode of the fourth diode is connected to the drain of the second P-type MOS tube;

[0060] The first end of the first capacitor is connected to the cathode of the first diode, and the second end of the first capacitor is connected to the source of the first P-type MOS transistor;

[0061] The first end of the first variable capacitor is connected between the anode of the first diode and the drain of the first P-type MOS transistor, and the first end of the second variable capacitor is connected between the drain of the second P-type MOS transistor and the anode of the second diode.

[0062] As an improvement of the above solution, the second variable capacitor includes: a fifth diode, a sixth diode, a seventh diode, an eighth diode, a third P-type MOS transistor, a fourth P-type MOS transistor and a second capacitor;

[0063] The anode of the fifth diode is connected to the drain of the third P-type MOS tube, the cathode of the fifth diode is connected to the cathode of the sixth diode, the source of the third P-type MOS tube is connected to the source of the fourth P-type MOS tube, the drain of the fourth P-type MOS tube is connected to the anode of the sixth diode, the anode of the seventh diode is connected to the source of the third P-type MOS tube, the cathode of the seventh diode is connected to the drain of the third P-type MOS tube, the anode of the eighth diode is connected to the source of the fourth P-type MOS tube, and the cathode of the eighth diode is connected to the drain of the fourth P-type MOS tube;

[0064] The first end of the second capacitor is connected to the cathode of the fifth diode, and the second end of the second capacitor is connected to the source of the third P-type MOS transistor;

[0065] The first end of the first variable capacitor is connected between the anode of the fifth diode and the drain of the third P-type MOS transistor, and the first end of the second variable capacitor is connected between the drain of the fourth P-type MOS transistor and the anode of the sixth diode.

[0066] As an improvement of the above solution, the third variable capacitor includes: a ninth diode, a tenth diode, an eleventh diode, a twelfth diode, a fifth P-type MOS transistor, a sixth P-type MOS transistor and a third capacitor;

[0067] The anode of the ninth diode is connected to the drain of the fifth P-type MOS tube, the cathode of the ninth diode is connected to the cathode of the tenth diode, the source of the fifth P-type MOS tube is connected to the source of the sixth P-type MOS tube, the drain of the sixth P-type MOS tube is connected to the anode of the tenth diode, the anode of the eleventh diode is connected to the source of the fifth P-type MOS tube, the cathode of the eleventh diode is connected to the drain of the fifth P-type MOS tube, the anode of the twelfth diode is connected to the source of the sixth P-type MOS tube, and the cathode of the twelfth diode is connected to the drain of the sixth P-type MOS tube;

[0068] A first end of the third capacitor is connected to the cathode of the ninth diode, and a second end of the third capacitor is connected to the source of the fifth P-type MOS transistor;

[0069] The first end of the first variable capacitor is connected between the anode of the ninth diode and the drain of the fifth P-type MOS transistor, and the first end of the second variable capacitor is connected between the drain of the sixth P-type MOS transistor and the anode of the tenth diode.

[0070] Specifically, see Figure 3 The principles of the first variable capacitor, the second variable capacitor and the third variable capacitor are the same, and the first variable capacitor is taken as an example for explanation.

[0071] If the value of the first variable capacitor is the rated value, current flows into the first end of the first variable capacitor, passes through the first diode DX1 to reach the first capacitor positive plate, starts from the first capacitor negative plate through the third diode Dx3, and then flows out from the second end of the first variable capacitor.

[0072] If the capacitance value is 0, current flows into the first end of the first variable capacitor, PWM is set to a high level, current flows into the drain of the first P-type MOS tube and flows out of the source, then passes through the third diode Dx3, and then flows out of the second end of the first variable capacitor; by controlling the on-off time of the P-type MOS tube, the equivalent capacitance value of the external circuit can be continuously and steplessly adjusted from 0 to C.

[0073] Another embodiment of the present invention provides a DSP processing method, which is applied to the intelligent power supply circuit, and includes the following steps:

[0074] S10, in response to identifying that the load 2 is a DC load 2, the load 2 selects any one of the first output end of the first full-bridge inverter submodule of the intelligent power supply circuit, the first output end of the second full-bridge inverter submodule, the first output end of the third full-bridge inverter submodule, and the second output end of the first full-bridge inverter submodule;

[0075] S20, in response to identifying that the load 2 is a single-phase AC load, the load 2 selects any one of the first output end of the first full-bridge inverter submodule, the first output end of the second full-bridge inverter submodule, the first output end of the third full-bridge inverter submodule, and the second output end of the first full-bridge inverter submodule of the intelligent power supply circuit;

[0076] S30, in response to identifying that the load 2 is a three-phase AC load, the three phases of the load 2 respectively select the first output end of the first full-bridge inverter submodule, the first output end of the second full-bridge inverter submodule, and the first output end of the third full-bridge inverter submodule of the intelligent power supply circuit.

[0077] As an improvement of the above solution, the method further includes:

[0078] In response to identifying that the load 2 is a three-phase AC load, if the load 2 has a neutral line, the neutral line is connected to the second output end of the first full-bridge inverter submodule.

[0079] As an improvement of the above solution, in response to identifying that the load 2 is a DC load, after the load 2 switches on the first output end of the first full-bridge inverter submodule of the intelligent power supply circuit, the first output end of the second full-bridge inverter submodule, any one of the first output end of the third full-bridge inverter submodule, and the second output end of the first full-bridge inverter submodule, the method further includes:

[0080] After detecting that the positive and negative electrodes of the load 2 are connected in reverse, the PWM signals of the controlled end of the first switch tube T1 and the controlled end of the fourth switch tube T4 are controlled to be low level, and the first switch tube T1 and the fourth switch tube T4 are controlled to be turned off;

[0081] The PWM signal controlling the controlled end of the second switch tube T2 and the controlled end of the third switch tube T3 is at a high level, and the first switch tube T1 and the fourth switch tube T4 are controlled to be turned on.

[0082] As an improvement of the above solution, the method further includes:

[0083] The electric energy of the load 2 collected by the voltage collection sensor 3 is calculated according to a preset Kalman filter SOC estimation method to obtain the electric energy of the load 2;

[0084] The PWM signal is adjusted according to the electrical quantity of the load 2 to adjust the output power.

[0085] Another embodiment of the present invention provides a DSP processing system, including the DSP processing method.

[0086] Compared with the prior art, the gating method and DSP processing system disclosed in the embodiment of the present invention, after identifying the type of load 2 (i.e., DC load, single-phase AC load, three-phase AC load), control the power supply module 1 to select different output terminals to achieve the purpose of outputting different types of currents.

[0087] For easier understanding, the following example is used for further explanation:

[0088] 1. DC output mode

[0089] See also Figure 2 , taking the first full-bridge inverter module as an example, the two ends of the DC load are connected to the first output end of the first full-bridge inverter module and the second output end of the first full-bridge inverter module. The DSP processor 4 detects this state, outputs PWM1 and PWM4 as high level, the first switch tube T1 and the fourth switch tube T4 are turned on, PWM2 and PWM3 are low level, and the second switch tube T2 and the third switch tube T3 are turned off. The voltage between the first output end of the first full-bridge inverter module and the second output end of the first full-bridge inverter module is the voltage U of the first power supply terminal E1, and the current flows out from the positive pole of the first power supply terminal E1, flows to the load 2 through the first switch tube T1, flows out from the other end of the load 2, passes through the fourth switch tube T4, and flows to the negative pole of the first power supply terminal E1.

[0090] When the DSP processor 4 detects that the positive and negative poles of the load 2 are connected in reverse, the outputs PWM1 and PWM4 are low level, the first switch tube T1 and the fourth switch tube T4 are turned off, PWM2 and PWM3 are high level, and the second switch tube T2 and the third switch tube T3 are turned on. The voltage between the first output end of the first full-bridge inverter module and the second output end of the first full-bridge inverter module is the voltage of the first power supply terminal E1, and the current flows out from the positive pole of the first power supply terminal E1, flows to the load 2 through the second switch tube T2, flows out from the other end of the load 2, passes through the third switch tube T3, and flows to the negative pole of the first power supply terminal E1.

[0091] 2. Single-phase AC output mode

[0092] See also Figure 2 , take the first full-bridge inverter module as an example to illustrate, the two ends of the AC load are connected to the first output end of the first full-bridge inverter module and the second output end of the first full-bridge inverter module. Assume that before time t1, the first switch tube T1 and the fourth switch tube T4 are turned on, and the output voltage is Ud. At time t1, the gate signals PWM2 and PWM4 of the second switch tube T2 and the fourth switch tube T4 are reversed, and the fourth switch tube T4 is turned off. However, because the current i in the inductance of load 2 cannot change suddenly, the second switch tube T2 cannot be turned on immediately, and the diode in the second switch tube T2 continues to flow. Because the diodes in the first switch tube T1 and the second switch tube T2 are turned on at the same time, the output voltage is 0. At time t2, the gate signals of the first switch tube T1 and the third switch tube T3 are reversed, the first switch tube T1 is turned off, and the third switch tube T3 cannot be turned on immediately. The diode in the third switch tube T3 continues to flow, and forms a current channel with the diode in the second switch tube T2, and the output voltage is -Ud. When the current of load 2 passes through zero and starts to reverse, the diodes in the second switch tube T2 and the third switch tube T3 are cut off, and the second switch tube T2 and the third switch tube T3 start to conduct, and the output voltage is still not -Ud. At t3, the gate signals of the second switch tube T2 and the fourth switch tube T4 are reversed again, the second switch tube T2 is cut off, and the fourth switch tube T4 cannot be turned on immediately, the diode in the fourth switch tube T4 continues to flow, and the output voltage is 0 again. This process is repeated, so that the positive and negative pulse widths of the output voltage Ud are t1 respectively. By changing t1, the output voltage can be adjusted.

[0093] 3. Star-type three-phase AC output mode

[0094] See also Figure 2In terms of circuit structure, the circuit topology has four output terminals, namely output terminal A, output terminal B, output terminal C and output terminal 0. The control of the three full-bridge inverter sub-circuits uses the control of the single-phase AC output mode, but the phase of the control signal adopts phase shift control, that is, PWM5, PWM6, PWM7 and PWM8 lag the phase of PWM1, PWM2, PWM3 and PWM4 by 120° respectively, and PWM9, PWM10, PWM11 and PWM12 lag the phase of PWM5, PWM6, PWM7 and PWM8 by 120° respectively. Since the output terminal 0 of the three full-bridge inverter sub-modules is connected, the power supply is a three-phase star connection.

[0095] It should be noted that the device embodiments described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. In addition, in the accompanying drawings of the device embodiments provided by the present invention, the connection relationship between the modules indicates that there is a communication connection between them, which may be specifically implemented as one or more communication buses or signal lines. A person of ordinary skill in the art may understand and implement it without paying any creative effort.

[0096] The above is a preferred embodiment of the present invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A DSP processing method, characterized in that: Applied to an intelligent power supply circuit, the intelligent power supply circuit comprises: a power supply module with multiple power outputs, a load, a voltage acquisition sensor for collecting power from the load, and a DSP processor for determining the type of the load according to the power collected by the voltage acquisition sensor and controlling the power supply module to output corresponding alternating current or direct current; The controlled end of the power module is connected to the control end of the DSP processor, the output end of the power module is connected to the power supply end of the load, the acquisition end of the voltage acquisition sensor is connected to the output end of the load, and the output end of the voltage acquisition sensor is connected to the input end of the DSP processor; Wherein, the power module includes three identical full-bridge inverter submodules; The first full-bridge inverter submodule includes: four identical switch tubes, a first variable capacitor and a first power supply end; the source of the first switch tube is connected to the drain of the third switch tube, the drain of the first switch tube is connected to the drain of the second switch tube, the source of the second switch tube is connected to the drain of the fourth switch tube, the source of the third switch tube is connected to the source of the fourth switch tube, and the drain of the second switch tube and the drain of the fourth switch tube are respectively connected to the first power supply end; The first output end of the first full-bridge inverter module is connected between the source of the first switch tube and the drain of the third switch tube, and the second output end of the first full-bridge inverter module is connected between the source of the second switch tube and the drain of the fourth switch tube through the first variable capacitor; The second full-bridge inverter submodule includes: four identical switch tubes, a second variable capacitor and a second power supply end; the source of the fifth switch tube is connected to the drain of the seventh switch tube, the drain of the fifth switch tube is connected to the drain of the sixth switch tube, the source of the sixth switch tube is connected to the drain of the eighth switch tube, the source of the seventh switch tube is connected to the source of the eighth switch tube, and the drain of the sixth switch tube and the source of the eighth switch tube are respectively connected to the second power supply end; The first output end of the second full-bridge inverter module is connected between the source of the fifth switch tube and the drain of the seventh switch tube, and the second output end of the second full-bridge inverter module is connected between the source of the sixth switch tube and the drain of the eighth switch tube through the second variable capacitor; The third full-bridge inverter submodule includes: four identical switch tubes, a third variable capacitor and a third power supply end; the source of the ninth switch tube is connected to the drain of the eleventh switch tube, the drain of the ninth switch tube is connected to the drain of the tenth switch tube, the source of the tenth switch tube is connected to the drain of the twelfth switch tube, the source of the eleventh switch tube is connected to the source of the twelfth switch tube, and the drain of the tenth switch tube and the source of the twelfth switch tube are respectively connected to the third power supply end; The first output end of the third full-bridge inverter module is connected between the source of the ninth switch tube and the drain of the eleventh switch tube, and the second output end of the third full-bridge inverter module is connected between the source of the tenth switch tube and the drain of the twelfth switch tube through the third variable capacitor; The second output end of the first full-bridge inverter module, the second output end of the second full-bridge inverter module, and the second output end of the third full-bridge inverter module are connected; The DSP processing method comprises the following steps: In response to identifying that the load is a DC load, the load selects any one of the first output end of the first full-bridge inverter submodule, the first output end of the second full-bridge inverter submodule, the first output end of the third full-bridge inverter submodule, and the second output end of the first full-bridge inverter submodule of the intelligent power supply circuit; In response to identifying that the load is a single-phase AC load, the load selects any one of the first output end of the first full-bridge inverter submodule, the first output end of the second full-bridge inverter submodule, the first output end of the third full-bridge inverter submodule, and the second output end of the first full-bridge inverter submodule of the intelligent power supply circuit; In response to identifying that the load is a three-phase AC load, the three phases of the load respectively select the first output end of the first full-bridge inverter submodule, the first output end of the second full-bridge inverter submodule, and the first output end of the third full-bridge inverter submodule of the intelligent power supply circuit.

2. The DSP processing method according to claim 1, characterized in that: The first variable capacitor includes: a first diode, a second diode, a third diode, a fourth diode, a first P-type MOS transistor, a second P-type MOS transistor and a first capacitor; The anode of the first diode is connected to the drain of the first P-type MOS tube, the cathode of the first diode is connected to the cathode of the second diode, the source of the first P-type MOS tube is connected to the source of the second P-type MOS tube, the drain of the second P-type MOS tube is connected to the anode of the second diode, the anode of the third diode is connected to the source of the first P-type MOS tube, the cathode of the third diode is connected to the drain of the first P-type MOS tube, the anode of the fourth diode is connected to the source of the second P-type MOS tube, and the cathode of the fourth diode is connected to the drain of the second P-type MOS tube; The first end of the first capacitor is connected to the cathode of the first diode, and the second end of the first capacitor is connected to the source of the first P-type MOS transistor; The first end of the first variable capacitor is connected between the anode of the first diode and the drain of the first P-type MOS transistor, and the first end of the second variable capacitor is connected between the drain of the second P-type MOS transistor and the anode of the second diode.

3. The DSP processing method according to claim 1, characterized in that: The second variable capacitor includes: a fifth diode, a sixth diode, a seventh diode, an eighth diode, a third P-type MOS transistor, a fourth P-type MOS transistor and a second capacitor; The anode of the fifth diode is connected to the drain of the third P-type MOS tube, the cathode of the fifth diode is connected to the cathode of the sixth diode, the source of the third P-type MOS tube is connected to the source of the fourth P-type MOS tube, the drain of the fourth P-type MOS tube is connected to the anode of the sixth diode, the anode of the seventh diode is connected to the source of the third P-type MOS tube, the cathode of the seventh diode is connected to the drain of the third P-type MOS tube, the anode of the eighth diode is connected to the source of the fourth P-type MOS tube, and the cathode of the eighth diode is connected to the drain of the fourth P-type MOS tube; The first end of the second capacitor is connected to the cathode of the fifth diode, and the second end of the second capacitor is connected to the source of the third P-type MOS transistor; The first end of the first variable capacitor is connected between the anode of the fifth diode and the drain of the third P-type MOS transistor, and the first end of the second variable capacitor is connected between the drain of the fourth P-type MOS transistor and the anode of the sixth diode.

4. The DSP processing method according to claim 1, characterized in that: The third variable capacitor includes: a ninth diode, a tenth diode, an eleventh diode, a twelfth diode, a fifth P-type MOS transistor, a sixth P-type MOS transistor and a third capacitor; The anode of the ninth diode is connected to the drain of the fifth P-type MOS tube, the cathode of the ninth diode is connected to the cathode of the tenth diode, the source of the fifth P-type MOS tube is connected to the source of the sixth P-type MOS tube, the drain of the sixth P-type MOS tube is connected to the anode of the tenth diode, the anode of the eleventh diode is connected to the source of the fifth P-type MOS tube, the cathode of the eleventh diode is connected to the drain of the fifth P-type MOS tube, the anode of the twelfth diode is connected to the source of the sixth P-type MOS tube, and the cathode of the twelfth diode is connected to the drain of the sixth P-type MOS tube; A first end of the third capacitor is connected to the cathode of the ninth diode, and a second end of the third capacitor is connected to the source of the fifth P-type MOS transistor; The first end of the first variable capacitor is connected between the anode of the ninth diode and the drain of the fifth P-type MOS transistor, and the first end of the second variable capacitor is connected between the drain of the sixth P-type MOS transistor and the anode of the tenth diode.

5. The DSP processing method according to claim 1, characterized in that: The method further comprises: In response to identifying that the load is a three-phase AC load, if the load has a neutral line, the neutral line is connected to the second output terminal of the first full-bridge inverter submodule.

6. The DSP processing method according to claim 1, characterized in that: In response to identifying that the load is a DC load, after the load switches on the first output end of the first full-bridge inverter submodule of the intelligent power supply circuit, the first output end of the second full-bridge inverter submodule, any one of the first output end of the third full-bridge inverter submodule, and the second output end of the first full-bridge inverter submodule, the method further includes: After detecting that the positive and negative electrodes of the load are connected in reverse, controlling the PWM signals of the controlled end of the first switch tube and the controlled end of the fourth switch tube to be low level, and controlling the first switch tube and the fourth switch tube to be turned off; The PWM signals of the controlled end of the second switch tube and the controlled end of the third switch tube are controlled to be high level, and the first switch tube and the fourth switch tube are controlled to be turned on.

7. A DSP processing system, characterized in that: It includes the DSP processing method as described in any one of claims 1-6.

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