Electronic system and method of operating an electronic system

Abstract

The present invention provides an electronic system and a method for operating the electronic system for adaptively adjusting allocation of a memory area. The electronic system includes: a modem configured to perform data transmission; at least one intellectual property block configured to execute an application; a boot data memory configured to store first boot data corresponding to an alternative mode and second boot data corresponding to a standard mode; a main memory including a first area allocated to the modem in the standard mode and a second area allocated to at least one intellectual property block; and a processor configured to boot the main memory by using the first boot data or the second boot data based on an operation mode, wherein the processor is configured to reallocate the first area to at least one intellectual property block by re-booting the main memory by using the first boot data in the alternative mode.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of Korean Patent Application Nos. 10-2018-0094615 and 10-2019-0037954 filed on August 13, 2018 and April 1, 2019, respectively, in the Korean Intellectual Property Office, the disclosure of each of which is incorporated herein by reference in its entirety. Technical Field

[0003] Example embodiments of the inventive concepts relate to an electronic system and / or a method of operating the electronic system. For example, at least some example embodiments relate to an electronic system for adaptively adjusting allocation of a memory region and / or a method of operating the electronic system. Background Art

[0004] Factors that affect the performance of electronic systems include the capacity and throughput of the main memory or system memory and the access speed. Generally speaking, dynamic random-access memory (DRAM) can be used as the main memory.

[0005] The limited resources of the main memory may be shared by a plurality of functional blocks. Therefore, since unused functional blocks not used by the user may be allocated to the limited resources of the main memory, the overall system speed may be reduced. Summary of the invention

[0006] Example embodiments of the inventive concept provide an electronic system for effectively using limited main memory resources through an alternative mode and a method of operating the electronic system.

[0007] According to an example embodiment of the inventive concept, an electronic system is provided, comprising: a modem configured to perform data transmission; at least one IP block configured to execute an application; a boot data memory configured to store first boot data and second boot data, the first boot data corresponding to an alternate mode and the second boot data corresponding to a standard mode; a main memory comprising a first area and a second area, such that in the standard mode, the first area is allocated to the modem and the second area is allocated to the at least one IP block; and a processor configured to boot the main memory using one of the first boot data or the second boot data based on an operation mode, such that in the alternate mode, the processor reallocates the first area to the at least one IP block by rebooting the main memory using the first boot data.

[0008] According to another example embodiment of the inventive concept, a method of operating an electronic system including a plurality of functional blocks and a main memory is provided, the method including: when a first area of ​​the main memory is allocated to a first functional block among the plurality of functional blocks, receiving an alternative mode entry command requesting entry into an alternative mode; loading first boot data corresponding to the alternative mode; rebooting the main memory by executing the first boot data; and after rebooting the main memory, reallocating the first area of ​​the main memory allocated to the first functional block to a second functional block among the plurality of functional blocks.

[0009] According to another example embodiment of the inventive concept, an electronic system is provided, comprising: an input device configured to receive an input; a plurality of function blocks, each of which is configured to operate according to a user request, the plurality of function blocks including a first function block and a second function block; a boot data memory configured to store first boot data and second boot data, the first boot data corresponding to an alternative mode and the second boot data corresponding to a standard mode; a main memory including a first area and a second area, the first area being associated with driving the first function block and the second area being associated with driving the second function block; and a processor configured to boot the electronic system using one of the first boot data and the second boot data based on an operation mode, and in response to the input device receiving an alternative mode entry command from a user, adjust a ratio of memory areas of the first area and the second area by rebooting the electronic system using the first boot data. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Example embodiments of the inventive concept will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0011] Figure 1 is a block diagram of an electronic system according to an example embodiment of the inventive concept.

[0012] Figure 2 is a flowchart of a method of operating an electronic system according to an example embodiment of the inventive concept.

[0013] Figure 3 is a flowchart of a method of operating an electronic system according to an example embodiment of the inventive concept.

[0014] Figure 4 is a simplified diagram for describing the operation of an electronic system according to an example embodiment of the inventive concept.

[0015] Figure 5 is a view for describing a method of operating an electronic system according to an example embodiment of the inventive concept.

[0016] Figure 6 is a flowchart of a method of operating an electronic system according to an example embodiment of the inventive concept.

[0017] Figure 7 is a simplified diagram of an electronic system according to an example embodiment of the inventive concepts.

[0018] Figure 8 is a flowchart of a method of operating an electronic system according to an example embodiment of the inventive concept.

[0019] Fig.9A is a simplified diagram illustrating the operation of an electronic system according to an example embodiment of the inventive concept.

[0020] Fig. 9B is a simplified diagram illustrating the operation of an electronic system according to an example embodiment of the inventive concept.

[0021] Fig. 9C is a simplified diagram illustrating the operation of an electronic system according to an example embodiment of the inventive concept.

[0022] Fig.10 is a flowchart of a method of operating an electronic system according to an example embodiment of the inventive concept.

[0023] Fig.11 is a simplified diagram of an electronic system according to an example embodiment of the inventive concepts.

[0024] Fig.12 is a flowchart of a method of operating an electronic system according to an example embodiment of the inventive concept.

[0025] Fig.13 is a simplified diagram illustrating a communication device including an electronic system according to an example embodiment of the inventive concept. DETAILED DESCRIPTION

[0026] Figure 1 is a block diagram of an electronic system 10 according to an example embodiment of the inventive concepts.

[0027] refer to Figure 1 , the electronic system 10 may include an input device 110, a processor 120, a boot data memory 130, a main memory 140, a modem (modulator-demodulator, modem) 150, and an intellectual property (IP) block 160. In an example embodiment, the input device 110, the processor 120, the boot data memory 130, the main memory 140, the modem 150, and the IP block 160 may be communicatively connected to each other via a bus (not shown).

[0028] The electronic system 10 may be a fixed electronic system such as a desktop computer, a workstation, a server, or an Internet of Things (IoT) device, or a portable electronic system such as a laptop computer, a cellular phone, a personal digital assistant (PDA), or a tablet personal computer (PC).

[0029] The input device 110 through which the user inputs various requests to the electronic system 10 may include a keyboard, a pointing device, and a touch panel. In an example embodiment, the user may trigger the processor 120 to enter and exit the alternative mode through the input device 110. In an example embodiment, when the user triggers to enter the alternative mode, the input device 110 may output an alternative mode entry command CMD_AM to the processor 120. In an example embodiment, when the user triggers to exit the alternative mode, the input device 110 may output a standard mode entry command CMD_SM to the processor 120.

[0030] The term "standard mode" used herein may refer to a mode in which the modem 150, the IP block 160, and the system operate by allocating the memory device of the first area AR1 to the modem 150. In addition, the term "alternative mode" used herein may refer to a mode in which the modem 150 does not operate by removing the memory area allocated to the modem 150.

[0031] The processor 120 may be referred to as a processing unit, and may include a core for executing an instruction set (e.g., Intel Architecture-32 (IA-32), 64-bit extension IA-32, x86-64, PowerPC, Scalable processor architecture (Sparc), Microprocessor without Interlocked Pipelined Stages (MIPS), Advanced RISC Machine (ARM), or IA-64), such as a central processing unit (CPU), a microprocessor, an application processor (AP), a digital signal processor (DSP), or a graphics processing unit (GPU). The processor 120 may access the boot data memory 130 and the main memory 140, and may change various settings related to the main memory 140 during the boot process.

[0032] The boot data memory 130 for storing the first boot data BD1 and the second boot data BD2 for booting may be a read-only memory (ROM). The boot data memory 130 may store the first boot data BD1 and the second boot data BD2. When the input device 110 outputs the alternate mode entry command CMD_AM to the processor 120, the processor 120 may read the first boot data BD1 corresponding to the alternate mode by accessing the boot data memory 130. When the input device 110 outputs the standard mode entry command CMD_SM to the processor 120, the processor 120 may read the second boot data BD2 corresponding to the standard mode by accessing the boot data memory 130.

[0033] The main memory 140 may store data processed by a plurality of functional blocks. In an example embodiment, the main memory 140 may include a volatile memory such as a dynamic random access memory (DRAM), a static random access memory (SRAM), a synchronous dynamic random access memory (SDRAM), a latch, a flip-flop, or a register; or a non-volatile memory such as an electrically erasable programmable read-only memory (EEPROM), a flash memory, a phase change random access memory (PRAM), a resistive random access memory (RRAM), a nano-floating gate memory (NFGM), a polymer random access memory (PoRAM), a magnetic random access memory (MRAM), or a ferroelectric random access memory (FRAM).

[0034] The term “functional block” used herein may refer to a software block or a hardware block for performing various operations of the electronic system 10. In an example embodiment, the functional blocks may include a modem 150 and an IP block 160.

[0035] The main memory 140 may include a first area AR1 allocated to the modem 150 and a second area AR2 allocated to the IP block 160. In an example embodiment, the modem 150 may communicate with the outside by using the memory area allocated to the first area AR1, and the IP block 160 may operate an application by using the memory area allocated to the second area AR2.

[0036] According to an example embodiment of the inventive concept, when the processor 120 receives the alternate mode entry command CMD_AM, the processor 120 may reboot the main memory 140 based on the first memory region information A1 included in the first boot data BD1. In another example embodiment, the processor 120 may reboot the electronic system 10 based on the first boot data BD1 in response to the alternate mode entry command CMD_AM.

[0037] In an example embodiment, the processor 120 may reallocate the first area AR1 of the main memory 140 allocated to the modem 150 to the IP block 160. That is, the processor 120 may change the memory area included in the first area AR1 to the second area AR2 allocated to the IP block 160.

[0038] In another example embodiment, when the processor 120 receives the standard mode entry command CMD_SM, the processor 120 may reboot the main memory 140 based on the second memory area information A2 included in the second boot data BD2. In an example embodiment, the processor 120 may reallocate at least a portion of the second area AR2 of the main memory 140 allocated to the IP block 160 to the modem 150. That is, the processor 120 may change at least a portion of the memory area included in the second area AR2 to the first area AR1 allocated to the modem 150. Therefore, the user can adaptively operate the limited resources of the main memory 140.

[0039] The modem 150 may access a network external to the electronic system 10. In example embodiments, the modem 150 may include a communication link, and the communication link may include a wired link, an optical link, a wireless link, or other links.

[0040] The IP block 160 may be a reusable unit of logic, cell, or integrated circuit layout design. The IP block 160 may be used as a building block within an application-specific integrated circuit (ASIC) or field programmable gate array (FPGA) design. The IP block 160 may be a hard core, a solid core, and / or a soft core. The IP block 160 may include at least one functional block that operates an application executed in the electronic system 10. In an example embodiment, the IP block 160 may include a hardware block, such as a GPU, an image sensor, a camera, or a neural network processing unit (NPU) and a software block that executes various applications.

[0041] The processor 120 and / or the IP block 160 may be implemented using a processing circuit such as hardware including a logic circuit, a hardware / software combination such as a processor executing software, or a combination thereof. For example, the processing circuit may include, but is not limited to, a central processing unit (CPU), an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable gate array (FPGA), a system-on-chip (SoC), a programmable logic unit, a microprocessor, or an application-specific integrated circuit (ASIC), etc.

[0042] Figure 2 is a flowchart of a method of operating the electronic system 10 according to an example embodiment of the inventive concept.

[0043] refer to Figure 1 and Figure 2 , in operation S110 , the electronic system 10 may receive an alternative mode entry command CMD_AM from a user.

[0044] In operation S120 , the electronic system 10 may load the first boot data BD1 in response to the alternative mode entry command CMD_AM.

[0045] In operation S130 , the electronic system 10 may reboot the main memory 140 based on the first boot data BD1 .

[0046] In operation S140, in the process of rebooting the main memory 140, the electronic system 10 may change the memory area of ​​the main memory 140 corresponding to the first area AR1 to the second area AR2 allocated to the IP block 160. To this end, the first boot data BD1 according to the example embodiment of the inventive concept may include reallocation information for reallocating the first area AR1 usable by the modem 150 to the IP block 160.

[0047] According to an example embodiment of the inventive concept, the electronic system 10 can effectively use limited resources of the main memory 140 by providing the alternative mode to the user so that the first area AR1 of the main memory 140 allocated to the modem 150 is allocated to other IP blocks 160. In addition, according to an example embodiment of the inventive concept, when the electronic system 10 enters the alternative mode, the electronic system 10 can reboot the main memory 140, and thus the alternative mode having different memory allocation information from the standard mode can be stably performed in the main memory 140.

[0048] Figure 3 is a flowchart of a method of operating the electronic system 10 according to an example embodiment of the inventive concept.

[0049] refer to Figure 1 and Figure 3 , in operation S210 , the electronic system 10 may receive a standard mode entering command CMD_SM from a user.

[0050] In operation S220 , the electronic system 10 may load the second boot data BD2 in response to the standard mode entry command CMD_SM.

[0051] In operation S230 , the electronic system 10 may reboot the main memory 140 based on the second boot data BD2 .

[0052] In operation S240 , in the process of rebooting the main memory 140 , the electronic system 10 may change at least a portion of a memory area of ​​the main memory 140 corresponding to the second area AR2 allocated to the IP block 160 to the first area AR1 .

[0053] In an example embodiment of the inventive concept, the electronic system 10 may enter the standard mode by reallocating at least a portion of the second area AR2 allocated to the IP block 160 to the modem 150 based on the standard mode entry command CMD_SM. In addition, when the electronic system 10 enters the standard mode, the electronic system 10 may reboot the main memory 140, and thus the standard mode having different allocation information from the alternative mode may be stably performed in the main memory 140.

[0054] Figure 4 is a simplified diagram for describing the operation of the electronic system 10 according to an example embodiment of the inventive concept.

[0055] refer to Figure 1 and Figure 4 , in the standard mode, the main memory 140 may be divided into a first area AR1 allocated to the modem 150, a second area AR2 allocated to the IP block 160, and a third area AR3 allocated to the system. The modem 150 may perform various communication operations by using the memory device included in the first area AR1, and the IP block 160 may operate an application by using the memory device included in the second area AR2 according to a user's request.

[0056] When the electronic system 10 is triggered by the user to enter the alternative mode, the electronic system 10 may enter the alternative mode by rebooting using the first boot data BD1. The electronic system 10 may enter the alternative mode by reallocating the memory device included in the first area AR1 to the second area AR2. That is, the electronic system 10 may enter the alternative mode by reallocating the memory device allocated to the modem 150 to the IP block 160.

[0057] When the electronic system 10 is triggered by the user to exit the alternative mode, the electronic system 10 may enter the standard mode by rebooting using the second boot data BD2. The electronic system 10 may enter the standard mode by reallocating at least some of the memory devices included in the second area AR2 to the first area AR1. That is, the electronic system 10 may enter the standard mode by reallocating at least some of the memory devices allocated to the IP block 160 to the modem 150.

[0058] Figure 5 is a view for describing a method of operating the electronic system 10 according to an example embodiment of the inventive concept.

[0059] refer to Figure 5 , the electronic system 10 may include an input device 110. In an example embodiment, the input device 110 may be a touch panel that also serves as an output device. The input device 110 may include an alternative mode entry icon ICO_Ent and an alternative mode exit icon ICO_Ext.

[0060] In an example embodiment, through the input device 110 , an alternate mode entry icon ICO_Ent may be displayed to the user in the standard mode, and an alternate mode exit icon ICO_Ext may be displayed to the user in the alternate mode.

[0061] The user can enter the alternative mode by selecting the alternative mode entry icon ICO_Ent in the standard mode. In an example embodiment, when the user selects the alternative mode entry icon ICO_Ent, the electronic system 10 can reallocate the memory area of ​​the main memory allocated to the modem to the IP block. Therefore, the user can use the alternative mode that operates with the IP block instead of the modem.

[0062] The user can enter the standard mode by selecting the alternative mode exit icon ICO_Ext in the alternative mode. In an example embodiment, when the user selects the alternative mode exit icon ICO_Ext, the electronic system 10 can reallocate at least some of the memory area of ​​the main memory allocated to the IP block to the modem. Therefore, the user can use the standard mode operating with the modem and the IP block.

[0063] Figure 6 1 is a flow chart of a method of operating an electronic system 10 according to an example embodiment of the inventive concept. In detail, Figure 6 It is shown Figure 2 Flowchart of operation S130 in which the system is rebooted based on the first boot data.

[0064] refer to Figure 1 and Figure 6In operation S131 , when the electronic system 10 receives the alternate mode entry command CMD_AM, the electronic system 10 may execute an operating system (OS) suitable for the alternate mode based on the first boot data BD1 stored in the boot data memory 130 .

[0065] In operation S132 , the electronic system 10 may execute at least one initialization file for the alternative mode based on the first boot data BD1 .

[0066] In operation S133 , the electronic system 10 may load a user interface (UI) suitable for the alternative mode.

[0067] although Figure 6 The operation of the electronic system 10 when the electronic system 10 enters the alternative mode is shown, but this is only an example, and even when the electronic system 10 receives the standard mode entry command CMD_SM, the electronic system 10 can also enter the standard mode by loading the OS, initialization file, and UI based on the boot data associated with the standard mode.

[0068] Figure 7 1 is a simplified diagram of an electronic system 10a according to an example embodiment of the inventive concept. Figure 1 The descriptions done are the same as the descriptions.

[0069] refer to Figure 7 The electronic system 10a may include an input device 110a, a processor 120a, a boot data memory 130, a main memory 140a, a modem 150a, a first IP block group 161a, and a second IP block group 162a.

[0070] The boot data memory 130a may store first boot data BD1 corresponding to the replacement mode, second boot data BD2 corresponding to the standard mode, third boot data BD3 corresponding to the first sub-replacement mode, fourth boot data BD4 corresponding to the second sub-replacement mode, and fifth boot data BD5 corresponding to the third sub-replacement mode. Figures 1 to 6 The alternative mode and the standard mode are described, and thus repeated explanation thereof will not be given.

[0071] The main memory 140a may include a first area AR1 allocated to the modem 150a and a second area AR2 allocated to the IP block. The second area AR2 may be divided into a first sub-area SAR1 allocated to the first IP block group 161a and a second sub-area SAR2 allocated to the second IP block group 162a.

[0072] The IP blocks may be grouped into a first IP block group 161a and a second IP block group 162a. In an example embodiment, the IP blocks may be grouped into a first IP block group 161a and a second IP block group 162a based on characteristics of the IP blocks, and in another example embodiment, the IP blocks may be grouped into a first IP block group 161a and a second IP block group 162a based on user setting information. Figures 1 to 6 As described, the first IP block group 161a may perform various operations by using the first sub-region SAR1, and the second IP block group 162a may perform various operations by using the second sub-region SAR2.

[0073] The processor 120a may receive the sub-replacement mode entering command CMD_SAM. The processor 120a may receive one of the third to fifth boot data BD3 to BD5 from the boot data memory 130a in response to the sub-replacement mode entering command CMD_SAM.

[0074] In an example embodiment, the sub-substitution mode entry command CMD_SAM may correspond to the first to third sub-substitution modes, and the processor 120a may receive one of the third to fifth boot data BD3 to BD5 based on the sub-substitution mode entry command CMD_SAM. The processor 120a may reboot the main memory 140a based on one of the third memory region information A3 included in the third boot data BD3, the fourth memory region information A4 included in the fourth boot data BD4, and the fifth memory region information A5 included in the fifth boot data BD5.

[0075] In example embodiments, the processor 120a may reallocate a memory region included in the first sub-region SAR1 of the main memory 140a allocated to the first IP block group 161a to the second IP block group 162a based on the third boot data BD3.

[0076] In example embodiments, the processor 120a may reallocate a memory region included in the first sub-region SAR1 of the main memory 140a allocated to the first IP block group 161a to the modem 150a based on the fourth boot data BD4.

[0077] In example embodiments, the processor 120 a may reallocate a memory area included in the first area AR1 of the main memory 140 a allocated to the modem 150 a to the first IP block group 161 a based on the fifth boot data BD5 .

[0078] Figure 8 1 is a flow chart of a method for operating an electronic system 10a according to an example embodiment of the inventive concept. In detail, Figure 82 is a flowchart illustrating an example in which the electronic system 10 a enters the first sub-replacement mode by using the third boot data BD3 .

[0079] refer to Figure 7 and Figure 8 , in operation S310 , the electronic system 10 a may receive a sub-alternative mode entering command CMD_SAM.

[0080] In operation S320 , the electronic system 10 a may load the third boot data BD3 in response to the sub substitution mode entry command CMD_SAM.

[0081] In operation S330 , the electronic system 10 a may reboot the main memory 140 a based on the third boot data BD3 .

[0082] In operation S340 , in the process of rebooting the main memory 140 a , the electronic system 10 a may change a memory area of ​​the main memory 140 a corresponding to the first sub area SAR1 to the second sub area SAR2 allocated to the second IP block group 162 a .

[0083] According to an example embodiment of the inventive concept, the electronic system 10a can effectively use limited resources of the main memory 140a by providing a first sub-replacement mode to a user so that the first sub-area SAR1 of the main memory 140a allocated to the first IP block group 161a is allocated to the second IP block group 162a.

[0084] Furthermore, according to example embodiments of the inventive concept, when the electronic system 10a enters the first sub-alternative mode, the first sub-alternative mode having different allocation information from the standard mode and the alternative mode may be stably performed by rebooting the main memory 140a.

[0085] Fig.9A 1 is a simplified diagram for describing the operation of the electronic system 10a according to an example embodiment of the inventive concept. In detail, Fig.9A An example of the electronic system 10a entering or exiting the first sub-alternation mode is shown.

[0086] refer to Figure 7 and Fig.9A, in the standard mode, the main memory 140a may be divided into a first area AR1 allocated to the modem 150a, a first sub-area SAR1 allocated to the first IP block group 161a, a second sub-area SAR2 allocated to the second IP block group 162a, and a third area AR3 allocated to the system. The modem 150a may perform various communication operations by using the memory device included in the first area AR1, the first IP block group 161a may implement a user's request by using the memory device included in the first sub-area SAR1, and the second IP block group 162a may implement a user's request by using the memory device included in the second area SAR2.

[0087] When the electronic system 10a is triggered by the user to enter the first sub-replacement mode, the electronic system 10a may reboot the main memory 140a by using the third boot data BD3, and may enter the first sub-replacement mode by reallocating the memory devices included in the first area SAR1 to the second sub-area SAR2. That is, the electronic system 10a may enter the first sub-replacement mode by reallocating the memory devices allocated to the first IP block group 161a to the second IP block group 162a.

[0088] When the electronic system 10a is triggered by the user to exit the first sub-alternation mode, the electronic system 10a may reboot the main memory 140a by using the second boot data BD2, and may enter the standard mode by reallocating at least some of the memory devices included in the second sub-area SAR2 to the first sub-area SAR1. That is, the electronic system 10a may enter the standard mode by reallocating at least some of the memory devices allocated to the second IP block group 162a to the first IP block group 161a.

[0089] Fig. 9B 1 is a simplified diagram for describing the operation of the electronic system 10a according to an example embodiment of the inventive concept. In detail, Fig. 9B 1 is a simplified diagram showing an example of the electronic system 10a entering or exiting the second sub-alternation mode. Fig.9A The descriptions done are the same as the descriptions.

[0090] refer to Fig. 9B , when the electronic system 10a is triggered by the user to enter the second sub-replacement mode, the electronic system 10a may reboot the main memory 140a by using the fourth boot data BD4, and may enter the second sub-replacement mode by reallocating the memory device included in the first sub-area SAR1 to the first area AR1. That is, the electronic system 10a may enter the second sub-replacement mode by reallocating the memory device included in the first IP block group 161a to the modem 150a.

[0091] When the electronic system 10a is triggered by the user to exit the second sub-alternation mode, the electronic system 10a may reboot the main memory 140a by using the second boot data BD2, and may enter the standard mode by reallocating at least some of the memory devices included in the first area AR1 to the first sub-area SAR1. That is, the electronic system 10a may enter the standard mode by reallocating at least some of the memory devices allocated to the modem 150a to the first IP block group 161a.

[0092] Fig. 9C 1 is a simplified diagram for describing the operation of the electronic system 10a according to an example embodiment of the inventive concept. In detail, Fig. 9C is a simplified diagram showing an example of the electronic system 10a entering or exiting the third sub-alternation mode.

[0093] refer to Fig. 9C , when the electronic system 10a is triggered by the user to enter the third sub-replacement mode, the electronic system 10a may reboot the main memory 140a by using the fifth boot data BD5, and may enter the third sub-replacement mode by reallocating the memory devices included in the first area AR1 to the first sub-area SAR1. That is, the electronic system 10a may enter the third sub-replacement mode by reallocating the memory devices allocated to the modem 150a to the first IP block group 161a.

[0094] When the electronic system 10a is triggered by the user to exit the third sub-alternation mode, the electronic system 10a may reboot the main memory 140a by using the second boot data BD2, and may enter the standard mode by reallocating at least some of the memory devices included in the first sub-area SAR1 to the first area AR1. That is, the electronic system 10a may enter the standard mode by reallocating at least some of the memory devices allocated to the first IP block group 161a to the modem 150a.

[0095] Fig.10 is a flowchart of a method of operating an electronic system 10 a according to an example embodiment of the inventive concept.

[0096] refer to Figure 7 and Fig.10 In operation S410, the electronic system 10a may receive grouping information. A user may group one or more IP blocks into one of the first IP block group 161a and the second IP block group 162a. The grouping information may include information about IP blocks belonging to the first IP block group 161a and IP blocks belonging to the second IP block group 162a determined after the user's grouping.

[0097] In operation S420 , the electronic system 10 a may determine IP blocks belonging to the first IP block group 161 a and IP blocks belonging to the second IP block group 162 a based on the grouping information.

[0098] Fig.11 is a diagram of an electronic system 10 a according to an example embodiment of the inventive concept.

[0099] refer to Fig.11 , the electronic system 10a may display a window for specifying the first IP block group 161a and the second IP block group 162a to the user, and the user may determine the IP blocks belonging to the first IP block group 161a and the second IP block group 162a. The electronic system 10a may generate the determined IP blocks belonging to the first IP block group 161a and the second IP block group 162a as grouping information.

[0100] exist Fig.11 In the embodiment, the user can move the third IP block IP3 from the second IP block group 162a to the first IP block group 161a, and the electronic system 10a can generate grouping information so that the first IP block IP1, the second IP block IP2 and the third IP block IP3 are included in the first IP block group 161a, and the fourth IP block IP4 and the fifth IP block IP5 are included in the second IP block group 162a.

[0101] Fig.12 is a flowchart of a method of operating an electronic system according to an example embodiment of the inventive concept.

[0102] refer to Fig.12 , in operation S510 , the electronic system may receive an alternative mode entry command from a user.

[0103] In operation S520 , the electronic system may load boot data corresponding to an operation mode corresponding to the alternative mode entry command.

[0104] In operation S530 , the electronic system may reboot the main memory based on the loaded boot data.

[0105] In operation S540 , the electronic system may adjust a ratio of a memory area allocated from the main memory to each functional block based on the boot data.

[0106] In an example embodiment, the electronic system may adjust a ratio of a memory area allocated to at least one functional block based on ratio information included in an alternative mode entry command received from a user.

[0107] In example embodiments, the electronic system may adjust a ratio of a memory area allocated to at least one functional block based on desired (or alternatively, predetermined) ratio information.

[0108] Fig.13 is a simplified diagram illustrating a communication device including an electronic system according to an example embodiment of the inventive concept.

[0109] refer to Fig.13 , the home machine 2100, the home appliance 2120, the entertainment device 2140 and the access point (AP) 2200 may comprise an electronic system according to an example embodiment of the inventive concept. In some embodiments, the home machine 2100, the home appliance 2120, the entertainment device 2140 and the access point 2200 may constitute an Internet of Things (IoT) network system. Fig.13 The communication devices shown in are examples, and it should be understood that Fig.13 Other communication devices not shown in the figure may include a wireless communication apparatus according to example embodiments of the inventive concept.

[0110] The home machine 2100, the home appliance 2120, the entertainment device 2140, and the access point 2200 can adaptively adjust the memory area allocated to at least one functional block by using the electronic system according to the example embodiment of the inventive concept. In the example embodiment, the home machine 2100, the home appliance 2120, the entertainment device 2140, and the access point 2200 can be rebooted in response to the alternative mode entry command to reallocate the memory area allocated to the modem to other IP blocks. Therefore, the home machine 2100, the home appliance 2120, the entertainment device 2140, and the access point 2200 can effectively use limited memory resources.

[0111] Although the example embodiments of the inventive concept have been specifically depicted and described with reference to their embodiments by using specific terms, the embodiments and terms are only used to explain the example embodiments of the inventive concept and should not be interpreted as limiting the scope of the example embodiments of the inventive concept as defined by the claims. Therefore, it will be understood by those of ordinary skill in the art that substitutions, changes and modifications can be made without departing from the scope of the invention as defined by the claims. Therefore, the scope of the example embodiments of the inventive concept is not limited by the specific implementation of the example embodiments of the inventive concept, but is limited by the appended claims.

Claims

1. An electronic system comprising: a modem configured to perform data transmission; at least one intellectual property block configured to execute the application; a boot data memory configured to store first boot data and second boot data, the first boot data corresponding to the alternative mode and the second boot data corresponding to the standard mode; a main memory comprising a first area and a second area, such that in the standard mode, the first area is allocated to the modem and the second area is allocated to the at least one intellectual property block; as well as A processor is configured to boot the main memory using one of the first boot data or the second boot data based on an operation mode, so that in the alternative mode, the processor reallocates the first area to the at least one intellectual property block by rebooting the main memory using the first boot data.

2. The electronic system according to claim 1, further comprising: an input device configured to receive input from a user, wherein The processor is further configured to reassign the first region to the at least one intellectual property block in response to an alternate mode entry command received via the input device.

3. The electronic system according to claim 2, further comprising: an output device configured to display an alternate mode entry icon, wherein The input device is further configured to detect whether the alternate mode entry icon is selected, and The processor is also configured to reboot the main memory using the first boot data in response to selection of the alternate mode entry icon.

4. The electronic system according to claim 2, wherein: When a standard mode entry command is received, the processor is further configured to reallocate at least a portion of the second area to the modem by rebooting the main memory using the second boot data.

5. The electronic system of claim 1 , wherein the first boot data includes information associated with an operating system associated with executing the alternate mode, and wherein The processor is also configured to execute the operating system based on the first boot data.

6. The electronic system of claim 1, wherein the first boot data includes information associated with at least one initialization file corresponding to the alternate mode, and wherein The processor is further configured to execute the at least one initialization file based on the first boot data.

7. The electronic system of claim 1, wherein the first boot data includes information associated with a user interface used in the alternate mode, and wherein The processor is further configured to load the user interface into the main memory based on the first boot data.

8. The electronic system according to claim 1, wherein the at least one intellectual property block comprises a first intellectual property block group and a second intellectual property block group, the at least one intellectual property block is grouped into the first intellectual property block group and the second intellectual property block group according to a set standard, and wherein The processor is further configured to store third boot data corresponding to a sub-replacement mode so that in the sub-replacement mode, the first intellectual property block group does not access the main memory.

9. The electronic system of claim 8, wherein the second area includes a first sub-area and a second sub-area, the first sub-area is allocated to the first intellectual property block group and the second sub-area is allocated to the second intellectual property block group, and wherein The processor is further configured to reallocate the first sub-region to the second intellectual property block group by rebooting the main memory using the third boot data in response to a sub-replacement mode entry command.

10. The electronic system of claim 8, wherein the second area includes a first sub-area and a second sub-area, the first sub-area is allocated to the first intellectual property block group and the second sub-area is allocated to the second intellectual property block group, and wherein The processor is configured to reallocate the first sub-region to the modem by rebooting the main memory using the third boot data in response to a sub-replacement mode entry command.

11. The electronic system of claim 8, wherein the processor is further configured to: Receive packet information, and The first intellectual property block group and the second intellectual property block group are divided based on the grouping information.

12. The electronic system according to claim 1, wherein the at least one IP block comprises a first IP block group and a second IP block group, the at least one IP block is grouped into the first IP block group and the second IP block group according to a set standard, and wherein the processor is further configured to: storing third boot data corresponding to the sub-alternation mode, and In response to a sub-replacement mode entry command, the first area is reallocated to the first intellectual property block group by rebooting the main memory using the third boot data.

13. A method of operating an electronic system comprising a plurality of functional blocks and a main memory, the method comprising: receiving an alternate mode entry command requesting entry into an alternate mode when the first area of ​​the main memory is allocated to a first functional block among the plurality of functional blocks; loading first boot data corresponding to the alternative mode; rebooting the main memory by executing the first boot data; as well as After the main memory is rebooted, the first area of ​​the main memory allocated to the first functional block is reallocated to a second functional block among the plurality of functional blocks.

14. The method of operating an electronic system according to claim 13, wherein The first functional block includes a modem, and The first boot data contains information for allocating the first area to at least one intellectual property block for executing an application.

15. The method of operating an electronic system according to claim 13, further comprising: receiving a standard mode entry command requesting to enter the standard mode; loading second boot data corresponding to the standard mode; rebooting the electronic system by executing the second boot data; as well as After the electronic system is rebooted, the first area is reallocated to the first functional block.

16. The method of operating an electronic system according to claim 13, wherein the first boot data includes information associated with an operating system and a user interface for executing the alternate mode, and wherein the rebooting comprises: executing the operating system based on the first boot data; as well as The user interface is displayed based on the first guide data.

17. The method of operating an electronic system according to claim 13, wherein the main memory includes a second area for driving at least one intellectual property block, and wherein the rebooting comprises: The first region is assigned to the at least one intellectual property block.

18. The method of operating an electronic system according to claim 17, wherein the at least one IP block comprises a first IP block group and a second IP block group, wherein the rebooting comprises: In response to a sub-substitution mode entry command requesting entry into a sub-substitution mode, rebooting the main memory using third boot data corresponding to the sub-substitution mode; as well as The first sub-area of ​​the second area allocated to the first intellectual property block group is reallocated to the second intellectual property block group.

19. The method of operating an electronic system according to claim 17, wherein the at least one intellectual property block includes a first intellectual property block group and a second intellectual property block group, and wherein the rebooting comprises: In response to a sub-substitution mode entry command requesting entry into a sub-substitution mode, rebooting the main memory using third boot data corresponding to the sub-substitution mode; as well as The first sub-area of ​​the second area allocated to the first intellectual property block group is reallocated to the first functional block.

20. The method of operating an electronic system according to claim 17, wherein the at least one IP block comprises a first IP block group and a second IP block group, wherein the rebooting comprises: In response to a sub-substitution mode entry command requesting entry into a sub-substitution mode, rebooting the main memory using third boot data corresponding to the sub-substitution mode; as well as The first region is reallocated to the first intellectual property block group.

21. An electronic system comprising: an input device configured to receive input; A plurality of function blocks, each configured to operate according to a user request, the plurality of function blocks comprising a first function block and a second function block; a boot data memory configured to store first boot data and second boot data, the first boot data corresponding to the alternative mode and the second boot data corresponding to the standard mode; a main memory, comprising a first area and a second area, wherein the first area is associated with driving the first functional block, and the second area is associated with driving the second functional block; as well as The processor is configured to booting the electronic system using one of the first boot data and the second boot data based on an operation mode, and In response to the input device receiving an alternate mode entry command from a user, a ratio of memory areas of the first area and the second area is adjusted by rebooting the electronic system using the first boot data.

22. The electronic system of claim 21, wherein the processor is further configured to reallocate a portion of the main memory associated with the first region to the second region in the alternate mode.

23. The electronic system of claim 21, wherein the first boot data includes information associated with an operating system for executing the alternate mode and a user interface used in the alternate mode, and wherein The processor is further configured to execute the operating system based on the first boot data, and to load the user interface to the electronic system.

24. The electronic system of claim 21, wherein the processor is further configured to: Receive ratio information, and The ratio of the memory areas of the first area and the second area is adjusted based on the ratio information.

25. The electronic system of claim 21, wherein the first functional block comprises a modem, and the second functional block comprises at least one intellectual property block for executing an application.

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